WO1999012199A1 - Packaged integrated circuit - Google Patents

Packaged integrated circuit Download PDF

Info

Publication number
WO1999012199A1
WO1999012199A1 PCT/DE1998/002207 DE9802207W WO9912199A1 WO 1999012199 A1 WO1999012199 A1 WO 1999012199A1 DE 9802207 W DE9802207 W DE 9802207W WO 9912199 A1 WO9912199 A1 WO 9912199A1
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
packaged integrated
cover
chip
circuit according
Prior art date
Application number
PCT/DE1998/002207
Other languages
German (de)
French (fr)
Inventor
Detlef Houdeau
Peter Stampka
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Publication of WO1999012199A1 publication Critical patent/WO1999012199A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the invention relates to a packaged integrated circuit with a semiconductor chip, in which at least the surface having the electrical circuit is provided with a non-conductive cover.
  • Such a packaged integrated circuit is known from WO 95/19645.
  • the cover there is typically formed with glass, aluminum oxide ceramic, byrillium oxide ceramic or sapphire. Such a cover is intended to protect the integrated circuit from optical examination or mechanical damage but also from a chemical attack.
  • the problem is solved in that the side of the cover facing a chip surface is provided with etching structures in order to achieve better adhesion to a connecting substance connecting the chip and the cover.
  • pockets are formed into which an adhesive advantageously used as a connecting material between the chip and the cover can penetrate and, due to the positive fit thus achieved, to a particularly good connection leads between chip and cover.
  • an adhesive advantageously used as a connecting material between the chip and the cover can penetrate and, due to the positive fit thus achieved, to a particularly good connection leads between chip and cover.
  • One advantage of these adhesive bags is the increased percentage of surface area. Furthermore, an increased shear strength of the adhesive layer is set.
  • tungsten carbide e.g. WC-6C0
  • WC-6C0 tungsten carbide
  • Wolfang carbide which is less sensitive to brittle fracture, is extremely stable against chemical and thermal influences. The stiffness mentioned above means that a sandwich structure in which a semiconductor chip is arranged between two tungsten carbide covers withstands the mechanical loads on the chip, for example in chip card applications.
  • eutectically bondable that is to say weldable
  • material can be used as the connecting material. This material can be welded to a previously metallized chip side.
  • the tungsten carbide contains borosilicate glass as a filler in order to enable anodic bonding of the cover. Since the cover is made in one piece and is only then connected to the semiconductor chip by means of the connecting material, recesses or openings can be provided in order to allow contacting of the chip, as is taught, for example, in WO 95/19645 . In an advantageous manner, however, the chip connections are led out to the side, so that no processing of the cover is necessary.
  • the cover can already be applied to the wafer and serve as a carrier for the latter.
  • the sawing of the bare wafer and the associated sawing edge problems, which lead to crack sensitivity, are eliminated.
  • the microcracks that frequently occur when the individual chips are removed from the wafer composite can also be prevented.
  • a semiconductor chip is provided on both main surfaces with a tungsten carbide cover which is etched according to the invention by means of a connecting material, a chip safe is formed in which the semiconductor chip and the integrated circuits implemented thereon are optimally protected, so that they can be used particularly advantageously in chip card applications which are particularly critical to security .

Abstract

The invention relates to a packaged integrated circuit, comprising a semiconductor chip. At least the surface with the electric circuit is provided with a non-conductive covering. The side of said covering facing towards a chip surface is provided with etched structures so that it adheres better to a bonding substance joining the chip and the covering. The covering is advantageously made from tungsten carbide (e.g., WC-6Co).

Description

Be s ehr e ibungBe honest
Verpackte integrierte SchaltungPackaged integrated circuit
Die Erfindung betrifft eine verpackte integrierte Schaltung mit einem Halbleiterchip, bei dem zumindest die die elektrische Schaltung aufweisende Oberfläche mit einer nichtleiten- den Abdeckung versehen ist .The invention relates to a packaged integrated circuit with a semiconductor chip, in which at least the surface having the electrical circuit is provided with a non-conductive cover.
Eine solche verpackte integrierte Schaltung ist aus der WO 95/19645 bekannt. Die dortige Abdeckung ist typischerweise mit Glas, Aluminiumoxidkeramik, Byrilliumoxidkeramik oder Sa- phir gebildet. Eine solche Abdeckung soll dem Schutz der integrierten Schaltung vor optischer Untersuchung oder mechanischer Beschädigung aber auch vor einem chemischen Angriff dienen.Such a packaged integrated circuit is known from WO 95/19645. The cover there is typically formed with glass, aluminum oxide ceramic, byrillium oxide ceramic or sapphire. Such a cover is intended to protect the integrated circuit from optical examination or mechanical damage but also from a chemical attack.
Ein solcher Schutz ist jedoch nur gegeben, wenn die Abdeckung nicht in einfacher Weise entfernt werden kann.However, such protection is only given if the cover cannot be easily removed.
Das der Erfindung zugrunde liegende Problem ist es daher, bei einer gattungsgemäßen verpackten integrierten Schaltung ein Ablösen der Abdeckung erheblich zu erschweren oder gar zu verhindern.The problem on which the invention is based is therefore to make it considerably more difficult or even to prevent the cover from being detached in the case of a packaged integrated circuit of the generic type.
Das Problem wird dadurch gelöst, daß die einer Chipoberfläche zugewandte Seite der Abdeckung mit ÄtzStrukturen versehen ist, um eine bessere Haftung zu einem den Chip und die Abdek- kung verbindenden Verbindungsstoff zu erzielen.The problem is solved in that the side of the cover facing a chip surface is provided with etching structures in order to achieve better adhesion to a connecting substance connecting the chip and the cover.
Durch das Anätzen der einer Chipoberfläche zugewandten Seite der Abdeckung werden Taschen gebildet, in die ein als Verbin- dungsstoff zwischen Chip und Abdeckung vorteilhafterweise verwendete Klebstoff eindringen kann und aufgrund des somit erzielten Formschlusses zu einer besonders guten Verbindung zwischen Chip und Abdeckung führt. Ein Vorteil dieser Klebstofftaschen ist der erhöhte Flächentraganteil . Des weiteren wird eine erhöhte Schubfestigkeit der Klebstofflage eingestellt.By etching the side of the cover facing a chip surface, pockets are formed into which an adhesive advantageously used as a connecting material between the chip and the cover can penetrate and, due to the positive fit thus achieved, to a particularly good connection leads between chip and cover. One advantage of these adhesive bags is the increased percentage of surface area. Furthermore, an increased shear strength of the adhesive layer is set.
In einer besonders vorteilhaften Ausgestaltung der Erfindung wird als Abdeckungsmaterial Wolframkarbid (z.B. WC-6C0) verwendet .In a particularly advantageous embodiment of the invention, tungsten carbide (e.g. WC-6C0) is used as the covering material.
Wolframkarbid ist nach dem Diamant mit einer Vickershärte von etwa 6.000 bis 7.000 HV der zweithärteste Werkstoff. Neben den harten Materialeigenschaften ist dieser Werkstoff mit seinem Ausdehnungskoeffizienten α=5K" an das Silizium (α=2,5K"1) dilathermisch relativ gut angepaßt, so daß nur ge- ringe, durch Temperaturänderungen erzeugte Eigenspannungen zwischen Chip und Abdeckung auftritt. Der wenig sprödbruch- empfindliche Werkstoff Wolfangkarbid ist gegen chemische und thermische Einflüsse äußerst stabil . Durch die oben angesprochene Steifigkeit widersteht ein Sandwich-Aufbau, bei dem ein Halbleiterchip zwischen zwei Wolframkarbidabdeckungen angeordnet ist, den mechanischen Belastungen des Chips beispielsweise bei Chipkarten-Anwendungen.Tungsten carbide is the second hardest material after diamond with a Vickers hardness of around 6,000 to 7,000 HV. In addition to the hard material properties, this material, with its expansion coefficient α = 5K ", is relatively well adapted to the silicon (α = 2.5K " 1 ) so that only slight residual stresses between the chip and cover occur due to temperature changes. Wolfang carbide, which is less sensitive to brittle fracture, is extremely stable against chemical and thermal influences. The stiffness mentioned above means that a sandwich structure in which a semiconductor chip is arranged between two tungsten carbide covers withstands the mechanical loads on the chip, for example in chip card applications.
Bei Wolframkarbid erfolgt mit dem Ätzabtrag ein lokales Ent- fernen des Binders Kobalt (Co) . Das verbleibende Sinter-WC- Gefüge besitzt noch ausreichend hohe mechanische Festigkeit.In the case of tungsten carbide, local removal of the cobalt (Co) binder takes place with the etching removal. The remaining sintered toilet structure still has a sufficiently high mechanical strength.
Statt des Klebers kann in einer weiteren Ausbildung der Erfindung eutektisch bondbares, das heißt schweißbares Material als Verbindungsstoff verwendet werden. Dieses Material kann mit einer zuvor metallisierten Chipseite verschweißt werden.In a further embodiment of the invention, instead of the adhesive, eutectically bondable, that is to say weldable, material can be used as the connecting material. This material can be welded to a previously metallized chip side.
In einer anderen Ausgestaltung der verpackten integrierten Schaltung enthält das Wolframkarbid Borsilikatglas als Füll- stoff, um eine anodische Bondung der Abdeckung zu ermöglichen. Da die Abdeckung in einem Stück angefertigt wird und erst dann mittels des Verbindungsmaterials mit dem Halbleiterchip verbunden wird, können zwar Ausnehmungen bzw. Durchbrüche vorgesehen werden, um eine Kontaktierung des Chips zu ermög- liehen, wie dies beispielsweise in der WO 95/19645 gelehrt wird. In vorteilhafter Weise werden die Chipanschlüsse jedoch seitlich herausgeführt, so daß keine Bearbeitung der Abdek- kung nötig ist.In another embodiment of the packaged integrated circuit, the tungsten carbide contains borosilicate glass as a filler in order to enable anodic bonding of the cover. Since the cover is made in one piece and is only then connected to the semiconductor chip by means of the connecting material, recesses or openings can be provided in order to allow contacting of the chip, as is taught, for example, in WO 95/19645 . In an advantageous manner, however, the chip connections are led out to the side, so that no processing of the cover is necessary.
Die Abdeckung kann bereits auf den Wafer aufgebracht werden und als Träger für diesen dienen. Außerdem entfällt so das Sägen des nackten Wafers und die damit verbundene zur Rißempfindlichkeit führende Sägekantenproblematik. Auch die beim Herausnehmen der einzelnen Chips aus dem Waferverbund häufig auftretende Mikrorisse können verhindert werden.The cover can already be applied to the wafer and serve as a carrier for the latter. In addition, the sawing of the bare wafer and the associated sawing edge problems, which lead to crack sensitivity, are eliminated. The microcracks that frequently occur when the individual chips are removed from the wafer composite can also be prevented.
Wenn ein Halbleiterchip auf beiden Hauptoberflächen mit einer erfindungsgemäß angeätzen Wolframkarbidabdeckung mittels eines Verbindungsstoffes versehen ist, entsteht ein Chiptresor, in dem der Halbleiterchip und die darauf realisierten integrierten Schaltungen optimal geschützt sind, so daß sie in den besonders sicherheitskritischen Anwendungen in Chipkarten besonders vorteilhaft verwendet werden können. If a semiconductor chip is provided on both main surfaces with a tungsten carbide cover which is etched according to the invention by means of a connecting material, a chip safe is formed in which the semiconductor chip and the integrated circuits implemented thereon are optimally protected, so that they can be used particularly advantageously in chip card applications which are particularly critical to security .

Claims

Patentansprüche claims
1. Verpackte integrierte Schaltung mit einem Halbleiterchip, bei dem zumindest die die elektrische Schaltung aufweisende Oberfläche mit einer nicht-leitenden Abdeckung versehen ist, dadurch gekennzeichnet, daß die einer Chipoberfläche zugewandte Seite der Abdeckung mit Ätzstrukturen versehen ist, um eine bessere Haftung zu einem den Chip und die Abdeckung verbindenden Verbindungs- stoff zu erzielen.1. Packaged integrated circuit with a semiconductor chip in which at least the surface having the electrical circuit is provided with a non-conductive cover, characterized in that the side of the cover facing the chip surface is provided with etching structures in order to provide better adhesion to one of the To achieve chip and cover connecting connective material.
2. Verpackte integrierte Schaltung nach Anspruch 1, dadurch gekennzeichnet, daß die Abdeckung mit Wolframkarbid gebildet ist.2. Packaged integrated circuit according to claim 1, characterized in that the cover is formed with tungsten carbide.
3. Verpackte integrierte Schaltung nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß der Verbindungsstoff ein Klebstoff ist.3. Packaged integrated circuit according to claim 1 or 2, characterized in that the connecting material is an adhesive.
4. Verpackte integrierte Schaltung nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß der Verbindungsstoff aus eutek- tisch bondbarem Material besteht.4. Packaged integrated circuit according to claim 1 or 2, characterized in that the connecting material consists of eutectically bondable material.
5. Verpackte integrierte Schaltung nach Anspruch 2, dadurch gekennzeichnet, daß das Wolframkarbid Borsilikatglas als5. Packaged integrated circuit according to claim 2, characterized in that the tungsten carbide is borosilicate glass
Füllstoff enthält.Contains filler.
6. Verpackte integrierte Schaltung nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß die Schaltungs- anschlusse an der oder den nicht mit einer Abdeckung versehenen Seite (n) des Halbleiterchips herausgeführt sind. 6. Packaged integrated circuit according to one of the preceding claims, characterized in that the circuit connections are led out on the side (s) not provided with a cover (s) of the semiconductor chip.
PCT/DE1998/002207 1997-09-03 1998-07-31 Packaged integrated circuit WO1999012199A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE1997138549 DE19738549C1 (en) 1997-09-03 1997-09-03 Packaged integrated circuit for protecting from mechanical, chemical and ambient conditioning damage
DE19738549.4 1997-09-03

Publications (1)

Publication Number Publication Date
WO1999012199A1 true WO1999012199A1 (en) 1999-03-11

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Application Number Title Priority Date Filing Date
PCT/DE1998/002207 WO1999012199A1 (en) 1997-09-03 1998-07-31 Packaged integrated circuit

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DE (1) DE19738549C1 (en)
WO (1) WO1999012199A1 (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01309333A (en) * 1988-06-07 1989-12-13 Nec Corp Resin sealed type semiconductor device
JPH0669381A (en) * 1992-08-20 1994-03-11 Nec Corp Semiconductor integrated circuit device
WO1995019645A1 (en) * 1994-01-17 1995-07-20 Shellcase Ltd. Methods and apparatus for producing integrated circuit devices
JPH0870067A (en) * 1994-08-26 1996-03-12 Nippon Steel Corp Semiconductor device
US5578867A (en) * 1994-03-11 1996-11-26 Ramtron International Corporation Passivation method and structure using hard ceramic materials or the like
DE19649652A1 (en) * 1996-11-29 1998-06-04 Siemens Ag Semiconductor chip and wafer with a protective layer, in particular made of ceramic

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01309333A (en) * 1988-06-07 1989-12-13 Nec Corp Resin sealed type semiconductor device
JPH0669381A (en) * 1992-08-20 1994-03-11 Nec Corp Semiconductor integrated circuit device
WO1995019645A1 (en) * 1994-01-17 1995-07-20 Shellcase Ltd. Methods and apparatus for producing integrated circuit devices
US5578867A (en) * 1994-03-11 1996-11-26 Ramtron International Corporation Passivation method and structure using hard ceramic materials or the like
JPH0870067A (en) * 1994-08-26 1996-03-12 Nippon Steel Corp Semiconductor device
DE19649652A1 (en) * 1996-11-29 1998-06-04 Siemens Ag Semiconductor chip and wafer with a protective layer, in particular made of ceramic

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 014, no. 108 (E - 0896) 27 February 1990 (1990-02-27) *
PATENT ABSTRACTS OF JAPAN vol. 018, no. 311 (E - 1561) 14 June 1994 (1994-06-14) *
PATENT ABSTRACTS OF JAPAN vol. 096, no. 007 31 July 1996 (1996-07-31) *

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Publication number Publication date
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