WO1999012198A1 - Method for connecting electronic components with a carrier substrate - Google Patents

Method for connecting electronic components with a carrier substrate Download PDF

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Publication number
WO1999012198A1
WO1999012198A1 PCT/DE1998/001088 DE9801088W WO9912198A1 WO 1999012198 A1 WO1999012198 A1 WO 1999012198A1 DE 9801088 W DE9801088 W DE 9801088W WO 9912198 A1 WO9912198 A1 WO 9912198A1
Authority
WO
WIPO (PCT)
Prior art keywords
tr
component
ñgersubstrat
carrier substrate
solder
Prior art date
Application number
PCT/DE1998/001088
Other languages
German (de)
French (fr)
Inventor
Markus Koch
Reiner Schuetz
Hongquan Jiang
Herbert Reichl
Original Assignee
Robert Bosch Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to DE19738399A priority Critical patent/DE19738399A1/en
Priority to DE19738399.8 priority
Application filed by Robert Bosch Gmbh filed Critical Robert Bosch Gmbh
Publication of WO1999012198A1 publication Critical patent/WO1999012198A1/en

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Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10152Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/10165Alignment aids
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/17Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • H01L2224/1751Function
    • H01L2224/17515Bump connectors having different functions
    • H01L2224/17517Bump connectors having different functions including bump connectors providing primarily mechanical support
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112Aligning
    • H01L2224/81136Aligning involving guiding structures, e.g. spacers or supporting members
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112Aligning
    • H01L2224/81136Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/81138Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/8114Guiding structures outside the body
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81193Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01032Germanium [Ge]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01075Rhenium [Re]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09427Special relation between the location or dimension of a pad or land and the location or dimension of a terminal
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10734Ball grid array [BGA]; Bump grid array
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/0465Shape of solder, e.g. differing from spherical shape, different shapes due to different solder pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • Y02P70/60Greenhouse gas [GHG] capture, heat recovery or other energy efficient measures relating to production or assembly of electric or electronic components or products, e.g. motor control
    • Y02P70/613Greenhouse gas [GHG] capture, heat recovery or other energy efficient measures relating to production or assembly of electric or electronic components or products, e.g. motor control involving the assembly of several electronic elements

Abstract

The invention concerns a method for connecting electronic components (2) with a carrier substrate (1), whereby at least a chip provided with signal-conducting solder bumps (10) is welded to contact surfaces (7) of the carrier substrate in a refusion soldering station. Between the carrier substrate and the component are located other solder bumps (11) isolated from the signal-conducting parts, and used as spacing elements for maintaining the component at a predetermined distance with respect to the carrier substrate, during the refusion soldering. In order to simplify the production and reduce the costs thereof, the soldering paste (11) for producing the solder bumps forming the spacing elements is applied directly on the carrier substrate, and then a chip provided with signal-conducting solder bumps is positioned on the carrier substrate such that the chip surface facing the latter is opposite the soldering paste on said substrate, and that during the subsequent refusion step, the component is soldered to the carrier substrate.

Description

A method for bonding of electronic components to a carrier substrate

State of the art

The invention relates to a process for the assembly of electronic components on a carrier substrate with the features specified in the preamble of claim 1.

It is already known to equip a carrier substrate with electronic components in the so-called flip-chip method. Here, a power semiconductor device on the

Terminal side, provided with a plurality of solder bumps, so-called "solder bumps", then turned to the terminal side down, on a provided with contact surfaces supporting substrate, which te a ceramic substrate, a printed circuit boards or may be a silicon substrate, placed, the arrangement of the contact surfaces on the supporting substrate corresponding to the chip to the height of the solder bumps. then, the solder bump in reflow soldering are soldered to the contact pads of the carrier substrate, wherein the solder bumps are melted nem reflow furnace in egg and wet the contact pads of the carrier substrate. the surface tension of the molten solder produces a force which stretches the component to the carrier substrate, whereby the distance between the component and the carrier substrate is decreased. Since the molten solder may get in the area associated with the contact surfaces of conductor tracks and then flows via the conductor tracks, is the problem that the distance between the component and the carrier substrate is undesirably extremely greatly reduced. However, a certain minimum distance is necessary in order to accommodate thermal stresses between the component and the carrier substrate. Also, the gap between the carrier substrate and the component is provided for the introduction of an adhesive, wherein the mechanical fixing of the component is used on the carrier substrate. Therefore, a solder mask is applied to the carrier substrate, which has small openings at the location of the contact surfaces. The openings define the properties for the wetting with solder available surface and prevent flow of the solder. The solder mask must be applied to the carrier substrate with extremely high precision. A displacement of the mask and of the openings on the contact surfaces of more than 50 microns is not permitted for conventional flip-chip components, for example, with a 200 micron pitch grid. For this reason, expensive and complex special process for applying solder mask is required.

From the document US 5,400,950 a method for assembly of flip-chip components on a carrier substrate is known in which the problems described above are avoided. This is achieved in that, provided on the connection side of the semiconductor device except those specified for the signal line bumps further isolated from the signal-carrying solder bumps, solder bumps, so-called "dummy bumps". The other solder bumps together with the provided to the signal line bumps, the so-called I / 0-bumps is generated in a manufacturing process to contact metallizations of the component. Furthermore metallizations are applied with a defined expansion to the carrier substrate, which kontaktie- ren the further solder bump when mounting the component on the carrier substrate. After the placement, the carrier substrate a Re is - flow-soldering station supplied in which the solder bumps are melted again this case, the molten solder reflowed, provided for the signal line bumps wet the pads on the carrier substrate and the conductor tracks and takes a waist-like shape. to, the surface tension of the reflowed solder bumps signal conducting stretches the component to the carrier substrate. In contrast, the melted, wet the spacers space provided further solder bumps, only the relatively small metallizations on the carrier substrate can and form outwardly curved bumps whose surface tension pushes the component from the carrier substrate. Depending on the number of additional bumps and the size of a Kräf- tegleichgewicht can be accurately adjusted between attractive and repulsive forces, and thus the distance between the component and the carrier substrate. Despite the advantages of this method, which can be seen in the fact that the use of an elaborately structured solder mask is avoided is a substantial disadvantage to be seen in that the further serving as spacer elements solder bumps are formed on the device. As a result, no standard components are used which are only provided with the signal-carrying bumps, but made solutions instead expensive specialty must be used, which are provided with the additional, provided as Abstandselernenten bumps and adapt to the respective application are , which become more expensive, the total cost.

Advantages of the Invention

The method according to the invention with the characterizing features of claim 1 avoids the disadvantages mentioned. As will be represents the distance between the component and the carrier substrate forming one alternate further solder bumps on the carrier substrate manufactured, may with the method advantageously also conventional flip-chip components are used which are only provided with the signal-carrying solder bumps. By producing provided as spacers solder bumps on the carrier substrate manufacturing effort overall is greatly reduced and it can be used particularly simple and well mastered techniques such as screen printing process to apply the solder. Particularly advantageously, the distance between the component and the carrier can be optimally adapted even after the production thereof to the respective requirements for any substrate flip-chip components, without the need for a new device would have to be made.

Advantageous embodiments and further developments of the invention are described in the features of the subclaims. By produced on the carrier substrate metallizations and the application of solder paste to the metallizations is advantageously achieved that the solder paste shrinks during melting on the metallizations, thereby forming on the carrier substrate spacer elements with a defined by the extension of the metallizations and the applied solder paste height. The solder paste can be applied easily in well-controlled screen printing process to the carrier substrate.

It is particularly advantageous that on carrier substrates, such as printed circuit boards, on which in addition to the flip-chip component further components, such as SMD components, can be fitted, the time required for the spacer elements solder paste together with the time required for the SMD soldering paste can be applied to the carrier substrate. therefore no additional manufacturing step is necessary for the production of other solder bumps, whereby the costs are considerably reduced. It is also advantageous to provide a solder mask on the supporting substrate, which has at least one recess at the location of the yet to be applied Fli chip devices. The solder mask covering the circuit traces on the carrier substrate and leaves free only the ends of which are arranged in the recess of the solder mask. By solder mask is achieved that the molten solder of the signal conductor bumps which completely wets the contact surfaces of the carrier substrate does not spread on the conductor tracks of the carrier substrate for reflow soldering. In this way, contamination of circuit parts and a Lötbrückenbildung is advantageously avoided.

drawing

An embodiment of the invention is illustrated in the drawing and is explained in more detail in the following description. It shows Fig. 1 shows a detail of a cross section through a carrier substrate with an attached thereon flip-chip component prior to reflow,

Fig. 2, the carrier substrate of FIG. 1 after the reflow soldering, Fig. 3 shows a detail of a plan view of a carrier substrate with a solder mask prior to assembly with a component.

Description of the embodiment

Fig. 1 shows a detail of a cross section through a supporting substrate 1, which may be a circuit board, a ceramic plate, a silicon substrate, or other known substrate. In the example shown here is a printed circuit board, see the upper side 4, for use with electrical and / or is provided electronic components and are formed on the conductor tracks 7 'in known manner (Fig. 3), the ends of which form contact surfaces 7 which serve for making electrical connection to the devices. There is provided the circuit board 1 with flip-chip components and SMD components (surface mounted device) to be fitted, of which only a single flip-chip device 2 is shown in FIGS. 1 to 3 At the mounting point of the flip-chip device 2, the upper surface 4 of the circuit board 1 with a pattern of small metal surfaces or metallization stanchions 9 is provided, which serve for the production of solder bumps. The metallizations are made of an easily wettable by the solder metal such as nickel, copper or gold, and can be made contact pads 7 on the circuit board 1 together with the conductor tracks 7 'and. The inventive process is carried out as follows. First, in a Lötpastendruckstation solder paste is printed on the circuit board. This can advantageously be carried out by screen printing. Here, solder paste 11 is printed on the pads of SMD components and tallisierungen simultaneously to the metal but 9. It is also possible to use other known techniques for applying the solder. It is crucial that a defined amount of solder is applied to the metallizations. As shown in FIG. 1, the solder 11 in this case be applied somewhat over the edge of the metallizations 9 out on the circuit board 1. Subsequently, the printed circuit board with surface mount devices is loaded, which are recorded with a vacuum cleaner and placed on the solder paste. Also, flip-chip components 2 are placed on the printed circuit board. 1 The flip-chip components are provided with a grid of circumferentially distributed solder bumps 10 which are formed on metallizations 8 on the connection side 3 of the device 2 in a known manner and for the management of signal flow between the component 2 and the contact areas 7 of the circuit board serve 1, wherein the pattern of the contact surfaces 7 on the circuit board 1 corresponds to the height of the solder bumps 10 of the component. 2 The flip-chip device 2 is placed with the side facing the circuit board connection side 3 in the direction of arrow on the printed circuit board, as shown in FIG. 1. The solder bumps 10 are applied to the contact surfaces 7 placed so that the terminal side 3 of the device 2 of the solder paste is opposite. 11 It is important to ensure that the solder paste 11 is slightly lower than the height of the solder bumps so that the component 2 can be safely placed on the contact surfaces. In addition, the solder paste must be applied so exactly that always the same amount of solder is applied to the metallizations 9, so that provided as spacers further solder bumps all have the same height later. Subsequently, the loading ded to the SMD components and the flip-chip component circuit board of a reflow soldering station is supplied. In the reflow soldering, the solder is heated and melted. The applied over the metallization 9 Lot 11 contracts on the Metallsierungen, because others will not wetted by the molten solder. In this case, additional bumps 11 ', which are arranged in the middle below the structural element 2 form. At the same time provided for the signal line are melted solder bumps 10, wherein the molten solder 10 'of the solder bumps 10, the contact surfaces 7 completely wetted. Due to the good wettability of the contact surfaces 7, the solder assumes the position shown in Fig. 2 waist-like shape. The surface tension of the solder 10 'and the weight of the component thereby causing the component 2 is moved towards the component side 4 of the circuit board 1 until the terminal side 3 of the device 2 11, the bumps' stirred loading, as shown in Fig. 2. In the further approach of the component 2 on the printed circuit board 1, the solder bumps 11 are 'deformier. This deformation affects the surface tension of the solder 11 counter 'so that a restoring force arises which pushes the component 2 from the component side. 4 In the equilibrium state, the attracting action of the surface tension of the solder 10 'and the weight of the repellent effect of the surface tension of the solder 11' pick up, so that the device 2 is kept in a range defined by the number and size of the solder bumps distance from the carrier plate. 1 The further prepared on the printed circuit board solder bumps 11 'act like spacer elements, which prevent further approach of the component 2 to the printed circuit board.

It may happen that the solder 10 wets 'the molten solder bump 10 signal-carrying not only the contact surfaces 7 but also the conductor tracks 7'. However, larger amounts of solder can not flow through the conductive pattern 7, since this te implies a reduction of the gap between the component and printed circuit boards, which is prevented by the spacer elements 11 '. but it is possible that a thin solder film spreads to the conductor tracks 7 'in Fig. 3, which leads to contamination of the printed circuit board. For this reason, it is advantageous prior to the mounting, a solder resist 13 applied to the printed circuit board which is provided with recesses 15 at the destination of the flip-chip components. The solder mask 13 shown in FIG. 3 is applied to the conductor tracks 7 'and leaves free the contact areas 7, which are arranged within the recess 15 of the solder resist 13 on the pick and place page 4 of the printed circuit board. The size of the recess 15 is about the size of the flip chip. Thereafter, the solder paste 11 is applied in the region of the recess on the circuit board, as shown in Fig. 3. The positioning of the solder resist 13 on the printed circuit board Due to the size of the recess 15 without problems and does not require highly accurate adjustment. Care must be taken only that an offset of the solder mask is not so large that the contact surfaces are covered by the mask 7. but this can easily be realized with the known techniques. The further implementation of the method, wrote loading as above. During reflow soldering which passes propagating through the contact surfaces 7 of solder at the edge of the recess 15 and is prevented from there through the solder resist 13 on the further spread to the connection conductor tracks 7 '.

Unlike the previously illustrated embodiments, can also be dispensed to the metallization 9 and the solder paste 11 are applied directly to the top surface 4 of the circuit board 1 in Fig. 1. In this case, in reflow soldering, neither the board nor the one component are wetted by the solder. However, the surface tension of the molten solder causes also in this case, that it is possible by acting as spacers solder bumps 11 ', the height of the solder bumps 10' in reflow soldering set. but the examples is preferred playing with the metallizations 9, as can be adjusted via the metallization the shape and location of the other solder bump 11 'more accurately and easily.

Claims

Anspr├╝che
1. A process for connection of electronic components (2) with a Tr├ñgersubstrat (1), wherein at least on one side (3) for conducting Signalstr├╢men provided Loth├╢ckern (10) provided with component (2 ), especially a flip-chip device with the Loth├╢ckern (10) corresponding aligned Kontaktfl├ñchen (7) of Tr├ñgersubstrats (1) is in a verl├╢tet Reflowlotstation and in which between the Tr├ ñgersubstrat (1) and the component (2) further, insulated from the signalf├╝hrenden Loth├╢cker parts (11 ') are provided as spacer elements, w├ñhrend through which the component (2) in a defined distance from Reflowlotung is held Tr├ñgersubstrat (1), characterized in that
- for preparing the said spacer elements forming Lothöcker (11 ') daß benötigte solder paste (11) on the Trägersubstrat (1) is applied,
- a da├ƒ anschlie├ƒend with the provided for conducting Signalstr├╢men Loth├╢ckern (10) provided with component (2) to the Tr├ñgersubstrat (1) is placed in such a way that the da├ƒ Tr├ñgersubstrat (1) facing side (3) of the component of the applied solder paste on the Tr├ñgersubstrat (11) and the gegen├╝berliegt provided for conducting Signalstr├╢men Loth├╢cker (10) on the associated Kontaktfl├ñchen (7 ) rest, - and in a da├ƒ anschlie├ƒenden Reflowl├╢tschritt the component (2) with the Tr├ñgersubstrat (1) is verl├╢tet, wherein the force applied to the Tr├ñgersubstrat solder paste (11) Loth├ ╢cker (11 ') forms, which hold the component (2) of the w├ñhrend Reflowlotung in a defined distance from Tr├ñgersubstrat (1).
2. The method according to claim 1, characterized in that daß on the component (2) facing side (4) of the Träger- substrate (1) metallizations (9) are made of a highly wettable by the molten solder material on which the solder paste (11) is applied.
3. The method according to claim 1, characterized in that during application of the daß für the Lothöcker (11 ') benötigten solder paste (10) at the same time to other areas of the Bestückungsseite Trägersubstrats (1) paste für the Verlötung of SMD components (surface mounting divice) is applied.
4. The method according to any preceding Ansprüche, characterized daß the solder paste (11) in the screen printing or stencil printing on the Trägersubstrat (1) is applied.
5. The method according to any preceding Ansprüche, characterized daß on the component (2) facing side (4) of the Trägersubstrats (1) a Lötstoppmaske (13) is provided which at least at the location of at least one component (2) has a recess (15), wherein provided on the Trägersubstrat Anschlußleiterbahnen (7 ') up to their the Kontaktflächen (7) forming the ends of the Lotstoppmaske (13) are covered and the Kontaktflächen (7) inside the recess (15) on the Trägersubstrat (1) are arranged. (Fig. 3)
PCT/DE1998/001088 1997-09-03 1998-04-18 Method for connecting electronic components with a carrier substrate WO1999012198A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE19738399A DE19738399A1 (en) 1997-09-03 1997-09-03 A method for bonding of electronic components to a carrier substrate
DE19738399.8 1997-09-03

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Publication number Priority date Publication date Assignee Title
DE10025147C2 (en) * 2000-05-20 2002-03-07 Orga Kartensysteme Gmbh Contact arrangement for multi-component smartcards
JP4610811B2 (en) 2000-09-15 2011-01-12 アイメックImec Probe manufacturing method and apparatus
DE60042067D1 (en) * 2000-09-15 2009-06-04 Imec Inter Uni Micro Electr Method of making mounted AFM probes by soldering
DE10331008A1 (en) * 2003-07-09 2005-02-03 Conti Temic Microelectronic Gmbh Reflowlötbarer component carrier
FR2918212B1 (en) * 2007-06-27 2009-09-25 Fr De Detecteurs Infrarouges S Method for producing an electromagnetic radiation matrix and method for replacing an elementary module of such a detection matrix

Citations (3)

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DE3042085A1 (en) * 1979-11-12 1981-06-04 Hitachi Ltd Halbleiterplaettchen montage construction and process for its manufacture
EP0078480A2 (en) * 1981-10-28 1983-05-11 Hitachi, Ltd. Method for fusing and connecting solder of IC chip
US5633535A (en) * 1995-01-27 1997-05-27 Chao; Clinton C. Spacing control in electronic device assemblies

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3042085A1 (en) * 1979-11-12 1981-06-04 Hitachi Ltd Halbleiterplaettchen montage construction and process for its manufacture
EP0078480A2 (en) * 1981-10-28 1983-05-11 Hitachi, Ltd. Method for fusing and connecting solder of IC chip
US5633535A (en) * 1995-01-27 1997-05-27 Chao; Clinton C. Spacing control in electronic device assemblies

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