WO1998052124A1 - Point-of-sale system and distributed computer network for same - Google Patents
Point-of-sale system and distributed computer network for same Download PDFInfo
- Publication number
- WO1998052124A1 WO1998052124A1 PCT/US1998/010040 US9810040W WO9852124A1 WO 1998052124 A1 WO1998052124 A1 WO 1998052124A1 US 9810040 W US9810040 W US 9810040W WO 9852124 A1 WO9852124 A1 WO 9852124A1
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- WIPO (PCT)
- Prior art keywords
- input
- communications port
- peripheral device
- computer network
- controller
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Classifications
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07G—REGISTERING THE RECEIPT OF CASH, VALUABLES, OR TOKENS
- G07G1/00—Cash registers
- G07G1/12—Cash registers electronically operated
- G07G1/14—Systems including one or more distant stations co-operating with a central processing unit
Definitions
- the present invention relates generally to computer networks and more specifically relates to a distributed computer network suitable for use with a point-of-sale system.
- a plurality of peripherals such as cash registers, displays, credit card readers, bar code scanners and the like, need to communicate with a computer server which controls the data processing operations for the system in which these peripherals operate.
- computer networks are known for use in point-of-sale systems, these computer networks typically employ standard computer components at each node in the point-of- sale system (see Figure 1). These systems further include a complex and costly server and hardware which employs a software network communications management system to control communications with each node in the system. Additionally, each node typically requires matching network communications software and hardware which further increases the cost of the system.
- This network topology which is conventional to a standard computer data network, results in severe cost and processing overheads which burden a point-of-sale system.
- peripheral device may be directly connected to the computer
- other devices may require a separate interface box to convert its output data to a format that is compatible with the computer.
- each input device requires a unique software identification number and interrupt for the computer to communicate with the device. This results in higher hardware costs and more physical space for each peripheral device added to the system.
- the foregoing needs, purposes and goals are satisfied in accordance with the present invention, which, in one embodiment provides a distributed computer network for use with a general purpose computer having a communications port and capable of running applications software for controlling the network.
- the distributed computer network includes a master controller having first and second communications ports, the first communications port of the master controller for operatively communicating with a general purpose computer.
- the distributed network further includes one or more input/output (I/O) controllers, each having a first communications port for operatively communicating with the master controller and a second communications port for serially communicating with one or more peripheral devices.
- the peripheral devices are connected together in a serial daisy chain configuration.
- the master controller communicates with the input/output controllers via a multidrop RS-485 network bus.
- the master controller also communicates with the general purpose computer via a RS-232 serial bus, so that the master controller performs protocol management functions including conversion between RS-232 and RS-485 protocol, error correction and detection, bus arbitration and data buffering.
- the network includes a general purpose computer having a serial communications port.
- the computer is capable of running applications software for controlling a point-of-sale system.
- Each I/O controller unit preferably includes a limited number of peripheral device interface ports, to which one or more point-of-sale peripheral devices are operatively connected.
- each I/O controller is capable of supporting a plurality of peripheral devices interconnected by a serial daisy chain expansion technique which allows peripheral devices to be freely integrated with or removed from the system without the need for reconfiguring or rebooting the system.
- Each input peripheral device preferably includes an electronic interface, operatively connecting the input device to the serial peripheral device bus, which converts the serial data format of a particular input device into a data format compatible with the I/O controller.
- the interface monitors the peripheral device bus to determine when the bus is available for transmitting data and is able to selectively disconnect input devices from the bus that are located further away from the I/O controller (i.e., downstream).
- the present invention is configured as a Kitchen System.
- one or more input/output controllers include an indicating device, such as a buzzer, or a visual or tactile indicating device.
- the I/O controller also includes a display, such as a video monitor.
- the I/O controller's input/output peripheral device is preferably a bump bar.
- Figure 1 is a block diagram of a PC based computer network known in the prior art.
- Figure 2 is a block diagram of a distributed computer network topology formed in accordance with the present invention.
- FIG. 3 is a block diagram of a master controller formed in accordance with the present invention.
- Figure 4 is an electrical schematic diagram of an exemplary master controller circuit, formed in accordance with the present invention and depicted by the block diagram of Figure 3.
- FIG. 5 is a block diagram of an input/output controller formed in accordance with the present invention.
- Figure 6 is an electrical schematic diagram of an exemplary input/output controller circuit, formed in accordance with the present invention and depicted by the block diagram of Figure 5.
- Figure 7 is a block diagram of one embodiment of a point-of-sale system formed in accordance with the present invention.
- Figure 8 is a block diagram of a point-of-sale peripheral device interconnection arrangement known in the prior art.
- Figure 9 is a block diagram of a point-of-sale peripheral device interconnection topology formed in accordance with the present invention.
- Figure 10 is a block diagram of a wedge interface device, formed in accordance with the present invention, internally integrated with a point-of-sale input peripheral device.
- Figure 11 is an electrical schematic diagram of an exemplary wedge interface circuit, formed in accordance with the present invention and depicted by the block diagram of Figure 8.
- Figure 12 is a diagram illustrating one example of an I/O controller node, including an I/O controller and related point-of-sale peripheral devices, formed in accordance with the present invention.
- Figure 1 represents a typical prior art distributed computer network having a plurality of personal computer (PC) stations directly connected via a common data bus to a personal computer network server.
- PC personal computer
- FIG 2 generally illustrates a block diagram of a distributed computer network formed in accordance with the present invention.
- the computer network includes a conventional computer network server 2 which is capable of running applications software for overall control of the point-of-sale system.
- the server 2 preferably takes the form of a conventional personal computer, such as that manufactured by IBM or an equivalent thereof.
- the server 2 communicates with the distributed computer network via a serial communications port, preferably an RS-232 port, integrated with the server 2.
- the distributed computer network of the present invention further includes a master controller 4, preferably hardware based.
- the master controller 4 functions as an interface node for the distributed computer network, communicating with the server 2 and receiving instructions therefrom.
- the master controller 4 is interfaced to the server 2 via an RS-232 communications link.
- the master controller 4 preferably converts the received serial communications from the server 2 into a multipoint communications protocol, which is also referred to as multidrop communications protocol; preferably an RS-485 protocol, for distribution along the network.
- multipoint communications protocol which is also referred to as multidrop communications protocol; preferably an RS-485 protocol, for distribution along the network.
- RS-485 protocol preferably an RS-485 protocol
- the master controller 4 further performs protocol management functions including error detection/correction, data bus arbitration, data buffering, and hardware peripheral driver.
- protocol management functions including error detection/correction, data bus arbitration, data buffering, and hardware peripheral driver.
- a preferred embodiment of the master controller 4 including a master control processor 8, a server communications port 10 and a network communications port 12.
- the master control processor 8 performs the bulk of the protocol management tasks described above, including control of data traffic between the server communications port 10 and the network communications port 12.
- the server communications port 10 provides an interface between the server 2 and the master control processor 8.
- the server communications port 10 preferably exchanges data with the server 2 via a serial RS-232 link, although other similar data communications protocols are contemplated.
- the network communications port 12 similarly provides an interface between the master control processor 8 and the multidrop network, preferably an RS-485 bus.
- An exemplary master controller circuit 4, formed in accordance with the present invention, is illustrated in the electrical schematic diagram of Figure 4.
- the circuit includes a microprocessor 14 which, together with a programmable read-only memory (PROM) 18, a random access memory (RAM) 16 and related peripheral components, functions as the master control processor 8.
- PROM programmable read-only memory
- RAM random access memory
- the PROM 18 is a 512K electrically erasable PROM (EEPROM), such as industry part number 29EE512 or equivalent, and is operatively connected to the microprocessor 14 via common address and data buses.
- EEPROM electrically erasable PROM
- the EEPROM 18 stores the application program instructions to be executed by the microprocessor 14 and is preferably field programmable to facilitate system updates.
- the RAM module 16 is preferably a 256K static RAM, such as Sony part number CXK58257AM or equivalent, and is preferably connected to the microprocessor 14 in a similar manner for providing data storage and retrieval space. It will be clear to those skilled in the art that a number of microprocessor circuits and architectures which are suitable for use with the present invention may be employed and are generally well known. For example, the text Microprocessors and Microprocessor-Based System Design, by Mohamed Rafiquzzaman (CRC Press, 1990) provides a detailed discussion of various microprocessor circuits and topologies.
- the master controller circuit 4 further includes a serial RS-232 transceiver
- the RS-232 transceiver 20 is operatively connected to the microprocessor 14 and provides a data transfer interface between the server and the microprocessor 14.
- the RS-485 transceiver 22 is similarly connected to the microprocessor 14 and provides an interface between the multidrop network bus and the microprocessor 14.
- the master controller circuit 4 includes an internal power supply 21.
- the power supply 21 preferably provides a source of regulated DC voltage, suitable to meet the requirements of the master controller circuit 4. It is additionally contemplated that the power supply 21 may supply power to other system components that are connected to one of the communications ports 10, 12 of the master controller 4, thus reducing the number of external power supplies required.
- the distributed computer network of the present invention further includes one or more input/output (I/O) controller nodes 6.
- I/O controller nodes 6 are interconnected through a multidrop RS-485 communications connection with data inputs and data outputs interconnected to form a serial chain.
- other network topologies which are known in the prior art, may also be employed to provide data interconnection between each of the I/O controller nodes 6 and the master controller 4.
- the I/O controller 6 preferably performs local network management functions, including receiving and transmitting data between the multidrop network bus and the peripheral device(s) and translation of commands originating from the application software to peripheral device controls.
- the I/O controller 6 includes a hardware interface 32 for communicating with the RS-485 bus.
- the I/O controller 6 further includes an input/output (I/O) node processor 30 for controlling the functions of the I/O controller 6.
- the I/O controller 6 includes limited peripheral device interfaces, including a keyboard interface 24, a video display interface 26 and a serial communications I/O interface 28.
- the I/O node processor 30 preferably communicates with the point-of-sale peripheral devices previously described through the serial I/O interface 28 and/or keyboard interface 24.
- the I/O controller preferably includes an indicator 31.
- the indicator 31 may be a visual device (e.g., a light), an audible device (e.g., a bell or buzzer), or a tactile device (e.g., a vibrating element), for indicating that the I/O controller has received data from the master controller. Since the point-of-sale peripherals include integral processing to control their own functions, the I/O node processor 30 of the I/O controller 6 need only contain enough processing capability to perform network interface functions and peripheral communications control functions. This significantly reduces the processing burden on the I/O node processor 30 and allows simplification in the design of these components.
- I/O controller circuit formed in accordance with the present invention, is illustrated in the electrical schematic diagram of Figure 6. It is to be appreciated that suitable I/O controller circuits for use with the present invention are well known by those skilled in the art and, therefore, an in-depth discussion of the I/O controller circuit will not be presented here.
- FIG. 6 One embodiment of a point-of-sale system formed in accordance with the present invention is shown in Figure 6.
- This system is virtually identical to the system shown in Figure 2, except that each I/O controller 6 is shown having a point-of-sale peripheral device 7 attached thereto.
- An example of the point-of- sale system of Figure 6, adapted for use in a restaurant or similar food establishment, is currently being commercially sold by IBM under the product name "IBM Kitchen System.”
- the Kitchen System is a completely open system that attaches easily to any PC-based computer using an RS-232 port. Included in the IBM Kitchen
- the System is a master controller and one or more I/O units. Attached to each I/O unit is a "bump bar,” preferably connected directly to a keyboard port of the I/O unit.
- the bump bar serves as a special keyboard device capable of providing the codes to move ("bump") items previously displayed on a video monitor.
- the video monitor preferably a VGA or Super VGA monitor or equivalent, is connected directly to the video port of the I/O unit.
- the Kitchen System preferably supports up to sixteen I/O units, with each I/O unit supporting a bump bar and a video monitor. Additionally, an external power supply may be provided to meet the power requirements of the point-of-sale system.
- Firmware controlling the operation of the I/O unit is preferably field programmable, to facilitate system updates and provide enhanced system flexibility.
- each I/O controller is preferably capable of supporting a plurality of point-of-sale peripheral devices by employing the communications and peripheral expansion technique illustrated and described in U.S. Patent Application Serial No. 08/011 ,461 (now abandoned), filed on January 26, 1993 by the same inventor as in the present application. This prior application is incorporated herein by reference.
- FIG 7 there is shown a prior art system for interconnecting point-of-sale peripherals to a personal computer (PC) station (see Figure 1).
- PC personal computer
- a separate interface card is required for each peripheral device.
- the number of devices that a particular PC station can support is limited by the number of slots available within the PC station to receive interface cards.
- adding or removing interface cards requires partial disassembly of the computer, reconfiguring the software and rebooting the system, thereby increasing system down-time.
- FIG. 8 there is shown a peripheral expansion technique, according to the present invention, wherein input peripheral devices 40 (e.g., bar code reader, POS keypad, electronic weight scale, magnetic stripe reader, etc.) are preferably connected to the keyboard port 34 of the I/O controller 6 in a serial, daisy chain configuration and output peripheral devices 38 (e.g., pole display, video monitor, printer, etc.) are preferably connected to the serial port 36 of the input peripheral devices 40 (e.g., bar code reader, POS keypad, electronic weight scale, magnetic stripe reader, etc.) are preferably connected to the keyboard port 34 of the I/O controller 6 in a serial, daisy chain configuration and output peripheral devices 38 (e.g., pole display, video monitor, printer, etc.) are preferably connected to the serial port 36 of the
- I/O controller 6 Using this approach, no special I/O interface card nor special computer is required. Additionally, only two I/O ports, namely, a keyboard port 34 and a serial port 36, are used to support many peripheral devices. The input peripheral devices can be freely integrated with or removed from the system simply by coupling or uncoupling their respective cables.
- an RS-232 input peripheral device 40 (or other peripheral device which does not output data in keyboard format) may be incorporated into the point-of-sale system by preferably using an intelligent keyboard wedge interface which converts the serial data format of the input device 40 into standard keyboard data format.
- an intelligent keyboard wedge interface which converts the serial data format of the input device 40 into standard keyboard data format.
- the physical location of the input peripheral devices is not critical.
- the conventional 101 -key computer keyboard has no wedge interface (since its output is already in standard keyboard data format), it is preferably connected as the last component in the chain of devices.
- the wedge interface may be part of the device cable connection (i.e., external to the input peripheral device 40) or it may alternatively be integrated within the input device 40, as illustrated in Figure 9.
- the wedge interface circuit is shown functionally as including a pair of switches 42 and an interface control circuit 44.
- the switches 42 may either be in a pass-through state (default) or may be in a transmit state. When an input peripheral device 40 has no data available for transmission, the switches 42 will be in the default pass-through state (as shown in Figure 9). As the name suggests, an input device 40 configured with the switches 42 in the pass-through state basically functions as a conduit through which data may freely pass, thereby allowing other input peripheral devices to communicate directly with the I/O controller. When the switches 42 are in the transmit state, all downstream devices which are connected to the particular input device 40 (i.e., those input devices that are connected further away from the I/O controller in the keyboard daisy chain) are electrically disconnected from the data bus and the input device 40 is enabled for communication with the I/O controller.
- the switches 42 When the switches 42 are in the transmit state, all downstream devices which are connected to the particular input device 40 (i.e., those input devices that are connected further away from the I/O controller in the keyboard daisy chain) are electrically disconnected from the data bus and the input device 40 is enabled for
- the interface will first monitor the traffic on the data bus to determine if another input device is presently communicating with the I/O controller. Preferably, only one input device 40 may communicate with the I/O controller at any given time, thus avoiding bus contention problems which may otherwise occur. Therefore, when one input device is communicating with the I/O controller, all other input devices will preferably monitor the bus and maintain their pass-through configuration, regardless of whether or not they have data to transmit.
- the interface control circuit 44 of the input peripheral device 40 will change the state of the switches 42 so as to electrically disconnect the downstream input devices from the data-bus, thereby allowing the input device 40 to transmit its data to the I/O controller.
- the upstream input devices i.e., those peripheral devices that are connected closer to the I/O controller in the serial keyboard daisy chain
- the interface control circuit 44 changes the state of the switches 42 back to the default pass-through state.
- the interface control circuit 44 will preferably store the data from the input device 40, for example in memory, until a break is detected on the bus. Once the bus becomes available, the stored data from the interface control circuit 44 is subsequently transmitted to the I/O controller in the manner described above. If an input device 40 includes multiple interfaces, each interface will preferably independently store its data and monitor the data bus until the bus is free, and then each interface will transmit its stored data in turn.
- the keyboard wedge interface performs a conversion of the data it receives from the input peripheral device 40, for example RS-232 format, into standard keyboard data format.
- the input peripheral device 40 for example RS-232 format
- standard keyboard data format for example RS-232 format
- all input peripheral devices will be communicating with the I/O controller in a compatible data format (i.e., keyboard data format). This eliminates the need for an I/O controller having multiple interface cards, one for each data format used.
- the interface circuit When the interface circuit is not communicating with the I/O controller, it preferably monitors and records all activities between the keyboard and the I/O controller. For example, if the "Caps Lock" key is pressed, the interface circuit will make the proper case inversion such that the I/O controller always receives the correct characters from the input peripheral device.
- the interface circuit also preferably supports bidirectional dialog with the I/O controller if the standard keyboard is not present or is not functioning properly. This allows the I/O controller to function without generating a "Keyboard Error" interrupt, even if the standard keyboard and/or input peripheral devices are not installed.
- the wedge interface circuit may be formed as an external unit, preferably integrated with the peripheral device cable.
- the interface circuit includes a connector 50, preferably a 25-pin DB25 connector, for operatively coupling the interface circuit to the output of an input peripheral device.
- the circuit further includes a microprocessor or microcontroller 54, such as an 80C51 microcontroller or equivalent, for performing the required data format conversion and bus control functions previously described.
- the wedge interface circuit preferably includes connectors 60 and 62 to operatively connect the interface circuit, and therefore an input peripheral device to which the interface circuit is connected, between upstream and downstream devices in the keyboard daisy chain.
- Connectors 60 and 62 are preferably keyboard-type connectors, such as 5-pin DIN connectors or equivalent.
- Connector 60 preferably receives data from a downstream input peripheral device which is connected thereto.
- Connector 62 preferably outputs data either directly from an adjacent downstream peripheral device, through connector 60 (e.g., when the interface is in a pass-through state) or from the peripheral device coupled to connector 50, after the data has been converted by the microcontroller 54 (e.g., when the interface is in a transmit state).
- the data output from connector 62 will preferably be in a format compatible with the I/O controller port to which the chain of peripheral devices is connected. It is to be appreciated that if the interface circuit is integrated internally with the input peripheral device, connector 50 may be eliminated and the data from the input device would preferably be directly presented to the microcontroller 54.
- an invertor circuit preferably realized as a general purpose transistor 52.
- the microcontroller 54 can preferably be configured to accept a wide range of RS-232 protocol parameters and to operate with various attributes, as dictated by the settings of switches 56, preferably dual in-line pin (DIP) switches, operatively connected to the microcontroller 54.
- Such communications parameters for example, baud rate, number of data/stop bits and parity option
- switches 56 (on or off), may preferably be set by switches 56.
- the clock line and data line which forms the bus interconnecting the input peripheral devices in the POS system, are respectively connected to a pair of commercially available analog multiplexers or switches 58.
- Each analog switch 58 has a control input terminal and is ideally the functional equivalent of a single-pole single-throw mechanical switch.
- the signal at the control input terminal preferably a binary logic signal (such as zero or five volts), controls whether the switch 58 is in an "open" or "closed” state.
- a switch control line 66 connecting the microcontroller 54 to the control input terminals of the analog switches 58, preferably allows the microcontroller 54 to simultaneously open or close the switches 58 under program control.
- the microcontroller 54 preferably generates an appropriate logic signal on switch control line 66 which maintains the switches 58 in a closed state.
- the interface circuit is configured as a pass-through device, thereby allowing a downstream peripheral device, coupled through connector 60, to communicate with the I/O controller (i.e., the clock and data lines of connectors 60 and 62 are respectively operatively connected together).
- the I/O controller i.e., the clock and data lines of connectors 60 and 62 are respectively operatively connected together.
- the analog switches 58 are opened, the device coupled to connector 60 becomes electrically disconnected from the bus and communication between the microcontroller 54 and the I/O controller can commence through connector 62.
- Microcontroller 54 preferably monitors the clock line from connector 60 to determine whether the data bus is available and accordingly makes the appropriate decision as to what state the analog switches 58 should be in (i.e., the pass-through state or the transmit state).
- any type of peripheral device can be connected to the microcontroller 54 by proper selection of the connector 50, conversion circuit and firmware running on the microcontroller 54.
- any number of peripherals can be chained together. When another peripheral is operating, the remaining peripheral devices simply pass the data along to the I/O controller without interference. This is particularly advantageous in terms of system expansion capability.
- the I/O controller node preferably includes an I/O controller 6 with a CRT display or monitor 38 connected to a serial communications port 35 of the I/O controller 6.
- the I/O controller 6 further includes a keyboard port 34 to which a plurality of point-of- sale input peripheral devices are connected in a serial daisy chain arrangement.
- Typical POS peripherals for use with the present invention include a bar code reader 70, a POS keypad 72, a magnetic stripe reader 74, an electronic weight scale 76 and a standard computer keyboard 78.
- POS input peripherals which do not ordinarily output their data in standard keyboard data format (for example, the bar code reader 70 or electronic weight scale 76) are preferably connected to the daisy chain bus via intelligent wedge interface cables 80 and 82.
- the interface cables 80 and 82 preferably receive and convert the non-standard data format to a standard keyboard data output format
- the master controller 4 In communicating with the plurality of I/O controllers 6, the master controller 4 will preferably append identification information, for example, in the form of a data header or equivalent identification tag, to data received from the server 2 (see Figure 2). This identification information preferably specifies the particular peripheral device to ultimately receive the transmitted instruction or data.
- Each I/O controller 6 is connected to the network bus and receives the data stream from the master controller 4. Subsequently, each I/O controller 6 analyzes the header information associated with the transmitted data. If the header includes identification information which corresponds to an individual I/O controller 6, then that particular I/O controller 6 will pass the data onto the peripheral devices connected thereto.
- master controller 4 and I/O controllers 6 are illustrated as standalone devices, it should be appreciated that integration of the master controller 4 within the server 2 or integration of the I/O controller 6 with one of the associated system peripherals is contemplated as being within the scope of the present invention.
- a distributed computer network formed in accordance with the present invention, is provided which is particularly well-suited for use with a point-of-sale system.
- the distributed computer network of the present invention is an open system which allows the connection of virtually unlimited peripheral devices without reducing available input/output ports. Furthermore, the distributed network allows connection/disconnection of peripheral devices without disassembling, re-configuring, or re-booting the system, thus reducing system down-time.
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Abstract
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Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002289950A CA2289950A1 (en) | 1997-05-16 | 1998-05-15 | Point-of-sale system and distributed computer network for same |
AU75750/98A AU7575098A (en) | 1997-05-16 | 1998-05-15 | Point-of-sale system and distributed computer network for same |
JP54961398A JP2002510414A (en) | 1997-05-16 | 1998-05-15 | Point-of-sale system and distributed computer network therefor |
EP98923458A EP1010083A4 (en) | 1997-05-16 | 1998-05-15 | Point-of-sale system and distributed computer network for same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US4677997P | 1997-05-16 | 1997-05-16 | |
US60/046,779 | 1997-05-16 |
Publications (1)
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WO1998052124A1 true WO1998052124A1 (en) | 1998-11-19 |
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Family Applications (1)
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PCT/US1998/010040 WO1998052124A1 (en) | 1997-05-16 | 1998-05-15 | Point-of-sale system and distributed computer network for same |
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EP (1) | EP1010083A4 (en) |
JP (1) | JP2002510414A (en) |
CN (1) | CN1110753C (en) |
AU (1) | AU7575098A (en) |
CA (1) | CA2289950A1 (en) |
TW (1) | TW440772B (en) |
WO (1) | WO1998052124A1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ES2152882A1 (en) * | 1999-01-06 | 2001-02-01 | Catalina Marketing Int | Process, system and computer readable medium for consolidation of communication among peripheral devices in a retail store environment |
WO2002043014A2 (en) * | 2000-11-20 | 2002-05-30 | @Pos.Com, Inc. | A distributed-service architecture at the point of sale or service |
CN106781117A (en) * | 2015-11-24 | 2017-05-31 | 富士电机株式会社 | The automatic machine control method of giving change of POS POSs and POS POSs |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4836925B2 (en) * | 2007-11-09 | 2011-12-14 | シャープ株式会社 | Terminal electronic device, transmission state control method of terminal electronic device, and terminal control system |
CN102710476A (en) * | 2012-05-15 | 2012-10-03 | 浪潮电子信息产业股份有限公司 | Multi-protocol centralized communication method for heterogeneous computer clusters |
CN110505200B (en) * | 2019-07-09 | 2022-06-24 | 惠州市亿能电子有限公司 | Multi-protocol daisy chain interface conversion chip |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5644700A (en) * | 1994-10-05 | 1997-07-01 | Unisys Corporation | Method for operating redundant master I/O controllers |
US5687393A (en) * | 1995-06-07 | 1997-11-11 | International Business Machines Corporation | System for controlling responses to requests over a data bus between a plurality of master controllers and a slave storage controller by inserting control characters |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5465340A (en) * | 1992-01-30 | 1995-11-07 | Digital Equipment Corporation | Direct memory access controller handling exceptions during transferring multiple bytes in parallel |
US5499384A (en) * | 1992-12-31 | 1996-03-12 | Seiko Epson Corporation | Input output control unit having dedicated paths for controlling the input and output of data between host processor and external device |
-
1998
- 1998-05-15 AU AU75750/98A patent/AU7575098A/en not_active Abandoned
- 1998-05-15 CA CA002289950A patent/CA2289950A1/en not_active Abandoned
- 1998-05-15 EP EP98923458A patent/EP1010083A4/en not_active Withdrawn
- 1998-05-15 JP JP54961398A patent/JP2002510414A/en active Pending
- 1998-05-15 CN CN98805154A patent/CN1110753C/en not_active Expired - Fee Related
- 1998-05-15 WO PCT/US1998/010040 patent/WO1998052124A1/en not_active Application Discontinuation
- 1998-07-03 TW TW87107688A patent/TW440772B/en not_active IP Right Cessation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5644700A (en) * | 1994-10-05 | 1997-07-01 | Unisys Corporation | Method for operating redundant master I/O controllers |
US5687393A (en) * | 1995-06-07 | 1997-11-11 | International Business Machines Corporation | System for controlling responses to requests over a data bus between a plurality of master controllers and a slave storage controller by inserting control characters |
Non-Patent Citations (1)
Title |
---|
See also references of EP1010083A4 * |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ES2152882A1 (en) * | 1999-01-06 | 2001-02-01 | Catalina Marketing Int | Process, system and computer readable medium for consolidation of communication among peripheral devices in a retail store environment |
WO2002043014A2 (en) * | 2000-11-20 | 2002-05-30 | @Pos.Com, Inc. | A distributed-service architecture at the point of sale or service |
WO2002043014A3 (en) * | 2000-11-20 | 2003-02-20 | Pos Com Inc | A distributed-service architecture at the point of sale or service |
CN106781117A (en) * | 2015-11-24 | 2017-05-31 | 富士电机株式会社 | The automatic machine control method of giving change of POS POSs and POS POSs |
CN106781117B (en) * | 2015-11-24 | 2020-10-02 | 富士电机株式会社 | POS (point of sale) cash register system and automatic change-giving machine control method of POS cash register system |
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Publication number | Publication date |
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CN1110753C (en) | 2003-06-04 |
CN1269031A (en) | 2000-10-04 |
JP2002510414A (en) | 2002-04-02 |
EP1010083A4 (en) | 2001-11-21 |
EP1010083A1 (en) | 2000-06-21 |
TW440772B (en) | 2001-06-16 |
AU7575098A (en) | 1998-12-08 |
CA2289950A1 (en) | 1998-11-19 |
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