WO1998043159A1 - Associative neuron in an artificial neutral network - Google Patents
Associative neuron in an artificial neutral network Download PDFInfo
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- WO1998043159A1 WO1998043159A1 PCT/FI1998/000257 FI9800257W WO9843159A1 WO 1998043159 A1 WO1998043159 A1 WO 1998043159A1 FI 9800257 W FI9800257 W FI 9800257W WO 9843159 A1 WO9843159 A1 WO 9843159A1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
Definitions
- the invention relates to an associative neuron used in artificial neural networks.
- synaptic weights which can also be either positive or negative. In some cases, only positive signal values and/or weighting coefficients are used. Synapses 11 1 to 11 n of the neuron weight the corresponding input signal by the weighting coefficients W, to W n .
- a summing circuit 12 calculates a weighted sum U. The sum U is supplied to a thresholding function circuit 13, whose output signal is V.
- the threshold function can vary, but usually a sigmoid or a piecewise linear function is used, whereby the output signal is given continuous values. In a conventional neuron, the output signal V of the thresholding function circuit 13 is simultaneously the output signal Y of the whole neuron.
- the network When neurons of this kind are used in artificial neural networks, the network must be trained, i.e. appropriate values must be found for the weighting coefficients ⁇ N, to W n .
- Different algorithms have been developed for the purpose.
- Associative neurons different versions of what is known as the Hebb rule are often used. According to the Hebb rule, the weighting coefficient is increased always when the input corresponding to the weighting coefficient is active and the output of the neuron should be active.
- the changing of the weighting coefficients according to the algorithms is called the training of the neural network.
- the object of the invention is to provide a method and equipment implementing the method in which the above problems of training a neural network can be solved.
- the object of the invention is to provide a mechanism by which useful additional information can be produced on the level of an individual neuron about the relations between the different input signals of the neuron.
- the mechanism must be flexible and versatile to make artificial neurons widely applicable.
- the mechanism must also be fairly simple so that the costs of manufacturing neurons can be kept low.
- the invention is based on expansion of a conventional neuron such that a specific expansion, i.e. nucleus, is attached to the conventional neuron, a specific main input signal, i.e. main signal, passing through the nucleus.
- the nucleus keys and adjusts the main signal by a signal obtained from the conventional part of the neuron, and forms between these signals logical operations and/or functions needed to control neural networks.
- the processing power of a single neuron is thus increased as compared with the previously known neurons, which process data only by means of weighting coefficients and threshold functions.
- main signals and auxiliary signals make neural networks easier to design, since the training according to the Hebb rule is then easy to implement in such a way that each weighting coefficient is increased always when the main signal and the auxiliary input signal concerned are simultaneously active.
- the neuron of the invention and the network consisting of such neurons learn quickly: even one example may suffice.
- the operation of the neuron of the invention and that of the networks consisting of such neurons are simple and clear.
- Fig. 1 is a general view of an artificial neuron
- Fig. 2 is a general view of a neuron of the invention
- Fig. 3 is a block diagram of the neuron of the invention
- Figs. 4 to 6 illustrate ways of implementing specific details of the neuron of the invention.
- the neuron comprises a main signal input S, an arbitrary number of auxiliary signal inputs A 1 t A 2 , ..., A n , at least one controlling input C and at least one inhibiting input I, and a number of outputs.
- the main output signal of the neuron is S 0
- Y 0 , N 0 and N a are auxiliary output signals.
- the input and output signals can be, for example, voltage levels.
- Blocks 21 1t 21 2 , ..., 21 n are synapses of the neuron, in which the weighting coefficient corresponding to the auxiliary signal A 1 ? A 2 , ..., A n concerned is stored.
- the synapses are, for example, circuit units.
- Block 12 is a summing circuit, in which the output signals At, At 3 of the synapses 21,, 21 2 , ••-, 21 n are summed.
- Block 13 is a thresholding circuit, which can be implemented simply as a comparator, which supplies an active output signal only if its input signal level, i.e. the output signal level of the summing circuit 12, exceeds a pre-set threshold value.
- Block 22 comprises the neuron expansions of the invention.
- the expansions are called the nucleus of the neuron.
- the function of the nucleus is, for example, to key and adjust the main signal S on the basis of the output signal of the thresholding circuit 13 and to form logical operations and/or functions between the signals.
- Particularly useful logical operations are the logical OR (signal S 0 ) and the logical AND (signal Y 0 ).
- Other logical operations can also be used in the same way as AND so that the main signal S is inverted first (signal N 0 ) or so that the output signal V of the thresholding circuit 13 is inverted first (signal N a ).
- the nucleus 22 also comprises circuitry that deactivates the output signal S 0 when a certain period of time has passed from the initiation of the signal, irrespective of what happens in the inputs of the neuron.
- the circuitry can also take care that a new output pulse cannot be initiated until a certain period of recovery has passed.
- an inhibiting input signal I Inhibit
- the control input signal C Control controls the synapses' learning.
- Fig. 3 is a block diagram of a neuron of the invention, the neuron here comprising three auxiliary signal inputs A, to A n and therefore three synapses 21 , to 21 3 in addition to the main signal input.
- the expanded neuron of the invention can be implemented in various ways within the scope of the inventive idea disclosed above.
- Figs. 4 to 6 show an embodiment of the neuron according to the present invention in which the input and output signals are voltage signals.
- the signal is called 'active', if its voltage is positive, and 'inactive', if its voltage is substantially zero.
- Fig. 4 shows a way of implementing the synapses 21, to 21 n of the neuron of Fig. 3.
- the voltage corresponding to the weighting coefficient of the synapse is stored through a resistor 41 and a diode 42 in a capacitor 43 always when auxiliary signal A, and the main signal S are simultaneously active.
- the resistor 41 and the capacitor 43 define a time constant by which the voltage of the capacitor 43 grows.
- the diode 42 inhibits the voltage from discharging through an AND gate 40.
- the voltage of the capacitor 43 is supplied to an operational amplifier 44 functioning as a voltage follower, the input impedance of the amplifier being very high (i.e.
- the output of the synapse is signal At, which is obtained from input signal A, by locking it at the voltage level corresponding to the weighting coefficient by a diode 45 and a resistor 46.
- a second voltage follower 47 buffers the output signal. Always when input signal A, is active, output signal At, is proportional to the current value of the weighting coefficient.
- Fig. 5 shows a way of implementing the summing block 12 of the neuron of Fig. 3.
- the voltages At, to At 3 obtained from synapses 21 , to 21 3 are summed by a resistor network 50 to 53.
- the thresholding is performed by a comparator 54, and the thresholding is here abrupt so that the output of the comparator 54 is active only when the summed voltage U in the positive input of the comparator 54 exceeds the threshold value in the negative input (the threshold value in the example of Fig. 5 being the output voltage of a constant voltage power source 55).
- Fig. 6 shows a way of implementing the nucleus 22 of the neuron of Fig. 3.
- An OR circuit 602 generates a main output signal S 0 if the inputted main signal S is active or the thresholded summed voltage V is active.
- the nucleus 22 contains a block 606, indicated by a dotted line, functioning as a delay circuit.
- the delay circuit 606 comprises a buffer 608 and an inverter 610, resistors 612 to 614 and capacitors 616 to 618. Normally the output of the delay circuit 606 is active, so an AND gate 604 allows an output signal to pass through.
- a logical AND operation Y 0 is formed by AND circuit 620: the first element in the operation is the main signal S and the second element is a summed signal V weighted by the weighting coefficients of the auxiliary signals A, to A n and subsequently thresholded.
- a corresponding AND operation N 0 is formed by AND circuit 622, with the exception that the inverse value of the main signal S has been first formed (i.e. the signal has been inverted) by NO circuit 626.
- the corresponding AND operation N a is formed by AND circuit 624, with the exception that the thresholded summed signal V has been first inverted by NO circuit 628. All the outputs can be inhibited by an I signal, which is (here) inverted by NO circuit 630 and then supplied, in the inverted form, to AND circuits 620 to 624.
- the synapses are controlled by a K signal in accordance with the Hebb rule (cf. Fig. 2).
- a control signal C is used to define when learning is allowed at all.
- the generation of the key signal K is inhibited by AND circuit 632 when the control signal C is inactive.
- the additional output signals Y 0 , N 0 and N a of the neuron according to the invention can be used, for example, as follows.
- An active signal N a (“No association) indicates a situation where the main signal S is active but the auxiliary signal A is not.
- One characteristic of the neural network is its ability to predict a situation.
- An active signal N a indicates that there is a new input signal S which is not predicted by the auxiliary signals A.
- Signal N a is thus a 'surprise indicator', which can be used to draw attention to new, surprising signals.
- the control signal C controls, or keys, the K signal. It is not expedient for the network to learn all the situations that occur. When a normal human being encounters a new situation, he/she either concludes or instinctively knows whether the situation is worth learning. This kind of focusing of attention can be simulated by the control signal C.
- the auxiliary signals A, to A n can be given continuously changing values and the main signal S can be given two different values.
- the threshold function is here a simple comparative operation.
- the invention is not limited to the above, but it can be applied more broadly, for example, so that the main signal S and the key signal K can also be given continuous values.
- the threshold function can be replaced with any appropriate non-linear continuous or step function.
- the neuron's learning is then not limited to two mutually exclusive situations: allowed or inhibited. Instead, the learning process is divided into different degrees or it is a continuum of degrees, whereby the strength of the K signal is adjusted on the basis of the main signal S.
- the key signal K In the normal state of the neural network (when the network is not being trained), the key signal K is not more than a fraction of the main signal S, if the S signal is active. When the network is to be trained, the value of the key signal K approaches the value of the main signal S.
- the binary AND gates in Figs. 4 and 6 should be replaced, for example, with analogue multipliers or adjustable amplifiers or attenuators or the like.
- a huge number of neurons (usually 10 4 to 10 6 ) are needed in neural networks.
- the neuron of the invention can be implemented by a process suitable to large-scale integration, for example by the EEPROM technique, which is used to manufacture the speech storage circuits implemented by semi-conductors.
- the neurons and the neural network can be simulated by a computer program executed in a digital processor.
- the values corresponding to the weighting coefficients of the synapses of the neurons are here stored in memory locations (e.g. in a matrix variable) and the other parts of the neuron are implemented by software logic.
- the invention can be applied in areas where information is processed using extensive artificial neural networks.
- the areas include, for example, processing of audiovisual information, interpretation of sensory information in general and of speech and image in particular, and formation of response.
- the invention is applicable in many modern fields of industry, such as human/machine interfaces, personal electronic assistants and/or means of communication, multimedia, virtual reality, robotics, artificial intelligence and artificial creativity.
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Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU65025/98A AU6502598A (en) | 1997-03-26 | 1998-03-23 | Associative neuron in an artificial neutral network |
DE69809402T DE69809402T2 (en) | 1997-03-26 | 1998-03-23 | ASSOCIATIVE NEURON IN AN ARTIFICIAL NEURAL NETWORK |
JP54092798A JP3650407B2 (en) | 1997-03-26 | 1998-03-23 | Associative neurons in artificial neural networks |
US09/381,825 US6625588B1 (en) | 1997-03-26 | 1998-03-23 | Associative neuron in an artificial neural network |
EP98910770A EP0970420B1 (en) | 1997-03-26 | 1998-03-23 | Associative neuron in an artificial neural network |
AT98910770T ATE227860T1 (en) | 1997-03-26 | 1998-03-23 | ASSOCIATIVE NEURON IN AN ARTIFICIAL NEURAL NETWORK |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FI971284 | 1997-03-26 | ||
FI971284A FI103304B (en) | 1997-03-26 | 1997-03-26 | Associative neuron |
Publications (1)
Publication Number | Publication Date |
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WO1998043159A1 true WO1998043159A1 (en) | 1998-10-01 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/FI1998/000257 WO1998043159A1 (en) | 1997-03-26 | 1998-03-23 | Associative neuron in an artificial neutral network |
Country Status (9)
Country | Link |
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US (1) | US6625588B1 (en) |
EP (1) | EP0970420B1 (en) |
JP (1) | JP3650407B2 (en) |
AT (1) | ATE227860T1 (en) |
AU (1) | AU6502598A (en) |
DE (1) | DE69809402T2 (en) |
ES (1) | ES2186139T3 (en) |
FI (1) | FI103304B (en) |
WO (1) | WO1998043159A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002052500A1 (en) * | 2000-12-22 | 2002-07-04 | Nokia Corporation | Artificial associative neuron synapse |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7672918B2 (en) * | 2007-02-05 | 2010-03-02 | Steve Adkins | Artificial neuron |
US11354572B2 (en) | 2018-12-05 | 2022-06-07 | International Business Machines Corporation | Multi-variables processing neurons and unsupervised multi-timescale learning for spiking neural networks |
EP3839833A1 (en) * | 2019-12-16 | 2021-06-23 | ams International AG | Neural amplifier, neural network and sensor device |
Citations (3)
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US5299285A (en) * | 1992-01-31 | 1994-03-29 | The United States Of America As Represented By The Administrator, National Aeronautics And Space Administration | Neural network with dynamically adaptable neurons |
US5467429A (en) * | 1990-07-09 | 1995-11-14 | Nippon Telegraph And Telephone Corporation | Neural network circuit |
US5535309A (en) * | 1992-10-05 | 1996-07-09 | The Research Foundation, State University Of New York At Buffalo | Single layer neural network circuit for performing linearly separable and non-linearly separable logical operations |
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US3602888A (en) * | 1967-12-14 | 1971-08-31 | Matsushita Electric Ind Co Ltd | Learning device |
US3601811A (en) * | 1967-12-18 | 1971-08-24 | Matsushita Electric Ind Co Ltd | Learning machine |
FR2051725B1 (en) * | 1969-07-14 | 1973-04-27 | Matsushita Electric Ind Co Ltd | |
US5515454A (en) * | 1981-08-06 | 1996-05-07 | Buckley; B. Shawn | Self-organizing circuits |
US4874963A (en) * | 1988-02-11 | 1989-10-17 | Bell Communications Research, Inc. | Neuromorphic learning networks |
JPH0782481B2 (en) * | 1989-12-26 | 1995-09-06 | 三菱電機株式会社 | Semiconductor neural network |
JP2760145B2 (en) * | 1990-09-26 | 1998-05-28 | 三菱電機株式会社 | Knowledge information processing device |
US5172204A (en) * | 1991-03-27 | 1992-12-15 | International Business Machines Corp. | Artificial ionic synapse |
US5454064A (en) * | 1991-11-22 | 1995-09-26 | Hughes Aircraft Company | System for correlating object reports utilizing connectionist architecture |
US5446829A (en) * | 1993-06-24 | 1995-08-29 | The United States Of America As Represented By The Department Of Health And Human Services | Artificial network for temporal sequence processing |
US5448684A (en) | 1993-11-12 | 1995-09-05 | Motorola, Inc. | Neural network, neuron, and method for recognizing a missing input valve |
DE69430529T2 (en) | 1994-07-28 | 2003-01-16 | International Business Machines Corp., Armonk | Daisy chain circuit for serial connection of neuron circuits |
-
1997
- 1997-03-26 FI FI971284A patent/FI103304B/en active
-
1998
- 1998-03-23 WO PCT/FI1998/000257 patent/WO1998043159A1/en active IP Right Grant
- 1998-03-23 DE DE69809402T patent/DE69809402T2/en not_active Expired - Lifetime
- 1998-03-23 US US09/381,825 patent/US6625588B1/en not_active Expired - Lifetime
- 1998-03-23 AU AU65025/98A patent/AU6502598A/en not_active Abandoned
- 1998-03-23 ES ES98910770T patent/ES2186139T3/en not_active Expired - Lifetime
- 1998-03-23 AT AT98910770T patent/ATE227860T1/en not_active IP Right Cessation
- 1998-03-23 JP JP54092798A patent/JP3650407B2/en not_active Expired - Lifetime
- 1998-03-23 EP EP98910770A patent/EP0970420B1/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US5467429A (en) * | 1990-07-09 | 1995-11-14 | Nippon Telegraph And Telephone Corporation | Neural network circuit |
US5299285A (en) * | 1992-01-31 | 1994-03-29 | The United States Of America As Represented By The Administrator, National Aeronautics And Space Administration | Neural network with dynamically adaptable neurons |
US5535309A (en) * | 1992-10-05 | 1996-07-09 | The Research Foundation, State University Of New York At Buffalo | Single layer neural network circuit for performing linearly separable and non-linearly separable logical operations |
Non-Patent Citations (1)
Title |
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IEEE COMPUTER, Volume 29, No. 3, March 1996, ANIL K. JAIN et al., "Artificial Neural Networks: A Tutorial", pages 31-44. * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002052500A1 (en) * | 2000-12-22 | 2002-07-04 | Nokia Corporation | Artificial associative neuron synapse |
US7092921B2 (en) | 2000-12-22 | 2006-08-15 | Nokia Corporation | Artificial associative neuron synapse |
Also Published As
Publication number | Publication date |
---|---|
US6625588B1 (en) | 2003-09-23 |
JP3650407B2 (en) | 2005-05-18 |
DE69809402T2 (en) | 2003-08-21 |
FI971284A0 (en) | 1997-03-26 |
FI971284A (en) | 1998-09-27 |
AU6502598A (en) | 1998-10-20 |
ATE227860T1 (en) | 2002-11-15 |
EP0970420A1 (en) | 2000-01-12 |
FI103304B1 (en) | 1999-05-31 |
ES2186139T3 (en) | 2003-05-01 |
JP2001517341A (en) | 2001-10-02 |
EP0970420B1 (en) | 2002-11-13 |
DE69809402D1 (en) | 2002-12-19 |
FI103304B (en) | 1999-05-31 |
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