WO1998032172A1 - Electronic component - Google Patents

Electronic component Download PDF

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Publication number
WO1998032172A1
WO1998032172A1 PCT/DE1997/000105 DE9700105W WO9832172A1 WO 1998032172 A1 WO1998032172 A1 WO 1998032172A1 DE 9700105 W DE9700105 W DE 9700105W WO 9832172 A1 WO9832172 A1 WO 9832172A1
Authority
WO
WIPO (PCT)
Prior art keywords
island
integrated circuit
ƒ
da
characterized
Prior art date
Application number
PCT/DE1997/000105
Other languages
German (de)
French (fr)
Inventor
Bernhard SCHÄTZLER
Georg Ernst
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to DE1995126010 priority Critical patent/DE19526010B4/en
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Priority to PCT/DE1997/000105 priority patent/WO1998032172A1/en
Priority claimed from EP97908115A external-priority patent/EP0954879A1/en
Publication of WO1998032172A1 publication Critical patent/WO1998032172A1/en

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49503Lead-frames or other flat leads characterised by the die pad
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic

Abstract

The invention relates to an electronic component (1) in which a standard feeder cable mounting frame (2) is used, whose island (4) is designed to accommodate an integrated switch circuit (1) which is dimensionally adapted to the base surface of said integrated switch circuit (1) in order to minimize and prevent housing deformations.

Description

description

electronic component

The invention relates to an electronic component, in particular thin QFPs, in which a standard lead frame and an integrated circuit used and embedded in a casting or molding compound.

called surface-mounted electronic components, including SMD components, are typically embedded in a housing made of a molded plastic material, from which the electronic connections are made. Depending on the number of required connections this case corresponding to a standard of defined dimensions, so as to allow a standardized production and automated assembly of printed circuit boards. The dimensions of this case are set out in German and international standards. The lead frame (Lead frames) that are used to precisely positioned embedding of the elec- trical terminals are also standardized. In the middle of this lead frame islands are provided on which the integrated circuits are fixed. Lead frame and integrated circuit are then pressed together in the case of molding compound. Due to the different coefficients of expansion

Iron / which is usually used for the lead frame of the silicon chip, which forms the integrated circuit nickel alloy, and the molding compound of the housing and the reaction shrink also still occur the molding compound there is tension. This results particularly in large flat packages (QFPs thin, also known as TQFP packages) to diagonal Gehäuseverwölbungen of up to 100 microns.

this housing deflection or camber trying, also called warpage to stop by using special island design. In this case, be in the islands, the center of the lead frame (lead frame) are arranged, holes or slots mounted or the islands under-etched or etched grooves in the islands. The use of copper lead frame has already been tried to minimize the Gehäuseverwölbung. However, all these solutions require either new or modified assembly processes, or they are just etched and not feasible with stamped leadframes, or lead to a reduction from the pitch stiffness of the external connections.

From DE 36 35 375 AI, the use of a standard lead frame is known. In this case, an appropriate support island is attached to the central portion of the frame to adapt the carrier to the island semiconductor device.

In order to avoid bending an overmolded element is known from EP 0261324 Al, the lead frame in terms of height centered in the casting mold to be arranged so that above and reaches the same amount of plastic material underneath the integrated circuit.

The invention is therefore the A ufgbe invention to provide a method and an electronic device of the type mentioned, which minimizes structurally simple manner, the housing deflection.

The solution of this object is solved procedurally in accordance with the features of claim 1 and the apparatus, 5 according to the characterizing features of claim Advantageous further developments are described in the subclaims.

According to the basic idea of ​​the invention, a standardized lead frame having a predetermined number of leads and a central island for receiving an integrated circuit, is used in the method for manufacturing an electronic component wherein each lead frame is designed for a group of different sized integrated circuits. The island is then reduced to a size that is. is substantially matched to the size of the integrated circuit used in each case. Subsequently, the lead frame is embedded with the integrated circuit mounted thereon in a casting or molding compound, and this is centered so that above and below of the circuit of the island respectively the same amount of molding compound is present. A supernatant of the island over the base area of ​​the integrated circuit, by the asymmetry would arise in the Preßmassenverteilung is thereby largely avoided. Through this

Training is achieved that no stresses occur in the reaction occurring shrinkage of the molding material on the circumference of the integrated circuit between its edge and the island edge, which lead to a Gehäuseverwölbung.

the lead frame is preferably stamped with the integrally formed therein island to bring the island to the desired size. Alternatively, the processing of the lead frame and the island is possible by etching processes.

The adaptation of the island conveniently takes place after preparation of the standard lead frame because then still only a complete standardized lead frame must be used. On the other hand, the sizing of the island can also be integrated into the manufacturing process of the lead frame, in which case, however, various lead frame matched with the island sizes that are adapted to the respective size of the integrated circuit must be prepared. The tools for making the Zuleitungs- frame are modular in order to adapt the island to large simply.

Usually, the island will be reduced to a size that is slightly larger than that of the integrated circuit. The integrated circuit is namely preferably by gluing with a silver adhesive on the island. Then bulging between the integrated circuit and the island of adhesive is controlled and serves as a measure for a correct fastening. In the area of ​​the island of the supernatant, a groove is formed, which is optically well to control.

The inventive method is an electronic component having an integrated circuit and a standardized housing made of casting or molding compound, in which the integrated circuit is embedded, and manufactured to a lead frame having a central island for receiving the integrated circuit. This electronic device is characterized in that the island is substantially flush with the integrated circuit, and that the distance between the top of the housing and the integrated circuit corresponds to the distance between the underside of the housing and the island. If the island is larger than the integrated circuit mounted thereon, so resulting in the area of ​​a different prior Inselüber- Preßmassendicke between the island top and top of the housing on the one hand and the island lower side and the housing bottom on the other. This thickness difference causes in cooperation with the rigid lead frame of a special metal alloy stresses in the housing, which affect the Gehäuseverwölbung.

Only the ratio of the footprint of the integrated circuit to the island surface determines the degree of Gehäuseverwölbung under otherwise identical materials, manufacturing equipment, processes and process parameters. By adjusting the size of the island to the respective base surface of the integrated circuit, the voltages between the integrated circuit lead frame and molding compound are so balanced that the Gehäuseverwölbung is reduced to one another depending on the ratio of the areas or eliminated.

In order to achieve a particularly good minimizing body warp, the island is flush with the listed controlled integrated. Circuit is formed. Island and integrated circuit then have so exactly the same size. Characterized the Preßmassendicken between the upper surface of the integrated circuit and the upper edge of the housing and the bottom of the island and the lower housing edge are at all points in the same size housing and the stresses compensate each other. The bimetallic effect which results from the different coefficients of expansion, is avoided by the symmetrical design.

In another embodiment of the invention, it may be advantageous to form the island slightly larger than the integrated circuit, wherein the integrated circuit is adhered to the island, and the exiting adhesive then forms a groove on the protruding island edge, can be controlled with their training, whether the integrated circuit is bonded correctly on the island. it is particularly favorable, so as to form the island, that the ratio of the footprint of the integrated circuit to the island less than 0.9: 1.

The island is formed as a continuous, unpatterned surface in the present invention. This ensures that the thickness of molding material underneath the integrated circuit and the island is positioned above and the same size. In addition, provided in the prior art structuring and special designs of the island omitted.

In another embodiment of the invention, the supply lines can be formed up to the island introduced.

This is particularly advantageous for very small integrated circuits, which otherwise would create an excessive distance from the leads to the island and could have problems in the further contact. Various embodiments of the invention are further explained with reference to a drawing. Specifically, the schematic diagrams show in:

Figure 1 is a side sectional view of a device according to the invention with a large integrated circuit;

Figure 2 is a side sectional view through an inventive device with a small integrated circuit; and

Figure 3 is a side sectional view through an inventive device with a small integrated circuit and flush final island.

1 shows a cross-section through an electronic device in which a lead frame 2 is used, which consists in particular of the leads 3 and an island. 4 On the island 4, an integrated circuit 1 is mounted and lead frames 2 and integrated circuit 1 then embedded in a housing 6 of the molding compound. In this case, the circuit 1 and the island 4 is arranged in terms of height such that the housing portions 7 and 8 are formed, each having a thickness a and b are equal. The size of the island 4 is according to the invention been adapted to the base surface of the integrated circuit 1, so that they substantially coincide. The island 4 is only a small supernatant greater than the base surface of the integrated circuit 1, so that the adhesive used for mounting the integrated circuit 1 on the island 4 can deflect and forms a groove 5 on the supernatant. This groove 5 forms a suitable control parameter for monitoring an optimal bonding of the integrated circuit 1 with the island 4. The Gesamtzulei- processing frame 2 is arranged in terms of height such that the leads 3 also centered are disposed in the housing. 6 Above and below the supply lines so housing portions extend with the same thickness, which is denoted in the figure with c. The island 4 is thus lowered according to the invention with respect to the leads 3, specifically matched in one of the height of the integrated circuit 1 manner. This heightwise adjustment is taken into account in the manufacture of the lead frame 2 and the connections between the leads 3 and the island. 4

In Figure 2, an inventive electronic device is shown with a small integrated circuit. 11 For this purpose, the island 14 is adjusted according to the smaller integrated circuit 11, and accordingly made smaller. A suitable ratio of the base surface of the integrated circuit 11 to the island 14 is, as Table I is between 0.7 and 0.9.

In experiments with various TQFP 20 x 20 x 1.4 mm - housings, Alloy42 lead frame and molding compound Aratronic 2188 were determined following relationships.

Island size ratio ChipGehäuseverwölbung in mm x mm area / Inselfl che diagonal (average)

13.8 x 13 0.7 <80 .mu.m 13.8 x 13 0.8 <60 microns 13.8 x 13 0.9 <20 microns

11.6 x 11.6 0.6> 70 .mu.m

9.4 x 9.4 0.6> 80 .mu.m 9.4 x 9.4 0.9 <30 microns

The island 14 is lowered within the lead frame 2 with the feeders 3 so that both above and emerge beneath the feeders 3 housing portions with the same thickness c and above and below the integrated circuit 11 and the island 14 housing areas 7 with the thickness a and housing portions 8 are formed with the thickness b, where a = b. Also in this embodiment, is a small overhang of the island 14, occurring at the result of the reaction shrinkage of the molding compound voltages taken into account in order to generate a groove 5 on this island supernatant which is an important control parameter in production.

Another embodiment of the invention is shown in Figure 3, in which also a small integrated circuit is shown with a flush island 24. 11 In this example, no protruding island there are areas where stresses due to the shrinkage of the molding compound reaction could occur.

In the figures, only integrated circuits 1 and 11 are presented with two different sizes. However, it should be understood that for a standardized and standardized overall housing 6 a group of integrated circuits is used with different sizes. According to the size of the base surface of the integrated circuit, the island is adapted in size, so that the standard lead frame is further processed according to the invention and can be used for a whole group of different integrated circuits without there would be a Gehäuseverwölbung. In the above described housings is large thin square case, so-called. TQFP packages with, for example 176 leads which are led out on all four sides of the square dratischen housing.

Claims

Patentanspr├╝che
1. A method for manufacturing an electronic component, in particular a d├╝nnes ​​QFPs, wherein
- a standardized lead frame (2) with a predetermined number of feeders (3) a group of different für großen integrated circuits (1, 11) is produced, wherein the standardized lead frame (2) with a central island (4 , 14, 24) of predetermined maximum Größe for receiving one of the integrated circuits (1, 11) from this group is formed,
- the island (4, 14, 24) used according to the weils Grundfläche JE the integrated circuit (1, 11) is reduced to a suitable Größenverhältnis,
- the integrated circuit (1, 11) on the island (4, 14, 24) is attached, and
- the lead frame (2) fixed with the the island (4, 14, 24) integrated circuit (1, 11) is embedded in a Gie├ƒoder Pre├ƒmasse, wherein the unit of the island and integrated circuit h├╢henm├ is ñ├ƒig centered.
2. The method according to claim 1, characterized in that the lead frame with the daß formed therein island (4, 14, 24) is punched.
3. The method according to any preceding Ansprüche, characterized in that the integrated circuit (1, 11) daß onto the island (4, 14, 24) is glued.
4. The method according to any preceding Ansprüche, characterized daß the fixing of the integrated circuit (1, 11) on the island (4, 14, 24) is controlled based emergent adhesive.
5. The method according to any preceding Ansprüche, characterized in that the appropriate daß Größenverhältnis between 0.7 and 0.9 is located.
6. An electronic component with an integrated circuit (1, 11) and a standardized Gehäuse (6) of Gieß- or Preßmasse, in which the integrated circuit (1, 11) is embedded, and (with a lead frame 2), daß a central island (4, 14, has 24) for receiving the integrated circuit, wherein the island is formed a Gehäusedurchbiegung is avoided, characterized in that daß the island (4 , 14, 24) is formed substantially bündig abschließend (with the integrated circuit 1, 11), and the thickness of the daß Gehäusebereiches (7) above the integrated circuit (1, 11) is equal to thickness of the Gehäusebereiches (8) below the island (4, 14, 24).
7. The electronic component according to claim 6, characterized in that the island daß (4, 14) is slightly größer than the chip (1, 11).
8. The electronic component according to any one of Ansprüche 6 or 7, characterized in that the integrated circuit (1, 11) daß onto the island (4, 14) is glued and the leaked adhesive at the integrated circuit (1, 11 ) forms a groove (5).
9. Electronic device according to one of Ansprüche 6 to 8, characterized in that the daß Verhältnis Grundfläche of the integrated circuit to Inselfläche less than 0.9: 1 beträgt.
10. The electronic component according to any one of Ansprüche 6 to 9, characterized in that the daß Verhältnis of the integrated Grundfläche
Circuit for Inselfläche in the range 0.9 - 0.7 is.
11. The electronic component according to any one of Ansprüche 6 to 10, characterized in that the island daß (4, 14, 24) as a continuous, unstructured
Fläche is formed.
12. The electronic component according to any one of Ansprüche 6 to 11, characterized in that the supply lines (3) daß up to the island (4, 14, 24) are formed herange- führt.
13. The electronic component according to any one of Ansprüche 6 to 12, characterized in that daß the supply lines (3) centered in the höhenmäßig Gehäuse (6) are arranged and the island (4 , 14, 24) is slightly lowered gegenüber the supply lines (3).
PCT/DE1997/000105 1995-07-17 1997-01-22 Electronic component WO1998032172A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE1995126010 DE19526010B4 (en) 1995-07-17 1995-07-17 electronic component
PCT/DE1997/000105 WO1998032172A1 (en) 1995-07-17 1997-01-22 Electronic component

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE1995126010 DE19526010B4 (en) 1995-07-17 1995-07-17 electronic component
PCT/DE1997/000105 WO1998032172A1 (en) 1995-07-17 1997-01-22 Electronic component
EP97908115A EP0954879A1 (en) 1997-01-22 1997-01-22 Electronic component
US09/688,465 US6870245B1 (en) 1997-01-22 2000-10-16 Electric component with an integrated circuit mounted on an island of a lead frame

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US35917899A Continuation 1999-07-22 1999-07-22

Publications (1)

Publication Number Publication Date
WO1998032172A1 true WO1998032172A1 (en) 1998-07-23

Family

ID=25962889

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE1997/000105 WO1998032172A1 (en) 1995-07-17 1997-01-22 Electronic component

Country Status (2)

Country Link
DE (1) DE19526010B4 (en)
WO (1) WO1998032172A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0954879A1 (en) 1997-01-22 1999-11-10 Siemens Aktiengesellschaft Electronic component
DE19526010B4 (en) * 1995-07-17 2005-10-13 Infineon Technologies Ag electronic component

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4258381A (en) * 1977-12-07 1981-03-24 Steag, Kernergie Gmbh Lead frame for a semiconductor device suitable for mass production
JPS60119756A (en) * 1983-12-01 1985-06-27 New Japan Radio Co Ltd Manufacture of semiconductor device
JPS60189956A (en) * 1984-03-09 1985-09-27 Nec Corp Manufacture of lead frame for semiconductor device
JPS6132435A (en) * 1984-07-24 1986-02-15 Nec Corp Method for fixing of semiconductor element
JPH04101437A (en) * 1990-08-21 1992-04-02 Seiko Instr Inc Mounting of semiconductor device
DE4041346A1 (en) * 1990-12-21 1992-06-25 Siemens Ag Plastic housing containing encapsulated semiconductor chips - has chips protruding on all sides beyond metal islands below
US5191403A (en) * 1991-02-05 1993-03-02 Kabushiki Kaisha Toshiba Resin-sealed semiconductor device having a particular mold resin structure
DE19526010A1 (en) * 1995-07-17 1997-01-23 Siemens Ag Surface-mounted electronic component mfr., esp. thin quad- flat package prodn.

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3051195C2 (en) * 1980-08-05 1997-08-28 Gao Ges Automation Org Package for integrated circuit incorporated in identity cards
US4884124A (en) * 1986-08-19 1989-11-28 Mitsubishi Denki Kabushiki Kaisha Resin-encapsulated semiconductor device
EP0261324A1 (en) * 1986-09-26 1988-03-30 Texas Instruments Incorporated Plastic package for large chip size integrated circuit
DE3635375C2 (en) * 1986-10-17 1988-07-21 W.C. Heraeus Gmbh, 6450 Hanau, De
JPH0521655A (en) * 1990-11-28 1993-01-29 Mitsubishi Electric Corp Semiconductor device and package therefor
DE4204286A1 (en) * 1992-02-13 1993-08-19 Siemens Ag Electronic surface mounted device mfr. - using only lead frame stamping out and housing moulding stations dependent on size of device being mfd.

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4258381A (en) * 1977-12-07 1981-03-24 Steag, Kernergie Gmbh Lead frame for a semiconductor device suitable for mass production
JPS60119756A (en) * 1983-12-01 1985-06-27 New Japan Radio Co Ltd Manufacture of semiconductor device
JPS60189956A (en) * 1984-03-09 1985-09-27 Nec Corp Manufacture of lead frame for semiconductor device
JPS6132435A (en) * 1984-07-24 1986-02-15 Nec Corp Method for fixing of semiconductor element
JPH04101437A (en) * 1990-08-21 1992-04-02 Seiko Instr Inc Mounting of semiconductor device
DE4041346A1 (en) * 1990-12-21 1992-06-25 Siemens Ag Plastic housing containing encapsulated semiconductor chips - has chips protruding on all sides beyond metal islands below
US5191403A (en) * 1991-02-05 1993-03-02 Kabushiki Kaisha Toshiba Resin-sealed semiconductor device having a particular mold resin structure
DE19526010A1 (en) * 1995-07-17 1997-01-23 Siemens Ag Surface-mounted electronic component mfr., esp. thin quad- flat package prodn.

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 009, no. 277 (E - 355) 6 November 1985 (1985-11-06) *
PATENT ABSTRACTS OF JAPAN vol. 010, no. 032 (E - 379) 7 February 1986 (1986-02-07) *
PATENT ABSTRACTS OF JAPAN vol. 010, no. 184 (E - 415) 27 June 1986 (1986-06-27) *
PATENT ABSTRACTS OF JAPAN vol. 016, no. 336 (E - 1237) 21 July 1992 (1992-07-21) *

Also Published As

Publication number Publication date
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DE19526010A1 (en) 1997-01-23

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