WO1997027668A1 - Point feedback - Google Patents

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Publication number
WO1997027668A1
WO1997027668A1 PCT/GB1997/000192 GB9700192W WO9727668A1 WO 1997027668 A1 WO1997027668 A1 WO 1997027668A1 GB 9700192 W GB9700192 W GB 9700192W WO 9727668 A1 WO9727668 A1 WO 9727668A1
Authority
WO
WIPO (PCT)
Prior art keywords
amplifier
voltage
circuit
amplifier circuit
subsidiary
Prior art date
Application number
PCT/GB1997/000192
Other languages
French (fr)
Inventor
Aubrey Max Sandman
Original Assignee
Kings College London
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kings College London filed Critical Kings College London
Publication of WO1997027668A1 publication Critical patent/WO1997027668A1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/369—A negative impedance circuit being added to an amplifier circuit

Definitions

  • the present invention relates to an amplifier with reduced distortion in the output signal, more particularly it relates to an amplifier circuit in which the distortion normally present is reduced.
  • an amplifier structure which comprises a main amplifier circuit and a subsidiary amplifier circuit, the subsidiary amplifier circuit being able to generate a compensation voltage (as herein defined) which corresponds substantially to the error voltage (as herein defined) of the main circuit the compensation voltage being able to be combined with the error voltage so that when this compensation voltage is inverted and combined with the output of the amplifier, distortion in the main amplifier output is substantially reduced.
  • the invention also comprises a method of reducing distortion in 'an amplifier circuit which comprises generating a compensation voltage (as herein defined) and combining the inverted compensation voltage with the output of the amplifier to reduce distortion in the main amplifier circuit.
  • the error voltage is defined as that part of an output signal which is due to distortion.
  • the output from an amplifier can be considered as consisting of the ideal voltage (which is the undistorted signal required) plus the error voltage (which is defined as the variation introduced by distortion in the circuit). This is true for all waveforms and amplifiers. By generating a voltage equivalent to this error voltage and inverting this generated voltage the error voltage can be cancelled out leaving the ideal voltage.
  • the compensation voltage is defined as the voltage generated in the subsidiary circuit which corresponds to the error voltage.
  • the subsidiary amplifier circuit can have performance characteristics substantially the same as that ofthe main amplifier circuit and the input signal is fed into this subsidiary amplifier circuit from a position on the main amplifier circuit at which the ideal voltage is balanced off This signal will correspond to or be equivalent to an attenuated error voltage and it is then passed through the subsidiary amplifier circuit to compensate for the attenuation so that when it is fed back into the main amplifier circuit it is inverted and combined with the output of the main amplifier It is clear that combining this inverted compensation voltage with the output from the main amplifier circuit will substantially compensate for the error voltage in the output signal and thus reduce the distortion.
  • the values of the resistors in the in the subsidiary amplifier circuit can be substantially the same as those in the main circuit (although they will have different power ratings) so that the performance characteristics of the circuits are substantially similar.
  • the resistors in the subsidiary circuit have substantially no power currents flowing through them so the values do not depend on the power of the output. They depend principally on the gain of the overall circuit and the characteristics ofthe operational amplifier.
  • FIG. 1 A circuit diagram illustrating the circuit of the invention is shown in figure 1 of the drawings where Ri , R ⁇ , Rl ⁇ R2 ⁇ R2 , R2 ⁇ are resistors. R j and Ri can be of the same value and R2, R2 , and R2 ' can be of the same value.
  • the main amplifier circuit is shown generally at (1 ) and can be a conventional operational power amplifier circuit.
  • the input signal is generated at 4 and the load is at the output at 5
  • the ideal voltage can be shown to balance off, so the voltage at point p, which goes to subsidiary amplifier circuit 2 is the error voltage, which will be attenuated by a factor of R j 2
  • the subsidiary amplifier circuit (2) will amplify the attenuated error voltage so that it becomes the compensation voltage and this is fed back into the main amplifier circuit via R 2 " where it will be inverted and combined with the output at the point 5
  • the gain in the subsidiary amplifier 2 should be substantially the same as the gain in the main amplifier circuit 1 so the error voltage is substantially reduced by the compensation voltage.
  • the output voltage at 5, VQ can be considered as comprising two components V ⁇ , the ideal voltage plus Vg the error voltage.
  • VQ With an input signal V j and no error voltage, VQ equals V j x R2 R ] .
  • the ideal voltage V balances off and so can be ignored at this point.
  • the signal passing to circuit 2 has a value which is Vg attenuated by a factor of R,/(R ] +R 2 )
  • the subsidiary amplifier circuit only has very small power e.g. ofthe order less than 50 milliwatts and can be less than 10 milliwatts.
  • the amplifier in the subsidiary amplifier circuit is preferably a differential amplifier This enables an amplifier to be used in the subsidiary amplifier circuit which can be of low power and, at the signal levels obtained, slew rate is of little consequence and so the amplifier can be chosen accordingly.
  • the output is earthed on one side and so the load can also be earthed on one side.
  • the load can also be earthed on one side.
  • the circuit of the present invention provides a cheap simple method of neutralising distortions in an amplifier circuit which avoids the need for complex and costly circuitry and components.
  • a demonstration circuit was set out as in figure 2, the resistances are expressed as one thousand ohms i.e. 10k is ten thousand ohms.
  • the main or power circuit is shown generally at 1 and the subsidiary circuit is shown generally at 2.
  • a voltage can be fed in which represents an error voltage.
  • the earthed 100k and 1 Ok resistors in the subsidiary circuit corresponding to 2 and R j ' in fig. 1 are equivalent to one resistor of (100k x 10k)/(100k+10k).
  • the subsidiary circuit was not connected at the point p, and a signal at 1kHz was generated at 4 and an error signal was fed in at 7 of a different frequency this gave an error signal at the output 5.
  • amplifier circuit 2 was connected into the circuit the error was greatly diminished.
  • the error signal alone was fed into the circuit and gave a wave pattern of peak to peak voltage of 1.3 volts.
  • the circuit 2 was connected in and the peak to peak voltage was reduced to 0.1 volts giving a reduction of 13 : 1

Abstract

An amplifier structure with reduced distortion which is simple and easy to operate comprises a main or power amplifier circuit and a subsidiary circuit. The output from the power circuit is considered as comprising the ideal or undistorted voltage and an error voltage which produces distortion, the subsidiary circuit generates a compensation voltage substantially the same as the error voltage, when this compensation voltage is combined with the output from the main amplifier circuit the distortion is substantially reduced or eliminated.

Description

Point Feedback
The present invention relates to an amplifier with reduced distortion in the output signal, more particularly it relates to an amplifier circuit in which the distortion normally present is reduced.
Techniques which have been used for distortion compensation include feedforward, predistortion and negative feedback. Feedback is commonly used in a wide range of applications but it can have disadvantages in its actual applications. For example gain in the amplifier to be linearised falls proportionally to the return difference of the feedback loop and this means a compromise of linear performance at the expense of a minor gain which can be unacceptable. Known feedback circuits to overcome this and instability and other problems are complex and often have only a limited success.
We have now devised an amplifier structure which is simple to implement and which reduces distortion.
According to the invention there is provided an amplifier structure which comprises a main amplifier circuit and a subsidiary amplifier circuit, the subsidiary amplifier circuit being able to generate a compensation voltage (as herein defined) which corresponds substantially to the error voltage (as herein defined) of the main circuit the compensation voltage being able to be combined with the error voltage so that when this compensation voltage is inverted and combined with the output of the amplifier, distortion in the main amplifier output is substantially reduced.
The invention also comprises a method of reducing distortion in 'an amplifier circuit which comprises generating a compensation voltage (as herein defined) and combining the inverted compensation voltage with the output of the amplifier to reduce distortion in the main amplifier circuit.
The error voltage is defined as that part of an output signal which is due to distortion. The output from an amplifier can be considered as consisting of the ideal voltage (which is the undistorted signal required) plus the error voltage (which is defined as the variation introduced by distortion in the circuit). This is true for all waveforms and amplifiers. By generating a voltage equivalent to this error voltage and inverting this generated voltage the error voltage can be cancelled out leaving the ideal voltage.
The compensation voltage is defined as the voltage generated in the subsidiary circuit which corresponds to the error voltage.
In order to generate the compensation voltage, the subsidiary amplifier circuit can have performance characteristics substantially the same as that ofthe main amplifier circuit and the input signal is fed into this subsidiary amplifier circuit from a position on the main amplifier circuit at which the ideal voltage is balanced off This signal will correspond to or be equivalent to an attenuated error voltage and it is then passed through the subsidiary amplifier circuit to compensate for the attenuation so that when it is fed back into the main amplifier circuit it is inverted and combined with the output of the main amplifier It is clear that combining this inverted compensation voltage with the output from the main amplifier circuit will substantially compensate for the error voltage in the output signal and thus reduce the distortion.
The values of the resistors in the in the subsidiary amplifier circuit can be substantially the same as those in the main circuit (although they will have different power ratings) so that the performance characteristics of the circuits are substantially similar. The resistors in the subsidiary circuit have substantially no power currents flowing through them so the values do not depend on the power of the output. They depend principally on the gain of the overall circuit and the characteristics ofthe operational amplifier.
As the signal fed to the subsidiary amplifier circuit comes from the main amplifier circuit, the input to the subsidiary amplifier circuit will vary as the error voltage varies so that the compensation voltage will correspond closely to the error voltage A circuit diagram illustrating the circuit of the invention is shown in figure 1 of the drawings where Ri , R^, Rl\ R2\ R2 , R2 \ are resistors. Rj and Ri can be of the same value and R2, R2 , and R2 ' can be of the same value. Referring to this drawing the main amplifier circuit is shown generally at (1 ) and can be a conventional operational power amplifier circuit. The input signal is generated at 4 and the load is at the output at 5 At the point p the ideal voltage can be shown to balance off, so the voltage at point p, which goes to subsidiary amplifier circuit 2 is the error voltage, which will be attenuated by a factor of Rj 2 The subsidiary amplifier circuit (2) will amplify the attenuated error voltage so that it becomes the compensation voltage and this is fed back into the main amplifier circuit via R2 " where it will be inverted and combined with the output at the point 5 The gain in the subsidiary amplifier 2 should be substantially the same as the gain in the main amplifier circuit 1 so the error voltage is substantially reduced by the compensation voltage.
This result arises as, in the absence ofthe subsidiary circuit, the output voltage at 5, VQ, can be considered as comprising two components V^, the ideal voltage plus Vg the error voltage. With an input signal Vj and no error voltage, VQ equals Vj x R2 R] . At the point p the ideal voltage V balances off and so can be ignored at this point. The signal passing to circuit 2 has a value which is Vg attenuated by a factor of R,/(R]+R2)
At the point q in the subsidiary circuit a voltage is generated which is Vg' which substantially has the same value as Vg and is the compensation voltage, this is fed back to point p and is then inverted at Ai so as to neutralise the error voltage V^
The performance characteristics of the subsidiary circuit can be made similar to those of the main amplifier circuit by having the components forming each circuit the same or by having components in each circuit which have corresponding values
It is a feature of the circuit of the invention that it is stable, as the amplifier in the subsidiary amplifier circuit only operates on the error voltage and so the Nyquist stability criterion does not apply.
In the circuit of the present invention only one power amplifier is required as the main amplifier circuit, the subsidiary amplifier circuit only has very small power e.g. ofthe order less than 50 milliwatts and can be less than 10 milliwatts. The amplifier in the subsidiary amplifier circuit is preferably a differential amplifier This enables an amplifier to be used in the subsidiary amplifier circuit which can be of low power and, at the signal levels obtained, slew rate is of little consequence and so the amplifier can be chosen accordingly.
Preferably the output is earthed on one side and so the load can also be earthed on one side. This is of particular advantage in cascade voltage amplifiers since this enables the amplifiers to be simply interconnected.
The circuit of the present invention provides a cheap simple method of neutralising distortions in an amplifier circuit which avoids the need for complex and costly circuitry and components.
Example
A demonstration circuit was set out as in figure 2, the resistances are expressed as one thousand ohms i.e. 10k is ten thousand ohms. The main or power circuit is shown generally at 1 and the subsidiary circuit is shown generally at 2. At 7 a voltage can be fed in which represents an error voltage. The earthed 100k and 1 Ok resistors in the subsidiary circuit corresponding to 2 and Rj ' in fig. 1 are equivalent to one resistor of (100k x 10k)/(100k+10k).
In operation the subsidiary circuit was not connected at the point p, and a signal at 1kHz was generated at 4 and an error signal was fed in at 7 of a different frequency this gave an error signal at the output 5. When amplifier circuit 2 was connected into the circuit the error was greatly diminished. In order to measure the reduction in error, the error signal alone was fed into the circuit and gave a wave pattern of peak to peak voltage of 1.3 volts. The circuit 2 was connected in and the peak to peak voltage was reduced to 0.1 volts giving a reduction of 13 : 1

Claims

Claims
1. An amplifier structure which comprises a main amplifier circuit and a subsidiary amplifier circuit, the subsidiary amplifier circuit being able to generate a compensation voltage (as herein defined) which corresponds substantially to the error voltage (as herein defined) of the main circuit, the compensation voltage, after inversion, being able to be combined with the error voltage so that when this compensation voltage is inverted and combined with the output of the amplifier distortion in the main amplifier output is substantially reduced.
2 An amplifier structure as claimed in claim 1 in which the amplifier in the subsidiary amplifier circuit is a differential amplifier.
3. An amplifier structure as claimed in claim 2 in which the amplifier in the main amplifier circuit is a power amplifier.
4. An amplifier structure as claimed in any one of claims 1 to 3 in which the gain in the subsidiary amplifier circuit is substantially the same as the reciprocal of the gain in the main amplifier circuit.
5. An amplifier structure as claimed in any one of claims 1 to 4 in which the compensation voltage is generated by taking a signal from a point in the main amplifier circuit where the ideal voltage (as herein defined) is balanced off so as to obtain an attenuated error voltage, which attenuated error voltage is amplified in the subsidiary amplifier circuit to obtain a compensation voltage which is substantially the same as the error voltage, which compensation voltage is fed into the main amplifier circuit and inverted so that it substantially nullifies the error voltage to produce an output with reduced distortion.
6. An amplifier structure as described with reference to figure 1 ofthe drawings
PCT/GB1997/000192 1996-01-23 1997-01-22 Point feedback WO1997027668A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9601307.3 1996-01-23
GBGB9601307.3A GB9601307D0 (en) 1996-01-23 1996-01-23 Point feedback

Publications (1)

Publication Number Publication Date
WO1997027668A1 true WO1997027668A1 (en) 1997-07-31

Family

ID=10787415

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB1997/000192 WO1997027668A1 (en) 1996-01-23 1997-01-22 Point feedback

Country Status (2)

Country Link
GB (1) GB9601307D0 (en)
WO (1) WO1997027668A1 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4207536A (en) * 1978-03-02 1980-06-10 Michigan Technological University Dual-adjustment balance circuit for operational amplifiers
US4215317A (en) * 1978-11-27 1980-07-29 Omni Spectra, Inc. Compensated operational amplifier circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4207536A (en) * 1978-03-02 1980-06-10 Michigan Technological University Dual-adjustment balance circuit for operational amplifiers
US4215317A (en) * 1978-11-27 1980-07-29 Omni Spectra, Inc. Compensated operational amplifier circuit

Also Published As

Publication number Publication date
GB9601307D0 (en) 1996-03-27

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