WO1992011704A1 - Apparatus and method for generating quadrature signals - Google Patents
Apparatus and method for generating quadrature signals Download PDFInfo
- Publication number
- WO1992011704A1 WO1992011704A1 PCT/US1991/009587 US9109587W WO9211704A1 WO 1992011704 A1 WO1992011704 A1 WO 1992011704A1 US 9109587 W US9109587 W US 9109587W WO 9211704 A1 WO9211704 A1 WO 9211704A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- phase
- exclusive
- signals
- differential
- signal
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims description 11
- 230000010363 phase shift Effects 0.000 claims abstract description 17
- 238000001914 filtration Methods 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 239000003990 capacitor Substances 0.000 claims 1
- 230000035945 sensitivity Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 2
- 230000003595 spectral effect Effects 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000001427 coherent effect Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B27/00—Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/16—Networks for phase shifting
- H03H11/22—Networks for phase shifting providing two or more phase shifted output signals, e.g. n-phase output
Definitions
- the present invention relates generally to signal generators, and, more particularly, to a signal generator providing differential quadrature signals and maintaining these signals precisely in a 90° phase relationship.
- a precise 90° phase relationship having a high degree of accuracy is a necessity for implementing quadrature modulated transmit signals and quadrature demodulated receive signals.
- Two such quadrature systems may include a single sideband mixer and a coherent detector.
- the output of an ideal single mixer comprises a desired carrier frequency and an image frequency.
- the image frequency can be surpressed. Deviation from 90° causes imperfect surpression of an image frequency and degradation of the modulator or demodulator function.
- conventional quadrature signal generators have an accuracy tolerance which depends on the tolerance of the components forming the circuit. Since a high accuracy of component values is difficult to achieve, the quadrature phase is different from ideal quadrature.
- Quadrature signal generators typically have the problem of accurately detecting a quadrature condition with an input signal having a wide range of amplitudes and different harmonic content. They also have the problem of accurately maintaining a quadrature condition over a wide range of frequencies and temperatures.
- Another problem is in generating a pair of quadrature outputs such that the amplitudes and shapes of the phase- shifted signals are equal to the amplitudes and shapes of the non-phase-shifted signals.
- a further problem is the difficulty of implementing a quadrature signal generator well suited for driving balanced mixers. Balanced mixers offer better supply rejection and better accuracy when accompanying circuitry is also balanced. Thus, a daunting challenge is to conceive of a precision quadrature signal generator overcoming the problematic conditions described above.
- FIG. 1 is a block diagram of a phase-locking precision quadrature signal generator constructed in accordance with the present invention.
- FIG. 2 is a circuit representing a voltage controlled phase-shift network included in the phase-locking precision quadrature signal generator of FIG. 1.
- FIG. 3 is a circuit representing an exclusive-OR phase detector included in the phase-locking precision quadrature signal generator of FIG. 1 .
- An apparatus produces in-phase and quadrature-phase signals from a differential input signal. Differential quadrature signals are generated in response to a differential input signal. A variation from 90° between the phases of the differential quadrature signals is detected. A control signal is generated in response to the detected variation. The phases of the differential quadrature signals are adjusted in response to the control signal.
- This invention may be advantageously utilized in a transmitter or a receiver requiring quadrature signals.
- the preferred embodiment of the present invention is particularly suited for driving balanced mixers.
- a balanced mixer configuration offers the advantages of better supply rejection and better accuracy when accompanying circuitry is also balanced.
- differential processing of in-phase and quadrature-phase signal components are implemented throughout the quadrature signal generator as described in the preferred embodiment.
- the use of a phase-locked loop employing a low pass filter, a voltage controlled phase-shift network, limiters, a novel precision exclusive-OR phase detector, a second low pass filter, a precision voltage to current converter, and a loop filter produces an improvement over conventional quadrature signal generators.
- Utilizing an advanced BiCMOS fabrication process makes it possible to implement the entire function of the phase-locked loop on the same integrated circuit.
- the BiCMOS process combines the advantages of bipolar and CMOS technology.
- FIG. 1 A block diagram of the phase-locked loop 100 generating differential in- phase and differential quadrature-phase signals constructed in accordance with the present invention is shown in FIG. 1.
- the differential quadrature signals, (I,. ' ) and (Q/Q ' ), can be used as the local oscillator inputs in a quadrature modulator which uses balanced mixers, or to down-convert a quadrature modulated radio signal to base band in a direct conversion receiver.
- the differential input signals, (V,V) are applied to low pass filter 101 to generate filtered differential signals, (v/v ' ).
- the differential input signals, (V,V) each have an AC signal component which are180° out of phase from each other and DC signal component which are the same.
- the low pass filter 101 contributes to the wave-shape matching of the phase-shifted and non-phase-shifted signals by filtering out any second harmonic present in the differential input signals, (V.V).
- the filtered differential signals, (v,v') are coupled to a voltage controlled, phase-shift network 103 which generates two pairs of differential phase-shifted signals, (X . X ' ) and (Y,Y ' ).
- the differential phase-shifted signals, (X,X ' )_ are 180° out of phase from each other and likewise, differential phase-shifted signals, (Y,Y ' ), are also 180° out of phase from each other.
- the phase difference between each pair of signals is a function of a control voltage VCNTL- Differential phase-shifted signals, (X,X ' ) and (Y,Y ' ), are then processed with identical limiters 105 and 107 producing differential quadrature signals (l,l ' ) and (Q/Q ' ).
- the limiters 105 and 107 ensure that the differential quadrature signals, (I.T) and (Q/Q ' ), have essentially the same wave shapes and amplitudes. These differential quadrature signals having a precise 90° quadrature relationship are used to drive the transmitting and receiving circuitry.
- the differential quadrature signals are also coupled to the novel precision exclusive-OR phase detector 109, having detected differential output, (XOR.XOR ' ), with an average DC value proportional to the phase error from ideal quadrature.
- a second low pass filter 1 11 extracts the average DC value from the detected differential outputs, (XOR.XOR ' ), generated by the exclusive-OR phase detector 109.
- the second low pass filter 111 is coupled to a precision voltage to current (V to I) converter 113 which determines the difference between the two DC levels and translates the result into a current signal at line 114.
- a loop filter 115 converts the current signal at line 1 14 into the voltage control signal, VCNTL, and also maintains loop stability.
- the control voltage, VCNTL is fed back into the voltage controled phase-shift network 103 to maintain precision quadrature between differential quadrature signals, (I.T) and (Q/Q ' ),at the outputs of limiters 105 and 107.
- This phase-locked loop is unique in that it employs a voltage controlled phase-shifter (VPS) rather than a conventional voltage controlled oscillator (VCO).
- phase-locked loop 100 The problem of generating a pair of differential quadrature output signals such that the amplitudes and shapes of the phase-shifted signals are equal to the amplitudes and shapes of the non-phase-shifted signals is overcome utilizing a combination of elements in the phase-locked loop 100.
- the voltage controlled phase-shift network 103 preserves its input amplitude such that the fundamental component of each pair of differential phase- shifted signals, (X,X ' ) and (Y,Y ' ), have the same amplitude, however, if the filtered differential input to the voltage controlled phase-shift network 103 has high harmonic content, the harmonics in the (X,X ' ) signals will be phase- shifted by more than 90° and cause the shape and zero- crossing slopes of the (Y,Y ' ) signals to be different from that of the (X,X ' ) signals.
- the limiters correct for the amplitude distortion such that the limiters differential phase-shifted signals, (I.T) and (Q/Q ' ), are nearly identical in wave shape.
- the low pass filter 101 preceding the voltage control phase-shift network 103 also contributes to the wave shape matching by filtering out any second harmonic present in the differential input signals, (V.V).
- a second harmonic distortion would not only disrupt the 50% duty cycle of the differential quadrature signals, (U ' ) and (Q/Q'), but would also cause their duty cycles not to match. Matching wave shapes are essential when using those signals as local oscillators in balanced mixer applications requiring precise image cancellation.
- a quadrature phase-shift in the filtered differential signal, (v,v ' ) is generated using the voltage controled phase-shift network 103 as shown in FIG. 2.
- the phase- shift is accomplished with a bridge RC arrangement driven in a double-ended configuration by a differential transistor amplifier.
- the Laplace transform for differential phase-shifted signal, Y is:
- the Laplace transform for Y ' is
- PMOS transistors 201 and 203 are biased in the linear (resistive) region to create a voltage controlled phase-shifter.
- the PMOS gate voltages are varied to provide the phase-shift.
- the PMOS transistors 201 and 203 were also instrumental in solving the problem of accurately maintaining a quadrature condition over a wide range of frequencies and temperatures.
- the gate-source voltage of the PMOS transistors 201 and 203, adjusted by the voltage control signal, VCNTL, is represented by Nominal sensitivity using the PMOS transistors 201 and 203 now becomes about 100° per volt. This will not only cover variations in resistance and capacitance tolerance and temperature but also allows phase-locked quadrature operation over a large range of input frequencies.
- XOR 1 and XOR 2 Two standard current mode logic (CML) exclusive-OR gates are represented by XOR 1 and XOR 2.
- the first exclusive-OR gate, XOR 1 comprises 6 NPN transistors 301 through 306.
- the second exclusive-OR gate, XOR 2 is represented by 6 NPN transistors 307 through 312. Diodes 313 - 316 and current sources 317 - 320 are provided to keep the transistors (305, 306, 31 1 , 312) operating in their active region.
- the two exclusive-OR gates, XOR 1 and XOR 2 are connected in such a way that the differential in-phase signals, (I,.
- the differential quadrature-phase input signals, (Q/Q ' ), are coupled to the upper transistor pairs (NPN transistors 307 through 310) of the second gate, XOR 2, and also coupled in parallel with the lower transistor pair (NPN transistors 305 and 306) of the first gate, XOR 1 .
- single-ended input signals (l “ ,Q " ), have an AC and a DC signal component which are coupled to the same exclusive- OR inputs as input signals, (l,Q), in the preferred embodiment.
- Input signals, (. '" .Q “' ), have only a DC signal component corresponding to the DC signal component of single-ended input signals, (l “ ,Q " ).
- -",Q”'), are coup
- phase error from ideal quadrature may be determined by either of two methods. The first method detects the phase error by determining the difference between the two outputs. The second method detects the phase error by determining the difference between one output and a independent DC reference signal.
- the novel quadrature signal generator can accurately generate a precise quadrature condition with an input signal having a wide range of amplitudes and different harmonic content. It can also accurately maintain a quadrature condition over a wide range of frequencies and temperatures.
- the amplitudes and shapes of the phase-shifted signals are equal to the amplitudes and shapes of the non-phase-shifted signals.
- the differential quadrature signals generated may be used advantageously with balanced mixers thereby improving transmitter and receiver performance.
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
BR919106406A BR9106406A (pt) | 1990-12-21 | 1991-12-18 | Aparelho e processo para produzir sinais de fase de quadratura,e aparelho e processo para detectar variacao de 90 0 fase entre sinais e quadratura |
FI923760A FI923760A (fi) | 1990-12-21 | 1992-08-20 | Anordning och foerfarande foer generering av kvadratursignaler |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US63370190A | 1990-12-21 | 1990-12-21 | |
US633,701 | 1990-12-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1992011704A1 true WO1992011704A1 (en) | 1992-07-09 |
Family
ID=24540758
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1991/009587 WO1992011704A1 (en) | 1990-12-21 | 1991-12-18 | Apparatus and method for generating quadrature signals |
Country Status (8)
Country | Link |
---|---|
JP (1) | JPH05505297A (es) |
AU (1) | AU9179691A (es) |
BR (1) | BR9106406A (es) |
CA (1) | CA2073347C (es) |
FR (1) | FR2670975A1 (es) |
IT (1) | IT1250974B (es) |
MX (1) | MX174064B (es) |
WO (1) | WO1992011704A1 (es) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0660512A1 (fr) * | 1993-12-22 | 1995-06-28 | Philips Composants Et Semiconducteurs | Amplificateur déphaseur et son application à un circuit recombineur |
WO1996021270A1 (en) * | 1994-12-30 | 1996-07-11 | Philips Electronics N.V. | Circuit and method for generating accurate quadrature signals |
WO2001010029A1 (en) * | 1999-08-03 | 2001-02-08 | Cambridge Silicon Radio Ltd. | Phase shifting arrangement |
WO2002051091A1 (en) * | 2000-12-21 | 2002-06-27 | Intersil Americas Inc. | Phase error detection and correction for differential signals |
US7271622B2 (en) * | 2004-06-10 | 2007-09-18 | Theta Microelectronics, Inc. | Quadrature voltage controlled oscillators with phase shift detector |
EP2220769A1 (en) * | 2007-11-28 | 2010-08-25 | Motorola, Inc. | Method and apparatus for reconfigurable frequency generation |
USRE42799E1 (en) | 2000-10-02 | 2011-10-04 | Intellectual Ventures I Llc | Packet acquisition and channel tracking for a wireless communication device configured in a zero intermediate frequency architecture |
EP4167488A1 (en) * | 2021-10-13 | 2023-04-19 | MediaTek Inc. | Poly phase filter with phase error enhance technique |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11505987A (ja) * | 1995-05-26 | 1999-05-25 | ランバス・インコーポレーテッド | 直交クロック発生器内で使用される移相器 |
GB2361123A (en) * | 2000-04-04 | 2001-10-10 | Nokia Mobile Phones Ltd | Polyphase filters in silicon integrated circuit technology |
FR2809266B1 (fr) * | 2000-05-19 | 2002-10-11 | St Microelectronics Sa | Procede et dispositif de controle du dephasage entre quatre signaux mutuellement en quadrature de phase |
KR100351057B1 (ko) * | 2000-09-26 | 2002-09-05 | 삼성전자 주식회사 | 주파수의 체배성능을 향상시키기 위한 검출제어부를구비하는 주파수 체배회로 |
US6891440B2 (en) | 2000-10-02 | 2005-05-10 | A. Michael Straub | Quadrature oscillator with phase error correction |
US8615205B2 (en) | 2007-12-18 | 2013-12-24 | Qualcomm Incorporated | I-Q mismatch calibration and method |
US8970272B2 (en) | 2008-05-15 | 2015-03-03 | Qualcomm Incorporated | High-speed low-power latches |
US8712357B2 (en) | 2008-11-13 | 2014-04-29 | Qualcomm Incorporated | LO generation with deskewed input oscillator signal |
US8718574B2 (en) | 2008-11-25 | 2014-05-06 | Qualcomm Incorporated | Duty cycle adjustment for a local oscillator signal |
US8847638B2 (en) | 2009-07-02 | 2014-09-30 | Qualcomm Incorporated | High speed divide-by-two circuit |
US8791740B2 (en) | 2009-07-16 | 2014-07-29 | Qualcomm Incorporated | Systems and methods for reducing average current consumption in a local oscillator path |
US8854098B2 (en) | 2011-01-21 | 2014-10-07 | Qualcomm Incorporated | System for I-Q phase mismatch detection and correction |
US9154077B2 (en) | 2012-04-12 | 2015-10-06 | Qualcomm Incorporated | Compact high frequency divider |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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US4313089A (en) * | 1980-03-31 | 1982-01-26 | Motorola, Inc. | Precision quadrature analog phase detector |
US4878251A (en) * | 1985-04-29 | 1989-10-31 | Plessey Overseas Limited | Interference signal suppressor for a radio receiver |
US4908532A (en) * | 1986-09-16 | 1990-03-13 | Plessey Overseas Limited | Quadrature signals generator |
US5039889A (en) * | 1989-08-19 | 1991-08-13 | U.S. Philips Corp. | Phase comparison circuit |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3819930A1 (de) * | 1988-06-11 | 1989-12-21 | Thomson Brandt Gmbh | Schaltungsanordnung zur einstellung der phasenlage eines signals |
DE3829164C1 (es) * | 1988-08-27 | 1989-08-10 | Ant Nachrichtentechnik Gmbh, 7150 Backnang, De | |
NL8802531A (nl) * | 1988-10-14 | 1990-05-01 | Philips Nv | Fasedetector en frequentiedemodulator voorzien van zulk een fasedetector. |
-
1991
- 1991-12-18 BR BR919106406A patent/BR9106406A/pt not_active Application Discontinuation
- 1991-12-18 WO PCT/US1991/009587 patent/WO1992011704A1/en active Application Filing
- 1991-12-18 JP JP4504367A patent/JPH05505297A/ja active Pending
- 1991-12-18 AU AU91796/91A patent/AU9179691A/en not_active Abandoned
- 1991-12-18 CA CA002073347A patent/CA2073347C/en not_active Expired - Fee Related
- 1991-12-19 MX MX9102719A patent/MX174064B/es not_active IP Right Cessation
- 1991-12-20 IT ITRM910965A patent/IT1250974B/it active IP Right Grant
- 1991-12-20 FR FR9115947A patent/FR2670975A1/fr active Granted
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4313089A (en) * | 1980-03-31 | 1982-01-26 | Motorola, Inc. | Precision quadrature analog phase detector |
US4878251A (en) * | 1985-04-29 | 1989-10-31 | Plessey Overseas Limited | Interference signal suppressor for a radio receiver |
US4908532A (en) * | 1986-09-16 | 1990-03-13 | Plessey Overseas Limited | Quadrature signals generator |
US5039889A (en) * | 1989-08-19 | 1991-08-13 | U.S. Philips Corp. | Phase comparison circuit |
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0660512A1 (fr) * | 1993-12-22 | 1995-06-28 | Philips Composants Et Semiconducteurs | Amplificateur déphaseur et son application à un circuit recombineur |
US5877643A (en) * | 1993-12-22 | 1999-03-02 | U.S. Philips Corporation | Phase shift amplifier and its applications to a recombining circuit |
WO1996021270A1 (en) * | 1994-12-30 | 1996-07-11 | Philips Electronics N.V. | Circuit and method for generating accurate quadrature signals |
US6680639B1 (en) | 1999-08-03 | 2004-01-20 | Cambridge Silicon Radio Ltd. | Phase shifting arrangement for generating mutually orthogonal signals |
WO2001010029A1 (en) * | 1999-08-03 | 2001-02-08 | Cambridge Silicon Radio Ltd. | Phase shifting arrangement |
US6674998B2 (en) | 2000-10-02 | 2004-01-06 | Intersil Americas Inc. | System and method for detecting and correcting phase error between differential signals |
USRE42799E1 (en) | 2000-10-02 | 2011-10-04 | Intellectual Ventures I Llc | Packet acquisition and channel tracking for a wireless communication device configured in a zero intermediate frequency architecture |
WO2002051091A1 (en) * | 2000-12-21 | 2002-06-27 | Intersil Americas Inc. | Phase error detection and correction for differential signals |
US7271622B2 (en) * | 2004-06-10 | 2007-09-18 | Theta Microelectronics, Inc. | Quadrature voltage controlled oscillators with phase shift detector |
EP2220769A1 (en) * | 2007-11-28 | 2010-08-25 | Motorola, Inc. | Method and apparatus for reconfigurable frequency generation |
EP4167488A1 (en) * | 2021-10-13 | 2023-04-19 | MediaTek Inc. | Poly phase filter with phase error enhance technique |
US11811413B2 (en) | 2021-10-13 | 2023-11-07 | Mediatek Inc. | Poly phase filter with phase error enhance technique |
TWI833335B (zh) * | 2021-10-13 | 2024-02-21 | 聯發科技股份有限公司 | 濾波電路及多相濾波器 |
Also Published As
Publication number | Publication date |
---|---|
IT1250974B (it) | 1995-04-24 |
AU9179691A (en) | 1992-07-22 |
CA2073347C (en) | 1995-05-09 |
BR9106406A (pt) | 1993-05-04 |
MX174064B (es) | 1994-04-18 |
ITRM910965A0 (it) | 1991-12-20 |
ITRM910965A1 (it) | 1993-06-20 |
FR2670975A1 (fr) | 1992-06-26 |
MX9102719A (es) | 1992-06-01 |
JPH05505297A (ja) | 1993-08-05 |
FR2670975B1 (es) | 1995-03-17 |
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