USD475981S1 - Integrated circuits substrate - Google Patents
Integrated circuits substrate Download PDFInfo
- Publication number
- USD475981S1 USD475981S1 US29/165,700 US16570002F USD475981S US D475981 S1 USD475981 S1 US D475981S1 US 16570002 F US16570002 F US 16570002F US D475981 S USD475981 S US D475981S
- Authority
- US
- United States
- Prior art keywords
- integrated circuits
- circuits substrate
- substrate
- view
- elevational view
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Description
FIG. 1 is a front, top and right side perspective view of an integrated circuits substrate, showing my new design;
FIG. 2 is a front elevational view thereof, the rear elevational view is omitted as that is symmetrical to the front elevational view thereof;
FIG. 3 is a top plan view thereof;
FIG. 4 is a bottom plan view thereof;
FIG. 5 is a right side elevational view thereof;
FIG. 6 is a left side elevational view thereof; and,
FIG. 7 is an enlarged cross-sectional view thereof, taken along line 7—7 of FIG. 2, with the internal system omitted.
The broken lines in all views are shown for illustrative purposes only and form no part of the claimed design.
Claims (1)
- The ornamental design for an integrated circuits substrate, as shown and described.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002008443 | 2002-03-29 | ||
| JP2002-008443 | 2002-03-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| USD475981S1 true USD475981S1 (en) | 2003-06-17 |
Family
ID=19191424
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US29/165,700 Expired - Lifetime USD475981S1 (en) | 2002-03-29 | 2002-08-16 | Integrated circuits substrate |
Country Status (1)
| Country | Link |
|---|---|
| US (1) | USD475981S1 (en) |
Cited By (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080224279A1 (en) * | 2007-03-16 | 2008-09-18 | Vertical Circuits, Inc. | Vertical electrical interconnect formed on support prior to die mount |
| US20080303131A1 (en) * | 2007-06-11 | 2008-12-11 | Vertical Circuits, Inc. | Electrically interconnected stacked die assemblies |
| US20090065916A1 (en) * | 2007-09-10 | 2009-03-12 | Vertical Circuits, Inc. | Semiconductor die mount by conformal die coating |
| US20100327461A1 (en) * | 2009-06-26 | 2010-12-30 | Vertical Circuits, Inc. | Electrical interconnect for die stacked in zig-zag configuration |
| US20110101505A1 (en) * | 2008-06-19 | 2011-05-05 | Vertical Circuits, Inc. | Semiconductor Die Separation Method |
| US8912661B2 (en) | 2009-11-04 | 2014-12-16 | Invensas Corporation | Stacked die assembly having reduced stress electrical interconnects |
| US9147583B2 (en) | 2009-10-27 | 2015-09-29 | Invensas Corporation | Selective die electrical insulation by additive process |
| US9153517B2 (en) | 2008-05-20 | 2015-10-06 | Invensas Corporation | Electrical connector between die pad and z-interconnect for stacked die assemblies |
| US9305862B2 (en) | 2008-03-12 | 2016-04-05 | Invensas Corporation | Support mounted electrically interconnected die assembly |
| US9490195B1 (en) | 2015-07-17 | 2016-11-08 | Invensas Corporation | Wafer-level flipped die stacks with leadframes or metal foil interconnects |
| US9508691B1 (en) | 2015-12-16 | 2016-11-29 | Invensas Corporation | Flipped die stacks with multiple rows of leadframe interconnects |
| US9595511B1 (en) | 2016-05-12 | 2017-03-14 | Invensas Corporation | Microelectronic packages and assemblies with improved flyby signaling operation |
| US9728524B1 (en) | 2016-06-30 | 2017-08-08 | Invensas Corporation | Enhanced density assembly having microelectronic packages mounted at substantial angle to board |
| US9825002B2 (en) | 2015-07-17 | 2017-11-21 | Invensas Corporation | Flipped die stack |
| US9871019B2 (en) | 2015-07-17 | 2018-01-16 | Invensas Corporation | Flipped die stack assemblies with leadframe interconnects |
| US10566310B2 (en) | 2016-04-11 | 2020-02-18 | Invensas Corporation | Microelectronic packages having stacked die and wire bond interconnects |
| US20210234331A1 (en) * | 2018-10-25 | 2021-07-29 | Furukawa Electric Co., Ltd. | Optical module, optical module implemented substrate, and housing |
| USD1112116S1 (en) * | 2023-09-11 | 2026-02-10 | Panasonic Intellectual Property Management Co., Ltd. | Semiconductor device |
| USD1112117S1 (en) * | 2023-09-11 | 2026-02-10 | Panasonic Intellectual Property Management Co., Ltd. | Semiconductor device |
| USD1112118S1 (en) * | 2023-09-11 | 2026-02-10 | Panasonic Intellectual Property Management Co., Ltd. | Semiconductor device |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5138438A (en) | 1987-06-24 | 1992-08-11 | Akita Electronics Co. Ltd. | Lead connections means for stacked tab packaged IC chips |
| US5352852A (en) | 1992-08-28 | 1994-10-04 | Goldstar Electron Co., Ltd. | Charge coupled device package with glass lid |
| US5677570A (en) | 1995-02-17 | 1997-10-14 | Hitachi, Ltd. | Semiconductor integrated circuit devices for high-speed or high frequency |
| US5777265A (en) | 1993-01-21 | 1998-07-07 | Intel Corporation | Multilayer molded plastic package design |
| US5824950A (en) | 1994-03-11 | 1998-10-20 | The Panda Project | Low profile semiconductor die carrier |
| US5912808A (en) | 1997-08-11 | 1999-06-15 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor component |
| USD432097S (en) | 1999-11-20 | 2000-10-17 | Samsung Electronics Co., Ltd. | Semiconductor package |
| US6211564B1 (en) | 1997-12-11 | 2001-04-03 | Ricoh Company, Ltd. | Integrated circuit package having stepped terminals |
| US6316825B1 (en) | 1998-05-15 | 2001-11-13 | Hyundai Electronics Industries Co., Ltd. | Chip stack package utilizing a connecting hole to improve electrical connection between leadframes |
| US6462408B1 (en) | 2001-03-27 | 2002-10-08 | Staktek Group, L.P. | Contact member stacking system and method |
-
2002
- 2002-08-16 US US29/165,700 patent/USD475981S1/en not_active Expired - Lifetime
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5138438A (en) | 1987-06-24 | 1992-08-11 | Akita Electronics Co. Ltd. | Lead connections means for stacked tab packaged IC chips |
| US5352852A (en) | 1992-08-28 | 1994-10-04 | Goldstar Electron Co., Ltd. | Charge coupled device package with glass lid |
| US5777265A (en) | 1993-01-21 | 1998-07-07 | Intel Corporation | Multilayer molded plastic package design |
| US5824950A (en) | 1994-03-11 | 1998-10-20 | The Panda Project | Low profile semiconductor die carrier |
| US5677570A (en) | 1995-02-17 | 1997-10-14 | Hitachi, Ltd. | Semiconductor integrated circuit devices for high-speed or high frequency |
| US5912808A (en) | 1997-08-11 | 1999-06-15 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor component |
| US6211564B1 (en) | 1997-12-11 | 2001-04-03 | Ricoh Company, Ltd. | Integrated circuit package having stepped terminals |
| US6316825B1 (en) | 1998-05-15 | 2001-11-13 | Hyundai Electronics Industries Co., Ltd. | Chip stack package utilizing a connecting hole to improve electrical connection between leadframes |
| USD432097S (en) | 1999-11-20 | 2000-10-17 | Samsung Electronics Co., Ltd. | Semiconductor package |
| US6462408B1 (en) | 2001-03-27 | 2002-10-08 | Staktek Group, L.P. | Contact member stacking system and method |
Cited By (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8742602B2 (en) * | 2007-03-16 | 2014-06-03 | Invensas Corporation | Vertical electrical interconnect formed on support prior to die mount |
| US20080224279A1 (en) * | 2007-03-16 | 2008-09-18 | Vertical Circuits, Inc. | Vertical electrical interconnect formed on support prior to die mount |
| US20080303131A1 (en) * | 2007-06-11 | 2008-12-11 | Vertical Circuits, Inc. | Electrically interconnected stacked die assemblies |
| US20110037159A1 (en) * | 2007-06-11 | 2011-02-17 | Vertical Circuits, Inc. | Electrically Interconnected Stacked Die Assemblies |
| US8629543B2 (en) | 2007-06-11 | 2014-01-14 | Invensas Corporation | Electrically interconnected stacked die assemblies |
| US8723332B2 (en) | 2007-06-11 | 2014-05-13 | Invensas Corporation | Electrically interconnected stacked die assemblies |
| US20090065916A1 (en) * | 2007-09-10 | 2009-03-12 | Vertical Circuits, Inc. | Semiconductor die mount by conformal die coating |
| US9824999B2 (en) | 2007-09-10 | 2017-11-21 | Invensas Corporation | Semiconductor die mount by conformal die coating |
| US9252116B2 (en) | 2007-09-10 | 2016-02-02 | Invensas Corporation | Semiconductor die mount by conformal die coating |
| US8704379B2 (en) | 2007-09-10 | 2014-04-22 | Invensas Corporation | Semiconductor die mount by conformal die coating |
| US9305862B2 (en) | 2008-03-12 | 2016-04-05 | Invensas Corporation | Support mounted electrically interconnected die assembly |
| US9508689B2 (en) | 2008-05-20 | 2016-11-29 | Invensas Corporation | Electrical connector between die pad and z-interconnect for stacked die assemblies |
| US9153517B2 (en) | 2008-05-20 | 2015-10-06 | Invensas Corporation | Electrical connector between die pad and z-interconnect for stacked die assemblies |
| US20110101505A1 (en) * | 2008-06-19 | 2011-05-05 | Vertical Circuits, Inc. | Semiconductor Die Separation Method |
| US8884403B2 (en) | 2008-06-19 | 2014-11-11 | Iinvensas Corporation | Semiconductor die array structure |
| US8680687B2 (en) | 2009-06-26 | 2014-03-25 | Invensas Corporation | Electrical interconnect for die stacked in zig-zag configuration |
| US20100327461A1 (en) * | 2009-06-26 | 2010-12-30 | Vertical Circuits, Inc. | Electrical interconnect for die stacked in zig-zag configuration |
| US9147583B2 (en) | 2009-10-27 | 2015-09-29 | Invensas Corporation | Selective die electrical insulation by additive process |
| US9490230B2 (en) | 2009-10-27 | 2016-11-08 | Invensas Corporation | Selective die electrical insulation by additive process |
| US8912661B2 (en) | 2009-11-04 | 2014-12-16 | Invensas Corporation | Stacked die assembly having reduced stress electrical interconnects |
| US9490195B1 (en) | 2015-07-17 | 2016-11-08 | Invensas Corporation | Wafer-level flipped die stacks with leadframes or metal foil interconnects |
| US9871019B2 (en) | 2015-07-17 | 2018-01-16 | Invensas Corporation | Flipped die stack assemblies with leadframe interconnects |
| US9825002B2 (en) | 2015-07-17 | 2017-11-21 | Invensas Corporation | Flipped die stack |
| US9666513B2 (en) | 2015-07-17 | 2017-05-30 | Invensas Corporation | Wafer-level flipped die stacks with leadframes or metal foil interconnects |
| US9859257B2 (en) | 2015-12-16 | 2018-01-02 | Invensas Corporation | Flipped die stacks with multiple rows of leadframe interconnects |
| US9508691B1 (en) | 2015-12-16 | 2016-11-29 | Invensas Corporation | Flipped die stacks with multiple rows of leadframe interconnects |
| US10566310B2 (en) | 2016-04-11 | 2020-02-18 | Invensas Corporation | Microelectronic packages having stacked die and wire bond interconnects |
| US9595511B1 (en) | 2016-05-12 | 2017-03-14 | Invensas Corporation | Microelectronic packages and assemblies with improved flyby signaling operation |
| US9728524B1 (en) | 2016-06-30 | 2017-08-08 | Invensas Corporation | Enhanced density assembly having microelectronic packages mounted at substantial angle to board |
| US20210234331A1 (en) * | 2018-10-25 | 2021-07-29 | Furukawa Electric Co., Ltd. | Optical module, optical module implemented substrate, and housing |
| USD1112116S1 (en) * | 2023-09-11 | 2026-02-10 | Panasonic Intellectual Property Management Co., Ltd. | Semiconductor device |
| USD1112117S1 (en) * | 2023-09-11 | 2026-02-10 | Panasonic Intellectual Property Management Co., Ltd. | Semiconductor device |
| USD1112118S1 (en) * | 2023-09-11 | 2026-02-10 | Panasonic Intellectual Property Management Co., Ltd. | Semiconductor device |
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