US8547169B2 - Programmable noise filtering for bias kickback disturbances - Google Patents
Programmable noise filtering for bias kickback disturbances Download PDFInfo
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- US8547169B2 US8547169B2 US13/104,899 US201113104899A US8547169B2 US 8547169 B2 US8547169 B2 US 8547169B2 US 201113104899 A US201113104899 A US 201113104899A US 8547169 B2 US8547169 B2 US 8547169B2
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- bias
- output
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- kickback
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
- H03H7/0153—Electrical filters; Controlling thereof
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
Definitions
- the present specification describes embodiments that generally relate to bias kickback disturbances in electronic circuits and specifically to embodiments utilizing noise filtering.
- Kickback disturbances refer to the environment where the element of noise, that usually has the shape of an impulse or spur, is connected to an output port of a circuit.
- the spur is coupled through that output port to other portions of the circuit, thus generating a kickback disturbance upstream in the circuit.
- kickback disturbances may be problematic in electronic circuits because they deteriorate the performance of the electronic circuit with the kickback noise.
- the switching operation of a comparator and/or the operation of a clocked or dynamic output latch may result in the generation of kickback noise, thereby reducing accuracy and also disturbing other circuitry.
- transmitter and receiver blocks that turn on and off may cause kick-back disturbances in the main bias block. These disturbances cause bias variations in blocks such as synthesizer and phase-lock-loops that subsequently cause small drifts in the lock frequency and in the quiet blocks such as the low noise amplifiers.
- the circuit comprises a programmable noise filter wherein the programmable noise filter is coupled between two bias blocks.
- the programmable noise filter is a PI filter, wherein the PI filter may comprise one or more capacitors, one or more resistors and one or more switches having a structure of a C-R-C filter. At least one of the one or more switches may be programmable. The performance of the programmable noise filter may be determined by the value of the resistors, capacitors and the status of the switches.
- a system to reduce kickback disturbance may comprise N+1 bias blocks; N programmable noise filters, and a bias reference generator, wherein N is equal to or greater than one.
- the N programmable noise filters may be separately programmable.
- the system filters the kickback disturbances such that the current on output current port of N+1 bias block has a reduced kickback disturbance as compared to the spurs on the output current ports of the one or more N bias blocks.
- FIG. 1 illustrates a kickback disturbance in an electrical circuit.
- FIG. 2 illustrates the functionality of a PI circuit where the PI circuit is implemented as a C-R-C circuit.
- FIG. 3 illustrates an embodiment of a programmable noise filter with switches.
- FIG. 4A illustrates a block diagram of a system that reduces kickback disturbances where the system has two programmable noise filters.
- FIG. 4B illustrates a block diagram of a system that reduces kickback disturbances where the system has N programmable noise filters.
- FIG. 5 illustrates an embodiment of the Specification that shows a current mirror circuit.
- one objective is to reduce the amount of kickback disturbances, especially in bias circuits. If an impulse or spur is coupled to an output portion of a FET, a kickback disturbance may be generated.
- the amount of kickback disturbance is based on a number of factors including the characteristic of the FET, the voltages driving that FET and the frequency characteristic of the spur. For example, assume a NMOS whose gate is driven with a constant voltage by a voltage source with finite series resistance. Any MOS device may have finite parasitic capacitance between its gate-drain and gate-source junctions. Reactance of this capacitor is 1/ ⁇ c.
- kickback noise This unwanted rise in the gate voltage is called kickback noise or a kickback disturbance.
- spur refers to the noise element that initiated the kickback disturbance.
- Embodiment 100 may be located in the bias block or bias cell of an electronic circuit.
- the source of the FET, PMOS 101 is driven by voltage Vdd.
- a spur 103 is coupled to the drain of PMOS 101 , located at bias output port 106 .
- the spur is coupled through the parasitic capacitor 102 of PMOS 101 (see path 104 ).
- kickback disturbance 105 is generated on the gate of PMOS 101 , located at bias input port 107 .
- the magnitude of kickback disturbance 105 depends, among other things, on the frequency of spur 103 , the value of Vdd and value of parasitic capacitor 102 .
- kickback disturbance 105 may be filtered.
- One possible filter is a PI filter, comprising capacitors and resistors.
- FIG. 2 illustrates one example of a PI filter as a Capacitor-Resistor-Capacitor (C-R-C) configuration. This PI filter may be coupled between two bias blocks of an electronic circuit.
- kickback disturbance 206 is coupled to port 204 .
- the C-R-C circuit filters the kickback disturbance 206 , resulting in kickback disturbance 207 on port 205 .
- Kickback disturbance 207 has a lower magnitude or value as compared with kickback disturbance 206 .
- the aforementioned C-R-C structure may mitigate the kickback disturbance in a couple of ways.
- the capacitance load at port 204 reduces the amount of kickback voltage generated. This voltage is further reduced by the R-C connection between the port 204 and port 205 .
- the C-R-C filter comprises capacitor 201 , capacitor 203 and resistor 202 .
- Port 204 is coupled to one end of capacitor 201 and one end of resistor 202 .
- the other end of capacitor 201 is coupled to ground.
- the other end of resistor 202 is coupled to capacitor 203 and coupled to port 205 .
- the other end of capacitor 203 is coupled to ground.
- the filter is implemented as a programmable noise filter.
- One embodiment is a programmable noise filter, as illustrated in FIG. 3 .
- embodiment 300 may include resistors 301 and 302 , capacitors 303 and 304 and switches 305 and 306 .
- This embodiment 300 may implement a programmable C-R-C filter.
- This filter may be coupled between two bias blocks of an electronic circuit.
- the filter is programmed based on the settings of the switches. For example, filter characteristics are determined by the value of the resistors and capacitors and the settings of the switches. For example, larger resistance will provide better filtering, but may result in longer settling times.
- resistor 301 As resistor 301 is in parallel with resistor 302 , the net resistance may be configured by opening or closing switches 305 and 306 . Different net resistance values may provide different filtering characteristics. Resistor 302 may be adjusted by adding parallel resistors, or shorts. In one embodiment, the value of resistors 301 and 302 may be both either 5K ohms or 10K ohms. The value of capacitors may vary, and in one embodiment capacitor 303 and capacitor 304 may be 10 pico farads (pf).
- FIG. 1 illustrated a FET in a bias cell, where changes in current of bias input (port 107 ) may occur whenever there is spur on the bias output (port 106 ).
- the C-R-C filter is implemented as follows:
- Bias OUT 308 is coupled to one end of switch 305 , Bias OUT 308 is coupled to one end of resistor 301 , Bias OUT 308 coupled to one end of resistor 302 and Bias OUT 308 is coupled to one end of capacitor 303 .
- An other end of switch 305 is coupled to Bias IN 309 and the other end of switch 305 is coupled to one end of capacitor 304 .
- resistor 301 is coupled to one end of switch 306 ; an other end of resistor 302 is coupled to Bias IN 309 , an other end of capacitor 303 is coupled to ground; an other end of the switch 306 is coupled to Bias IN 309 ; and an other end of capacitor 304 is coupled to ground.
- Bias OUT 308 and Bias IN 309 are two ports of the programmable noise filter that may be coupled between two bias blocks.
- invention 300 may be programmed manually or electronically, e.g. by a microcontroller.
- a person having ordinary skill in the art may recognize that embodiment 300 illustrates one possible structure for a programmable noise filter.
- Many alternative structures are possible.
- one side of capacitor 303 and 304 are shown coupled to ground in FIG. 3
- the capacitors 303 and 304 may instead be coupled to an AC ground node.
- Persons skilled in the art will realize the relative functional equivalence of such a configuration, since the disturbances may be transient and relatively short in duration.
- FIG. 4A illustrates a system for reducing kickback disturbance in an electronic circuit.
- bias block 401 a and bias block 401 b are separately coupled to programmable noise filter 403 a and programmable noise filter 403 b.
- a spur is coupled to OUTPUT CURRENT 1 of bias block 401 a , then that spur may be coupled to the bias IN port of bias block 401 a resulting in a kickback disturbance on the bias IN port of bias block 401 a .
- the kickback disturbance is filtered by the programmable noise filter 403 a . Accordingly, the kickback disturbance at the IN port of the programmable noise filter 403 a is reduced as compared with the kickback disturbance at the OUT port of the programmable noise filter 403 a.
- bias IN port of bias block 401 b is coupled to the OUT port of programmable noise filter 403 a .
- the resulting kickback disturbance is filtered by programmable noise filter 403 b .
- the kickback disturbance resulting on the IN port of programmable noise filter 403 b is reduced as compared with the kickback disturbance at the OUT port of the programmable noise filter 403 b.
- the IN ports of programmable noise filter 403 a and programmable noise filter 403 b are collectively coupled to the bias IN port of bias reference generator 406 and the bias IN port of bias block 401 c . Since the kickback disturbances at the IN ports of programmable noise filter 403 a and programmable noise filter 403 b have been reduced, the kickback disturbance on OUTPUT CURRENT 3 of bias block 401 c is reduced. Hence, the performance of the electronic circuit is improved. The amount of silicon area to implement the programmable noise filters is minimal.
- any noise coupling between the different blocks may be an error vector magnitude (EVM) degrading factor.
- EVM error vector magnitude
- embodiment 400 may be extended to N bias blocks and N programmable noise filters. With this extension, the kickback disturbance may be further reduced in the electronic circuit.
- embodiment 450 illustrates a block diagram of a system that reduces kickback disturbances where the system has N programmable noise filters that supports N+1 bias blocks.
- Embodiment 450 comprises bias block 401 a , bias block 401 b through bias block 401 n , having ports OUTPUT CURRENT 1 , OUTPUT CURRENT 2 through OUTPUT CURRENTn, respectively.
- Each of the bias blocks may have a bias IN port, as illustrated
- the bias IN port of each of the respective bias blocks is separately coupled to the OUT port of programmable noise filter 403 a through programmable noise filter 403 n , respectively.
- the IN port of programmable noise filter 403 a through programmable noise filter 403 n are collectively coupled to the bias IN ports of bias reference generator 406 and the bias IN port of bias block 401 n+ 1.
- a system to reduce kickback disturbance comprises N+1 bias blocks, N programmable noise filters, and a bias reference generator, wherein N is equal to or greater than one.
- the system further comprises a bias IN port on each of the N bias blocks that are separately coupled to an OUT port on each of the N programmable noise filters, such that the bias IN port of the Nth bias block is coupled to the OUT port of the Nth programmable noise filter.
- an IN port of each of the N programmable noise filters are collectively coupled to a bias IN port of the bias reference generator and the bias IN port of the N+1th bias block.
- the N programmable noise filters are separately programmable.
- the output current ports of N bias blocks are coupled to one or more spurs.
- the system improves the performance since the current on output current port of N+1 bias block has a reduced kickback disturbance as compared to the one or more spurs on the output current port of the N bias blocks.
- N 2 and the two N programmable noise filters are separately programmable.
- a method for reducing kickback disturbances comprising the steps of:
- the programmable noise filter may also be used to reduce kickback disturbances in current mirror circuits.
- FIG. 5 illustrates embodiment 500 where the programmable noise filter 503 is coupled in the middle of a current mirror.
- PMOS 501 and PMOS 502 would be configured to implement a current mirror if their gates were coupled together.
- a current mirror is a circuit designed to copy a current through one active device by controlling the current in another active device of a circuit, keeping the output current constant regardless of loading.
- a current mirror allows a designer to copy currents based on a single reference.
- the gate of the output portion of the current mirror (PMOS 501 ) is coupled to the OUT of programmable noise filter 503 .
- the kickback disturbance may be filtered by programmable noise filter 503 .
- the filtered kickback disturbance is coupled to the gate of PMOS 502 (bias IN) resulting in an improved signal on OUTPUT CURRENT 3 .
- the drains of PMOS 501 and PMOS 502 are coupled to power supply Vdd.
- PMOS 501 is a is a FET from bias block 401 a
- PMOS 502 is a FET from bias block 401 c
- programmable noise filter 503 is equivalent to programmable noise filter 403 a.
- the circuit comprises a programmable noise filter wherein the programmable noise filter is coupled between the gates of the FETs of the current mirror.
- the programmable noise filter 503 has mitigated the impact of kickback disturbance for the upstream reference current.
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Abstract
Description
-
- programming N programmable noise filters, wherein each of the N programmable noise filters are coupled between bias blocks, wherein N is equal to or great than one;
- receiving a spur at output current port of one or more N bias blocks;
- generating a kickback disturbance at bias IN port of the one or more N bias blocks;
- coupling bias IN port of a first bias block to a OUT port of a first programmable noise filter, and repeating the coupling until the bias IN port of the Nth bias block is coupled to the Nth OUT port of Nth programmable noise filter;
- filtering the kickback disturbance in the one or more N programmable noise filters;
- coupling collectively filtered kickback disturbances from the IN ports of the N programmable noise filters to (1) a bias IN port of a bias reference generator and (2) a bias IN port of a N+1 bias block; and
- receiving a current signal at output current port of the N+1 bias block that has a reduced kickback disturbance as compared to spurs received at the output current port of the one or more N bias blocks.
Claims (17)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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US13/104,899 US8547169B2 (en) | 2011-05-10 | 2011-05-10 | Programmable noise filtering for bias kickback disturbances |
PCT/US2012/037180 WO2012154897A1 (en) | 2011-05-10 | 2012-05-09 | Programmable noise filtering for bias kickback disturbances |
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US13/104,899 US8547169B2 (en) | 2011-05-10 | 2011-05-10 | Programmable noise filtering for bias kickback disturbances |
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US20120286856A1 US20120286856A1 (en) | 2012-11-15 |
US8547169B2 true US8547169B2 (en) | 2013-10-01 |
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US13/104,899 Expired - Fee Related US8547169B2 (en) | 2011-05-10 | 2011-05-10 | Programmable noise filtering for bias kickback disturbances |
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WO (1) | WO2012154897A1 (en) |
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US8547169B2 (en) | 2011-05-10 | 2013-10-01 | Qualcomm Incorporated | Programmable noise filtering for bias kickback disturbances |
Citations (8)
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---|---|---|---|---|
US6380800B1 (en) * | 1999-12-30 | 2002-04-30 | Micron Technology, Inc. | Pump area reduction through the use of passive RC-filters or active filters |
US6414538B1 (en) | 2000-10-06 | 2002-07-02 | Sun Microsystems, Inc. | Circuit to reduce AC component of bias currents in high speed transistor logic circuits |
US6949893B2 (en) * | 2003-03-04 | 2005-09-27 | Funai Electric Co., Ltd. | Television receiver and cold-cathode tube dimmer |
US7218170B1 (en) * | 2003-05-23 | 2007-05-15 | Broadcom Corporation | Multi-pole current mirror filter |
US7492216B2 (en) * | 2006-04-05 | 2009-02-17 | Panasonic Corporation | Filtering apparatus for correcting variation of CR-product |
US20110012692A1 (en) | 2009-07-17 | 2011-01-20 | Broadcom Corporation | Current-input current-output reconfigurable passive reconstruction filter |
US8279566B2 (en) * | 2008-04-30 | 2012-10-02 | Freescale Semiconductor, Inc. | Multi-voltage electrostatic discharge protection |
WO2012154897A1 (en) | 2011-05-10 | 2012-11-15 | Qualcomm Atheros, Inc. | Programmable noise filtering for bias kickback disturbances |
-
2011
- 2011-05-10 US US13/104,899 patent/US8547169B2/en not_active Expired - Fee Related
-
2012
- 2012-05-09 WO PCT/US2012/037180 patent/WO2012154897A1/en active Application Filing
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6380800B1 (en) * | 1999-12-30 | 2002-04-30 | Micron Technology, Inc. | Pump area reduction through the use of passive RC-filters or active filters |
US6414538B1 (en) | 2000-10-06 | 2002-07-02 | Sun Microsystems, Inc. | Circuit to reduce AC component of bias currents in high speed transistor logic circuits |
US6949893B2 (en) * | 2003-03-04 | 2005-09-27 | Funai Electric Co., Ltd. | Television receiver and cold-cathode tube dimmer |
US7218170B1 (en) * | 2003-05-23 | 2007-05-15 | Broadcom Corporation | Multi-pole current mirror filter |
US7492216B2 (en) * | 2006-04-05 | 2009-02-17 | Panasonic Corporation | Filtering apparatus for correcting variation of CR-product |
US8279566B2 (en) * | 2008-04-30 | 2012-10-02 | Freescale Semiconductor, Inc. | Multi-voltage electrostatic discharge protection |
US20110012692A1 (en) | 2009-07-17 | 2011-01-20 | Broadcom Corporation | Current-input current-output reconfigurable passive reconstruction filter |
WO2012154897A1 (en) | 2011-05-10 | 2012-11-15 | Qualcomm Atheros, Inc. | Programmable noise filtering for bias kickback disturbances |
Non-Patent Citations (2)
Title |
---|
"PCT Application No. PCT/US2012/037180, Written Opinion of the IPEA", Apr. 8, 2013, 8 pages. |
International Search Report and Written Opinion-PCT/US2012/037180-ISA/EPO-Jul. 18, 2012. |
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WO2012154897A1 (en) | 2012-11-15 |
US20120286856A1 (en) | 2012-11-15 |
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