US8513772B2 - Method for fabricating a three-dimensional inductor carrier with metal core and structure thereof - Google Patents
Method for fabricating a three-dimensional inductor carrier with metal core and structure thereof Download PDFInfo
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- US8513772B2 US8513772B2 US13/739,210 US201313739210A US8513772B2 US 8513772 B2 US8513772 B2 US 8513772B2 US 201313739210 A US201313739210 A US 201313739210A US 8513772 B2 US8513772 B2 US 8513772B2
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- H10W72/00—
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
- H01F17/0033—Printed inductances with the coil helically wound around a magnetic core
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
- H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
- H01F41/041—Printed circuit coils
- H01F41/046—Printed circuit coils structurally combined with ferromagnetic material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F5/00—Coils
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F5/00—Coils
- H01F5/003—Printed circuit coils
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/20—Inductors
Definitions
- the present invention is generally relating to a manufacturing method for a carrier, more particularly to the method for fabricating a three-dimensional inductor carrier with metal core.
- planar inductor A conventional inductor is best-known as planar inductor, and mentioned planar inductor may be utilized for designs of inductor pattern and trace pattern in a same plane. Owing to the reason that the planar inductor and the trace pattern are located in the same plane, a disturbance from parasitic capacitance is occurred and has to be overcome. Therefore, the chip size corresponded to the design pattern can not be decreased. Besides, the planar inductor merely forms a vortex structure instead of a toroid structure in a same radius.
- the primary object of the present invention is to provide a method for fabricating a three-dimensional inductor carrier with metal core comprising the steps of: providing a substrate having a surface, at least one first bond pad and a protective layer, wherein the first bond pad is disposed on the surface, the protective layer is formed on the surface, and the protective layer comprises at least one first pad opening, a first disposing area, and a plurality of second disposing areas, wherein the first pad opening reveals the first bond pad and is located at the first disposing area; forming a first photoresist layer on the protective layer; patterning the first photoresist layer to form at least one first opening and a plurality of first apertures, wherein the first opening reveals the first disposing area, and the first apertures reveal the second disposing areas; forming a first metal layer within the first opening and the first apertures and enabling the first metal layer to have a first conductive pad and a plurality of first inductor portions, and each of the first inductor portions comprises a first connection terminal,
- the inductor carrier possesses the structure of three-dimensional inductor and additional metal core thereby reducing the chip size and the layout area in a same plane.
- mentioned structure may increase coil density and magnetic flux.
- the magnetic flux direction of the inductor changes from normal to horizontal for three-dimensional designs of the inductor, and it is beneficial for electro-magnetic coupling of flip chip module in the flip chip process.
- FIGS. 1A to 1P are three-dimensional diagrams illustrating a method for fabricating a three-dimensional inductor carrier with metal core in accordance with a first preferred embodiment of the present invention.
- FIGS. 2A to 2P are cross-section diagrams illustrating a method for fabricating a three-dimensional inductor carrier with metal core in accordance with a first preferred embodiment of the present invention.
- FIG. 3 is a cross-section diagram illustrating a method for fabricating a three-dimensional inductor carrier with metal core in accordance with a second preferred embodiment of the present invention.
- FIG. 4 is a cross-section diagram illustrating a method for fabricating a three-dimensional inductor carrier with metal core in accordance with a third preferred embodiment of the present invention.
- FIG. 5 is a three-dimensional diagram illustrating a method for fabricating a three-dimensional inductor carrier with metal core in accordance with a fourth preferred embodiment of the present invention.
- FIG. 6 is a three-dimensional diagram illustrating a method for fabricating a three-dimensional inductor carrier with metal core in accordance with a fifth preferred embodiment of the present invention.
- a method for fabricating a three dimensional inductor carrier with metal core in accordance with a first preferred embodiment of the present invention comprises the steps of: first, please referring to FIGS.
- the substrate 110 having a surface 111 , at least one first bond pad 112 , a protective layer 113 and a second bond pad 114 , wherein the first bond pad 112 is disposed on the surface 111 , the protective layer 113 is formed on the surface 111 and comprises at least one first pad opening 113 a , a first disposing area 113 b and a plurality of second disposing areas 113 c , the first pad opening 113 a reveals the first bond pad 112 and is located at the first disposing area 113 b , the material of the substrate 110 can be chosen from one of Aluminum-Oxide substrate, Aluminum-Nitride substrate, Gallium-Arsenic substrate or glass substrate, and the protective layer 113 can be a passivation layer or re passivation layer; next, with reference to FIGS.
- first photoresist layer 120 on the protective layer 113 ; thereafter, referring to FIGS. 1C and 2C , patterning the first photoresist layer 120 to form at least one first opening 121 and a plurality of first apertures 122 , the first opening 121 reveals the first disposing area 113 b , and the first apertures 122 reveal the second disposing areas 113 c ; afterwards, referring to FIGS.
- first metal layer 130 within the first opening 121 and the first apertures 122 and enabling the first metal layer 130 to have a first conductive pad 131 and a plurality of first inductor portions 132 , wherein each of the first inductor portions 132 comprises a first connection terminal 132 a , a second connection terminal 132 b and a first height H 1 ; after that, with reference to FIGS. 1E and 2E , removing the first photoresist layer 120 ; next, referring to FIGS.
- first dielectric layer 140 on the protective layer 113 and covering the first metal layer 130 with the first dielectric layer 140 , wherein the first dielectric layer 140 comprises a second pad opening 141 , a plurality of first connection openings 142 and a plurality of second connection openings 143 , wherein the second pad opening 141 reveals the first conductive pad 131 , each of the first connection openings 142 reveals each of the first connection terminals 132 a , and each of the second connection openings 143 reveals each of the second connection terminals 132 b ; later, referring to FIGS. 1G and 2G , forming a second photoresist layer 150 on the first dielectric layer 140 ; afterwards, with reference to FIGS.
- the second inductor portion 161 is coupled with the first conductive pad 131 and comprises a first top surface 161 a and a second height H 2
- each of the third inductor portions 162 is coupled with each of the second connection terminals 132 b and comprises a second top surface 162 a and a third height H 3
- each of the fourth inductor portions 163 is coupled with each of the first connection terminals 132 a and comprises a third top surface 163 a and a fourth height H 4
- the first height H 1 is respectively smaller than the second height H 2 , third height H 3 and fourth height H 4 ,
- the second dielectric layer 170 comprises a first exposed hole 171 , a plurality of second exposed holes 172 and a plurality of third exposed holes 173 , in this embodiment, the first exposed hole 171 reveals the first top surface 161 a , each of the second exposed holes 172 reveals each of the second top surfaces 162 a , and each of the third exposed holes 173 reveals each of the third top surfaces 163 a ; next, referring to FIGS.
- FIGS. 1M and 2M forming a third photoresist layer 180 on the second dielectric layer 170 ; afterwards, with reference to FIGS. 1M and 2M , patterning the third photoresist layer 180 to form a fifth aperture 181 and a plurality of sixth apertures 182 , wherein the fifth aperture 181 reveals the first top surface 161 a and the second top surface 162 a , each of the sixth apertures 182 reveals each of the second top surfaces 162 a and each of the third top surfaces 163 a ; referring to FIGS.
- the material of the fifth inductor portion 191 and the sixth inductor portion 192 can be chosen from one of copper, silver or the combination of copper and silver, the fifth inductor portion 191 comprises a fifth height H 5 , each of the sixth inductor portions 192 comprises a sixth height H 6 , mentioned fifth height H 5 is respectively smaller than the second height H 2 , third height H 3 and the fourth height H 4 , and the sixth height H 6 is respectively smaller than the second height H 2 , third height H 3 and
- the three-dimensional inductor carrier with metal core 100 further comprises a second conductive pad P 1 formed on the protective layer 113 , the second conductive pad P 1 is electrically connected with the second bond pad 114 of the substrate 110 , the second metal layer 160 comprises a seventh inductor portion 165 , the third metal layer 190 comprises an eighth inductor portion 194 , the second conductive pad P 1 is coupled with the seventh inductor portion 165 , and the eighth inductor portion 194 is coupled with the seventh inductor portion 165 and the fourth inductor portion 163 .
- the method for fabricating the three-dimensional inductor carrier with metal core further comprises the step of forming a nickel-gold protective layer M on the third metal layer 190 to replace the step of forming a third dielectric layer D on the second dielectric layer 170 .
- FIG. 4 which represents a third preferred embodiment of this invention.
- a solder protection layer S is formed on the third metal layer 190 , and the material of the solder protection layer S can be solder or unleaded solder.
- FIG. 5 represents a fourth preferred embodiment of this invention.
- the second conductive pad P 1 is formed on the second dielectric layer 170
- the eighth inductor portion 194 of the third metal layer 190 is coupled with the second conductive pad P 1 and the fourth inductor portion 163 .
- FIG. 6 which represents a fifth preferred embodiment of this invention.
- the three-dimensional inductor carrier with metal core 100 further comprises a third conductive pad P 2 , the second conductive pad P 1 and the third conductive pad P 2 are formed on the second dielectric layer 170 , the second conductive pad P 1 is coupled with the eighth inductor potion 194 of the third metal layer 190 , and the third conductive pad P 2 is electrically connected with the fifth inductor portion 191 .
- the inductor carrier possesses the structure of three-dimensional inductor and additional metal core thereby reducing the chip size and the layout area in a same plane. Besides, mentioned structure may increase coil density and magnetic flux. Furthermore, the magnetic flux direction of the inductor changes from normal to horizontal for three-dimensional designs of the inductor, and it is beneficial for electro-magnetic coupling of flip chip module in the flip chip process.
- FIGS. 1P and 2P A three-dimensional inductor carrier with metal core 100 in accordance with a first preferred embodiment of this invention is shown in FIGS. 1P and 2P .
- the three-dimensional inductor carrier with metal core 100 at least comprises a substrate 110 , a first metal layer 130 , a first dielectric layer 140 , a second metal layer 160 , a second dielectric layer 170 , a metal core 164 , a third metal layer 190 , a second conductive pad P 1 and a third dielectric layer D, wherein the substrate 110 comprises a surface 111 , at least one first bond pad 112 , a protective layer 113 and a second bond pad 114 , the first bond pad 112 is disposed on the surface 111 , the protective layer 113 is formed on the surface 111 and comprises at least one first pad opening 113 a , and the first pad opening 113 a reveals the first bond pad 112 .
- the material of the substrate 110 can be chosen from one of Aluminum Oxide substrate, Aluminum Nitride substrate, Gallium Arsenic substrate or glass substrate.
- the protective layer 113 can be a passivation layer or a repassivation layer.
- the first metal layer 130 is formed on the protective layer 113 and comprises a first conductive pad 131 and a plurality of first inductor portions 132 , each of the first inductor portions 132 comprises a first connection terminal 132 a , a second connection terminal 132 b and a first height H 1 .
- the first dielectric layer 140 is formed on the protective layer 113 and covers the first metal layer 130 , wherein the first dielectric layer 140 comprises a second pad opening 141 , a plurality of first connection openings 142 and a plurality of second connection openings 143 , the second pad opening 141 reveals the first conductive pad 131 , each of the first connection openings 142 reveals each of the first connection terminals 132 a , and each of the second connection openings 143 reveals each of the second connection terminals 132 b .
- the second metal layer 160 is formed on the first dielectric layer 140 and comprises a second inductor portion 161 , a plurality of third inductor portions 162 , and a plurality of fourth inductor portions 163 , wherein the second inductor portion 161 is coupled with the first conductive pad 131 and comprises a first top surface 161 a and a second height H 2 , each of the third inductor portions 162 is coupled with each of the first connection terminals 132 a and comprises a second top surface 162 a and a third height H 3 , each of the fourth inductor portions 163 is coupled with each of the second connection terminals 132 b and comprises a third top surface 163 a and a fourth height H 4 , wherein the first height H 1 is respectively smaller than the second height H 2 , third height H 3 and fourth height H 4 .
- the material of the second inductor portion 161 , the third inductor portion 162 and the fourth inductor portion 163 can be chosen from one of nickel, iron or combination of nickel and iron.
- the second dielectric layer 170 is formed on the first dielectric layer 140 and covers the second metal layer 160 , the second dielectric layer 170 comprises a first exposed hole 171 , a plurality of second exposed holes 172 and a plurality of third exposed holes 173 , wherein the first exposed hole 171 reveals the first top surface 161 a , each of the second exposed holes 172 reveals each of the second top surfaces 162 a , and each of the third exposed holes 173 reveals each of the third top surfaces 163 a .
- the metal core 164 is formed on the first dielectric layer 140 and located between each of the third inductor portions 162 and each of the fourth inductor portions 163 , besides, the material of the metal core 164 can be chosen from one of nickel, iron or combination of nickel and iron.
- the metal core 164 comprises a bottom surface 164 a and a fourth top surface 164 b
- the first metal layer 130 comprises an upper surface 133
- a first interval B 1 is formed between the bottom surface 164 a and the upper surface 133
- the fourth top surface 164 b of the metal core 164 is respectively lower than the first top surface 161 a of the second inductor portion 161 , the second top surface 162 a of each of the third inductor portions 162 and the third top surface 163 a of each of the fourth inductor portions 163 .
- the third metal layer 190 is formed on the second dielectric layer 170 and comprises a fifth inductor portion 191 , a plurality of sixth inductor portions 192 and a lower surface 193 .
- the material of the fifth inductor portion 191 and the sixth inductor portion 192 can be chosen from copper, silver or the combination of copper and silver, the fifth inductor portion 191 is coupled with the second inductor portion 161 and the third inductor portion 162 , each of the sixth inductor portions 192 is coupled with the third inductor portion 162 and the fourth inductor portion 163 .
- the fifth inductor portion 191 comprises a fifth height H 5
- each of the sixth inductor portions 192 comprises a sixth height H 6 , wherein the fifth height H 5 is respectively smaller than the second height H 2 , third height H 3 and fourth height H 4
- the sixth height H 6 is respectively smaller than the second height H 2 , third height H 3 and fourth height H 4
- a second interval B 2 is formed between the fourth top surface 164 b of the metal core 164 and the lower surface 193 of the third metal layer 190 .
- the second conductive pad P 1 is formed on the protective layer 113 and electrically connected with the second bond pad 114 of the substrate 110 .
- the second metal layer 160 further comprises a seventh inductor portion 165 electrically connected with the second conductive pad P 1
- the third metal layer 190 further comprises an eighth inductor portion 194 electrically connected with the seventh inductor portion 165 and the fourth inductor portion 163 .
- the third dielectric layer D is formed on the second dielectric layer 170 and covers the third metal layer 190 .
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Abstract
A method for fabricating a inductor carrier comprises the steps of providing a substrate with a protective layer; forming a first photoresist layer on protective layer; patterning the first photoresist layer to form a first opening and first apertures; forming a first metal layer within first opening and first apertures; removing the first photoresist layer; forming a first dielectric layer on protective layer; forming a second photoresist layer on first dielectric layer; patterning the second photoresist layer to form a second aperture and a plurality of third apertures; forming a second metal layer within second aperture and third apertures; removing the second photoresist layer; forming a second dielectric layer on first dielectric layer; forming a third photoresist layer on second dielectric layer; patterning the third photoresist layer to form a fifth aperture and sixth apertures; forming a third metal layer within fifth aperture and sixth apertures.
Description
The present invention is generally relating to a manufacturing method for a carrier, more particularly to the method for fabricating a three-dimensional inductor carrier with metal core.
A conventional inductor is best-known as planar inductor, and mentioned planar inductor may be utilized for designs of inductor pattern and trace pattern in a same plane. Owing to the reason that the planar inductor and the trace pattern are located in the same plane, a disturbance from parasitic capacitance is occurred and has to be overcome. Therefore, the chip size corresponded to the design pattern can not be decreased. Besides, the planar inductor merely forms a vortex structure instead of a toroid structure in a same radius.
The primary object of the present invention is to provide a method for fabricating a three-dimensional inductor carrier with metal core comprising the steps of: providing a substrate having a surface, at least one first bond pad and a protective layer, wherein the first bond pad is disposed on the surface, the protective layer is formed on the surface, and the protective layer comprises at least one first pad opening, a first disposing area, and a plurality of second disposing areas, wherein the first pad opening reveals the first bond pad and is located at the first disposing area; forming a first photoresist layer on the protective layer; patterning the first photoresist layer to form at least one first opening and a plurality of first apertures, wherein the first opening reveals the first disposing area, and the first apertures reveal the second disposing areas; forming a first metal layer within the first opening and the first apertures and enabling the first metal layer to have a first conductive pad and a plurality of first inductor portions, and each of the first inductor portions comprises a first connection terminal, a second connection terminal and a first height; removing the first photoresist layer; forming a first dielectric layer on the protective layer and covering the first metal layer with the first dielectric layer, wherein the first dielectric layer comprises a second pad opening, a plurality of first connection openings and a plurality of second connection openings, wherein the second pad opening reveals the first conductive pad, each of the first connection openings reveals each of the first connection terminals, and each of the second connection openings reveals each of the second connection terminals; forming a second photoresist layer on the first dielectric layer; patterning the second photoresist layer to form a second aperture, a plurality of third apertures, a plurality of fourth apertures and a slot, wherein the second aperture reveals the first conductive pad, each of the third apertures reveals each of the first connection terminals, each of the fourth apertures reveals each of the second connection terminals, the slot reveals the first dielectric layer and is located between each of the third apertures and each of the fourth apertures, wherein the second aperture comprises a first top, a first depth is formed between the first top and the first conductive pad, each of the third apertures comprises a second top, a second depth is formed between each of the second tops and each of the first connection terminals, each of the fourth apertures comprises a third top, a third depth is formed between each of the third tops and each of the second connection terminals, the slot comprises a fourth top, a fourth depth is formed between the fourth top and the first dielectric layer, and the fourth depth is respectively smaller than the first, second and the third depth; forming a second metal layer within the second aperture, the third apertures, the fourth apertures and the slot and enabling the second metal layer to have a second inductor portion, a plurality of third inductor portions, a plurality of fourth inductor portions and a metal core, wherein the second inductor portion is coupled with the first conductive pad and comprises a first top surface and a second height, each of the third inductor portions is coupled with each of the second connection terminals and comprises a second top surface and a third height, each of the fourth inductor portions is coupled with each of the first connection terminals and comprises a third top surface and a fourth height, wherein the first height is respectively smaller than the second, third and fourth height, the metal core comprises a bottom surface, the first metal layer comprises a first upper surface, and a first interval is formed between the bottom surface and the first upper surface; removing the second photoresist layer; forming a second dielectric layer on the first dielectric layer and covering the second metal layer with the second dielectric layer, wherein the second dielectric layer comprises a first exposed hole, a plurality of second exposed holes and a plurality of third exposed holes, the first exposed hole reveals the first top surface, each of the second exposed holes reveals each of the second top surfaces, and each of the third exposed holes reveals each of the third top surfaces; forming a third photoresist layer on the second dielectric layer; patterning the third photoresist layer to form a fifth aperture and a plurality of sixth apertures, wherein the fifth aperture reveals the first top surface and the second top surface, and each of the sixth apertures reveals each of the second top surfaces and each of the third top surfaces; forming a third metal layer within the fifth aperture and the sixth apertures and enabling the third metal layer to have a fifth inductor portion and a plurality of sixth inductor portions, wherein the fifth inductor portion is coupled with the second inductor portion and the third inductor portion, each of the sixth inductor portions is coupled with the third inductor portion and the fourth inductor portion, the fifth inductor portion comprises a fifth height, each of the sixth inductor portions comprises a sixth height, the fifth height is respectively smaller than the second, third and fourth height, and the sixth height is respectively smaller than the second, third and fourth height. In this invention, the inductor carrier possesses the structure of three-dimensional inductor and additional metal core thereby reducing the chip size and the layout area in a same plane. Besides, mentioned structure may increase coil density and magnetic flux. Furthermore, the magnetic flux direction of the inductor changes from normal to horizontal for three-dimensional designs of the inductor, and it is beneficial for electro-magnetic coupling of flip chip module in the flip chip process.
Please refers to FIGS. 1A to 1P and 2A to 2P, a method for fabricating a three dimensional inductor carrier with metal core in accordance with a first preferred embodiment of the present invention comprises the steps of: first, please referring to FIGS. 1A and 2A , providing a substrate 110 having a surface 111, at least one first bond pad 112, a protective layer 113 and a second bond pad 114, wherein the first bond pad 112 is disposed on the surface 111, the protective layer 113 is formed on the surface 111 and comprises at least one first pad opening 113 a, a first disposing area 113 b and a plurality of second disposing areas 113 c, the first pad opening 113 a reveals the first bond pad 112 and is located at the first disposing area 113 b, the material of the substrate 110 can be chosen from one of Aluminum-Oxide substrate, Aluminum-Nitride substrate, Gallium-Arsenic substrate or glass substrate, and the protective layer 113 can be a passivation layer or re passivation layer; next, with reference to FIGS. 1B and 2B , forming a first photoresist layer 120 on the protective layer 113; thereafter, referring to FIGS. 1C and 2C , patterning the first photoresist layer 120 to form at least one first opening 121 and a plurality of first apertures 122, the first opening 121 reveals the first disposing area 113 b, and the first apertures 122 reveal the second disposing areas 113 c; afterwards, referring to FIGS. 1D and 2D , forming a first metal layer 130 within the first opening 121 and the first apertures 122 and enabling the first metal layer 130 to have a first conductive pad 131 and a plurality of first inductor portions 132, wherein each of the first inductor portions 132 comprises a first connection terminal 132 a, a second connection terminal 132 b and a first height H1; after that, with reference to FIGS. 1E and 2E , removing the first photoresist layer 120; next, referring to FIGS. 1F and 2F , forming a first dielectric layer 140 on the protective layer 113 and covering the first metal layer 130 with the first dielectric layer 140, wherein the first dielectric layer 140 comprises a second pad opening 141, a plurality of first connection openings 142 and a plurality of second connection openings 143, wherein the second pad opening 141 reveals the first conductive pad 131, each of the first connection openings 142 reveals each of the first connection terminals 132 a, and each of the second connection openings 143 reveals each of the second connection terminals 132 b; later, referring to FIGS. 1G and 2G , forming a second photoresist layer 150 on the first dielectric layer 140; afterwards, with reference to FIGS. 1H and 2H , patterning the second photoresist layer 150 to form a second aperture 151, a plurality of third apertures 152, a plurality of fourth apertures 153 and a slot 154, wherein the second aperture 151 reveals the first conductive pad 131, each of the third apertures 152 reveals each of the first connection terminals 132 a, each of the fourth apertures 153 reveals each of the second connection terminals 132 b, the slot 154 reveals the first dielectric layer 140 and is located between each of the third apertures 152 and each of the fourth apertures 153, wherein the second aperture 151 comprises a first top 151 a, a first depth A1 is formed between the first top 151 a and the first conductive pad 131, each of the third aperture 152 comprises a second top 152 a, a second depth A2 is formed between each of the second tops 152 a and each of the first connection terminals 132 a, each of the fourth apertures 153 comprises a third top 153 a, a third depth A3 is formed between each of the third tops 153 a and each of the second connection terminals 132 b, the slot 154 comprises a fourth top 154 a, a fourth depth A4 is formed between the fourth top 154 a and the first dielectric layer 140, and the fourth depth A4 is respectively smaller than the first depth A1, second depth A2 and the third depth A3; thereafter, referring to FIGS. 1I and 2I , forming a second metal layer 160 within the second aperture 151, the third apertures 152, the fourth apertures 153 and the slot 154 and enabling the second metal layer 160 to have a second inductor portion 161, a plurality of third inductor portions 162, a plurality of fourth inductor portions 163 and a metal core 164, wherein the second inductor portion 161 is coupled with the first conductive pad 131 and comprises a first top surface 161 a and a second height H2, each of the third inductor portions 162 is coupled with each of the second connection terminals 132 b and comprises a second top surface 162 a and a third height H3, each of the fourth inductor portions 163 is coupled with each of the first connection terminals 132 a and comprises a third top surface 163 a and a fourth height H4, wherein the first height H1 is respectively smaller than the second height H2, third height H3 and fourth height H4, besides, the metal core 164 comprises a bottom surface 164 a and a fourth top surface 164 b, the first metal layer 130 comprises an upper surface 133, a first interval B1 is formed between the bottom surface 164 a and the upper surface 133, in this embodiment, the fourth top surface 164 b of the metal core 164 is respectively lower than the first top surface 161 a of the second inductor portion 161, the second top surface 162 a of each of the third inductor portions 162 and the third top surface 163 a of each of the fourth inductor portions 163, besides, the material of the second inductor portion 161, the third inductor portion 162, the fourth inductor portion 163 and the metal core 164 can be chosen from one of nickel, iron or combination of nickel and iron; after that, with reference to FIGS. 1J and 2J , removing the second photoresist layer 150; next, referring to FIGS. 1K and 2K , forming a second dielectric layer 170 on the first dielectric layer 140 and covering the second metal layer 160 with the second dielectric layer 170, wherein the second dielectric layer 170 comprises a first exposed hole 171, a plurality of second exposed holes 172 and a plurality of third exposed holes 173, in this embodiment, the first exposed hole 171 reveals the first top surface 161 a, each of the second exposed holes 172 reveals each of the second top surfaces 162 a, and each of the third exposed holes 173 reveals each of the third top surfaces 163 a; next, referring to FIGS. 1L and 2L , forming a third photoresist layer 180 on the second dielectric layer 170; afterwards, with reference to FIGS. 1M and 2M , patterning the third photoresist layer 180 to form a fifth aperture 181 and a plurality of sixth apertures 182, wherein the fifth aperture 181 reveals the first top surface 161 a and the second top surface 162 a, each of the sixth apertures 182 reveals each of the second top surfaces 162 a and each of the third top surfaces 163 a; referring to FIGS. 1N and 2N , forming a third metal layer 190 within the fifth aperture 181 and the sixth apertures 182 and enabling the third metal layer 190 to have a fifth inductor portion 191 and a plurality of sixth inductor portions 192, wherein the fifth inductor portion 191 is coupled with the second inductor portion 161 and the third inductor portion 162, each of the sixth inductor portions 192 is coupled with the third inductor portion 162 and the fourth inductor portion 163, in this embodiment, the material of the fifth inductor portion 191 and the sixth inductor portion 192 can be chosen from one of copper, silver or the combination of copper and silver, the fifth inductor portion 191 comprises a fifth height H5, each of the sixth inductor portions 192 comprises a sixth height H6, mentioned fifth height H5 is respectively smaller than the second height H2, third height H3 and the fourth height H4, and the sixth height H6 is respectively smaller than the second height H2, third height H3 and fourth height H4, in this embodiment, the third metal layer 190 comprises a lower surface 193, and a second interval B2 is formed between the fourth top surface 164 b of the metal core 164 and the lower surface 193; later, with reference to FIGS. 1O and 2O , removing the third photoresist layer 180; finally, referring to FIGS. 1P and 2P , forming a third dielectric layer D within the second dielectric layer 170 and covering the third metal layer 190 with the third dielectric layer D thereby forming a three-dimensional inductor carrier with metal core 100. Besides, the three-dimensional inductor carrier with metal core 100 further comprises a second conductive pad P1 formed on the protective layer 113, the second conductive pad P1 is electrically connected with the second bond pad 114 of the substrate 110, the second metal layer 160 comprises a seventh inductor portion 165, the third metal layer 190 comprises an eighth inductor portion 194, the second conductive pad P1 is coupled with the seventh inductor portion 165, and the eighth inductor portion 194 is coupled with the seventh inductor portion 165 and the fourth inductor portion 163.
Or, please refers to FIG. 3 , which represents a second preferred embodiment of this invention. In this embodiment, the method for fabricating the three-dimensional inductor carrier with metal core further comprises the step of forming a nickel-gold protective layer M on the third metal layer 190 to replace the step of forming a third dielectric layer D on the second dielectric layer 170. Or, please refers to FIG. 4 , which represents a third preferred embodiment of this invention. In this embodiment, a solder protection layer S is formed on the third metal layer 190, and the material of the solder protection layer S can be solder or unleaded solder.
Or, please refers to FIG. 5 , which represents a fourth preferred embodiment of this invention. The second conductive pad P1 is formed on the second dielectric layer 170, and the eighth inductor portion 194 of the third metal layer 190 is coupled with the second conductive pad P1 and the fourth inductor portion 163. Further, referring to FIG. 6 , which represents a fifth preferred embodiment of this invention. The three-dimensional inductor carrier with metal core 100 further comprises a third conductive pad P2, the second conductive pad P1 and the third conductive pad P2 are formed on the second dielectric layer 170, the second conductive pad P1 is coupled with the eighth inductor potion 194 of the third metal layer 190, and the third conductive pad P2 is electrically connected with the fifth inductor portion 191. In this invention, the inductor carrier possesses the structure of three-dimensional inductor and additional metal core thereby reducing the chip size and the layout area in a same plane. Besides, mentioned structure may increase coil density and magnetic flux. Furthermore, the magnetic flux direction of the inductor changes from normal to horizontal for three-dimensional designs of the inductor, and it is beneficial for electro-magnetic coupling of flip chip module in the flip chip process.
A three-dimensional inductor carrier with metal core 100 in accordance with a first preferred embodiment of this invention is shown in FIGS. 1P and 2P . The three-dimensional inductor carrier with metal core 100 at least comprises a substrate 110, a first metal layer 130, a first dielectric layer 140, a second metal layer 160, a second dielectric layer 170, a metal core 164, a third metal layer 190, a second conductive pad P1 and a third dielectric layer D, wherein the substrate 110 comprises a surface 111, at least one first bond pad 112, a protective layer 113 and a second bond pad 114, the first bond pad 112 is disposed on the surface 111, the protective layer 113 is formed on the surface 111 and comprises at least one first pad opening 113 a, and the first pad opening 113 a reveals the first bond pad 112. In this embodiment, the material of the substrate 110 can be chosen from one of Aluminum Oxide substrate, Aluminum Nitride substrate, Gallium Arsenic substrate or glass substrate. The protective layer 113 can be a passivation layer or a repassivation layer. The first metal layer 130 is formed on the protective layer 113 and comprises a first conductive pad 131 and a plurality of first inductor portions 132, each of the first inductor portions 132 comprises a first connection terminal 132 a, a second connection terminal 132 b and a first height H1. The first dielectric layer 140 is formed on the protective layer 113 and covers the first metal layer 130, wherein the first dielectric layer 140 comprises a second pad opening 141, a plurality of first connection openings 142 and a plurality of second connection openings 143, the second pad opening 141 reveals the first conductive pad 131, each of the first connection openings 142 reveals each of the first connection terminals 132 a, and each of the second connection openings 143 reveals each of the second connection terminals 132 b. The second metal layer 160 is formed on the first dielectric layer 140 and comprises a second inductor portion 161, a plurality of third inductor portions 162, and a plurality of fourth inductor portions 163, wherein the second inductor portion 161 is coupled with the first conductive pad 131 and comprises a first top surface 161 a and a second height H2, each of the third inductor portions 162 is coupled with each of the first connection terminals 132 a and comprises a second top surface 162 a and a third height H3, each of the fourth inductor portions 163 is coupled with each of the second connection terminals 132 b and comprises a third top surface 163 a and a fourth height H4, wherein the first height H1 is respectively smaller than the second height H2, third height H3 and fourth height H4. The material of the second inductor portion 161, the third inductor portion 162 and the fourth inductor portion 163 can be chosen from one of nickel, iron or combination of nickel and iron. The second dielectric layer 170 is formed on the first dielectric layer 140 and covers the second metal layer 160, the second dielectric layer 170 comprises a first exposed hole 171, a plurality of second exposed holes 172 and a plurality of third exposed holes 173, wherein the first exposed hole 171 reveals the first top surface 161 a, each of the second exposed holes 172 reveals each of the second top surfaces 162 a, and each of the third exposed holes 173 reveals each of the third top surfaces 163 a. The metal core 164 is formed on the first dielectric layer 140 and located between each of the third inductor portions 162 and each of the fourth inductor portions 163, besides, the material of the metal core 164 can be chosen from one of nickel, iron or combination of nickel and iron. The metal core 164 comprises a bottom surface 164 a and a fourth top surface 164 b, the first metal layer 130 comprises an upper surface 133, a first interval B1 is formed between the bottom surface 164 a and the upper surface 133, wherein the fourth top surface 164 b of the metal core 164 is respectively lower than the first top surface 161 a of the second inductor portion 161, the second top surface 162 a of each of the third inductor portions 162 and the third top surface 163 a of each of the fourth inductor portions 163. The third metal layer 190 is formed on the second dielectric layer 170 and comprises a fifth inductor portion 191, a plurality of sixth inductor portions 192 and a lower surface 193. In this embodiment, the material of the fifth inductor portion 191 and the sixth inductor portion 192 can be chosen from copper, silver or the combination of copper and silver, the fifth inductor portion 191 is coupled with the second inductor portion 161 and the third inductor portion 162, each of the sixth inductor portions 192 is coupled with the third inductor portion 162 and the fourth inductor portion 163. The fifth inductor portion 191 comprises a fifth height H5, each of the sixth inductor portions 192 comprises a sixth height H6, wherein the fifth height H5 is respectively smaller than the second height H2, third height H3 and fourth height H4, and the sixth height H6 is respectively smaller than the second height H2, third height H3 and fourth height H4. A second interval B2 is formed between the fourth top surface 164 b of the metal core 164 and the lower surface 193 of the third metal layer 190. The second conductive pad P1 is formed on the protective layer 113 and electrically connected with the second bond pad 114 of the substrate 110. The second metal layer 160 further comprises a seventh inductor portion 165 electrically connected with the second conductive pad P1, and the third metal layer 190 further comprises an eighth inductor portion 194 electrically connected with the seventh inductor portion 165 and the fourth inductor portion 163. The third dielectric layer D is formed on the second dielectric layer 170 and covers the third metal layer 190.
While this invention has been particularly illustrated and described in detail with respect to the preferred embodiments thereof, it will be clearly understood by those skilled in the art that it is not limited to the specific features and describes and various modifications and changes in form and details may be made without departing from the spirit and scope of this invention.
Claims (12)
1. A three-dimensional inductor carrier with metal core comprises:
a substrate having a surface, at least one first bond pad and a protective layer, wherein the first bond pad is disposed on the surface, the protective layer is formed on the surface and comprises at least one first pad opening, and the first pad opening reveals the first bond pad;
a first metal layer formed on the protective layer, the first metal layer comprises a first conductive pad and a plurality of first inductor portions, each of the first inductor portions comprises a first connection terminal, a second connection terminal and a first height;
a first dielectric layer formed on the protective layer and covering the first metal layer, the first dielectric layer comprises a second pad opening, a plurality of first connection openings and a plurality of second connection openings, wherein the second pad opening reveals the first conductive pad, each of the first connection openings reveals each of the first connection terminals, and each of the second connection openings reveals each of the second connection terminals;
a second metal layer formed on the first dielectric layer, the second metal layer comprises a second inductor portion, a plurality of third inductor portions and a plurality of fourth inductor portions, wherein the second inductor portion is coupled with the first conductive pad and comprises a first top surface and a second height, each of the third inductor portions is coupled with each of the first connection terminals and comprises a second top surface and a third height, each of the fourth inductor portions is coupled with each of the second connection terminals and comprises a third top surface and a fourth height, and the first height is respectively smaller than the second height, third height and fourth height;
a second dielectric layer formed on the first dielectric layer and covering the second metal layer, the second dielectric layer comprises a first exposed hole, a plurality of second exposed holes and a plurality of third exposed holes, wherein the first exposed hole reveals the first top surface, each of the second exposed holes reveals each of the second top surfaces, and each of the third exposed holes reveals each of the third top surfaces;
a metal core formed on the first dielectric layer, the metal core is located between each of the third inductor portions and each of the fourth inductor portions, the metal core comprises a bottom surface, the first metal layer comprises an upper surface, a first interval is formed between the bottom surface and the upper surface; and
a third metal layer formed on the second dielectric layer, the third metal layer comprises a fifth inductor portion and a plurality of sixth inductor portions, the fifth inductor portion comprises a fifth height and is coupled with the second inductor portion and the third inductor portion, each of the sixth inductor portions comprises a sixth height and is coupled with the third inductor portion and the fourth inductor portion, the fifth height is respectively smaller than the second height, third height and fourth height, and the sixth height is respectively smaller than the second height, third height and fourth height.
2. The three-dimensional inductor carrier with metal core in accordance with claim 1 , wherein the third metal layer comprises a lower surface, the metal core comprises a fourth top surface, a second interval is formed between the fourth top surface and the lower surface.
3. The three-dimensional inductor carrier with metal core in accordance with claim 1 , wherein the metal core comprises a fourth top surface, the fourth top surface of the metal core is respectively lower than the first top surface of the second inductor portion, the second top surface of each of the third inductor portions and the third top surface of each of the fourth inductor portions.
4. The three-dimensional inductor carrier with metal core in accordance with claim 1 , wherein the material of the fifth inductor portion and the sixth inductor portion can be chosen from one of copper, silver or the combination of copper and silver.
5. The three-dimensional inductor carrier with metal core in accordance with claim 1 , wherein the material of the second inductor portion, the third inductor portion, the fourth inductor portion and the metal core can be chosen from one of nickel, iron or the combination of nickel and iron.
6. The three-dimensional inductor carrier with metal core in accordance with claim 1 , further comprises a second conductive pad formed on the protective layer, and the substrate further comprises a second bond pad electrically connected with the second conductive pad.
7. The three-dimensional inductor carrier with metal core in accordance with claim 1 , wherein the second metal layer comprises a seventh inductor portion coupled with the second conductive pad.
8. The three-dimensional inductor carrier with metal core in accordance with claim 7 , wherein the third metal layer comprises an eighth inductor portion coupled with the seventh inductor portion and the fourth inductor portion.
9. The three-dimensional inductor carrier with metal core in accordance with claim 1 , further comprises a second conductive pad formed on the second dielectric layer, and the third metal layer comprises an eighth inductor portion electrically connected with the second conductive pad and the fourth inductor portion.
10. The three-dimensional inductor carrier with metal core in accordance with claim 1 , further comprises a third dielectric layer formed on the second dielectric layer, and the third metal layer is covered by the third dielectric layer.
11. The three-dimensional inductor carrier with metal core in accordance with claim 1 , further comprises a nickel-gold protective layer formed on the third metal layer.
12. The three-dimensional inductor carrier with metal core in accordance with claim 1 , further comprises a third conductive pad formed on the second dielectric layer, and the fifth inductor portion is electrically connected with the third conductive pad.
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| US13/739,210 US8513772B2 (en) | 2011-09-28 | 2013-01-11 | Method for fabricating a three-dimensional inductor carrier with metal core and structure thereof |
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| US13/247,076 US8432017B2 (en) | 2011-09-28 | 2011-09-28 | Method for fabricating a three-dimensional inductor carrier with metal core and structure thereof |
| US13/739,210 US8513772B2 (en) | 2011-09-28 | 2013-01-11 | Method for fabricating a three-dimensional inductor carrier with metal core and structure thereof |
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| US13/739,210 Active US8513772B2 (en) | 2011-09-28 | 2013-01-11 | Method for fabricating a three-dimensional inductor carrier with metal core and structure thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11640968B2 (en) * | 2018-11-06 | 2023-05-02 | Texas Instruments Incorporated | Inductor on microelectronic die |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104400167B (en) * | 2014-10-29 | 2016-06-01 | 张楠 | A kind of respond to reflow soldering apparatus and use the circuit board element welding process of this device |
| US10199152B2 (en) * | 2014-12-03 | 2019-02-05 | Qualcomm Incorporated | Embedded thin film magnetic carrier for integrated voltage regulator |
| US9799721B2 (en) * | 2015-04-17 | 2017-10-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated magnetic core inductor and methods of fabrications thereof |
| US9768099B1 (en) | 2016-05-06 | 2017-09-19 | Infineon Technologies Americas Corp. | IC package with integrated inductor |
| US10332825B2 (en) * | 2016-05-20 | 2019-06-25 | Infineon Technologies Americas Corp. | Semiconductor package including flip chip mounted IC and vertically integrated inductor |
| US10044390B2 (en) * | 2016-07-21 | 2018-08-07 | Qualcomm Incorporated | Glass substrate including passive-on-glass device and semiconductor die |
| US10748810B2 (en) * | 2018-05-29 | 2020-08-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of manufacturing an integrated inductor with protections caps on conductive lines |
| TWI723343B (en) * | 2019-02-19 | 2021-04-01 | 頎邦科技股份有限公司 | Semiconductor structure having 3d inductor and manufacturing method thereof |
| US11018215B2 (en) * | 2019-03-14 | 2021-05-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package and manufacturing method thereof |
| JP7211323B2 (en) * | 2019-10-08 | 2023-01-24 | 株式会社村田製作所 | INDUCTOR COMPONENT AND METHOD OF MANUFACTURING INDUCTOR COMPONENT |
| US20240047508A1 (en) * | 2022-08-08 | 2024-02-08 | Taiwan Semiconductor Manufacturing Company Limited | Ferromagnetic plates for enhancing inductance and methods of forming the same |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6037649A (en) * | 1999-04-01 | 2000-03-14 | Winbond Electronics Corp. | Three-dimension inductor structure in integrated circuit technology |
| US7339452B2 (en) * | 2005-10-20 | 2008-03-04 | Via Technologies, Inc. | Embedded inductor and application thereof |
| US7397107B2 (en) * | 2004-12-10 | 2008-07-08 | Texas Instruments Incorporated | Ferromagnetic capacitor |
| US8347490B1 (en) * | 2011-06-30 | 2013-01-08 | Chipbond Technology Corporation | Method for fabricating a carrier with a three dimensional inductor |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6972081B2 (en) * | 2003-02-05 | 2005-12-06 | Xerox Corporation | Fabrication of embedded vertical spiral inductor for multichip module (MCM) package |
| JP4059498B2 (en) * | 2003-10-24 | 2008-03-12 | ローム株式会社 | Semiconductor device |
| TW200735138A (en) * | 2005-10-05 | 2007-09-16 | Koninkl Philips Electronics Nv | Multi-layer inductive element for integrated circuit |
| US7498918B2 (en) * | 2006-04-04 | 2009-03-03 | United Microelectronics Corp. | Inductor structure |
| US7955942B2 (en) * | 2009-05-18 | 2011-06-07 | Stats Chippac, Ltd. | Semiconductor device and method of forming a 3D inductor from prefabricated pillar frame |
| WO2011146427A2 (en) * | 2010-05-18 | 2011-11-24 | Luxera, Inc. | High frequency led driver, three dimensional inductor and method of manufacturing same |
-
2011
- 2011-09-28 US US13/247,076 patent/US8432017B2/en active Active
-
2013
- 2013-01-11 US US13/739,210 patent/US8513772B2/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6037649A (en) * | 1999-04-01 | 2000-03-14 | Winbond Electronics Corp. | Three-dimension inductor structure in integrated circuit technology |
| US7397107B2 (en) * | 2004-12-10 | 2008-07-08 | Texas Instruments Incorporated | Ferromagnetic capacitor |
| US7339452B2 (en) * | 2005-10-20 | 2008-03-04 | Via Technologies, Inc. | Embedded inductor and application thereof |
| US8347490B1 (en) * | 2011-06-30 | 2013-01-08 | Chipbond Technology Corporation | Method for fabricating a carrier with a three dimensional inductor |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11640968B2 (en) * | 2018-11-06 | 2023-05-02 | Texas Instruments Incorporated | Inductor on microelectronic die |
| US12419063B2 (en) | 2018-11-06 | 2025-09-16 | Texas Instruments Incorporated | Inductor on microelectronic die |
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| US20130075860A1 (en) | 2013-03-28 |
| US20130127578A1 (en) | 2013-05-23 |
| US8432017B2 (en) | 2013-04-30 |
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