US7702302B1 - Combination of high-side and low-side current control in system for providing power over communication link - Google Patents
Combination of high-side and low-side current control in system for providing power over communication link Download PDFInfo
- Publication number
- US7702302B1 US7702302B1 US11/506,779 US50677906A US7702302B1 US 7702302 B1 US7702302 B1 US 7702302B1 US 50677906 A US50677906 A US 50677906A US 7702302 B1 US7702302 B1 US 7702302B1
- Authority
- US
- United States
- Prior art keywords
- power supply
- low
- side current
- supply line
- current control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active, expires
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/02—Details
- H04L12/10—Current supply arrangements
Definitions
- This disclosure relates to power supply systems, and more particularly, to circuitry and methodology for combining high-side and low-side current control in a system for providing power over a communication link, such as a Power over Ethernet (PoE) system.
- PoE Power over Ethernet
- Ethernet has become the most commonly used method for local area networking.
- IEEE 802.3 group the originator of the Ethernet standard, has developed an extension to the standard, known as IEEE 802.3af, that defines supplying power over Ethernet cabling.
- IEEE 802.3af defines a Power over Ethernet (PoE) system that involves delivering power over unshielded twisted-pair wiring from a Power Sourcing Equipment (PSE) to a Powered Device (PD) located at opposite sides of a link.
- PSE Power Sourcing Equipment
- PD Powered Device
- network devices such as IP phones, wireless LAN access points, personal computers and Web cameras have required two connections: one to a LAN and another to a power supply system.
- the PoE system eliminates the need for additional outlets and wiring to supply power to network devices. Instead, power is supplied over Ethernet cabling used for data transmission.
- PSE and PD are non-data entities allowing network devices to supply and draw power using the same generic cabling as is used for data transmission.
- a PSE is the equipment electrically specified at the point of the physical connection to the cabling, that provides the power to a link.
- a PSE is typically associated with an Ethernet switch, router, hub or other network switching equipment or midspan device.
- a PD is a device that is either drawing power or requesting power. PDs may be associated with such devices as digital IP telephones, wireless network access points, PDA or notebook computer docking stations, cell phone chargers and HVAC thermostats.
- the main functions of the PSE are to search the link for a PD requesting power, optionally classify the PD, supply power to the link if a PD is detected, monitor the power on the link, and disconnect power when it is no longer requested or required.
- a PD participates in the PD detection procedure by presenting a PoE detection signature defined by the IEEE 802.3af standard.
- the PD has an option of presenting a classification signature to the PSE to indicate how much power it will draw when powered up. Based on the determined class of the PD, the PSE applies the required power to the PD.
- a PSE has active current control in a low-side power supply line between the PSE port and a more negative power supply lead of a pair of power supply leads.
- This current control provides functions of current limiting and circuit breaking.
- a fuse or positive temperature coefficient (PTC) device is conventionally used in a high-side power supply line between the PSE port and a more positive power supply lead of the pair of power supply leads, to protect against excessive current in the event of failure of the low-side current limiting.
- the problem with this configuration is that over a large temperature range, the fusing current of the fuse or PTC device varies greatly.
- the fuse or PTC device must guarantee fusing at the current mandated by safety standards when the ambient temperature is very cold.
- the current that this device can reliably carry without fusing at a high ambient temperature is significantly less.
- the present disclosure offers a novel system and methodology for supplying power to a powered device over a communication link, such as an Ethernet link.
- the system of the present disclosure comprises a power supply device for delivering power to an output port coupled to the communication link.
- a low-side power supply line is provided between the output port and a more negative power supply lead of a pair of leads that supply power to the power supply device.
- a high-side power supply line is provided between the output port and a more positive power supply lead of the pair of power supply leads.
- a current control mechanism of the power supply device combines low-side current control circuitry with high-side current control circuitry.
- the low-side current control circuitry is coupled to the low-side power supply line for controlling low-side current flowing in the low-side power supply line.
- the high-side current control circuitry is coupled to the high-side power supply line for controlling high-side current in the high-side power supply line.
- the high-side current control circuit may include a high-side current limiting circuit for limiting the high-side current to a first prescribed value, and/or a high-side circuit breaker for disconnecting the more positive power supply lead from the output port in response to a predetermined event.
- the high-side circuit breaker may disconnect the more positive power supply lead from the output port when the high-side current exceeds a second prescribed value.
- the low-side side current control circuit may include a low-side current limiting circuit for limiting the low-side current to the first prescribed value, and/or a low-side circuit breaker for disconnecting the more negative power supply lead from the output port when the low-side current exceeds the second prescribed value.
- the high-side power supply line may include a high-side impedance for sensing the high-side current, and a high-side transistor device controlled by the high-side current control circuitry.
- the transistor device may be a MOSFET transistor or a bipolar transistor.
- the low-side power supply line may include a low-side impedance for sensing the low-side current, and a low-side transistor device controlled by the low-side current control circuitry.
- a PoE system comprises a PSE for providing power to a PoE port.
- a low-side power supply line is provided between the PoE port and a more negative power supply lead of a pair of leads for providing power supply to the PSE.
- a high-side power supply line is provided between the PoE port and a more positive power supply lead of the pair of power supply leads.
- Low-side current control circuitry is coupled to the low-side power supply line for controlling low-side current in the low-side power supply line
- high-side current control circuitry is coupled to the high-side power supply line for controlling high-side current in the high-side power supply line.
- the high-side current control circuitry may include a high-side current limiting circuit for limiting the high-side current to a prescribed maximum current of the PSE at a short circuit condition, and/or a high-side circuit breaker for disconnecting the more positive power supply lead from the PoE port when the high-side current exceeds a prescribed overload current detection range.
- the low-side side current control circuitry may include a low-side current limiting circuit for limiting the low-side current to the prescribed maximum current of the PSE at a short circuit condition, and/or a low-side circuit breaker for disconnecting the more negative power supply lead from the output port when the low-side current exceeds the prescribed overload current detection range.
- a method of the present disclosure includes the following steps carried out to provide power over a communication link:
- first current control circuitry controlling by first current control circuitry, first current flowing between an output power supply port and a first lead of a pair of power supply leads, in accordance with prescribed conditions, and
- the step of controlling the second current includes limiting the second current to a first prescribed value, and/or disconnecting the second lead from the output power supply port when the second current exceeds a second prescribed value.
- a local area network comprises at least a pair of network nodes, a network hub, and communication cabling for connecting the network nodes to the network hub to provide data communications.
- the network hub includes:
- a power supply device for providing power to an output port coupled to the communication cabling
- a low-side power supply line provided between the output port and a more negative power supply lead of a pair of leads for supplying power to the power supply device
- low-side current control circuitry coupled to the low-side power supply line for controlling low-side current in the low-side power supply line
- high-side current control circuitry coupled to the high-side power supply line for controlling high-side current in the high-side power supply line.
- FIG. 1 is a diagram illustrating a PoE system of the present disclosure
- FIG. 2 is a diagram illustrating PSE arrangement having a current control mechanism of the present disclosure.
- the system of the present disclosure may be provided in a local area network (LAN) having a plurality of nodes, a network hub and communication cabling connecting the nodes to the network hub for providing data communications.
- LAN local area network
- the network hub may include the power supply device having a current control mechanism combining high-side and low-side current control.
- FIG. 1 shows a simplified block-diagram illustrating a Power over Ethernet (PoE) system 10 including Power Sourcing Equipment (PSE) 12 having multiple ports 1 to 4 connectable to Powered Devices (PD 1 to PD 4 ) via respective links, each of which may be provided using 2 or 4 sets of twisted pairs within an Ethernet cable.
- PoE Power over Ethernet
- PSE Power Sourcing Equipment
- PD 1 to PD 4 Powered Devices
- FIG. 1 shows four ports of the PSE 12 , one skilled in the art would realize that any number of ports may be provided.
- the PSE 12 may interact with each PD in accordance with the IEEE 802.3af standard.
- the PSE 12 and the PD participate in the PD detection procedure, during which the PSE 12 probes a link to detect the PD. If the PD is detected, the PSE 12 checks the PD detection signature to determine whether it is valid or non-valid.
- the valid and non-valid detection signatures are defined in the IEEE 802.3af standard. While the valid PD detection signature indicates that the PD is in a state where it will accept power, the non-valid PD detection signature indicates that the PD is in a state where it will not accept power.
- the PD has an option of presenting a classification signature to the PSE to indicate how much power it will draw when powered up. For example, a PD may be classified as class 0 to class 4. Based on the determined class of the PD, the PSE applies the required power to the PD.
- the PSE 12 checks for overcurrent conditions by monitoring its output current with respect to certain current limit thresholds, such as the maximum output current of the PSE at a short circuit condition (I LIM ), and the overload current detection range (I CUT ).
- certain current limit thresholds such as the maximum output current of the PSE at a short circuit condition (I LIM ), and the overload current detection range (I CUT ).
- the PSE 12 should be able to withstand without damage the application of short circuits of any wire to any other wire within a power supply cable, if the magnitude of the current through such a short circuit does not exceed I LIM . Therefore, the PSE 12 may monitor its output current to prevent it from exceeding the I LIM level. For example, a value of I LIM may be maintained in the range between 400 mA and 450 mA.
- an overload condition may be detected when an output current of the PSE 12 exceeds I CUT for a time period exceeding an overload time limit (T ovld ).
- T ovld may be set in the range between 50 ms and 75 ms.
- a value of I CUT may be kept at a level which is more than 15.4 W/V Port but less than 400 mA, where V Port is an output voltage of the PSE.
- a conventional PSE has a low-side current control circuitry to control low-side current flowing in a low-side power supply line between a PSE port and a more negative lead of a pair of power supply leads.
- the low-side current control circuitry may prevent the low-side current from exceeding the I LIM level and/or may remove power from the port when the low-side current exceeds the I CUT value for a time period exceeding the T ovld time limit.
- a fuse or positive temperature coefficient (PTC) device is conventionally used in a high-side power supply line between the PSE port and a more positive power supply lead of the pair of power supply leads, to protect against excessive current in the event of failure of the low-side current limiting.
- the problem with this configuration is that over a large temperature range, the fusing current of the fuse or PTC device varies greatly.
- the fuse or PTC device must guarantee fusing at the current mandated by safety standards when the ambient temperature is very cold.
- the current that this device can reliably carry without fusing at a high ambient temperature is significantly less.
- FIG. 2 illustrates an exemplary PSE arrangement having a current control mechanism that addresses this problem.
- a pair of leads for supplying power to the PSE 12 includes a more positive power supply lead Vpos and a more negative power supply lead Vneg.
- the more positive power supply lead Vpos may be a ground lead
- the more negative power supply lead Vneg may be a ⁇ 48V lead.
- a high-side power supply line is arranged between the Vpos lead and a PSE port, and a low-side power supply line is provided between the Vneg lead and the PSE port.
- the PSE 12 comprises a PSE control circuit 102 for controlling PSE operations, a low-side current control circuit 104 for controlling low-side current flowing in the low-side power supply line, and a high-side current control circuit 106 for controlling high-side current flowing in the high-side power supply line. Operations of the low-side and high-side current control circuits 104 and 106 may be controlled by the PSE control circuit 102 .
- the low-side current control circuit 104 may determine low-side DC current flowing between the port and the more negative lead Vneg, by measuring voltage across a low-side sense resistor R L arranged in the low-side power supply line.
- the high-side current control circuit 106 may determine high-side DC current flowing between the port and the more positive lead Vpos, by measuring voltage across a high-side sense resistor R H arranged in the high-side power supply line.
- the high-side and low-side sense resistors R H and R L may be arranged externally with respect to the PSE chip. Alternatively, they may be provided on the PSE chip.
- any impedance circuitry may be utilized instead of sense resistors R H and R L .
- diodes may be used.
- a low-side transistor device Q L is arranged in the low-side power supply line for supporting current control operations of the low-side current control circuit 104 .
- a high-side transistor device Q H is provided in the high-side power supply line for supporting current control operations of the high-side current control circuit 106 .
- the high-side and low-side transistor devices Q H and Q L may be arranged externally with respect to the PSE chip. Alternatively, they may be provided on the PSE chip.
- Each of the transistor devices Q H and Q L may be implemented using a field-effect transistor or a bipolar transistor.
- the low-side current control circuit 104 may limit the low-side current to a prescribed value and/or disconnect the more negative lead Vneg from the port if the low-side current exceeds a prescribed value. For example, the low-side current control circuit 104 may prevent the low-side current from exceeding a prescribed maximum output current of the PSE at a short circuit condition I LIM . Further, the low-side current control circuit may remove power from the port when the low-side current exceeds a prescribed overload current detection range I CUT for a time period exceeding a prescribed overload time limit T ovld .
- V LIM I LIM ⁇ R L
- R L resistance of the low-side sense resistor R L
- the low-side current control circuit 104 responds by decreasing voltage at the gate of the MOSFET transistor Q L . Reducing the voltage at the gate of Q L will result in an increase of the transistor's resistance, which will in turn reduce the low-side current.
- the low-side current control circuit may limit the low-side current to a prescribed current limit I LIM .
- V CUT I CUT ⁇ R L .
- the low-side current control circuit 104 may trigger a timer programmed to count a value corresponding to a prescribed overload time limit T ovld . If the voltage V L still exceeds the V CUT value when the time interval counted by the timer expires, the low-side current control circuit may turn off the transistor Q L to disconnect the more negative lead Vneg from the port.
- the low-side current control circuit may act as a circuit breaker when the low-side current exceeds a prescribed value I CUT .
- the high-side current control circuit 106 may limit the high-side current to a prescribed value and/or disconnect the more positive lead Vpos from the port if the high-side current exceeds a prescribed value.
- the high-side current control circuit 104 may prevent the low-side current from exceeding a prescribed maximum output current of the PSE at a short circuit condition I LIM .
- the high-side current control circuit may remove power from the port when the low-side current exceeds a prescribed overload current detection range I CUT for a time period exceeding a prescribed overload time limit T ovld .
- the values of I LIM , I CUT and T ovld for the high side current may differ from the respective values for the low-side current. Alternatively, this values may coincide for the high-side and low-side currents.
- the resistance of the high-side sense resistor R H may coincide with the resistance of the low-side sense resistor R L .
- values of R H and R L may be different.
- the high-side current control circuit 106 decreases voltage at the gate of the transistor Q H to increase the resistance of Q H .
- the high-side current is limited to a prescribed current limit I LIM .
- the other current control circuit will still be able to limit the port current to a prescribed value such as I LIM , and/or remove the power from the port if the port current exceeds a prescribed value such as I CUT .
- the temperature coefficient of the current control circuit 104 or 106 is much better than that of a fuse or positive temperature coefficient (PTC) device. Therefore, the trip point is more accurate.
- the PSE 12 provided with a combination of high-side and low-side current control can handle operating currents much higher than operating currents produced in a conventional PoE system.
Abstract
Description
Claims (23)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/506,779 US7702302B1 (en) | 2005-12-12 | 2006-08-21 | Combination of high-side and low-side current control in system for providing power over communication link |
DE602006014725T DE602006014725D1 (en) | 2005-12-12 | 2006-11-22 | COMBINATION OF HIGH-SIDE AND LOW-SIDE CURRENT CONTROL IN A POWER SUPPLY SYSTEM THROUGH A COMMUNICATION CONNECTION |
EP06838292A EP1961151B1 (en) | 2005-12-12 | 2006-11-22 | Combination of high-side and low-side current control in system for providing power over communication link |
PCT/US2006/045241 WO2007070233A2 (en) | 2005-12-12 | 2006-11-22 | Combination of high-side and low-side current control in system for providing power over communication link |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US74904805P | 2005-12-12 | 2005-12-12 | |
US11/506,779 US7702302B1 (en) | 2005-12-12 | 2006-08-21 | Combination of high-side and low-side current control in system for providing power over communication link |
Publications (1)
Publication Number | Publication Date |
---|---|
US7702302B1 true US7702302B1 (en) | 2010-04-20 |
Family
ID=37775246
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/506,779 Active 2028-12-17 US7702302B1 (en) | 2005-12-12 | 2006-08-21 | Combination of high-side and low-side current control in system for providing power over communication link |
Country Status (4)
Country | Link |
---|---|
US (1) | US7702302B1 (en) |
EP (1) | EP1961151B1 (en) |
DE (1) | DE602006014725D1 (en) |
WO (1) | WO2007070233A2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102021119955A1 (en) | 2021-08-02 | 2023-02-02 | Turck Holding Gmbh | Interconnection element, PSE component and method for monitoring and protecting a PoDL network |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101815364B (en) * | 2010-03-26 | 2012-05-23 | 华为技术有限公司 | Link negotiation processing method, device and system |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6473608B1 (en) | 1999-01-12 | 2002-10-29 | Powerdsine Ltd. | Structure cabling system |
US6531899B1 (en) * | 2001-12-27 | 2003-03-11 | Texas Instruments Incorporated | Integrated differential current comparator with input to output electrical isolation |
US20030146765A1 (en) | 2002-02-01 | 2003-08-07 | Powerdsine Ltd. | Detecting network power connection status using AC signals |
US20040073597A1 (en) | 2002-01-30 | 2004-04-15 | Caveney Jack E. | Systems and methods for managing a network |
US20040164619A1 (en) | 2003-02-21 | 2004-08-26 | Parker Timothy J. | Connector module with embedded Power-Over-Ethernet functionality |
US20040227522A1 (en) * | 2002-12-19 | 2004-11-18 | Texas Instruments Incorporated | Power-line, differential, isolation loss detector |
US20050080516A1 (en) | 2002-10-15 | 2005-04-14 | David Pincu | Power over ethernet switch node for use in power pooling |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7426374B2 (en) * | 2005-01-25 | 2008-09-16 | Linear Technology Corporation | Combination of high-side and low-side current sensing in system for providing power over communication link |
-
2006
- 2006-08-21 US US11/506,779 patent/US7702302B1/en active Active
- 2006-11-22 EP EP06838292A patent/EP1961151B1/en active Active
- 2006-11-22 WO PCT/US2006/045241 patent/WO2007070233A2/en active Application Filing
- 2006-11-22 DE DE602006014725T patent/DE602006014725D1/en active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6473608B1 (en) | 1999-01-12 | 2002-10-29 | Powerdsine Ltd. | Structure cabling system |
US6531899B1 (en) * | 2001-12-27 | 2003-03-11 | Texas Instruments Incorporated | Integrated differential current comparator with input to output electrical isolation |
US20040073597A1 (en) | 2002-01-30 | 2004-04-15 | Caveney Jack E. | Systems and methods for managing a network |
US20030146765A1 (en) | 2002-02-01 | 2003-08-07 | Powerdsine Ltd. | Detecting network power connection status using AC signals |
US20050080516A1 (en) | 2002-10-15 | 2005-04-14 | David Pincu | Power over ethernet switch node for use in power pooling |
US20050078422A1 (en) * | 2002-10-15 | 2005-04-14 | David Pincu | Direct current power pooling for an ethernet network |
US20040227522A1 (en) * | 2002-12-19 | 2004-11-18 | Texas Instruments Incorporated | Power-line, differential, isolation loss detector |
US20040164619A1 (en) | 2003-02-21 | 2004-08-26 | Parker Timothy J. | Connector module with embedded Power-Over-Ethernet functionality |
Non-Patent Citations (14)
Title |
---|
"IntelliJack Switch Produktreihe," Aug. 2003, p. 1-4, URL: www.3com.de/pdf/intel-switch.pdf. |
"IntelliJack Switch Produktreihe," Aug. 2003, p. 1-4, URL: www.3com.de/pdf/intel—switch.pdf. |
Cisco Systems, "Power over Ethernet: Cisco Inline Power and IEEE 802.3af" [Online, http://www.cisco.com/warp/public/cc/so/neso/bbssp/poeie-wp.pdf] 2004, pp. 1-13. |
Cisco Systems, "Power over Ethernet: Cisco Inline Power and IEEE 802.3af" [Online, http://www.cisco.com/warp/public/cc/so/neso/bbssp/poeie—wp.pdf] 2004, pp. 1-13. |
IEEE Computer Society: 802.3af, "Part 3: Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications Amendment: Data Terminal Equipment (DTE) Power via Media Dependent Interface (MDI)," IEEE Standards, Jun. 18, 2003, p. 1-121, The Institute of Electrical and Electronics Engineers, Inc, New York, New York. |
International Preliminary Report on Patentability and Written Opinion of the International Searching Authoritty issued in corresponding International Patent Application No. PCT/US2006/045241, mailed Jun. 26, 2008. |
International Search Report and Written Opinion issued in corresponding International Patent Application No. PCT/US2006/039273, mailed Feb. 20, 2007. |
International Search Report and Written Opinion issued in corresponding International Patent Application No. PCT/US2006/043547, mailed Mar. 2, 2007. |
International Search Report and Written Opinion of the International Search Authority, issued in corresponding International Patent Application No. PCT/US2006/045241, Mailed on Jun. 19, 2007. |
International Search Report for Corresponding Application No. PCT/US2006/045242 Mailed Mar. 14, 2007. |
International Search Report for Corresponding Application No. PCT/US2006/047218 Mailed Apr. 5, 2007. |
Linear Technology, "LTC4259A, Quad IEEE 802.3af Power over Ethernet Controller with AC Disconnect" [Online, http://www.chipcatalog.com/Linear/LTC4259A.htm] 2003, pp. 1-32. |
Rohrmoser, M. et al., "Digital Connect ME Technical Product Specification," Jul. 2003, p. 1-7, UK, URL: http://www.entrix.co.uk/connect/data/digiConnectME-techprdspec.pdf. |
Rohrmoser, M. et al., "Digital Connect ME Technical Product Specification," Jul. 2003, p. 1-7, UK, URL: http://www.entrix.co.uk/connect/data/digiConnectME—techprdspec.pdf. |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102021119955A1 (en) | 2021-08-02 | 2023-02-02 | Turck Holding Gmbh | Interconnection element, PSE component and method for monitoring and protecting a PoDL network |
EP4131849A1 (en) | 2021-08-02 | 2023-02-08 | Turck Holding GmbH | Switching element, pse component and method for monitoring and protecting a podl network |
Also Published As
Publication number | Publication date |
---|---|
EP1961151B1 (en) | 2010-06-02 |
WO2007070233A2 (en) | 2007-06-21 |
EP1961151A2 (en) | 2008-08-27 |
DE602006014725D1 (en) | 2010-07-15 |
WO2007070233A3 (en) | 2007-08-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9769090B2 (en) | Adjusting current limit thresholds based on power requirement of powered device in system for providing power over communication link | |
EP1842325B1 (en) | Adjusting current limit thresholds based on output voltage of power supply device in system for providing power over communication link | |
US7426374B2 (en) | Combination of high-side and low-side current sensing in system for providing power over communication link | |
US7554783B2 (en) | High-power foldback mechanism in system for providing power over communication link | |
US7639469B2 (en) | Power sourcing equipment having auto-zero circuit for determining and controlling output current | |
US7474704B2 (en) | Method and apparatus for current sharing ethernet power across four conductor pairs | |
US8014412B2 (en) | Power sourcing equipment having bipolar junction transistor for controlling power supply and supporting AC disconnect-detection function | |
US7538528B2 (en) | Constant power foldback mechanism programmable to approximate safe operating area of pass device for providing connection to load | |
WO2007121150A2 (en) | Method and apparatus for current sharing ethernet power across four conductor pairs using a midspan device | |
US7702302B1 (en) | Combination of high-side and low-side current control in system for providing power over communication link |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: LINEAR TECHNOLOGY CORPORATION,CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:STINEMAN, JR., JOHN ARTHUR;REEL/FRAME:018197/0075 Effective date: 20060809 |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552) Year of fee payment: 8 |
|
AS | Assignment |
Owner name: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY, IRELAND Free format text: CHANGE OF NAME;ASSIGNOR:LINEAR TECHNOLOGY LLC;REEL/FRAME:057423/0001 Effective date: 20181105 Owner name: LINEAR TECHNOLOGY LLC, CALIFORNIA Free format text: CHANGE OF NAME;ASSIGNOR:LINEAR TECHNOLOGY CORPORATION;REEL/FRAME:057421/0543 Effective date: 20170502 |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 12TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1553); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 12 |