US6895528B2 - Method and apparatus for imparting fault tolerance in a switch or the like - Google Patents

Method and apparatus for imparting fault tolerance in a switch or the like Download PDF

Info

Publication number
US6895528B2
US6895528B2 US09920751 US92075101A US6895528B2 US 6895528 B2 US6895528 B2 US 6895528B2 US 09920751 US09920751 US 09920751 US 92075101 A US92075101 A US 92075101A US 6895528 B2 US6895528 B2 US 6895528B2
Authority
US
Grant status
Grant
Patent type
Prior art keywords
switch
system
data
board
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active, expires
Application number
US09920751
Other versions
US20020019958A1 (en )
Inventor
Larry J. Cantwell
Harry V. Paul
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Brocade Communications Systems LLC
McData Services Corp
Original Assignee
Computer Network Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Grant date

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/55Error prevention, detection or correction
    • H04L49/557Error correction, e.g. fault recovery or fault tolerance
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/35Application specific switches
    • H04L49/356Storage area network switches
    • H04L49/357Fibre channel switches

Abstract

A method and apparatus for imparting fault tolerance in a switch or the like, particularly in a fibre channel director switch employed in connection with storage area network.

Description

CROSS REFERENCE TO RELATED APPLICATIONS

The present application claims priority from U.S. Patent Application Ser. No. 60/223,522 filed Aug. 7, 2000, the content of which is incorporated herein by reference in its entirety, including the title, specification, claims, drawings and abstract.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to channel director products and methods and in particular to a methodology and system for imparting fault tolerance.

2. Description of Related Art

Mainframes, super computers, mass storage systems, workstations and very high resolution display subsystems are frequently connected together to facilitate file and print sharing. Common networks and channels used for these types of connections oftentimes introduce communications bottle necking, especially in cases where the data is in a large file format typical of graphically-based applications.

There are two basic types of data communications connections between processors, and between a processor and peripherals. A “channel” provides a direct or switched point-to-point connection between communicating devices. The channel's primary task is merely to transport data at the highest possible data rate with the least amount of delay. Channels typically perform simple error correction in hardware. A “network,” by contrast, is an aggregation of distributed nodes (e.g., workstations, mass storage units) with its own protocol that supports interaction among these nodes. Typically, each node contends for the transmission medium, and each node must be capable of recognizing error conditions on the network and must provide the error management required to recover from the error conditions.

One type of communications interconnect that has been developed is fibre channel. The fibre channel protocol was developed and adopted as the American National Standard for Information Systems (ANSI). See Fibre Channel Physical and Signaling Interface, Revision 4.3, American National Standard for Information Systems (ANSI) (1994) for a detailed discussion of the fibre channel standard. Briefly, fibre channel is a switched protocol that allows concurrent communication among workstations, super computers and various peripherals. The total network bandwidth provided by fibre channel is on the order of a terabit per second. Fibre channel is capable of transmitting frames at rates exceeding 1 gigabit per second in both directions simultaneously. It is also able to transport commands and data according to existing protocols such as Internet protocol (IP), small computer system interface (SCSI), high performance parallel interface (HIPPI) and intelligent peripheral interface (IPI) over both optical fibre and copper cable.

The fibre channel industry indicates that the information explosion and the need for high-performance communications for server-to-storage and server-to-server networking have been the focus of much attention during the 90s. Performance improvements in storage, processors, and workstations, along with the move to distributed architectures such as client/server, have spawned increasingly data-intensive and high-speed networking applications. The interconnect between these systems and their input/output devices demands a new level of performance in reliability, speed, and distance. Fibre channel, a highly-reliable, gigabit interconnect technology allows concurrent communications among workstations, mainframes, servers, data storage systems, and other peripherals using SCSI and IP protocols. It provides interconnect systems for multiple topologies that can scale to a total system bandwidth on the order of a terabit per second. Fibre channel delivers a new level of reliability and throughput. Switches, hubs, storage systems, storage devices, and adapters are among the products that are on the market today, providing the ability to implement a total system solution.

IT systems frequently support two or more interfaces, and sharing a port and media makes sense. This reduces hardware costs and the size of the system, since fewer parts are needed. Fibre channel, a family of ANSI standards, is a common, efficient transport system supporting multiple protocols or raw data using native fibre channel guaranteed delivery services. Profiles define interoperable standards for using fibre channel for different protocols or applications.

Fibre channel, a channel/network standard, contains network features that provide the required connectivity, distance, and protocol multiplexing. It also supports traditional channel features for simplicity, repeatable performance, and guaranteed delivery. Fibre channel also works as a generic transport mechanism.

Fibre channel architecture represents a true channel/network integration with an active, intelligent interconnection among devices. A fibre channel port provides management of a simple point-to-point connection. The transmission is isolated from the control protocol, so that point-to-point links, arbitrated loops, and switched topologies are used to meet the specific needs of an application. The fabric is self-managing. Nodes do not need station management, which greatly simplifies implementation.

FIG. 1 illustrates a variable-length frame 11 as described by the fibre channel standard. The variable-length frame 11 comprises a 4-byte start-of-frame (SOF) indicator 12, which is a particular binary sequence indicative of the beginning of the frame 11. The SOF indicator 12 is followed by a 24-byte header 14, which generally specifies, among other things, the frame source address and destination address as well as whether the frame 11 is either control information or actual data. The header 14 is followed by a field of variable-length data 16. The length of the data 16 is 0 to 2112 bytes. The data 16 is followed successively by a 4-byte CRC (cyclical redundancy check) code 17 for error detection, and by a 4 byte end-of-frame (EOF) indicator 18. The frame 11 of FIG. 1 is much more flexible than a fixed frame and provides for higher performance by accommodating the specific needs of specific applications.

FIG. 2 illustrates a block diagram of a representative fibre channel architecture in a fibre channel network 100. A workstation 120, a mainframe 122 and a super computer 124 are interconnected with various subsystems (e.g., a tape subsystem 126, a disk subsystem 128, and a display subsystem 130) via a fibre channel fabric 110 (i.e., fibre channel switch). The fabric 110 is an entity that interconnects various node-ports (N-ports) 140 and their associated workstations, mainframes and peripherals attached to the fabric 110 through the F-ports 142. The essential function of the fabric 110 is to receive frames of data from a source N-port and, using a first protocol, route the frames to a destination N-port. In a preferred embodiment, the first protocol is the fibre channel protocol. Other protocols, such as the asynchronous transfer mode (ATM) could be used without departing from the scope of the present invention.

Essentially, the fibre channel is a channel-network hybrid, containing enough network features to provide the needed connectivity, distance and protocol multiplexing, and enough channel features to retain simplicity, repeatable performance and reliable delivery. Fibre channel allows for an active, intelligent interconnection scheme, known as a “fabric,” or fibre channel switch to connect devices. The fabric includes a plurality of fabric-ports (F-ports) that provide for interconnection and frame transfer between a plurality of node-ports (N-ports) attached to associated devices that may include workstations, super computers and/or peripherals. The fabric has the capability of routing frames based upon information contained within the frames. The N-port manages the simple point-to-point connection between itself and the fabric. The type of N-port and associated device dictates the rate that the N-port transmits and receives data to and from the fabric. Transmission is isolated from the control protocol so that different topologies (e.g., point-to-point links, rings, multidrop buses, cross point switches) can be implemented.

The fibre channel industry standard also provides for several different types of data transfers. A class 1 transfer requires circuit switching, i.e., a reserved data path through the network switch, and generally involves the transfer of more than one frame, oftentimes numerous frames, between two identified network elements. In contrast, a class 2 transfer requires allocation of a path through the network switch for each transfer of a single frame from one network element to another.

With the widespread adoption and implementation of fibre channel equipment in many environments, the fault tolerance of such a system as a data center product has been identified as a very important goal. Indeed fault tolerance and non-disruptive module replacement as well as non-disruptive upgrades in terms of software, firmware and hardware are desirable, if not critical according to present industry demands.

SUMMARY OF THE INVENTION

In accordance with the present invention, there is provided a fault tolerant director switch comprising: at least two input/output boards, each having at least one port; at least two fabric switch boards for providing switched connections, one of which is adapated to function as a spare fabric switch board; and a redundant command and control interface for said switch comprising at least two control modules.

There is further provided a method for providing fault tolerance in a director switch comprising: providing Fibre Input/Output Interface (“FIO”) modules that are connected through a backplane through at least one fabric switch board by backlink paths, wherein two backlink paths are provided from each FIO to each fabric switch board, and in the event of failure detected by the switch, redirecting any failed backlink path to a spare fabric switch board.

Additional objects, advantages and features of the present invention will be apparent from the following detailed description, claims and figures.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of preferred embodiments of the invention, as illustrated in the accompanying drawings in which like reference characters refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention.

FIG. 1 illustrates a variable-length frame as described by the fibre channel standard.

FIG. 2 illustrates a block diagram of a representative fibre channel architecture in a fibre channel network.

FIG. 3 illustrates a front view showing a presentative chassis incorporating certain aspects of the present invention.

FIG. 4 illustrates a flow diagram outlining a global overview of redundant functionality of one aspect of the present invention.

FIG. 5 illustrates a detailed depiction of system redundancy according to the present invention according to one embodiment of the present invention.

FIG. 6 illustrates a redundant ethernet control bus arrangement according to one aspect of the present invention.

FIG. 7 illustrates FIO and FSW boards showing how a spare FSW board works switching redundancy functions in greater detail according to one embodiment of the present invention.

FIG. 8 illustrates a suitable arrangement for redundant power supply to a system according to the present invention.

FIG. 9 illustrates a suitable arrangement for air circulation according to one aspect of the present invention.

DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT

The present invention relates generally to a Storage Area Network (SAN) director switch, and particularly a fibre channel director. An important function of the instant switch and corresponding methodology is to provide highly reliable connectivity between mainframe, workstation and PC based servers and their peripheral devices. As a director-class solution, a channel director according to the present invention is designed to employ a highly fault tolerant architecture. Reliability, availability, and serviceability (RAS) features that are generally considered important for deployment of a switch architecture in environments where the transport and storage of data must be done without error and in the most technologically efficient manner. In this regard, the present invention employs redundant switching, internal pathing, control modules, and power supplies and cooling as well as non-disruptive SW/FW upgrades that help businesses achieve up to the desired the “five nines” (99.999%) system uptime that is often equated with vital success in data center environments. A channel director according to the present invention is generally capable of enabling Fibre Channel switching across a variety of Fibre Channel media standards and provide the technology to support new standards as they are approved. The present invention also has the ability to utilize other applications that support the local channel conversion and wide area transport of Storage Area Networking. A common channel director environment includes multiple switches as well as other Fibre Channel directors deployed into these networks which are referred to as ‘fabrics’.

See FIG. 3 that shows a suitable arrangement for a channel director chassis according to the present invention. As depicted in FIG. 3, there are FIO port cards, 200 that are redundantly connected to FSW spare cards 120 and backlink redirectors. The FSW switching cards 120 employ a middle card 125 that is a hot spare. Additionally, as shown in FIG. 3 there are preferably 2 redundant FCM controllers 128. There are suitably 4 interchangeable fans 130, a redundant power supply 140 and AC.

FIG. 4 illustrates a system block diagram showing a suitable arrangement of a system and method according to the present invention. In one embodiment, there are preferably two sets of 32 Fibre Channel IO ports 200, and a 64 port cross connect stage 210 that provides a redundant switching path in both directions by virtue of redundant chassis controllers 220. The controllers receive input from any and all peripherals such as an EM Server and other clients shown as 215 in FIG. 4. Any power source can be employed but it is preferably redundant and can be, for example, a 48 Volt source 140. Key design attributes beyond the scalable switching architecture center around functions and features that make the present director a fault tolerant hardened Data Center product. It is typically deployed in environments that require continuous 24 hour×7 day high bandwidth Fibre Channel switching. A channel director according to the present invention is designed with fault tolerant features. It is an important feature of the present invention that the channel director and peripheral equipment described herein has no single point of failure by virtue of redundant functionality that is architected into the system.

Redundancy as it used herein is defined as duplication or repetition of functions in a switching system along with the proper control of these functions to provide alternative channels in case of failure. The operation of the redundant elements should be controlled in such a way that an element failure is transparent to system functional operation. In plain terms, this means that no failure of a single Field Replaceable Unit (FRU) within the system shall cause loss of critical customer data or noticeable interruption of system switching operation or performance. A FRU is a system component, board or module. The system is designed in a modular fashion with proper FRU granularity such that a single failure is tolerable within the confines of itself, as it does not affect the switching system function or its components as a whole.

A second element that is important to fault tolerance is the ability to detect system problems diagnostically at the lowest level of system components. A channel director of the present invention preferably has continuous internal diagnostic checking on all of its data and control paths. This includes cyclic redundancy checks, synchronization checks and data encoding checks, etc. throughout each stage of real data and control data transmission.

A third element of fault tolerance is the ability for the system to ‘heal’ itself upon detection of a fault condition. The present invention provides a mechanism such that redundant measures are automatically and seamlessly enabled upon detection of a FRU fault so that the system is able to continue normal functionality.

A fourth element of system fault tolerance of the present invention is the ability to immediately and expeditiously notify the users if a system FRU failure has occurred.

The FCM controller cards 128 monitor the system for fault conditions described above. If such a condition occurs, then immediate notification is provided by any mechanism known in the art. For example, it is possible to employ FRU LED indication, system alarm trap messages, snmp traps, graphical fault display on the Enterprise Manager control application and call home feature, as well as any other suitable or desired mechanism. By employing expeditious and effective notification, FRU replacement can be made in the least disruptive way and without possible loss of data or undue effort, prior to another FRU failure.

Another element that is important to fault tolerance is the ability to non-disruptively replace or upgrade system FRUs and software modules. If a FRU failure occurs, the FRU must be removed and replaced without interrupting the system function. Once the new board runs internal power on confidence tests and is configured for system operation, the system controller will bring that FRU online and allow it to join the system. Similarly, if a failure or bug is detected in any of the system software modules, that module(s) can be non-disruptively upgraded while the system is in full operation. Non-disruptive code upgrade is also a key element for adding new software features to the system.

Fault tolerance is often predicted and quantified in terms of time elapsed until a failure will occur. The instant system's “Mean Time To Failure” “MTTF” has been computed using standard Bellcore techniques as 250,000, and it is possible that this time could be higher in some instances. This means that based on component reliability specifications and the instantly disclosed system redundancy architecture, it has been statistically determined that a given system would not fail for at least 36 years, even in the event of multiple FRU failures. Having no single point of failure is an important element in the architecture that provides the stated MTTF. The other relevant fact is the system Mean Time To Repair “MTTR”. A lower MTTR is a positive notation that a defective component in the system can be quickly and easily replaced. In this case, MTTR is computed to be 0.1 hours. All FRU modules in the instant channel director chassis are preferably designed to be hot swappable. As such, according to one embodiment of the present invention, any FRU in the system can be replaced while the system is online and functioning. This gives rise to a highly repairable system (low MTTR). The result of having a high MTTF and a low MTTR is that the probability of a system failure is infinitesimally small given that the system is architected such that no single point of failure can cause the system to fail (high MTTF), coupled with a short period to repair in the event of a failure (a small MTTR), thereby mitigating the possibility of 2 points of system failure.

The following is a general list of important redundant functions that are preferably employed in the present invention:

    • Redundant System Control
    • Redundant Switching Function
    • Redundant Backplane Path (Back link) Re-direct
    • Redundant DC Power
    • Redundant AC Power
    • Redundant Cooling Mechanism

Redundancy in the instant invention is based on a system control scheme that allows the system to ‘heal’ itself from a situation where a particular FRU has failed. The core of this document discusses how the various components in the system can detect and seamlessly correct a FRU failure to provide fault tolerance.

The basic FRU Module types 128 are defined below:

FCM Modules (advantageously 2 per system) The Controller Module 220 and 221 acts as a system control and monitoring interface. An on board microprocessor referred to as the Common Processor Object (CPO) 222 along with an board Ethernet connectivity arrangement 223 are the core of the FCM module. The FCM provides a proxy function to various management interfaces including an Enterprise Manager control application 270, if utilized.
FSW Modules (suitably 5 per system) The FSW module 120 is the internal switching engine for a channel director according to the present invention. The FSW module 120 generally includes 4-Protocol Engine (PE) chips 121, a Local Processor (LP) 122 that manages events such as exception conditions, the required gigabit speed serial/de-serial transceiver (serdes) components, etc.
FIO Modules (suitably 1-8 per system) The Input/Output module 200 provides Fibre Channel User ports for the director. It generally includes 4-Protocol Engine (PE) chips 201, a Local Processor (LP) 202 and interface serdes ports 203. It also preferably employs redundancy logic which provides the ability to re-direct internal data interconnect links between FIO and FSW (back links) to the FSW spare card 125.
Fan Modules (advantageously 4 per system) These modules 130 (not shown in FIG. 5, but shown in FIG. 3) are preferably arranged in an N+1 configuration circulate ambient air external to the box across the modules listed above to cool the various components on theses boards.
DC Power Modules (suitably 2 per system) The modules 140 are suitably arranged in a fully redundant configuration provide, for example, 48 volts DC to each of the FRUs listed above through the backplane.

The FCM modules 220, 221 provide a redundant common command and control interface for the system. They are responsible for monitoring the general health of the director, acting as a proxy for all external communications destined for other modules in the system and maintaining a non-volatile system configuration database. They function as the critical monitoring and management function for all system redundancy. The FCM 220, 221 also can be adapted to act as a proxy for all communications from other modules in the system destined for the EM 270 or other management entity such as an SNMP MIB application. The FCM 220,221 preferably contains a software based management agent that executes on a Common Processor Object (CPO), This software communicates with the EM Control System 270 and also communicates with sub-agents on all other LP processor modules in the switch.

The fault tolerant architecture generally has a redundant (Standby) FCM module 221 present at all times. The standby FCM 221 runs the same software executable as the Primary FCM 220. This resident software functions as a ‘shadow’ that allows the Standby FCM 221 to remain in lock step with the primary FCM 220 so that if a Primary module failure occurs, the Standby can take over system control without system interruption or data loss. The interlock between the Primary and secondary FCM can be achieved, for example, by messages that are passed between the two FRUs that allow them to keep their system database synchronized.

The FCM 220,221 also can be adapted to provide urgent notification of FRU failures to various management agents. These agents then prompt the proper human action required to replace an FRU. Some of these notification mechanisms include call home, snmp traps, alarm graphical alert, (i.e. red box displayed around a failed FRU) and error logging.

The FCM manages online upgrade of system software. It stores an image of the current system software modules that are being executed in non-volatile memory. It also stores a backup copy of each software module in case the current image incurs a fault. The FCM creates a momentary ‘invisible’ pause in module LP activity to overlay whatever software modules are requested. The FCM has the capability to also load a new CPO software image non-disruptively.

System Ethernet Control Bus

The system internal control bus suitably comprises an ethernet point to point connect arrangement 223 that uses the backplane 300 as the interconnect medium. The redundant point-to-point connectivity shown in FIGS. 3, 4, 5, 6 and 7 provides a fault tolerant architecture for system communication between the chassis controller(s) and the FIO 200 and FSW 120, 125 modules. There are two ethernet control interfaces on each FIO and FSW module for redundancy. The point-to-point connections are attached to an unmanaged 16 port hub-like arrangement 310 on the FCM modules. The internal ethernet buses are preferably managed by a point-to-point high speed control network, such as fibre channel, fire wire or an ethernet controller (i.e. 100 mbit/s or even higher, up to 10 gigabit/sec) and physical layer components. For sake of simplicity, ethernet is referred to herein but one of skill in the art would understand that other platforms could be instead as well. There can also be a third ethernet interface on the FCM modules that provides connectivity to the EM Control System. This interface itself is redundant also by virtue of the redundant FCMs.

The two ethernet segments are a private network internal to the channel director. There is preferably no external visibility of the ethernet on the chassis. Because these are private networks, the Ethernet MAC and IP addresses are preferably pre-configured in the factory. The Addresses can be based, for example, on Board Slot number and Partition ID. All messages on the Internal Ethernet are generally packetized, for example, in UDB format. The EM connection to the FCM cards can be adapted to have a public IP address, however, the internal nodes will only be visible to the EM application.

System Switching Redundancy

System switching redundancy is an important aspect for having a fault tolerant architecture. A detailed block diagram for this redundancy logic is shown, for example, in FIG. 7. This logic provides a means for a seamless switchover from a faulty FSW module to a hot standby 125.

Spare FSW Failover

Each FIO module 10 Back link has a multiplexed redundant IO path 310 through the backplane 300 to the spare FSW cross-connect card 125. A switchover to the spare card 125 will occur if one of the 4 online FSW cards 120 should fail. The multiplexing on the 8 FIO back link connections to the spare FSW 125 is provided by a 10×10 crosspoint chip 320. This logic can be controlled in such a way that all of the traffic routed to a given FSW board 120 can be rerouted to the redundant FSW card 125. This switchover occurs at the system level via a FSW Spare Switchover message which is issued by the Primary FCM Controller to each of the FIO modules in the system. Upon receipt of this command, the Local Processor 330 on the FIO cards will manage the synchronized switchover to the spare card. A manual switchover can be initiated by the user by issuing a FSW Spare Switchover Command from the EM control system.

FSW Failure Detection

FSW errors are detected by the LP 330 on each FSW 120 or FIO FRU module 200. The FCM monitors for conditions where such errors have occurred on one or more switching paths based on error trap messages sent by the various FIO 200 and FSW 120, 125 modules over the system control bus. Once an FSW module has been deemed as failed by the FCM, the switchover process is initiated.

The FCM makes the decision to initiate a dynamic switchover to the FSW Spare 125. This decision can be based, for example, on the following FSW FRU Failure Conditions:

Board Level Errors

    • FSW Power on diagnostic error
    • FCM has lost communications to both ethernets on an FSW
    • FSW resets itself more than once within a given time window
    • FSW Overtemp
    • FSW Internal Frame Bus error threshold exceeded
    • FSW IOP Failure
    • Threshold for CRC errors exceeded on n (any 2 out of 16) number of ports on an FSW
    • Threshold for Loss Of Sync errors exceeded on n (any 2 out of 16) number of ports on an FSW
      FSW PE ASIC Failure

The FCM decides when to initiate a dynamic switchover to the FSW Spare 125 based on the determination that all (or more than 1 at least) ports on a given FSW PE 340(or its serdes parts 345) are having trouble. The switchover to the spare can be based, for example, on the following FSW PE individual ASIC failure scenarios:

    • Loss Of Sync on all ports of a PE Chip
    • CRC error threshold exceeded on a given FSW PE Chip
      FSW Switchover

The following possible sequence of events can be programmed to occur when a switchover to the spare FSW is conducted:

    • The FIO switching paths 301 to the suspect FSW card are throttled back
    • The Spare FSW 125 is setup with the configuration and personality of the failed FSW 120.
    • The FIO back links (2 per FIO) that are affected by the failure are switched to the spare FSW 125.
    • The FIO paths are re-enabled.
      FIO-FSW Back link Path Re-direct
      Individual back link paths between the FIO and FSWs may be re-directed upon detection of a fault condition on a given back link path. There can be, for example, 8 switching paths 301 available from each FIO into the FSW switch core that is comprised of 4 FSW modules plus the Spare. Two of these interconnects exist from each FIO to each FSW. A failure condition can be detected by any FIO or FSW Local Processor based on encoding and CRC physical interconnect errors. If such an error condition exists, the system FCM module will receive notification trap messages to this regard. The detection and re-direct mechanisms are similar to those used for FSW Switchover on a more localized basis. The difference here is that a complete FSW module failure condition has not been detected. Instead, an LP has deemed a single path faulty. The LP can then make the local adjustment to re-route traffic from a faulty back link to one of the other 7 back links in order to preserve system integrity. If the situation eventually escalates into a full FSW failure scenario, then the FCM shall conduct an FSW switchover.
      Redundant Power Subsystem

A possible power subsystem can be designed so that data transmission is not interrupted due to a single point of failure in the power subsystem as best shown in FIG. 8. The redundant ac inputs 400 can comprise 220 volts nominal, with a continuous operating range of from 180 to 264 VAC. A suitable input frequency is 50/60 Hz nominal with a continuous operating range of 47 to 63 Hz. The output can be nominally 48 VDC with no user accessible adjustment required. The power requirement for this system can be 1800 Watts, as an example. The power subsystem 140 has full redundancy in the form of two 1800-watt DC ‘bricks’. Each brick 140 has an independent AC power input 410 (line, breaker and filter) and independent 48-volt DC wave crimp cable 370 connections to the backplane 300. While both supply bricks are functioning normally, they each will preferably provide ½ the necessary system DC current (approximately 38 AMPs) effectively sharing the system load. If one of the bricks should fail, the other will instantaneously take over the remainder of the system load. There is sufficient energy stored within the power subsystem at the time of a failure to eliminate any ‘droop’ in the system voltage during the failure.

Each power supply can optionally be adapted to provide an isolated TTL compatible (referenced to an input logic ground) “1” when a service input fault is detected. This “AC Fail” signal is preferably generated a minimum of 2 milliseconds before the output dc voltage escapes the regulation band. Normally, the signal will be “0” (“AC GOOD”). Also, each power supply provides an isolated TTL compatible (referenced to an input logic ground) “1” when a dc output fault is detected. This “DC BAD” signal will be generated when the output dc voltage escapes the regulation band. Normally, the signal will be “0” (“DC GOOD”). A “Supply Present” signal can also provided. The status signals mentioned are be monitored by the to the FCM modules. The power subsystem exists in an integrated sub-chassis. The supplies themselves can optionally be hot swappable via blind mate connectors.

System Cooling

The instant apparatus and method can employ cooling, for example, via 4-fans in the rear of each 64 port chassis in an N+1 configuration. See FIG. 9. The two lower fans 500 push air into the chassis while the upper fans 500 (which are preferably identical to the lower fans) draw air through the card chassis. Each of these fans is powered off of 48 volts DC and can provide up to 300 cfm. In fact, all 4 fans are preferably identical and swappable with each other. A universal fan assembly can be designed such that it can replace any of the 4 fans with the same assembly. A tachometer output exists from each fan so that the FCM chassis controllers (both) can monitor the health of each fan module. The Primary FCM module will drive a programmable PWM pin going to the fans in order to control their speed. In the event of a single fan failure, the three remaining fans may be sped up to a different operating rpm. Proper plenum area is provided behind the backplane 300 in order to move air uniformly through the chassis 501. The design will work with a single fan failure. The ability to work with more than one fan failed is desirable.

The cooling design is preferably capable of functioning with two chassis stacked vertically to function as a 128-port director. The chassis 501 have independent cooling fans. The ‘system’ Primary FCM controller assembly is responsible for polling each local chassis for fan status. Similar expansion will be available for the 256 port FC9000 with 2-128 arrangements connected side by side.

All documents referred to herein are specifically incorporated by reference in their entireties.

As used herein, articles such as “a”, “the”, “an” and so on, can connote the singular or the plural of the object that follows.

While this invention has been particularly shown and described with references to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the invention encompassed by the appended claims.

Claims (25)

1. A fault tolerant switch comprising:
a) a plurality of i/o cards, each having at least one port and an i/o local processor that detects errors and sends error messages;
b) at least one primary switch board and one redundant switch board for providing switched connections between the ports, each having a switch board local processor that detects errors on the switch board and sends error messages;
c) at least one control module having a microprocessor that receives the error messages, wherein upon the receipt of an error message indicating a failure in one of the primary switch boards, the control module instructs every i/o card to discontinue use of the defective primary switch board in favor of the redundant switch board.
2. The switch of claim 1, wherein each i/o card is linked to the redundant switch board through a multiplexed redundant path using a crosspoint chip.
3. The switch of claim 2, wherein the instruction to discontinue use of the defective switch board is received by the i/o local processor in each i/o card, which redirects data to the redundant switch board by managing the crosspoint chip.
4. The switch of claim 3, wherein data paths to the defective primary switch board are throttled back and the redundant switch board is set up with a configuration matching the defective primary switch board before the data is redirected to the redundant switch board.
5. The switch of claim 1, wherein the errors detected by the local processors are data communication error.
6. The switch of claim 4, wherein the data communication errors are CRC errors on actual data.
7. A fault tolerant switch comprising:
a) a plurality of i/o cards, each having at least one port and an i/o local processor;
b) a plurality of switch boards having a switch board local processor, the switch boards providing switched connections between the ports;
c) a data pathway between the i/o cards and the switch boards for transmitting data between the ports and the switch boards;
d) at least one control module for monitoring the switch; and
e) a control pathway connecting each i/o card and each switch board to every control module;
wherein the i/o local processor and the switch board local processors send error messages to the control module over the control pathway without interfering with the data pathway.
8. The switch of claim 7, wherein the control module has a hub arrangement for the purpose of establishing the control pathway.
9. The switch of claim 8, wherein the control pathway uses a protocol chosen from the set including Ethernet protocol, Fibre Channel protocol and the IEEE 1394 FireWire protocol.
10. The switch of claim 7, wherein the control pathway is a private network.
11. The switch of claim 7, wherein each i/o card and each switch board has two interfaces to the control pathway.
12. A fault tolerant switch comprising:
a) an i/o card having at least one port;
b) a switch board for providing switched connections between the ports;
c) two data pathways between the i/o card and the switch board for transmitting data;
d) a local processor that detects errors based on communications between the i/o card and the switch board wherein upon the detection of an error indicating a failure in one of the data pathways causes the i/o card to discontinue the failed pathway and to use only the non-failed pathway.
13. The switch of claim 12, further comprising a plurality of additional switch cards, wherein the i/o card is connected to each switch card through two data pathways and wherein the failure of a single data pathway causes the i/o card to cease transmission on the failed pathway in favor of transmitting data on any of the other data pathways.
14. The switch of claim 12, further comprising
e) a control module that receives error messages sent by the local processor upon the detection of an error, whereupon the control module determines when a data pathway has failed and instructs the i/o card to discontinue use of the failed pathway.
15. The switch of claim 14, wherein the local processor is on one of the i/o card and the switch board.
16. The switch of claim 14, wherein the local processor is on the i/o card, and a second local processor for detecting errors and sending error messages based on communications between the i/o card and the switch board is located on the switch board.
17. The switch of claim 12, wherein the local processor is on the i/o card, and a second local processor for detecting errors indicating a failure in one of the data pathways is located on the switch board.
18. A fault tolerant switch comprising:
a) a plurality of i/o cards, each having at least one port;
b) at least one primary switch board and one redundant switch board for providing switched connections between the ports;
c) a local processor that detects errors found in an actual data transmission over one of the primary switch board without requiring the sending of test data over the primary switch boards;
d) a control module that, upon the receipt of an error message from the local processor indicating a failure in one of the primary switch boards, the control module instructs every i/o card to discontinue use of the failed switch board in favor of the redundant switch board.
19. The switch of claim 18, wherein the local processor detects a CRC error.
20. A fault tolerant switch comprising:
a) a plurality of i/o cards, each having at least one port;
b) at least one primary switch board and one redundant switch board for providing switched connections between the ports,
c) at least two data pathways between each i/o card and each switch board for transmitting data between the ports and the switch boards;
d) a plurality of local processors that detect errors found in an actual data transmission over one of the primary switch boards without requiring the sending of test data over the primary switch boards, the local processors being found on at least one of the i/o cards and the switch boards;
e) at least one control module that monitors the switch; and
f) a control pathway connecting each i/o card and each switch board to the control module, the control pathway sending error messages from the local processors to the control module indicating a failure in one of the primary switch boards, whereupon the control module responds by sending a command over the control pathway to every i/o card to discontinue use of the failed switch board in favor of the redundant switchboard.
21. A method for responding to an error within a data switch comprising:
a) monitoring data being transmitted from an i/o card through a data pathway and across a primary switch board to detect errors originating at the primary switch board;
b) sending an error message to a control board over a control pathway separate from the data pathway;
c) responding to the error message by sending a command over the control pathway to the i/o card instructing the i/o card to discontinue use of the primary switch board;
d) responding to the command at the i/o card by redirecting the data from the primary switch board to a redundant switch board.
22. A method for responding to an error within a data switch comprising:
a) monitoring actual data being transmitted from a first i/o card across a primary switch board to detect errors originating at the primary switch board without sending test data across the primary switch board;
b) upon the detection of an error, sending a command to multiple i/o cards to discontinue use of the primary switch board;
c) responding to the command at the i/o cards by redirecting the actual data from the primary switch board to a redundant switch board.
23. A method for responding to an error within a data switch comprising:
a) monitoring actual data being transmitted from an i/o card through a data pathway and across a primary switch board to detect errors originating at the primary switch board without sending test data across the primary switch board;
b) sending an error message to a control board over a control pathway separate from the data pathway;
c) responding to the error message by sending a command over the control pathway to the i/o card to discontinue use of the primary switchboard;
d) responding to the command at the i/o card by redirecting the actual data from the primary switch board to a redundant switch board.
24. The method of claim 23, wherein all data sent across the primary switch board is monitored for errors that can trigger an error message.
25. A method for upgrading software in a switch having local processors in module cards found within the switch, the method comprising:
a) storing an image of current system software modules that are being executed in non-volatile memory;
b) storing a backup copy of each software module in case of fault in the current image;
c) creating a momentary pause in local processor activity; and
d) overlaying new software modules over the existing modules.
US09920751 2000-08-07 2001-08-03 Method and apparatus for imparting fault tolerance in a switch or the like Active 2022-09-23 US6895528B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US22352200 true 2000-08-07 2000-08-07
US09920751 US6895528B2 (en) 2000-08-07 2001-08-03 Method and apparatus for imparting fault tolerance in a switch or the like

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09920751 US6895528B2 (en) 2000-08-07 2001-08-03 Method and apparatus for imparting fault tolerance in a switch or the like

Publications (2)

Publication Number Publication Date
US20020019958A1 true US20020019958A1 (en) 2002-02-14
US6895528B2 true US6895528B2 (en) 2005-05-17

Family

ID=22836872

Family Applications (2)

Application Number Title Priority Date Filing Date
US09920751 Active 2022-09-23 US6895528B2 (en) 2000-08-07 2001-08-03 Method and apparatus for imparting fault tolerance in a switch or the like
US09922591 Active 2022-06-21 US6981078B2 (en) 2000-08-07 2001-08-03 Fiber channel architecture

Family Applications After (1)

Application Number Title Priority Date Filing Date
US09922591 Active 2022-06-21 US6981078B2 (en) 2000-08-07 2001-08-03 Fiber channel architecture

Country Status (4)

Country Link
US (2) US6895528B2 (en)
EP (2) EP1316017A2 (en)
CA (2) CA2419000A1 (en)
WO (2) WO2002013458A3 (en)

Cited By (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020080946A1 (en) * 2000-12-27 2002-06-27 Lg Electronics Inc. Apparatus and method for multiplexing special resource of intelligent network-intelligent peripheral
US20040059957A1 (en) * 2002-07-12 2004-03-25 Tundra Semiconductor Corporation Fault tolerance
US20040153702A1 (en) * 2002-08-09 2004-08-05 Bayus Mark Steven Taking a resource offline in a storage network
US20040199618A1 (en) * 2003-02-06 2004-10-07 Knight Gregory John Data replication solution
US20050190690A1 (en) * 2002-10-29 2005-09-01 Broadcom Corporation Multi-port, gigabit serdes transceiver capable of automatic fail switchover
US20060268686A1 (en) * 2005-05-26 2006-11-30 Santera Systems, Inc. Methods, systems, and computer program products for implementing automatic protection switching for media packets transmitted over an ethernet switching fabric
US20070076727A1 (en) * 2005-09-30 2007-04-05 Tekelec Adaptive redundancy protection scheme
US20080034267A1 (en) * 2006-08-07 2008-02-07 Broadcom Corporation Switch with error checking and correcting
US7352694B1 (en) * 2001-12-14 2008-04-01 Applied Micro Circuits Corporation System and method for tolerating data link faults in a packet communications switch fabric
US7359317B1 (en) * 2004-02-20 2008-04-15 Excel Switching Corporation Redundancy arrangement for telecommunications switch
US20080186961A1 (en) * 2001-12-20 2008-08-07 Kenneth Yi Yun System and Method for Reevaluating Granted Arbitrated Bids
US20090245242A1 (en) * 2008-03-31 2009-10-01 International Business Machines Corporation Virtual Fibre Channel Over Ethernet Switch
US20090252160A1 (en) * 2002-10-29 2009-10-08 Tran Hoang T Programmable Management IO Pads for an Integrated Circuit
US20100005349A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Enhanced microprocessor interconnect with bit shadowing
US20100005365A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Error correcting code protected quasi-static bit communication on a high-speed bus
US20100005375A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Cyclical redundancy code for use in a high-speed serial link
US20100005335A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Microprocessor interface with dynamic segment sparing and repair
US20100005281A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Power-on initialization and test for a cascade interconnect memory system
US20100005345A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Bit shadowing in a memory system
US20100005366A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Cascade interconnect memory system with enhanced reliability
US20100005202A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Dynamic segment sparing and repair in a memory system
US7734712B1 (en) 2001-02-13 2010-06-08 Netapp, Inc. Method and system for identifying storage devices
US20100174955A1 (en) * 2009-01-08 2010-07-08 International Business Machines Corporation Test and bring-up of an enhanced cascade interconnect memory system
US20100180154A1 (en) * 2009-01-13 2010-07-15 International Business Machines Corporation Built In Self-Test of Memory Stressor
US20100274052A1 (en) * 1997-10-02 2010-10-28 University of West Ontario Preparation of radiolabelled haloaromatics via polymer-bound intermediates
US7881188B2 (en) 2006-02-03 2011-02-01 Genband Us Llc Methods, systems, and computer program products for implementing link redundancy in a media gateway
US7948872B2 (en) * 2000-11-17 2011-05-24 Foundry Networks, Llc Backplane interface adapter with error control and redundant fabric
US20110228669A1 (en) * 2010-03-19 2011-09-22 Brocade Communications Systems, Inc. Techniques for link redundancy in layer 2 networks
US20120044948A1 (en) * 2010-08-20 2012-02-23 Youval Nachum Multiple core network device with core redundancy
US8170044B2 (en) 2002-05-06 2012-05-01 Foundry Networks, Llc Pipeline method and system for switching packets
US8238255B2 (en) 2006-11-22 2012-08-07 Foundry Networks, Llc Recovering from failures without impact on data traffic in a shared bus architecture
US8418129B1 (en) 2001-12-14 2013-04-09 Qualcomm Incorporated Method for automatically generating code to define a system of hardware elements
US8448162B2 (en) 2005-12-28 2013-05-21 Foundry Networks, Llc Hitless software upgrades
US8472311B2 (en) 2010-02-04 2013-06-25 Genband Us Llc Systems, methods, and computer readable media for providing instantaneous failover of packet processing elements in a network
US8593987B2 (en) 2002-04-16 2013-11-26 Brocade Communications Systems, Inc. System and method for providing network route redundancy across layer 2 devices
US8743715B1 (en) 2011-01-24 2014-06-03 OnPath Technologies Inc. Methods and systems for calibrating a network switch
US20150036681A1 (en) * 2013-08-01 2015-02-05 Advanced Micro Devices, Inc. Pass-through routing at input/output nodes of a cluster server
US9112780B2 (en) 2007-01-11 2015-08-18 Foundry Networks, Llc Techniques for processing incoming failure detection protocol packets
US9166818B2 (en) 2009-09-21 2015-10-20 Brocade Communications Systems, Inc. Provisioning single or multistage networks using ethernet service instances (ESIs)
US9338100B2 (en) 2004-03-26 2016-05-10 Foundry Networks, Llc Method and apparatus for aggregating input data streams
US9391888B2 (en) 2002-10-01 2016-07-12 Foundry Networks, Llc System and method for implementation of layer 2 redundancy protocols across multiple networks
US9461940B2 (en) 2003-05-15 2016-10-04 Foundry Networks, Llc System and method for high speed packet transmission

Families Citing this family (55)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996027620A1 (en) * 1995-03-06 1996-09-12 Akzo Nobel N.V. Cyclic ketone peroxides as polymer initiators
CN1120599C (en) * 2000-08-01 2003-09-03 华为技术有限公司 Data communication system capable of smoothly expanding capacity
US6975590B2 (en) * 2000-09-07 2005-12-13 Eurologic Systems Limited Fiber-channel arbitrated-loop split loop operation
JP4457184B2 (en) 2001-02-13 2010-04-28 ネットアップ,インコーポレイテッド Failover processing in the storage system
US7346674B1 (en) * 2001-06-07 2008-03-18 Emc Corporation Configurable fibre channel loop system
US7472231B1 (en) 2001-09-07 2008-12-30 Netapp, Inc. Storage area network data cache
US7293105B2 (en) 2001-12-21 2007-11-06 Cisco Technology, Inc. Methods and apparatus for implementing a high availability fibre channel switch
US7406038B1 (en) * 2002-04-05 2008-07-29 Ciphermax, Incorporated System and method for expansion of computer network switching system without disruption thereof
US7660316B2 (en) * 2002-07-02 2010-02-09 Emulex Design & Manufacturing Corporation Methods and apparatus for device access fairness in fibre channel arbitrated loop systems
US7664018B2 (en) * 2002-07-02 2010-02-16 Emulex Design & Manufacturing Corporation Methods and apparatus for switching fibre channel arbitrated loop devices
US7630300B2 (en) * 2002-07-02 2009-12-08 Emulex Design & Manufacturing Corporation Methods and apparatus for trunking in fibre channel arbitrated loop systems
US20040136374A1 (en) * 2003-01-14 2004-07-15 Ballard Curtis C. Backplane system and method for its use
US8081642B2 (en) 2003-01-31 2011-12-20 Brocade Communications Systems, Inc. Method and apparatus for routing between fibre channel fabrics
US7676600B2 (en) * 2003-04-23 2010-03-09 Dot Hill Systems Corporation Network, storage appliance, and method for externalizing an internal I/O link between a server and a storage controller integrated within the storage appliance chassis
US7627780B2 (en) 2003-04-23 2009-12-01 Dot Hill Systems Corporation Apparatus and method for deterministically performing active-active failover of redundant servers in a network storage appliance
US7660239B2 (en) * 2003-04-25 2010-02-09 Alcatel-Lucent Usa Inc. Network data re-routing
US20040233856A1 (en) * 2003-05-20 2004-11-25 Lanus Mark S. Method of configuring a computer network having an N/2 slot switch module
US20040236867A1 (en) * 2003-05-20 2004-11-25 Lanus Mark S. Computer network having an N/2 slot switch module
US7242578B2 (en) * 2003-05-20 2007-07-10 Motorola, Inc. N/2 slot switch module
US7415002B2 (en) * 2003-10-24 2008-08-19 Brocade Communications, Inc. Circuit synchronization over asynchronous links
US8694976B2 (en) * 2003-12-19 2014-04-08 Intel Corporation Sleep state mechanism for virtual multithreading
US7707309B2 (en) * 2004-01-29 2010-04-27 Brocade Communication Systems, Inc. Isolation switch for fibre channel fabrics in storage area networks
US7760859B2 (en) 2005-03-07 2010-07-20 Net Optics, Inc. Intelligent communications network tap port aggregator
EP1737253B1 (en) * 2005-06-20 2008-04-09 Alcatel Lucent Fault tolerant single plane switch fabric for a telecommunication system
US7577134B2 (en) * 2005-08-19 2009-08-18 Brocade Communications Systems, Inc. Port expander for fibre channel fabrics in storage area networks
US7760717B2 (en) * 2005-10-25 2010-07-20 Brocade Communications Systems, Inc. Interface switch for use with fibre channel fabrics in storage area networks
US20080025007A1 (en) * 2006-07-27 2008-01-31 Liquid Computing Corporation Partially plated through-holes and achieving high connectivity in multilayer circuit boards using the same
US20080148109A1 (en) * 2006-12-18 2008-06-19 Bashor Paul D Implicating multiple possible problematic components within a computer system using indicator light diagnostics
JP2009003633A (en) * 2007-06-20 2009-01-08 Panasonic Corp Information processor
US7898984B2 (en) * 2007-08-07 2011-03-01 Net Optics, Inc. Enhanced communication network tap port aggregator arrangement and methods thereof
US8094576B2 (en) 2007-08-07 2012-01-10 Net Optic, Inc. Integrated switch tap arrangement with visual display arrangement and methods thereof
US7903576B2 (en) * 2007-08-07 2011-03-08 Net Optics, Inc. Methods and arrangement for utilization rate display
US7773529B2 (en) * 2007-12-27 2010-08-10 Net Optic, Inc. Director device and methods thereof
US8340088B2 (en) 2008-09-11 2012-12-25 Juniper Networks, Inc. Methods and apparatus related to a low cost data center architecture
US20100061367A1 (en) * 2008-09-11 2010-03-11 Pradeep Sindhu Methods and apparatus related to lossless operation within a data center
US9847953B2 (en) * 2008-09-11 2017-12-19 Juniper Networks, Inc. Methods and apparatus related to virtualization of data center resources
US8730954B2 (en) * 2008-09-11 2014-05-20 Juniper Networks, Inc. Methods and apparatus related to any-to-any connectivity within a data center
US8755396B2 (en) * 2008-09-11 2014-06-17 Juniper Networks, Inc. Methods and apparatus related to flow control within a data center switch fabric
US8335213B2 (en) * 2008-09-11 2012-12-18 Juniper Networks, Inc. Methods and apparatus related to low latency within a data center
US8265071B2 (en) 2008-09-11 2012-09-11 Juniper Networks, Inc. Methods and apparatus related to a flexible data center security architecture
US7944812B2 (en) 2008-10-20 2011-05-17 International Business Machines Corporation Redundant intermediary switch solution for detecting and managing fibre channel over ethernet FCoE switch failures
US8184648B2 (en) 2009-06-18 2012-05-22 Rockstar Bidco, LP Method and apparatus for implementing control of multiple physically dual homed devices
DE102009033756A1 (en) * 2009-07-17 2011-01-20 Rolls-Royce Deutschland Ltd & Co Kg Axial compressor, in particular for an aircraft gas turbine
US20110099772A1 (en) * 2009-10-29 2011-05-05 Douglas Staci E Key and Electronic Device Locator/Holder
US9813448B2 (en) 2010-02-26 2017-11-07 Ixia Secured network arrangement and methods thereof
US9749261B2 (en) 2010-02-28 2017-08-29 Ixia Arrangements and methods for minimizing delay in high-speed taps
US8694654B1 (en) * 2010-03-23 2014-04-08 Juniper Networks, Inc. Host side protocols for use with distributed control plane of a switch
US9813252B2 (en) 2010-03-23 2017-11-07 Juniper Networks, Inc. Multicasting within a distributed control plane of a switch
US8635375B2 (en) 2010-04-14 2014-01-21 Brocade Communications Systems, Inc. Remote F—ports
US9282060B2 (en) 2010-12-15 2016-03-08 Juniper Networks, Inc. Methods and apparatus for dynamic resource management within a distributed control plane of a switch
CN102955502B (en) * 2011-08-25 2017-05-17 赛恩倍吉科技顾问(深圳)有限公司 Backplane interface circuits, and server system hard disk backplane
CN103187689A (en) * 2012-04-10 2013-07-03 刘永华 Method for manufacturing multifunctional control protection switching device
JP5911439B2 (en) * 2013-01-28 2016-04-27 三菱電機株式会社 Monitoring and control system
US9946819B2 (en) 2015-01-06 2018-04-17 International Business Machines Corporation Simulating a large network load
CN105376659A (en) * 2015-09-30 2016-03-02 华为技术有限公司 An optical back board component and a communication apparatus

Citations (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3920975A (en) * 1974-11-14 1975-11-18 Rockwell International Corp Data communications network remote test and control system
US4497054A (en) 1983-04-29 1985-01-29 Honeywell Inc. One-for-N redundancy in a digital switch matrix
US5361249A (en) 1993-10-26 1994-11-01 Martin Marietta Corp. Fault tolerant switched communication system
US5455917A (en) 1991-07-26 1995-10-03 Tandem Computers Incorporated Apparatus and method for frame switching
EP0720413A2 (en) 1994-12-30 1996-07-03 AT&T Corp. Terabit per second packet switch
US5796717A (en) 1986-01-07 1998-08-18 Fujitsu Limited System for switching from working units to stand-by units
US5805614A (en) 1996-07-03 1998-09-08 General Signal Corporation Fault tolerant switch fabric with control and data correction by hamming codes
US5844887A (en) 1995-11-30 1998-12-01 Scorpio Communications Ltd. ATM switching fabric
US5909427A (en) 1995-07-19 1999-06-01 Fujitsu Network Communications, Inc. Redundant switch system and method of operation
US5959987A (en) * 1997-10-02 1999-09-28 Alcatel Usa Sourcing L.P. System and apparatus for data bus interface
EP0959591A1 (en) 1998-05-20 1999-11-24 Nec Corporation ATM switching module suited for system expansion without cell-loss
US5999527A (en) 1996-02-02 1999-12-07 Telefonaktiebolaget Lm Ericsson Modular switch
US6035414A (en) 1996-11-08 2000-03-07 Hitachi, Ltd. Reliability of crossbar switches in an information processing system
US6067286A (en) * 1995-04-11 2000-05-23 General Datacomm, Inc. Data network switch with fault tolerance
EP1016980A2 (en) 1998-12-22 2000-07-05 Ncr International Inc. Distributed multi-fabric interconnect
US6092111A (en) * 1996-11-19 2000-07-18 Motorola, Inc. Data communications system with session control
US6246681B1 (en) * 1997-12-19 2001-06-12 Alcatel Usa Sourcing, L.P. System and method for plane selection
US6411599B1 (en) * 1998-05-29 2002-06-25 International Business Machines Corporation Fault tolerant switching architecture
US6430151B1 (en) * 1998-03-11 2002-08-06 Siemens Aktiengesellschaft Local network with redundancy properties having a redundancy manager
US6553508B1 (en) * 1999-12-31 2003-04-22 Nortel Networks Limited Redundant communication fabrics for enhancing fault tolerance in Totem networks

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4821034A (en) 1987-02-06 1989-04-11 Ancor Communications, Inc. Digital exchange switch element and network
US5542594A (en) * 1993-10-06 1996-08-06 United States Surgical Corporation Surgical stapling apparatus with biocompatible surgical fabric
CN1103930C (en) 1994-01-26 2003-03-26 英国公共电信有限公司 Optical backplane interconnect
US5533201A (en) * 1994-03-07 1996-07-02 Unisys Corporation Method and apparatus for simultaneous interconnection of multiple requestors to multiple memories
US5603044A (en) 1995-02-08 1997-02-11 International Business Machines Corporation Interconnection network for a multi-nodal data processing system which exhibits incremental scalability
US5991295A (en) 1995-10-10 1999-11-23 Madge Networks Limited Digital switch
US5892932A (en) 1995-11-21 1999-04-06 Fore Systems, Inc. Reprogrammable switching apparatus and method
US6185203B1 (en) 1997-02-18 2001-02-06 Vixel Corporation Fibre channel switching fabric
US6160813A (en) 1997-03-21 2000-12-12 Brocade Communications Systems, Inc. Fibre channel switching system and method
US6078503A (en) 1997-06-30 2000-06-20 Emc Corporation Partitionable cabinet
US6370145B1 (en) * 1997-08-22 2002-04-09 Avici Systems Internet switch router
US6049542A (en) 1997-12-31 2000-04-11 Samsung Electronics Co., Ltd. Scalable multistage interconnection network architecture and method for performing in-service upgrade thereof
US6205532B1 (en) * 1998-05-22 2001-03-20 Avici Systems, Inc. Apparatus and methods for connecting modules using remote switching
US6032209A (en) 1998-07-24 2000-02-29 Storage Technology Corporation Hot-swappable high speed point-to-point interface
US6138185A (en) 1998-10-29 2000-10-24 Mcdata Corporation High performance crossbar switch
US6335992B1 (en) * 2000-02-15 2002-01-01 Tellium, Inc. Scalable optical cross-connect system and method transmitter/receiver protection

Patent Citations (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3920975A (en) * 1974-11-14 1975-11-18 Rockwell International Corp Data communications network remote test and control system
US4497054A (en) 1983-04-29 1985-01-29 Honeywell Inc. One-for-N redundancy in a digital switch matrix
US5796717A (en) 1986-01-07 1998-08-18 Fujitsu Limited System for switching from working units to stand-by units
US5455917A (en) 1991-07-26 1995-10-03 Tandem Computers Incorporated Apparatus and method for frame switching
US5361249A (en) 1993-10-26 1994-11-01 Martin Marietta Corp. Fault tolerant switched communication system
EP0720413A2 (en) 1994-12-30 1996-07-03 AT&T Corp. Terabit per second packet switch
US6067286A (en) * 1995-04-11 2000-05-23 General Datacomm, Inc. Data network switch with fault tolerance
US5909427A (en) 1995-07-19 1999-06-01 Fujitsu Network Communications, Inc. Redundant switch system and method of operation
US5983260A (en) 1995-07-19 1999-11-09 Fujitsu Network Communications, Inc. Serial control and data interconnects for coupling an I/O module with a switch fabric in a switch
US5844887A (en) 1995-11-30 1998-12-01 Scorpio Communications Ltd. ATM switching fabric
US5999527A (en) 1996-02-02 1999-12-07 Telefonaktiebolaget Lm Ericsson Modular switch
US5805614A (en) 1996-07-03 1998-09-08 General Signal Corporation Fault tolerant switch fabric with control and data correction by hamming codes
US6035414A (en) 1996-11-08 2000-03-07 Hitachi, Ltd. Reliability of crossbar switches in an information processing system
US6092111A (en) * 1996-11-19 2000-07-18 Motorola, Inc. Data communications system with session control
US5959987A (en) * 1997-10-02 1999-09-28 Alcatel Usa Sourcing L.P. System and apparatus for data bus interface
US6246681B1 (en) * 1997-12-19 2001-06-12 Alcatel Usa Sourcing, L.P. System and method for plane selection
US6430151B1 (en) * 1998-03-11 2002-08-06 Siemens Aktiengesellschaft Local network with redundancy properties having a redundancy manager
EP0959591A1 (en) 1998-05-20 1999-11-24 Nec Corporation ATM switching module suited for system expansion without cell-loss
US6411599B1 (en) * 1998-05-29 2002-06-25 International Business Machines Corporation Fault tolerant switching architecture
EP1016980A2 (en) 1998-12-22 2000-07-05 Ncr International Inc. Distributed multi-fabric interconnect
US6553508B1 (en) * 1999-12-31 2003-04-22 Nortel Networks Limited Redundant communication fabrics for enhancing fault tolerance in Totem networks

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Fischer W., et al., "A Scalable ATM Switching System Architecture" IEEE Journal on Selected Areas in Communications, vol. 9, Oct. 1, 1991, pp. 1299-1307.
Rathgeb, E.P., "Redundancy Concepts for a Large ATM Switching Node" Iss '97, vol. 1, Sep. 21, 1997, pp. 425-433.

Cited By (76)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100274052A1 (en) * 1997-10-02 2010-10-28 University of West Ontario Preparation of radiolabelled haloaromatics via polymer-bound intermediates
US7948872B2 (en) * 2000-11-17 2011-05-24 Foundry Networks, Llc Backplane interface adapter with error control and redundant fabric
US8964754B2 (en) 2000-11-17 2015-02-24 Foundry Networks, Llc Backplane interface adapter with error control and redundant fabric
US20020080946A1 (en) * 2000-12-27 2002-06-27 Lg Electronics Inc. Apparatus and method for multiplexing special resource of intelligent network-intelligent peripheral
US7139238B2 (en) * 2000-12-27 2006-11-21 Lg-Nortel Co., Ltd. Apparatus and method for multiplexing special resource of intelligent network-intelligent peripheral
US7734712B1 (en) 2001-02-13 2010-06-08 Netapp, Inc. Method and system for identifying storage devices
US8418129B1 (en) 2001-12-14 2013-04-09 Qualcomm Incorporated Method for automatically generating code to define a system of hardware elements
US20080256455A1 (en) * 2001-12-14 2008-10-16 Alberto Alessandro Della Ripa Method for Defining the Physical Configuration of a Communication System
US20080253294A1 (en) * 2001-12-14 2008-10-16 Alberto Alessandro Della Ripa Data link fault tolerance
US7965624B2 (en) * 2001-12-14 2011-06-21 Qualcomm Incorporated Data link fault tolerance
US7352694B1 (en) * 2001-12-14 2008-04-01 Applied Micro Circuits Corporation System and method for tolerating data link faults in a packet communications switch fabric
US20080186961A1 (en) * 2001-12-20 2008-08-07 Kenneth Yi Yun System and Method for Reevaluating Granted Arbitrated Bids
US7889729B2 (en) 2001-12-20 2011-02-15 Qualcomm Incorporated System and method for reevaluating granted arbitrated bids
US9450893B2 (en) 2002-04-16 2016-09-20 Brocade Communications Systems, Inc. System and method for providing network route redundancy across layer 2 devices
US8593987B2 (en) 2002-04-16 2013-11-26 Brocade Communications Systems, Inc. System and method for providing network route redundancy across layer 2 devices
US8989202B2 (en) 2002-05-06 2015-03-24 Foundry Networks, Llc Pipeline method and system for switching packets
US8170044B2 (en) 2002-05-06 2012-05-01 Foundry Networks, Llc Pipeline method and system for switching packets
US7350012B2 (en) * 2002-07-12 2008-03-25 Tundra Semiconductor Corporation Method and system for providing fault tolerance in a network
US20040059957A1 (en) * 2002-07-12 2004-03-25 Tundra Semiconductor Corporation Fault tolerance
US20040153702A1 (en) * 2002-08-09 2004-08-05 Bayus Mark Steven Taking a resource offline in a storage network
US7702786B2 (en) * 2002-08-09 2010-04-20 International Business Machines Corporation Taking a resource offline in a storage network
US9391888B2 (en) 2002-10-01 2016-07-12 Foundry Networks, Llc System and method for implementation of layer 2 redundancy protocols across multiple networks
US8001286B2 (en) 2002-10-29 2011-08-16 Broadcom Corporation Multipurpose and programmable pad for an integrated circuit
US8086762B2 (en) 2002-10-29 2011-12-27 Broadcom Corporation Programmable management IO pads for an integrated circuit
US8385188B2 (en) * 2002-10-29 2013-02-26 Broadcom Corporation Multi-port, gigabit serdes transceiver capable of automatic fail switchover
US7664888B2 (en) 2002-10-29 2010-02-16 Broadcom Corporation Multipurpose and programmable pad ring for an integrated circuit
US20050190690A1 (en) * 2002-10-29 2005-09-01 Broadcom Corporation Multi-port, gigabit serdes transceiver capable of automatic fail switchover
US20100100651A1 (en) * 2002-10-29 2010-04-22 Broadcom Corporation Multipurpose and programmable pad for an integrated circuit
US20090252160A1 (en) * 2002-10-29 2009-10-08 Tran Hoang T Programmable Management IO Pads for an Integrated Circuit
US8711677B2 (en) 2002-10-29 2014-04-29 Broadcom Corporation Multi-port, gigabit SERDES transceiver capable of automatic fail switchover
US20040199618A1 (en) * 2003-02-06 2004-10-07 Knight Gregory John Data replication solution
US9461940B2 (en) 2003-05-15 2016-10-04 Foundry Networks, Llc System and method for high speed packet transmission
US7359317B1 (en) * 2004-02-20 2008-04-15 Excel Switching Corporation Redundancy arrangement for telecommunications switch
US9338100B2 (en) 2004-03-26 2016-05-10 Foundry Networks, Llc Method and apparatus for aggregating input data streams
US20060268686A1 (en) * 2005-05-26 2006-11-30 Santera Systems, Inc. Methods, systems, and computer program products for implementing automatic protection switching for media packets transmitted over an ethernet switching fabric
US8040899B2 (en) 2005-05-26 2011-10-18 Genband Us Llc Methods, systems, and computer program products for implementing automatic protection switching for media packets transmitted over an ethernet switching fabric
US7911940B2 (en) 2005-09-30 2011-03-22 Genband Us Llc Adaptive redundancy protection scheme
US20070076727A1 (en) * 2005-09-30 2007-04-05 Tekelec Adaptive redundancy protection scheme
US9378005B2 (en) 2005-12-28 2016-06-28 Foundry Networks, Llc Hitless software upgrades
US8448162B2 (en) 2005-12-28 2013-05-21 Foundry Networks, Llc Hitless software upgrades
US7881188B2 (en) 2006-02-03 2011-02-01 Genband Us Llc Methods, systems, and computer program products for implementing link redundancy in a media gateway
US7900116B2 (en) * 2006-08-07 2011-03-01 Broadcom Corporation Switch with error checking and correcting
US20080034267A1 (en) * 2006-08-07 2008-02-07 Broadcom Corporation Switch with error checking and correcting
US8238255B2 (en) 2006-11-22 2012-08-07 Foundry Networks, Llc Recovering from failures without impact on data traffic in a shared bus architecture
US9030943B2 (en) 2006-11-22 2015-05-12 Foundry Networks, Llc Recovering from failures without impact on data traffic in a shared bus architecture
US9112780B2 (en) 2007-01-11 2015-08-18 Foundry Networks, Llc Techniques for processing incoming failure detection protocol packets
US7792148B2 (en) 2008-03-31 2010-09-07 International Business Machines Corporation Virtual fibre channel over Ethernet switch
US20090245242A1 (en) * 2008-03-31 2009-10-01 International Business Machines Corporation Virtual Fibre Channel Over Ethernet Switch
US8245105B2 (en) 2008-07-01 2012-08-14 International Business Machines Corporation Cascade interconnect memory system with enhanced reliability
US20100005335A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Microprocessor interface with dynamic segment sparing and repair
US8201069B2 (en) 2008-07-01 2012-06-12 International Business Machines Corporation Cyclical redundancy code for use in a high-speed serial link
US8234540B2 (en) 2008-07-01 2012-07-31 International Business Machines Corporation Error correcting code protected quasi-static bit communication on a high-speed bus
US8139430B2 (en) 2008-07-01 2012-03-20 International Business Machines Corporation Power-on initialization and test for a cascade interconnect memory system
US20100005366A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Cascade interconnect memory system with enhanced reliability
US20100005281A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Power-on initialization and test for a cascade interconnect memory system
US20100005365A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Error correcting code protected quasi-static bit communication on a high-speed bus
US20100005202A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Dynamic segment sparing and repair in a memory system
US7895374B2 (en) 2008-07-01 2011-02-22 International Business Machines Corporation Dynamic segment sparing and repair in a memory system
US8516338B2 (en) 2008-07-01 2013-08-20 International Business Machines Corporation Error correcting code protected quasi-static bit communication on a high-speed bus
US20100005349A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Enhanced microprocessor interconnect with bit shadowing
US8082475B2 (en) 2008-07-01 2011-12-20 International Business Machines Corporation Enhanced microprocessor interconnect with bit shadowing
US8082474B2 (en) 2008-07-01 2011-12-20 International Business Machines Corporation Bit shadowing in a memory system
US20100005345A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Bit shadowing in a memory system
US20100005375A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Cyclical redundancy code for use in a high-speed serial link
US7979759B2 (en) 2009-01-08 2011-07-12 International Business Machines Corporation Test and bring-up of an enhanced cascade interconnect memory system
US20100174955A1 (en) * 2009-01-08 2010-07-08 International Business Machines Corporation Test and bring-up of an enhanced cascade interconnect memory system
US20100180154A1 (en) * 2009-01-13 2010-07-15 International Business Machines Corporation Built In Self-Test of Memory Stressor
US9166818B2 (en) 2009-09-21 2015-10-20 Brocade Communications Systems, Inc. Provisioning single or multistage networks using ethernet service instances (ESIs)
US8472311B2 (en) 2010-02-04 2013-06-25 Genband Us Llc Systems, methods, and computer readable media for providing instantaneous failover of packet processing elements in a network
US20110228669A1 (en) * 2010-03-19 2011-09-22 Brocade Communications Systems, Inc. Techniques for link redundancy in layer 2 networks
US8654630B2 (en) * 2010-03-19 2014-02-18 Brocade Communications Systems, Inc. Techniques for link redundancy in layer 2 networks
US20120044948A1 (en) * 2010-08-20 2012-02-23 Youval Nachum Multiple core network device with core redundancy
US8630287B2 (en) * 2010-08-20 2014-01-14 Marvell Israel (M.I.S.L) Ltd. Multiple core network device with core redundancy
US8743715B1 (en) 2011-01-24 2014-06-03 OnPath Technologies Inc. Methods and systems for calibrating a network switch
US9088377B2 (en) 2011-01-24 2015-07-21 OnPath Technologies Inc. Methods and systems for calibrating a network switch
US20150036681A1 (en) * 2013-08-01 2015-02-05 Advanced Micro Devices, Inc. Pass-through routing at input/output nodes of a cluster server

Also Published As

Publication number Publication date Type
WO2002013458A2 (en) 2002-02-14 application
US6981078B2 (en) 2005-12-27 grant
CA2387550A1 (en) 2002-02-14 application
WO2002013013A3 (en) 2003-03-27 application
EP1330896A2 (en) 2003-07-30 application
US20020019958A1 (en) 2002-02-14 application
CA2419000A1 (en) 2002-02-14 application
EP1316017A2 (en) 2003-06-04 application
WO2002013013A2 (en) 2002-02-14 application
WO2002013458A3 (en) 2003-05-01 application
US20020023184A1 (en) 2002-02-21 application

Similar Documents

Publication Publication Date Title
US6665812B1 (en) Storage array network backup configuration
US7587633B2 (en) Fault tolerant routing in a network routing system based on a passive replication approach
US6876652B1 (en) Network device with a distributed switch fabric timing system
US7990994B1 (en) Storage gateway provisioning and configuring
US20020097672A1 (en) Redundant control architecture for a network device
US6658595B1 (en) Method and system for asymmetrically maintaining system operability
US20070220358A1 (en) Customer traffic forwarding continues while control plane is reset
US20030223416A1 (en) Apparatus and methods for dynamic reallocation of virtual lane buffer space in an infiniband switch
US7843907B1 (en) Storage gateway target for fabric-backplane enterprise servers
US6470013B1 (en) Use of enhanced ethernet link—loop packets to automate configuration of intelligent linecards attached to a router
US20100097941A1 (en) Redundant Intermediary Switch Solution for Detecting and Managing Fibre Channel over Ethernet FCoE Switch Failures
US6948021B2 (en) Cluster component network appliance system and method for enhancing fault tolerance and hot-swapping
US7289436B2 (en) System and method for providing management of fabric links for a network element
US7039046B1 (en) Network device including central and distributed switch fabric subsystems
US20020080575A1 (en) Network switch-integrated high-density multi-server system
US6880101B2 (en) System and method for providing automatic data restoration after a storage device failure
US6885633B1 (en) Network node and a system
US20030079156A1 (en) System and method for locating a failed storage device in a data storage system
US20040109465A1 (en) 10-Gigabit ethernet line interface apparatus and method of controlling the same
US6975590B2 (en) Fiber-channel arbitrated-loop split loop operation
US20050036485A1 (en) Network having switchover with no data loss
US6988161B2 (en) Multiple port allocation and configurations for different port operation modes on a host
US20050021606A1 (en) Network storage appliance with integrated redundant servers and storage controllers
US7401254B2 (en) Apparatus and method for a server deterministically killing a redundant server integrated within the same network storage appliance chassis
US20020116564A1 (en) Fibre channel port adapter

Legal Events

Date Code Title Description
AS Assignment

Owner name: INRANGE TECHNOLOGIES CORPORATION, NEW JERSEY

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CANTWELL, LARRY J.;PAUL, HARRY V.;REEL/FRAME:012057/0387;SIGNING DATES FROM 20010726 TO 20010727

AS Assignment

Owner name: COMPUTER NETWORK TECHNOLOGY CORPORATION,MINNESOTA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:INRANGE TECHNOLOGIES CORPORATION;REEL/FRAME:016301/0617

Effective date: 20050215

FPAY Fee payment

Year of fee payment: 4

AS Assignment

Owner name: BANK OF AMERICA, N.A. AS ADMINISTRATIVE AGENT, CAL

Free format text: SECURITY AGREEMENT;ASSIGNORS:BROCADE COMMUNICATIONS SYSTEMS, INC.;FOUNDRY NETWORKS, INC.;INRANGE TECHNOLOGIES CORPORATION;AND OTHERS;REEL/FRAME:022012/0204

Effective date: 20081218

Owner name: BANK OF AMERICA, N.A. AS ADMINISTRATIVE AGENT,CALI

Free format text: SECURITY AGREEMENT;ASSIGNORS:BROCADE COMMUNICATIONS SYSTEMS, INC.;FOUNDRY NETWORKS, INC.;INRANGE TECHNOLOGIES CORPORATION;AND OTHERS;REEL/FRAME:022012/0204

Effective date: 20081218

AS Assignment

Owner name: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATE

Free format text: SECURITY AGREEMENT;ASSIGNORS:BROCADE COMMUNICATIONS SYSTEMS, INC.;FOUNDRY NETWORKS, LLC;INRANGE TECHNOLOGIES CORPORATION;AND OTHERS;REEL/FRAME:023814/0587

Effective date: 20100120

AS Assignment

Owner name: MCDATA SERVICES CORPORATION, CALIFORNIA

Free format text: MERGER;ASSIGNOR:COMPUTER NETWORK TECHNOLOGY CORPORATION;REEL/FRAME:028327/0875

Effective date: 20050531

FPAY Fee payment

Year of fee payment: 8

AS Assignment

Owner name: FOUNDRY NETWORKS, LLC, CALIFORNIA

Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT;REEL/FRAME:034792/0540

Effective date: 20140114

Owner name: BROCADE COMMUNICATIONS SYSTEMS, INC., CALIFORNIA

Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT;REEL/FRAME:034792/0540

Effective date: 20140114

Owner name: INRANGE TECHNOLOGIES CORPORATION, CALIFORNIA

Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT;REEL/FRAME:034792/0540

Effective date: 20140114

AS Assignment

Owner name: BROCADE COMMUNICATIONS SYSTEMS, INC., CALIFORNIA

Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT;REEL/FRAME:034804/0793

Effective date: 20150114

Owner name: FOUNDRY NETWORKS, LLC, CALIFORNIA

Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT;REEL/FRAME:034804/0793

Effective date: 20150114

FPAY Fee payment

Year of fee payment: 12

AS Assignment

Owner name: BROCADE COMMUNICATIONS SYSTEMS LLC, CALIFORNIA

Free format text: CHANGE OF NAME;ASSIGNOR:BROCADE COMMUNICATIONS SYSTEMS, INC.;REEL/FRAME:044891/0536

Effective date: 20171128