US6239465B1 - Non-volatile semiconductor memory device having vertical transistors with the floating and control gates in a trench and fabrication method therefor - Google Patents
Non-volatile semiconductor memory device having vertical transistors with the floating and control gates in a trench and fabrication method therefor Download PDFInfo
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- US6239465B1 US6239465B1 US09/391,353 US39135399A US6239465B1 US 6239465 B1 US6239465 B1 US 6239465B1 US 39135399 A US39135399 A US 39135399A US 6239465 B1 US6239465 B1 US 6239465B1
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42324—Gate electrodes for transistors with a floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Abstract
Description
Claims (7)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/828,222 US6391721B2 (en) | 1999-01-27 | 2001-04-09 | Non-volatile semiconductor memory device having vertical transistors and fabrication method therefor |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11-019162 | 1999-01-27 | ||
JP01916299A JP3743189B2 (en) | 1999-01-27 | 1999-01-27 | Nonvolatile semiconductor memory device and manufacturing method thereof |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US09/828,222 Division US6391721B2 (en) | 1999-01-27 | 2001-04-09 | Non-volatile semiconductor memory device having vertical transistors and fabrication method therefor |
Publications (1)
Publication Number | Publication Date |
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US6239465B1 true US6239465B1 (en) | 2001-05-29 |
Family
ID=11991702
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
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US09/391,353 Expired - Lifetime US6239465B1 (en) | 1999-01-27 | 1999-09-08 | Non-volatile semiconductor memory device having vertical transistors with the floating and control gates in a trench and fabrication method therefor |
US09/828,222 Expired - Lifetime US6391721B2 (en) | 1999-01-27 | 2001-04-09 | Non-volatile semiconductor memory device having vertical transistors and fabrication method therefor |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
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US09/828,222 Expired - Lifetime US6391721B2 (en) | 1999-01-27 | 2001-04-09 | Non-volatile semiconductor memory device having vertical transistors and fabrication method therefor |
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Country | Link |
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US (2) | US6239465B1 (en) |
JP (1) | JP3743189B2 (en) |
KR (1) | KR100525256B1 (en) |
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US20020014678A1 (en) * | 2000-07-14 | 2002-02-07 | Stmicroelectronics S.R.L. | Integrated structure |
US6436765B1 (en) * | 2001-02-09 | 2002-08-20 | United Microelectronics Corp. | Method of fabricating a trenched flash memory cell |
US6444525B1 (en) * | 2000-11-15 | 2002-09-03 | Hynix Semiconductor Inc. | Method for manufacturing a nonvolatile memory |
US20020195647A1 (en) * | 2001-06-26 | 2002-12-26 | Seiichi Aritome | Nonvolatile semiconductor memory and manufacturing method thereof |
US6515330B1 (en) * | 2002-01-02 | 2003-02-04 | Apd Semiconductor, Inc. | Power device having vertical current path with enhanced pinch-off for current limiting |
US6525959B1 (en) * | 2001-07-30 | 2003-02-25 | Advanced Micro Devices, Inc. | NOR array with buried trench source line |
US6545893B2 (en) * | 2001-04-11 | 2003-04-08 | Mitsubishi Denki Kabushiki Kaisha | Non-volatile semiconductor memory |
US6573136B1 (en) * | 2002-05-30 | 2003-06-03 | Infineon Technologies Ag | Isolating a vertical gate contact structure |
US20030119327A1 (en) * | 2001-12-20 | 2003-06-26 | Park Cheol Soo | Vertical type transistor and method for fabricating the same |
US20030129837A1 (en) * | 2002-01-10 | 2003-07-10 | Gerhard Enders | Method for processing a substrate to form a structure |
US20030164518A1 (en) * | 2001-09-20 | 2003-09-04 | Hynix Semiconductor Inc. | Flash memory device and method for fabricating the same |
US6639269B1 (en) * | 1998-02-27 | 2003-10-28 | Infineon Technologies Ag | Electrically programmable memory cell configuration and method for fabricating it |
US6700154B1 (en) * | 2002-09-20 | 2004-03-02 | Lattice Semiconductor Corporation | EEPROM cell with trench coupling capacitor |
DE10240916A1 (en) * | 2002-09-04 | 2004-03-25 | Infineon Technologies Ag | Production of a memory cell field used in charge trapping memory cells, e.g. NROM memory cells comprises forming insulating trenches between trenches whilst a hard mask is applied on or above the upper side of the semiconductor body |
WO2004025731A2 (en) * | 2002-09-04 | 2004-03-25 | Infineon Technologies Ag | Method for the production of sonos memory cells, sonos memory cell, and memory cell field |
US20040075134A1 (en) * | 2002-10-21 | 2004-04-22 | Nanya Technology Corporation | Stacked gate flash memory device and method of fabricating the same |
US20040089901A1 (en) * | 2002-10-31 | 2004-05-13 | Hiroaki Ohkubo | Semiconductor integrated circuit and semiconductor substrate of the same |
EP1432040A2 (en) * | 2002-12-05 | 2004-06-23 | Fujio Masuoka | Semiconductor memory device and its production process |
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US6794250B2 (en) | 2002-05-01 | 2004-09-21 | Nanya Technology Corporation | Vertical split gate flash memory cell and method for fabricating the same |
US6800899B2 (en) * | 2001-08-30 | 2004-10-05 | Micron Technology, Inc. | Vertical transistors, electrical devices containing a vertical transistor, and computer systems containing a vertical transistor |
US20040256693A1 (en) * | 2003-05-07 | 2004-12-23 | Tsutomu Sato | Semiconductor device and method of manufacturing the same |
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US20050173756A1 (en) * | 2003-12-08 | 2005-08-11 | Kim Ki-Chul | Nonvolatile memory device and method of manufacturing the same |
US20050191794A1 (en) * | 2003-05-20 | 2005-09-01 | Robert Herrick | Method for forming a trench MOSFET having self-aligned features |
US20060226474A1 (en) * | 2005-04-12 | 2006-10-12 | International Business Machines Corporation | Structure and method of fabricating high-density, trench-based non-volatile random access sonos memory cells for soc applications |
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US20070093077A1 (en) * | 2005-10-24 | 2007-04-26 | Semiconductor Components Industries, Llc. | Method of forming a trench semiconductor device and structure therefor |
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Also Published As
Publication number | Publication date |
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JP3743189B2 (en) | 2006-02-08 |
JP2000223676A (en) | 2000-08-11 |
KR100525256B1 (en) | 2005-11-02 |
US20010039091A1 (en) | 2001-11-08 |
KR20000052310A (en) | 2000-08-16 |
US6391721B2 (en) | 2002-05-21 |
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