US5332691A - Method of forming a contact - Google Patents
Method of forming a contact Download PDFInfo
- Publication number
- US5332691A US5332691A US08/059,310 US5931093A US5332691A US 5332691 A US5332691 A US 5332691A US 5931093 A US5931093 A US 5931093A US 5332691 A US5332691 A US 5332691A
- Authority
- US
- United States
- Prior art keywords
- forming
- layer
- tungsten layer
- silicon
- silicon containing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 title claims abstract description 27
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims abstract description 79
- 229910052721 tungsten Inorganic materials 0.000 claims abstract description 79
- 239000010937 tungsten Substances 0.000 claims abstract description 79
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 64
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 64
- 239000010703 silicon Substances 0.000 claims abstract description 64
- 239000011819 refractory material Substances 0.000 claims abstract description 22
- 239000010936 titanium Substances 0.000 claims description 21
- 239000012535 impurity Substances 0.000 claims description 13
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 12
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 8
- 229910052719 titanium Inorganic materials 0.000 claims description 8
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 6
- 150000004767 nitrides Chemical class 0.000 claims description 4
- 239000003870 refractory metal Substances 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims 2
- 239000002184 metal Substances 0.000 claims 2
- 150000003377 silicon compounds Chemical class 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 74
- 238000005229 chemical vapour deposition Methods 0.000 description 34
- 239000000758 substrate Substances 0.000 description 30
- 239000011229 interlayer Substances 0.000 description 14
- 230000006911 nucleation Effects 0.000 description 10
- 238000010899 nucleation Methods 0.000 description 10
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 8
- 230000009467 reduction Effects 0.000 description 8
- 239000007789 gas Substances 0.000 description 6
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 5
- 239000001257 hydrogen Substances 0.000 description 5
- 229910052739 hydrogen Inorganic materials 0.000 description 5
- 238000004544 sputter deposition Methods 0.000 description 5
- 229910052786 argon Inorganic materials 0.000 description 4
- 239000005380 borophosphosilicate glass Substances 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000012495 reaction gas Substances 0.000 description 3
- 229910000077 silane Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 238000005546 reactive sputtering Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 239000013081 microcrystal Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/147—Silicides
Definitions
- the present invention relates to a method of forming a contact. More particularly, the present invention relates to a method of forming a contact which includes a step of filling a contact hole with tungsten (W) by chemical vapor deposition (CVD).
- W tungsten
- CVD chemical vapor deposition
- a blanket CVD technique is used.
- an impurity diffused region and the like are formed in a surface portion of a silicon substrate, and then an interlayer insulating film covering the substrate is formed.
- the interlayer insulating film is, for example, an oxide film (e.g., thickness: 16000 ⁇ ) formed by CVD.
- predetermined portions of the interlayer insulating film are selectively etched, thereby forming contact holes in the interlayer insulating film.
- a titanium layer (thickness: about 500 ⁇ ) is formed on a surface of the interlayer insulating film so as to cover the inner walls of the contact holes and the exposed portions of the silicon substrate.
- the sputtering is conducted under such conditions that the substrate temperature is 200° C. and the applied voltage is about 900 volts (V).
- the Ti/TiN film includes a titanium layer having a thickness of 500 ⁇ and a titanium nitride film having a thickness of 1000 ⁇ .
- the Ti/TiN film is provided for enhancing the adhesion of a tungsten layer to the interlayer insulating film.
- a nucleation step is performed by CVD utilizing silane reduction in which WF 6 and SiH 4 (silane) are used as a reaction gas.
- the ratio of the flow rates is typically set to be about 1.
- the substrate temperature is set in the range of 450° C. to 475° C. (the wafer temperature is set in the range of about 415° C. to about 440° C.).
- a first tungsten layer (e.g., thickness: about 300 ⁇ ) with high crystallinity is formed.
- the relatively thin first tungsten layer provides growth nuclei for uniformly growing a second tungsten layer in an early growth stage for growing the second tungsten layer by blanket CVD utilizing hydrogen reduction.
- the second tungsten layer is grown on the first tungsten layer, whereby the contact holes are completely filled with tungsten. Thereafter, the second tungsten layer is etched back from the top face thereof.
- the obtained contacts can attain a relatively low contact resistance.
- a problem of an increase in leakage current This is caused by the reaction of unreacted WF 6 which has passed through the Ti/TiN film with silicon of the substrate during the formation of the second tungsten layer by the blanket CVD utilizing hydrogen reduction.
- the silicon in the surface portion of the substrate is eroded, so that the pn junction of the impurity diffused region is damaged. Because of the damage of the pn-junction, the leakage current at the contacts increases.
- the method of forming a contact-of this invention includes the steps of: forming an insulating layer on a silicon compound; forming a contact hole in the insulating layer, the contact hole reaching the silicon compound; forming at least one layer of a refractory material film on an inner wall of the contact hole and on a surface of the insulating layer; forming a silicon containing tungsten layer on the refractory material film by CVD; and growing tungsten on the silicon containing tungsten layer by CVD, to fill the contact hole with the tungsten.
- the step of forming the silicon containing tungsten layer on the refractory material film is performed by using a first gas containing at least WF 6 and SiH 4 .
- the step of growing the tungsten on the silicon containing tungsten layer is performed by using a second gas containing at least WF 6 and H 2 .
- the ratio of SiH 4 /WF 6 is 6 or more.
- the step of forming the silicon containing tungsten layer on the refractory material film and the step of growing the tungsten on the silicon containing tungsten layer are successively performed in one and the same CVD chamber.
- the step of forming the refractory material film includes a step of forming a refractory metal film on the inner wall of the contact hole and on the surface of the insulating layer.
- the step of forming the refractory material film further includes a step of forming a nitride film on the refractory metal film.
- the refractory material film is made of titanium, and the nitride film is a titanium nitride film.
- the silicon containing tungsten layer contains silicon in the range of 0.6 Wt. % to 20 Wt. %.
- the invention described herein makes possible the advantage of providing a method of forming a contact in which a low contact resistance and a small leakage current are attained.
- FIGS. 1A through 1D are cross-sectional views for illustrating process steps of a method of forming a contact according to the invention.
- FIGS. 1A through 1D the present invention will be described by way of an example.
- an impurity diffused region 3 which serves as a source/drain region of the MOSFET (not shown) is formed.
- the impurity diffused region 3 for example, phosphorus (P) or arsenic (As) as an N-type impurity, or boron (B) or the like as a P-type impurity is doped at a relatively high concentration.
- an interlayer insulating film (thickness: about 16000 ⁇ ) is formed on the silicon substrate 1 so as to cover the not-shown semiconductor device and the like which have been formed in the silicon substrate 1.
- the interlayer insulating film is formed in the following manner. After forming a non-doped silicate glass (NSG) layer 4 on the silicon substrate 1, a boro-phospho silicate glass (BPSG) layer 5 is formed on the NSG layer 4. Both of the NSG layer 4 and the BPSG layer 5 are formed of SiO 2 which is doped with impurities at a high concentration, and formed by CVD.
- a refractory material film (a barrier film) is formed on the interlayer insulating film so as to cover the inner wall of the contact hole and the exposed portion of the silicon substrate 1.
- the Ti/TiN film 6 is adopted as the "at least one layer of the refractory material film".
- the film is formed in the following manner. First, a titanium layer (thickness: about 1500 ⁇ ) is formed on the surface of the interlayer insulating film so as to cover the inner wall of the contact hole and the exposed portion of the silicon substrate 1 by reactive sputtering. The sputtering is conducted under such conditions that the substrate temperature is 200° C., and the applied voltage is about 900V.
- the Ti/TiN film 6 includes a titanium layer having a thickness of 500 ⁇ and a titanium nitride film having a thickness of 1000 ⁇ .
- the Ti/TiN film 6 enhances the adhesion of a tungsten layer 7 to the interlayer insulating film, and prevents the reaction of silicon with WF 6 at the bottom of the contact hole. Thus, a structure such as that shown in FIG. 1A is obtained.
- a silicon containing tungsten layer 7 (thickness: about 400 ⁇ ) is formed on the refractory material (Ti/TiN) film 6.
- This step corresponds to a nucleation step.
- a reaction gas for the first blanket CVD step WF 6 , SiH 4 and Ar are used.
- the flow rate of WF 6 is 5 sccm
- the flow rate of SiH 4 is 50 sccm
- the flow rate of Ar is 2000 sccm.
- the substrate temperature is in the range of 425° C. to 450° C. (the wafer temperature is in the range of about 390° C. to about 415° C.).
- the gas pressure is about 2.5 Torr.
- the thus formed silicon containing tungsten layer 7 is different from the tungsten layer formed by the conventional nucleation step in the following points:
- the silicon concentration of the silicon containing tungsten layer 7 is higher than the silicon concentration (0.5 Wt. % or less) of the tungsten layer formed by the conventional nucleation step.
- the silicon containing tungsten layer 7 is nearly in an amorphous state rather than in a polycrystalline state.
- the silicon containing tungsten layer 7 is not completely in the amorphous state, because the silicon containing tungsten layer 7 also contains microcrystal of Si, WSi and the like, in addition to tungsten (W).
- a tungsten layer 8 is formed on the silicon containing tungsten layer 7.
- the second CVD step uses the same CVD chamber as that used in the first CVD step.
- WF 6 and H 2 are used as the reaction gas for the second CVD step.
- the flow rate of WF 6 is 75 sccm
- the flow rate of H 2 is 500 sccm.
- the substrate temperature is in the range of 425° C. to 475° C. (the wafer temperature is in the range of about 390° C. to about 440° C.).
- the gas pressure is about 80 Torr.
- the Ti/TiN film 6 is prevented from being deteriorated during the formation of the tungsten layer 8, unlike the conventional example. It is presumed that this is because the tungsten layer formed by the nucleation step in this example is in a highly amorphous state, when compared with the conventional tungsten layer. Therefore, the unreacted WF 6 is prevented from being reacted with silicon positioned under the Ti/TiN film 6 in the formation step of the tungsten layer 8 by the hydrogen reduction blanket CVD.
- the substrate temperature is set in the range of 425° C. to 450° C.
- the substrate temperature may be in the range of 425° to 475° C. for the following reasons.
- the substrate temperature is closer to 425° C.
- the leakage current tends to decrease.
- the substrate temperature is lower than 425° C.
- this causes a problem in that the bowing of the wafer becomes large.
- the bowing of the wafer adversely affects the photolithography process, and causes a stress in the silicon substrate 1.
- the leakage current increases.
- the substrate temperature is preferably set in the range of 425° C. to 475° C.
- the tungsten layer 8 is etched back from the top face thereof, so as to expose the upper face of the interlayer insulating film. During this etch back, part of the tungsten layer 8 buried in the contact hole is not etched, but remains in the contact hole.
- an interconnection 9 which covers the top face of the tungsten remaining in the contact hole is formed by a usual technique such as sputtering or the like.
- a usual technique such as sputtering or the like.
- a contact resistance of 51 to 55 ohms was obtained.
- a contact resistance of 47 to 50 ohms was obtained.
- the contact resistance in this example is considered to be substantially equal to that in the prior art example.
- the N + /P-Junction leakage current at the contact in this example was measured by using a structure in which 4 ⁇ 10 6 contact holes each having a size of 0.6 ⁇ m ⁇ 0.6 ⁇ m were arranged on corresponding N + diffused layers having a total PN-junction area of 10.2 mm 2 and a total perimeter of 25.6 m.
- the measured result for 5V (volts) application was 18 nanoamperes (nA) or less.
- the N + /P-junction leakage current at the contact in the prior art example was measured to be 100 nA or more under the same conditions.
- Each N + diffused layer has the junction depth of 0.12 ⁇ m and the maximum impurity concentration of 3 ⁇ 10 15 cm -3 .
- the silicon containing tungsten layer 7 is required to contain silicon of 0.6 Wt. % or more. On the contrary, in order to attain a low contact resistance, the silicon containing tungsten layer 7 is preferred to contain silicon of 20 Wt. % or less.
- the first CVD step for forming the silicon containing tungsten layer 7 on the Ti/TiN film 6 and the second CVD step for forming the tungsten layer 8 on the silicon containing tungsten layer 7 are successively conducted in the same CVD chamber. This simplifies the process and enhances the throughput.
- the first and the second CVD steps are not successively conducted and the substrate 1 may be taken out of the CVD chamber after the first CVD step and before the second CVD step. When the substrate 1 is taken out of the CVD chamber, dust caused during the first CVD step may be removed from the substrate 1.
- the first and the second CVD steps may be conducted in different CVD chambers.
- the Ti/TiN film is used as the barrier film.
- another film such as a TiW film, a sputtered tungsten film or the like can be used.
- the present invention is described with regard to the contact for connecting the impurity diffused region 3 in the silicon substrate 1 to the interconnection 9.
- the present invention is widely applicable to any contact for connecting single-crystal silicon or polycrystalline silicon to an interconnection.
- the junction leakage current at the contact region can be reduced without causing the contact resistance to increase.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
Claims (8)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4121802A JP2889430B2 (en) | 1992-05-14 | 1992-05-14 | Contact part forming method |
JP4-121802 | 1992-05-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
US5332691A true US5332691A (en) | 1994-07-26 |
Family
ID=14820290
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US08/059,310 Expired - Lifetime US5332691A (en) | 1992-05-14 | 1993-05-11 | Method of forming a contact |
Country Status (3)
Country | Link |
---|---|
US (1) | US5332691A (en) |
JP (1) | JP2889430B2 (en) |
KR (1) | KR960016223B1 (en) |
Cited By (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5436200A (en) * | 1993-12-28 | 1995-07-25 | Fujitsu Limited | Blanket tungsten deposition |
US5552339A (en) * | 1994-08-29 | 1996-09-03 | Taiwan Semiconductor Manufacturing Company | Furnace amorphous-SI cap layer to prevent tungsten volcano effect |
US5599739A (en) * | 1994-12-30 | 1997-02-04 | Lucent Technologies Inc. | Barrier layer treatments for tungsten plug |
US5622894A (en) * | 1996-03-15 | 1997-04-22 | Taiwan Semiconductor Manufacturing Company Ltd | Process to minimize a seam in tungsten filled contact holes |
US5656545A (en) * | 1996-02-26 | 1997-08-12 | Taiwan Semiconductor Manufacturing Company, Ltd | Elimination of tungsten dimple for stacked contact or via application |
US5672543A (en) * | 1996-04-29 | 1997-09-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Volcano defect-free tungsten plug |
US5677237A (en) * | 1996-06-21 | 1997-10-14 | Taiwan Semiconductor Manufacturing Company Ltd. | Process for removing seams in tungsten plugs |
US5700726A (en) * | 1996-06-21 | 1997-12-23 | Taiwan Semiconductor Manufacturing Company Ltd | Multi-layered tungsten depositions for contact hole filling |
US5712207A (en) * | 1996-02-29 | 1998-01-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Profile improvement of a metal interconnect structure on a tungsten plug |
US5747379A (en) * | 1996-01-11 | 1998-05-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating seamless tungsten plug employing tungsten redeposition and etch back |
US5801096A (en) * | 1996-06-03 | 1998-09-01 | Taiwan Semiconductor Manufacturing Company Ltd. | Self-aligned tungsen etch back process to minimize seams in tungsten plugs |
US5821168A (en) * | 1997-07-16 | 1998-10-13 | Motorola, Inc. | Process for forming a semiconductor device |
US5824597A (en) * | 1995-04-12 | 1998-10-20 | Lg Semicon Co., Ltd. | Method of forming contact hole plug |
US5858873A (en) * | 1997-03-12 | 1999-01-12 | Lucent Technologies Inc. | Integrated circuit having amorphous silicide layer in contacts and vias and method of manufacture thereof |
US5892285A (en) * | 1996-02-02 | 1999-04-06 | Micron Technology, Inc. | Semiconductor connection with a top surface having an enlarged recess |
US6048792A (en) * | 1996-06-27 | 2000-04-11 | Nec Corporation | Method for manufacturing an interconnection structure in a semiconductor device |
US6066366A (en) * | 1998-07-22 | 2000-05-23 | Applied Materials, Inc. | Method for depositing uniform tungsten layers by CVD |
US6218301B1 (en) * | 2000-07-31 | 2001-04-17 | Applied Materials, Inc. | Deposition of tungsten films from W(CO)6 |
US6245654B1 (en) * | 1999-03-31 | 2001-06-12 | Taiwan Semiconductor Manufacturing Company, Ltd | Method for preventing tungsten contact/via plug loss after a backside pressure fault |
WO2002079537A2 (en) * | 2001-03-28 | 2002-10-10 | Applied Materials, Inc. | W-cvd with fluorine-free tungsten nucleation |
US20040224501A1 (en) * | 1996-05-22 | 2004-11-11 | Yung-Tsun Lo | Manufacturing method for making tungsten-plug in an intergrated circuit device without volcano phenomena |
US20160086805A1 (en) * | 2014-09-24 | 2016-03-24 | Qualcomm Incorporated | Metal-gate with an amorphous metal layer |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100290781B1 (en) * | 1998-06-30 | 2001-06-01 | 박종섭 | Semiconductor device and manufacturing method |
US6284636B1 (en) * | 2000-01-21 | 2001-09-04 | Advanced Micro Devices, Inc. | Tungsten gate method and apparatus |
JP4785030B2 (en) | 2005-01-18 | 2011-10-05 | 富士通セミコンダクター株式会社 | Semiconductor device and manufacturing method thereof |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4851295A (en) * | 1984-03-16 | 1989-07-25 | Genus, Inc. | Low resistivity tungsten silicon composite film |
US5130266A (en) * | 1990-08-28 | 1992-07-14 | United Microelectronics Corporation | Polycide gate MOSFET process for integrated circuits |
-
1992
- 1992-05-14 JP JP4121802A patent/JP2889430B2/en not_active Expired - Lifetime
-
1993
- 1993-05-11 US US08/059,310 patent/US5332691A/en not_active Expired - Lifetime
- 1993-05-13 KR KR93008225A patent/KR960016223B1/en not_active IP Right Cessation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4851295A (en) * | 1984-03-16 | 1989-07-25 | Genus, Inc. | Low resistivity tungsten silicon composite film |
US5130266A (en) * | 1990-08-28 | 1992-07-14 | United Microelectronics Corporation | Polycide gate MOSFET process for integrated circuits |
Non-Patent Citations (4)
Title |
---|
"Simplified Production Process of WSi2 by CVD," IBM Technical Disclosure Bulletin, vol. 31, No. 6, Nov. 1988, pp. 308-309. |
Simplified Production Process of WSi 2 by CVD, IBM Technical Disclosure Bulletin, vol. 31, No. 6, Nov. 1988, pp. 308 309. * |
Yamazaki et al: Advanced Metallization for ULSI Applications, Materials Research Society, 1992, pp. 299 304, CVD WSi Barrier Technology for Blanket W Contact Filling . * |
Yamazaki et al: Advanced Metallization for ULSI Applications, Materials Research Society, 1992, pp. 299-304, "CVD-WSi.sub.χ Barrier Technology for Blanket W Contact Filling". |
Cited By (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5436200A (en) * | 1993-12-28 | 1995-07-25 | Fujitsu Limited | Blanket tungsten deposition |
US5552339A (en) * | 1994-08-29 | 1996-09-03 | Taiwan Semiconductor Manufacturing Company | Furnace amorphous-SI cap layer to prevent tungsten volcano effect |
US5599739A (en) * | 1994-12-30 | 1997-02-04 | Lucent Technologies Inc. | Barrier layer treatments for tungsten plug |
US5824597A (en) * | 1995-04-12 | 1998-10-20 | Lg Semicon Co., Ltd. | Method of forming contact hole plug |
US5747379A (en) * | 1996-01-11 | 1998-05-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating seamless tungsten plug employing tungsten redeposition and etch back |
US6066559A (en) * | 1996-02-02 | 2000-05-23 | Micron Technology, Inc. | Method for forming a semiconductor connection with a top surface having an enlarged recess |
US6043151A (en) * | 1996-02-02 | 2000-03-28 | Micron Technology, Inc. | Method for forming a semiconductor connection with a top surface having an enlarged recess |
US5994220A (en) * | 1996-02-02 | 1999-11-30 | Micron Technology, Inc. | Method for forming a semiconductor connection with a top surface having an enlarged recess |
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Also Published As
Publication number | Publication date |
---|---|
KR960016223B1 (en) | 1996-12-07 |
JPH05315284A (en) | 1993-11-26 |
KR940006197A (en) | 1994-03-23 |
JP2889430B2 (en) | 1999-05-10 |
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