US5237690A - System for testing adaptor card upon power up and having disablement, enablement, and reconfiguration options - Google Patents
System for testing adaptor card upon power up and having disablement, enablement, and reconfiguration options Download PDFInfo
- Publication number
- US5237690A US5237690A US07/549,199 US54919990A US5237690A US 5237690 A US5237690 A US 5237690A US 54919990 A US54919990 A US 54919990A US 5237690 A US5237690 A US 5237690A
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- United States
- Prior art keywords
- adapter
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- test result
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/177—Initialisation or configuration control
Definitions
- This invention relates to the field of data processing and, more particularly, to improvements in method and apparatus for automatically initializing a data processing system, such as a personal computer, so as to allow the system to be operated when feature cards or adapters have been added to, removed from, or moved within the computer system.
- a data processing system such as a personal computer
- TM PS/2 PS/2 personal computers constructed in accordance with Micro Channel (TM) architecture
- POS Programmable Option Select
- the POS Function is generally described in "IBM Personal System/2 Hardware Interface Technical Reference", First Edition ( May 1988), published by International Business Machines Corporation, to which reference may be had for a more detailed description thereof.
- Adapters provide the means by which various data processing devices or optional features can be connected into and operated as part of a personal computer system. Examples of such features are displays, printers, scanners, etc.
- an adapter has a group of programmable registers, known as the POS registers, which, by convention, must store or contain predetermined POS information.
- Two registers store an adapter ID that uniquely identifies the specific adapter relative to other adapters.
- Four additional registers store an adapter card enabling/disabling bit and option select data, and two additional registers store subaddress extensions.
- ADF adapter description file
- the ADF contains data necessary for the operation of the adapter and its related option or device, the data defining the resources the adapter can use, and the associated POS settings that indicate the resource assignment.
- Each system includes a Reference Diskette containing System Configuration utilities or programs that identify the installed hardware and interpret the system resources (I/O ports or address space, memory address space, interrupt levels, and arbitration levels) for each device.
- the files on the Reference Diskette are copied onto a backup copy which is then used to configure the system.
- the files needed for configuration are merged onto the backup copy.
- certain files are needed, the files being an ADF and any necessary Adapter Description Program (ADP).
- ADP Adapter Description Program
- An option diskette is supplied for each adapter and contains the necessary ADF and ADP. Such files are merged onto the backup copy before a new adapter is installed.
- An ADF contains various fields of information including the following: adapter ID; adapter name; the number of POS registers to be included; an optional field indicating that an adapter option will be specified next; a prompt keyword; a choice keyword including the choice name, a POS setting which programs the adapter appropriately, and a resource setting which identifies the resources used for the particular choice; and a help keyword.
- a system such as described above has to be configured when the system is setup for the first time and thereafter each time an adapter is added to, removed from, or moved within the system.
- POS data is stored in a non-volatile memory.
- POST Power On Self Test
- Such test also recognizes when an adapter card is added to, removed from, or moved within the system. When this occurs all other feature cards (such as the disk controller adapter) are disabled in the system, and a display message is sent to the operator or user indicating that the system must be reconfigured before it can be further operated.
- IBM TDB Vol. 20, No.9, February 1973, pp. 3501-3502 discloses a modular relocate scheme in which RAMS are partitioned on a separate card, module, or chip in such a way that a processor will operate with or without a card, module, or chip.
- One of the objects of the invention is to provide a method and apparatus for testing a data processing system, such as a personal computer, and allowing the system to be operated without the system being reconfigured, even though an adapter card has been added to, removed from, or moved within the system.
- Another object is to provide a POST which disables non-video adapter cards that have been added to, removed from, or moved within a data processing system, and allows continued operation of the system without requiring reconfiguration.
- a further object is to provide a power on test for a personal computer constructed in accordance with the IBM Micro Channel Architecture, after which test the computer can be operated without requiring reconfiguration even though an adapter has been added to, moved within, or removed from the computer.
- Still another object is to provide data processing system with a power on test function in which all expansion slots are checked to compare actual adapter IDs with IDs stored during a prior configuration, and set flags in accordance with mismatch errors to allow the system to disable any slots in which a mismatch occurs.
- a data processing system such as a personal computer includes a Power On Self Test (POST) during which adapter IDs are checked to determine if any adapters have been added, moved or removed, since a previous system configuration. If any adapters have been so altered, the system is placed in operation with all adapters enabled except for those which were altered.
- POST Power On Self Test
- FIG. 1 is a schematic diagram of a data processing system embodying the invention
- FIG. 2 is a flow chart of a portion of the prior art being improved upon
- FIG. 3 is a flow chart of another portion of the prior art being improved upon
- FIG. 4 is a flow chart of a portion of the invention.
- FIG. 5 is a flow chart of another portion of the invention.
- System 10 includes a microprocessor 12, such as a commercially available Intel 80386 or 80486 microprocessor, the structure and operation of which are well known to those skilled in the art.
- Microprocessor 12 executes programs, stored in a random access memory (RAM) 14 and a read only memory (ROM) 17 and controls the general operation of system 10.
- RAM random access memory
- ROM read only memory
- System 10 also includes a circuit or bus network 15 operatively interconnecting the various elements of the system.
- a CMOS (complementary metal oxide semiconductor) RAM 16 is connected to and backed up by a battery 18 and provides a non-volatile storage in a table 19 of information used in the invention as described hereinafter.
- Table 19 contains a plurality of entries corresponding in number to the number of expansion connectors or slots in the system. The position in the table of each entry corresponds to the slot number for such entry.
- Each entry contains a first field for storing a two byte configured adapter ID, a second field indicating how many bytes of POS data are in a third field, and a third field for storing the POS data defining the system resources assigned to the adapter identified in the first field.
- a configured adapter ID is either the actual ID of an adapter plugged into the corresponding slot and connector at configuration time, or a pseudo adapter ID indicating that such slot and connector are empty and have no adapter plugged therein. If a slot is empty, a pseudo adapter ID or default value of FFFF(Hex) is stored.
- Bus network 15 is further connected to a plurality of channel connectors CC1-CCn.
- Such connectors are also known as expansion connectors and provide the means by which various devices or optional features can be added to the system.
- Such connectors are designed to receive adapters or printed circuit boards having edge connectors thereon, the adapters being plugged into slots in the connectors.
- the terms "adapters”, “adapter cards”, “feature cards”, and “cards” are synonyms used interchangeably herein.
- Each different connector has a unique slot number Sx, the illustrated connectors being assigned slot numbers S0-S(n-1).
- a video adapter 20 is plugged into slot S1 of connector CC2 and is connected to a display 22.
- a feature adapter 24 is plugged into slot S0 of connector CC1 and is connected to a feature 26.
- Each adapter has a register A for storing an adapter ID that uniquely identifies the type of adapter, and registers B that store an enabling/disabling bit and POS data, such registers being respectively indicated by the references 20A, 20B, 24A and 24B in FIG. 1.
- registers correspond to and are known as the POS registers 0-7 as defined by the above-mentioned Micro Channel architecture.
- the POS data from table 19 is written in the respective POS registers of the adapters.
- System 10 further includes an adapter enable/setup register 28 connected to bus network 15.
- Register 28 is an eight bit register in which the bits are numbered 0-7. Bits 0-2 are address bits identifying the connectors by their slot numbers. Bit 3 enables or disables a card setup signal. When enabled during setup, bit 3 allows reading to and writing from the card located in the slot addressed by bits 0-2. Bits 4-6 are not used. Bit 7 is used to activate a channel reset signal sent to all connectors. Register 28 is used to scan or search through all the slots or connectors and read the actual adapter IDs of all adapters plugged into such slots. If a slot is empty, the adapter ID read operation returns a pseudo adapter ID of FFFF(hex), indicating that the slot is empty.
- Step 46 reads from table 19 the adapter ID from the entry corresponding to the same slot number, and the two IDs thus read are compared in step 48. If they are the same, step 50 reads the corresponding POS data from table 19 and writes it into the appropriate POS registers B of the adapter. Step 52 determines if all slots have been so analyzed. If not, step 54 sets register 28 to the next slot address, and the loop is repeated.
- step 58 logs such determination as indicating an ID mismatch error has occurred.
- the mismatch would occur when there is a different adapter in the slot than when last configured, when there is an adapter in the slot when there was none when last configured, or when there is no adapter in the slot when there was one at the last configuration.
- Step 58 passes control to step 52.
- the POST routine continues further operations in step 56.
- step 60 checks to see if an ID mismatch error occurred. If none did, control is passed to step 62 and the POST routine completes as normal and finally passes control to step 64 which then boots up the operating system and allows step 65 to operate the system with all the optional features.
- step 60 branches to step 66 (FIG. 3) which turns off all the adapters in the system.
- Steps 70-78 then search through the adapters in the system until the video adapter 20 is located and step 74 iteratively turns off all slots other than the video adapter slot.
- step 80 initializes it thereby allowing an error message to be sent to the display 22 informing the user of the need to reconfigure the system.
- step 80 passes control to step 82 which then finishes off whatever other POST operations need to be done, and control passes to step 84 to send a message to the user indicating a need to reconfigure the system.
- the system is then reconfigured by powering up the system with the Reference Diskette in step 86 and running the system automatic configuration program in step 87.
- a POS phase of POST is performed or executed during which each feature slot in the system is individually placed into card setup mode.
- Card setup mode is a special state (as described by the IBM Micro Channel Architecture) which allows a system feature to be configured via software.
- Each feature card can present its card ID when it is placed in card setup mode. This card ID is read by POST and compared to a value in a table stored in the non-volatile memory, which table is established when the system setup utility is executed. This table has the card ID and POS data information for each feature card slot in the system.
- the card ID read from the feature card does not match the card ID stored in the non-volatile memory table then an ID mismatch error is logged and no further action is performed on this particular feature card slot.
- the POS data from the non-volatile memory table is programmed into the adapter card. By programming the POS data into the adapter card, the card is configured.
- the ID mismatch error flag is checked to see if an ID mismatch error occurred. If an ID mismatch error occurred, then all slots are disabled and POST searches for a video adapter. All slots are disabled to insure that no addressing conflicts occur if the video adapter is found and enabled. A video adapter, if present, must be initialized to insure that error messages are displayed to the user. If a video adapter is found only the slot that contains the video adapter is enabled. This scheme leaves all cards turned off (except for a possible video card). This forces the user to rerun the IBM setup utility (from the reference diskette) before the adapter cards of the system are allowed to be operational. Once reconfiguration has been performed, the system can be restarted and the operating system loaded from disk.
- a mechanism is provided which records which slots contain feature cards or adapters with IDs that correctly correspond to the IDs in POS table 19. This mechanism also identifies which slots generate an ID mismatch error. To be able to correctly identify which slot or slots are involved in a card ID mismatch, a word 101 of RAM 14 is used. This word is referred to as SLOTFLAG. Each bit in SLOTFLAG 101 corresponds to a different slot. Any unused bits can be reserved for expansion.
- the original functions of FIG. 2 are modified to support the SLOTFLAG designator. This modification is shown in FIG. 4.
- the bit position corresponding to the failing slot is set in SLOTFLAG.
- the functions of FIG. 3 are modified as shown in FIG. 5 to use the SLOTFLAG designator. This allows for all correctly configured slots to remain enabled if a correctly configured video card is present. All correctly configured slots will remain enabled if no video card is present. If a video card is found which also caused a card ID mismatch error, then all slots but the video slot are disabled. This disabling insures that no addressing conflicts occur.
- FIGS. 4 and 5 show the improved operations of the invention. Those operations which are the same as those of the prior art are indicated with the same references as used in FIG. 2 and 3. New steps are indicated with references 100 and higher.
- POST routine 32 begins the improved operation with step 100 accessing SLOTFLAG 101 and clearing it by setting all bits to indicate that no adapter has been added, removed or moved. Except for step 102, all the remaining steps in FIG. 4 occur as in the prior art process previously described. Step 102 occurs when there is an ID mismatch error and it sets or marks the bit in SLOTFLAG 101, which bit corresponds to the slot number where the error arose, to indicate an error occurred in such slot. Later, as result of such error having been logged in step 58, step 60 branches to step 66 (FIG. 5).
- Step 66 first disables all the adapters. Then, a series of steps places all the adapters in a setup mode and either enables or disables such adapters in accordance with the non-occurrence or occurrence of an ID mismatch associated therewith.
- step 104 checks to see if the corresponding SLOTFLAG bit has been marked. If it has not been marked, step 106 enables such adapter. If it has been marked, step 106 is bypassed leaving such card disabled from step 66. If the card is a video card, step 108 checks to see if the corresponding SLOTFLAG bit has been marked. If such bit has not been marked, step 110 enables all other correct slots.
- step 108 branches to step 112 which turns all other cards off. Then, steps 80-87 are performed to reconfigure the system. After all slots have been checked, and upon completion of step 110, control passes to step 82 where any remaining steps of the POST are performed and a message is sent to the user in step 114 recommending that the system be reconfigured in order to get the full function from all adapters. The user can then choose to reconfigure the system by steps 86 and 87 or operate the system in step 116 using only those adapters that are enabled. Step 116 can not be done with the prior art system described above.
- the invention enhances system operation in the situation where feature cards have been added to, removed from, or moved within the computer system. For minor changes, such as a printer port addition, no loss of system function is experienced. All previously operational feature cards will continue to be so. Before the invention, the system would have no operational cards except possibly the error path video adapter and hence be unusable until reconfiguration.
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- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Debugging And Monitoring (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
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Abstract
Description
Claims (8)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/549,199 US5237690A (en) | 1990-07-06 | 1990-07-06 | System for testing adaptor card upon power up and having disablement, enablement, and reconfiguration options |
EP19910303438 EP0464987A3 (en) | 1990-07-06 | 1991-04-17 | Method and apparatus for initialisation of computer system features |
JP3135738A JPH0812651B2 (en) | 1990-07-06 | 1991-05-10 | Data processing system and method of operating data processing system |
CA002046356A CA2046356C (en) | 1990-07-06 | 1991-07-05 | Method and apparatus for improved initialization of computer system features |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/549,199 US5237690A (en) | 1990-07-06 | 1990-07-06 | System for testing adaptor card upon power up and having disablement, enablement, and reconfiguration options |
Publications (1)
Publication Number | Publication Date |
---|---|
US5237690A true US5237690A (en) | 1993-08-17 |
Family
ID=24192038
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US07/549,199 Expired - Lifetime US5237690A (en) | 1990-07-06 | 1990-07-06 | System for testing adaptor card upon power up and having disablement, enablement, and reconfiguration options |
Country Status (4)
Country | Link |
---|---|
US (1) | US5237690A (en) |
EP (1) | EP0464987A3 (en) |
JP (1) | JPH0812651B2 (en) |
CA (1) | CA2046356C (en) |
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- 1991-05-10 JP JP3135738A patent/JPH0812651B2/en not_active Expired - Fee Related
- 1991-07-05 CA CA002046356A patent/CA2046356C/en not_active Expired - Fee Related
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Also Published As
Publication number | Publication date |
---|---|
JPH05346900A (en) | 1993-12-27 |
EP0464987A3 (en) | 1992-07-22 |
CA2046356A1 (en) | 1992-01-07 |
EP0464987A2 (en) | 1992-01-08 |
CA2046356C (en) | 1998-12-22 |
JPH0812651B2 (en) | 1996-02-07 |
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