US3911421A - Selection system for matrix displays requiring AC drive waveforms - Google Patents

Selection system for matrix displays requiring AC drive waveforms Download PDF

Info

Publication number
US3911421A
US3911421A US429459A US42945973A US3911421A US 3911421 A US3911421 A US 3911421A US 429459 A US429459 A US 429459A US 42945973 A US42945973 A US 42945973A US 3911421 A US3911421 A US 3911421A
Authority
US
United States
Prior art keywords
signal
square wave
strobe
set forth
drive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US429459A
Other languages
English (en)
Inventor
Paul Matthew Alt
Peter Pleshko
Eugene Stewart Schlig
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Priority to US429459A priority Critical patent/US3911421A/en
Priority to FR7441626*A priority patent/FR2256588B1/fr
Priority to JP49137808A priority patent/JPS5099437A/ja
Priority to GB53274/74A priority patent/GB1489435A/en
Priority to DE19742459723 priority patent/DE2459723A1/de
Application granted granted Critical
Publication of US3911421A publication Critical patent/US3911421A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/12—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by switched stationary formation of lamps, photocells or light relays
    • H04N3/127—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by switched stationary formation of lamps, photocells or light relays using liquid crystals

Definitions

  • ABSTRACT Alternating drive waveforms with zero direct voltage content for matrix or multiplexed displays are produced using low voltage, binary-level switching in the selection drive circuitry. Selection drive circuitry, and the breakdown voltage requirements thereof, are minimizeci by synthesizing the required high voltage Waveforms applied to both the X and Y axes of display from lower amplitude components.
  • TSILILJ-IIIINIIIIILLVUIJIIIIIIG IE+IIIE+II 2VIII- wAvEEoIIN II NINIIS N AGNGSS o GELL 'ZVIH U.S. Patent oct. 7,1975 sheet 4 @f6 3,911,421
  • the present invention relates to apparatus and techniques for driving matrix displays. More particularly, the present invention relates to an improved selection system for generating the decode information necessary to drive matrix display devices requiring AC drive waveforms.
  • AC drive waveforms with a negligible direct voltage component are desirable not only for matrix addressing of liquid crystal displays, but also for matrix addressing of the cells of any of a variety of displays. For example, it may be desirable to drive electroluminescent matrix displays, gas panel displays, etc. with AC waveformsy having a negligible direct voltage component.
  • the multiplexing capability may be increased by using a high frequency signal to increase the threshold voltage, and therefore permit larger drive voltages. With these larger drive voltages, circuits are needed (one for each horizontal and vertical line terminal of the matrix display) having a breakdown voltage exceeding the peak-to-peak voltage of the drive waveform. Because of the zero direct voltage requirement, the peak voltage required for good contrast is doubled.
  • a simplified selection system isprovided for multiplexing matrix displays requiring AC waveforms across the cells thereof, with such ⁇ ,selection system having the capability of providing 4a wide variety of selection waveforms including 2:1,
  • the selection system is designed with a minimum of parts, and permits standard integrated unipolar logic circuits and low voltage drivers to be used.
  • the manner by which the above selection system with its attendant advantages is carried out involves synthesizing the required waveform from two components, one containing the information concerning cell selection or strobe timing, and the other being a steady square wave. These signals are generatedV separately and combined in such a way that the peak-to-peak voltage appears only across the display cells. Accordingly, in accordance with the principles of the present invention, by summing square waves and low amplitude logical signals, the larger amplitude periodically inverted drive signals required by matrix displays are simply produced using unipolar circuits with a breakdown voltage considerably less then the breakdown voltage required using conventional techniques.
  • the design of the selection system in accordance with the principles of the present invention provideto the displays cells AC drive signals with zero DC content using unipolar circuits with a minimum of breakdown requirements, but in addition such system permits a wide variety of selection waveforms including 3:1, 2:1, and RMS selection with either an AC or DC pulse, without altering any of these circuit configurations therein.
  • an object of the present invention to provide an improved selection system for multiplexing the rows and columns of a matrix display.
  • lt is yet still a further object of the present invention to provide a selection system for matrix displays which selection system operates to produce Ac drive waveforms with minimum direct voltage component to select display cells with either 2:1, 3:1, or RMS selection in either a DC pulse mode or an AC pulse mode.
  • FIG. l shows the selection system for matrix displays
  • FIG. 2B shows the manner by which the selection system of FIG. l produces alternating drive waveforms across display cells in a 2:1 selection scheme, using a DC pulse mode.
  • FIG. 3 shows the manner by which the selection system of FIG. l produces alternating drive waveforms across display cells in a 2:1 selection scheme, using an AC pulse mode.
  • FIG. 4 shows the manner by which the selection system of FIG. 1 produces alternating drive waveforms across ldisplay cells in a 3:1 selection scheme, using a DC pulse mode.
  • FIG. 5 shows the manner by which the selection system of FIG. l produces alternating drive waveforms across display cells in a 3:1 selection scheme, using an AC pulse mode.
  • FIG. 6 shows the manner by which the selection system of FIG. l produces alternating drive waveforms across display cells in an RMS selection scheme, using a DC pulse mode.
  • the selection system acts to provide AC drive waveforms to matrix display cells l.
  • the matrix display cells are arranged in an .r-y array whereby selected cells are turned on" by application of partial-select voltage waveforms to the appropriate .r and y lines which intersect at the selected cell.
  • a matrix array of display cells may be l() X 100, it is clear that the number of cells in the array is somewhat a matter of design choice subject, however, to constraints imposed by the characteristics of the ⁇ particular cells as these characteristics affect scanning ability.
  • certain type displays such as dynamic scattering liquid crystal displays, may be limited to approximately a 100 X l0() array.
  • any useful array will require considerable drive circuitry and, accordingly any techniques which act to reduce the quantity and complexity of such drive circuitry, will act to considerably reduce the cost of the selection system for the display.
  • FIG. l a row-at-a-time matrix selection multiplexing scheme is described, it is clear that other schemes may, as readily, be employed.
  • the selection system in accordance with the principles of the present invention may, as readily, be utilized in a character-at-a-time multiplexing arrangement.
  • signal waveforms are applied to the rows of the display matrix in repetitive sequence.
  • the signal waveforms include strobe pulses applied a row at a time.
  • Signal waveforms applied to the columns of the display matrix include information signals simultaneously applied to all columns such as to determine whether the cells on the particular strobed row are "on" or off, Information signals are derived by means of logical operations on the data to be displayed, and the change in synchronism with the shift of the strobe pulse from row to row determines uniquely what is to be displayed.
  • FIGS. 2B-6 the waveforms are shown for two full scans of the display.
  • the information pulse sequence and its timing relative to that of the strobe pulse is such that the particular cell in question sees one half-select and one full-select excitation during each cycle. It will be on because of the full-select excitation.
  • the x or horizontal lines of the matrix display are strobed, one by one, in response to signals from strobe select signal generator 3. While the x lines are strobed one by one in response to signals from strobe select generator 3, the y or vertical lines all receive sets of information concurrently from information select signal generator 5, in synchronism with the strobe pulses.
  • the y lines 9-9n simultaneously receive information in accordance with which cells along the x row being pulsed by line 7, are to be lit.
  • FIG. 1 shows the x lines being strobed in sequence by strobe signals while the y lines receive the information signals, it is readily apparent that the y lines could as easily be strobed by the strobe signals and the x lines receive the information signals.
  • the strobe signals and information signals required to produce an AC drive waveform across the display cells with a negligible direct voltage component are synthesized in a convenient and an efficient manner.
  • the synthesis technique employed involves summing signals, each having a smaller peak-to-peak amplitude than the final waveform.
  • One of the two signals contains all of the information content, While the other of the two signals is a steady-state square wave reference signal,
  • the information content signal is generated, as will be explained more fully hereinafter, by an Exclusive-OR operation on the steady-state square wave signal and a binary level-type logical (select) signal, which has the effectof logically inverting the output in synchronism with the square wave.
  • This logical inversion conditions the signal for the polarity inversion which results when another of said steady-state square wave signals, as a reference signal, is added thereto. It will be seen that by the superposition of these signals, the information content of the strobe signals and information signals is allow to ride on top of the latter reference square wave signal.
  • the logical circuits employed to generate the information content float on top of the circuits employed to generate the reference waveform, whereby the breakdown voltage required for each of these circuits is only some fraction of the peak-to-peak output voltage therefrom.
  • the driving arrangement of the present invention allows any one of several selection schemes to be employed without any modification to the circuits, it only being necessary to vary the pulse repetition rate and amplitude of the square waves ernployed.
  • display information generator ll With reference to the overall operation of the selection system of FIG. l, the particular data, image, etc. to be displayed on matrix display 1 originates in display information generator ll.
  • display information generator l1 would comprise a digital computer.
  • a general purpose digital computer could be programmed to produce the required display information.
  • display information generator generator l1 could merely comprise a storage device which serially reads out with time the information to be displayed. Regardless of the source of display information, it is evident that it may be local or remote.
  • display information generator ll comprises a ground referenced arrangement. Since the X-decoder (strobe) portion 13 and the Y-decoder (information) portion 15 of the selection system of FIG. l are each referenced, respectively, to square wave generators 17 and 19 which generators may in turn each be referenced to an AC bias, it is desirable to ernploy isolation devices at the point where these decoders interface with ground referenced system. In order to minimize the number of isolation devices required, it is preferred to place same at a point in the system where the signal information flows largely serially. As shown in FIG. 1, isolators 2l and 23 act to provide isolation between the logic circuits employed in decoders 13 and l5 and ground referenced display information generator l1. Any of a variety of arrangements may be ernployed for isolators 2l and 23. However, it should be recognized that isolators 2l and 23 may be eliminated.
  • display information generator 1 1 may conveniently act to provide synchronization (sync) signals.
  • square wave generators 17, 19, 25, and 27 are all in synchronization.
  • square wave generators 17 and 25 each act to produce square waves in phase with one another with possibly different amplitudes, the difference being that the square waves produced by square wave generator is referenced to the square wave produced by square wave generator 17, while the latter square wave is referenced to either ground or an AC bias level, depending upon whether an AC bias signal is applied across terminals 29 or 3l.
  • square wave generators 19 and 27 each produce square waves in phase with one another with possibly different amplitudes the difference being the point to which the square waves produced therefrom are referenced.
  • the in-phase square waves produced by square wave generators 17 and 25 are the complements of the inphase square waves produced by square wave generators 19 and 27.
  • square wave generators 17 and 19 are shown for convenience as being two separate generators, it is clear that since the square waves produced therefrom are the complements of one another ⁇ a single square wave generator with complementary outputs may readily be employed.
  • a single flip-flop may be employed for square wave geny erators 17 and 19. ln this regard, it is not always desirthe emitter-collector circuits thereof.
  • display information generator 11 also supplies sync signals to strobe select signal generator 3 and information select signal generator 5.
  • the latter signal generators may be in synchronization with the synchronized square wave generators.
  • strobe select signal generator 3 most conveniently would include a simple counter arrangement for readily providing the sequential Strobe signals, oneby-one, to Exclusive-OR gates 33-33n.
  • information select signal generator 5 would most conveniently include parallel output information storage means for readily providing concurrent information signals to each of the respective Exclusive-OR gates 35-35n, the respective sets of concurrent information signals being sequentially provided in synchronization with the respective strobe pulses.
  • information select signal generator 5 would most simply and conveniently include binary counter and shift register arrangements for providing the information signals therefrom.
  • each of the X-drivers 37-37n are respectively responsive to signals from Exclusive-OR gates 33-33n.
  • each of the respective Y- drivers 39-39n are respectively responsive to signals from Exclusive-OR gates 35-3511.
  • strobe select signal generator 3, square wave generator 25, each of Exclusive-OR gates 33-33n and each of X-drivers 37-3711 are referenced to common node 41;
  • each of the circuit components within Y- decoder subsystem l5 is referenced to common node 43. Accordingly, it can be see that the logical signals employed within the X-and Y-decoder subsystems are superimposed upon the respective square waves pro-V cuted by square wave generators 17 and 19.
  • FIG. 2A there is shown the manner in which the Exclusive-OR function operates with respect to its reference square wave bias atits common node to produce the waveforms shown in FIGS. 2B, 3, 4, 5 and 6.
  • FIGS. 2B, 3, 4, 5 and 6 depict the process by which the basic signals are combined to produce display cell drive waveforms for commonly used selection schemes.
  • FIG. 2B depicts the process by which an AC drive waveform (D-H) for a 2:1 selection scheme using a DC pulse mode, is produced'FIG. 3, on the other hand, depicts the process by which an AC drive waveform (D-H) for a 2:,1 selection scheme using an AC pulse mode, is produced.
  • the distinction between the two waveforms resides in the fact that the DC pulse waveform has a net DC component during the strobe interval, whereas the AC pulses waveform does not.
  • the polarity of the drive waveforms alternately inverts from strobe interval to strobe interval there is, then, no net DC component here either, when taken over strobe intervals.
  • FIGS. 4 and 5 depict the process by which AC drive waveforms (D-H) for a 3:1 selection scheme using a DC and AC pulse mode, are produced.
  • D-H AC drive waveforms
  • FIGS. 2B and 3 off cell see iVm while on" cells see ;:2VT.
  • FIG. 6 depicts the process by which AC drive waveforms (D-H) for an RMS selection scheme are produced.
  • D-H AC drive waveforms
  • FIG. 6 depicts the process by which AC drive waveforms (D-H) for an RMS selection scheme are produced.
  • optimum results are achieved using RMS selection.
  • the RMS strobe scheme of FIG. 6 as opposed to the 3:1 selection schemes of FIGS. 4 and 5, permits larger matrices to be driven.
  • each of the respective sets of waveforms shown in FIGS. 2B-6 are produced using two Exclusive-OR gates, one for each side of the particular display cell being driven.
  • FIG. 2B for example, there is one Exclusive-OR gate on the strobe side of the cell to be driven which acts upon waveforms A and B to produce primitive strobe signal C, and another Exclusive-OR gate on the information side of a cell to be driven which acts upon waveforms E and F to produce primitive information signal G.
  • composite strobe signal D and composite information signal H as applied across a cell to be driven, result in their difference, D-H shown in the last line of FIG. 2B.
  • a strobe select signal A is applied to one input of the Exclusive-OR gate 33, as shown in FIG. l.
  • the strobe select signal is produced by strobe select signal generator 3, in response to sync signals from display information generator ll.
  • the strobe select signal A is applied between the one input of the Exclusive-OR gate and the common node 4l of this gate.
  • the basic strobe square wave B shown in FIG. 2B, is applied between the other input to the Exclusive- OR gate and the common node 4l of this gate.
  • the common node of all Exclusive-OR gates 33-3311 are tied to common node line 41 of the strobe subsystem.
  • the strobe square wave B shown in FIG. 2B is produced by square wave generator 25 in FIG. 1.
  • a primitive strobe signal C shown in FIG. 2B, is produced between the output of the Exclusive- OR gate and its common node 4l. This is particularly shown in FIG. 2A.
  • the Exclusive-OR function operates in conjunction with strobe square wave B to cause the unipolar pulses of strobe select signal Ato exhibit a periodic inversion of logical state in synchronism with B.
  • common node 4l is referenced to a square wave corresponding to strobe square wave B.
  • the common node of the Exclusive-OR gate shown therein is referenced to waveform B.
  • waveforms B which are identical in timing but may differ in amplitude, are applied between one input to the Exclusive-OR gate and its common node 4l and between its common node 41 and ground.
  • square wave generator 17 produces the square wave signal applied between common node 4I of the Exclusive-OR gate and ground.
  • a composite strobe signal D is produced having a level shift with respect to the primitive strobe signal C.
  • the composite strobe signal D comprises unipolar pulses which go between O and 2 VTH.
  • Exclusive-OR gate 33 in FIG. l While Exclusive-OR gate 33 in FIG. l, in the example being described, operates to produce a composite strobe signal D, Exclusive-OR gate 35 operates to produce a composite information signal, H as shown in FIG. 2B. The application of such signals is shown more particularly in parenthesis in FIG. 2A.
  • information select signal generator 5 in FIG. l would act to apply information select signal pulses E (FIG. 2B) between one input to Exclusive-OR gate 35 and its common node 43.
  • the information square wave F applied between the other input to Exclusive-OR gate 35 and its common node 43, ⁇ is produced by square wave generator 27, in FIG. l.
  • the reference square wave signal applied between the commonk node 43 and ground to provide the level shift, in the same manner as was done with the strobe signal, is produced by square wave generator 19.
  • square wave generator 19 the complementary square waves produced by square wave generators 17 and 19 are shown in FIG. 2 as being equal in duration.
  • the complementary square waves produced by square wave generators 25 and 27 are described as being of equal duration.
  • these complementary square waves do not necessarily have to be of equal duration or amplitude and that variations from this approach may readily be employed.
  • a single reference square wave may be employed to bias a single axis, i.e., the common node of either the X-decoder drive circuitry 13 or Y- decoder drive circuitry 15.
  • the primitive waveforms would appear on one axis while the primitive pulse the reference square wave forms would appear on the other.
  • any of a variety of waveforms and voltage levels can be added to both the x and y axis since these waveforms and voltage levels substract to zero when applied across its associated display cell.
  • the strobe and information pulses may vary between and'VTH.
  • the strobe and information signals may vary between -VTH and 0.
  • the particular voltage levels selected are a matter of design choice.
  • the pulse repetition rate or frequency of the select signals and square wave signals are a matter of relative design choice.
  • the strobe select signal may have the same pulse repetition rate or frequency as the strobe square wave signal, or may be different. In FIG. 2B, for example, the strobe select signal has a faster pulse repetition rate than the strobe square wave signal.
  • the matrix display l of FIG. 1 comprises dynamic-scattering liquid crystal display cells
  • the strobe select signal has a slower pulse repetition rate than the strobe square wave signal.
  • the pulse repetition rate of the strobe and information select signals is determined by the scanning characteristics of the particular display device being multiplexed.
  • the particular selection scheme employed is determined by the scanning characteristics of the particular display device being multiplexed.
  • AC bias signal With certain types of display cells, it has been found desirable to further bias either or both axes with an AC bias signal.
  • the function of the AC bias signal in such cases is to change the threshold level of the display cells.
  • Such bias may be applied to both axes, via terminals 29 and 3l, as shown in FIG. l.
  • the AC bias may be applied to bias only one of the axes.
  • operation is commonly referred to as a two-frequency scheme.
  • the two-frequency scheme may be preferred.
  • the AC bias is typically a high frequency bias.
  • AC bias may, likewise, be desired to change threshold levels, and the like, in other matrix display devices.
  • the AC bias may be a low-frequency bias.
  • matrix display 1 in FIG. 1 is the abovementioned dynamic-scattering liquid crystal display, it may be desirable to perform the scanning function of the x and y axes with a high-frequency signal and bias the common node of square wave generators 17 and 19 with a low-frequency bias.
  • AC bias is shown transformer coupled in FIG. 1, but other arrangements may readily be used.
  • the manner in which a 2:1 selection scheme having AC pulse mosde waveforms is provided should be evident from the previous discussion with regard to the waveforms in FIG. 2B.
  • the pulse repetition rate of the strobe and information square wave has been increased such that one period thereof corresponds in duration to the duration of the strobe and information select pulses.
  • the operation of the Exclusive-OR function upon the strobe select signal and strobe square wave signal is to cause a logical inversion over half of the pulse interval of the pulses in the strobe select signal.
  • a strobe square wave reference signal is employed to bias the Exclusive-OR operation to provide the level shift required.
  • the primitive information signal and composite information signal are produced via the described exclusive-OR function.
  • FIGS. 4 and 5 it can be seen that the operation of the Exclusive-OR functionis the same as was described with reference to FIGS. 2B and 3, respectively.
  • FIGS. 2B and 3 depict the manner in which 3:1 selection signals are produced. Basically, in going from 2:1 to 3:1, all that is required is that simple amplitude changes be made.
  • VTH the threshold of the matrix display cells
  • 3:1 selection the required logical levels of the composite strobe and information signals would be between O and 3 Vm. It is clear, that the changes in logical levels may be achieved by any of a variety of techniques.
  • the Exclusive-OR gate may be adjusted so that its output voltage levels as provided by its own internal floating power supply, vary between O and 2 Vm.
  • Such an arrangement can be assumed with respect to FIGS. 4 and 5. It should be noted that although the output C and G from the Exclusive- OR gate varies between and 2 Vm, the signal employedto bias the common node of the Exclusive-OR gate varies only between 0 and VT.
  • An RMS selection scheme is one which maximizes the RMS difference between the threshold and fon condition.
  • the amplitudes of the signals are determined by factors n and V1, which are related to the display device characteristics and the number of lines to be scanned.
  • the waveform that appears across the display cell may be obtained by subtracting, as shown in FIG. 6, the composite information signal H from the composite strobe signal D. By substracting H from D, a RMS DC- pulse waveform is obtained, as seen by the display cell.
  • the amplitude of the primitive strobe signal, as taken at its Exclusive-OR output is not the same as the amplitude of the primitive information signal, as taken at its Exclusive-OR output.
  • the primitive strobe is smaller than the composite by a factor (n l )/n and is smaller than the information square wave by a factor (n 2)/n.
  • the waveform appearing across the display cell appears as a bipolar pulse having periodically inverted amplitudes nVD.
  • the strobe signal across it is Vp 2VD. It is clear that RMS selection with AC pulse signals may just as well be employed.
  • the components within the respective X- and Y-decoder subsystems 13 and l5 have their own internal sources of power which are referenced to the common nodes of the respective subsystems and so float with respect to ground ⁇
  • the simplest arrangement for this would involve a DC battery for each component within the subsystems, or alternatively, one battery for each subsystem to be shared by all components within the subsystem.
  • the DC power for these subsystems could readily emanate from other sources, such as an AC source, so long as proper isolation is afforded to cause this DC power to float with respect to the square wave biases ori the common nodes thereof.
  • a selection system for producing alternating drive waveforms with substantially zero net direct voltage content across the display cells of a matrix display comprising:
  • first drive circuit means for sequentially providing one part of said alternating drive waveforms applied to each of the respective display terminals of one axis of said matrix display, said first drive circuit means including means to provide unipolar pulses and means coupled to said means to provide unipolar pulses to selectively invert said unipolar pulse to provide a first bipolar pulse train having a given direct voltage component, and
  • second drive circuit means for providing the other part of the said alternating drive waveforms applied to the display terminals of the other axis of said matrix display
  • Said second drive circuit means including means to provide unipolar pulses for selected ones of said display terminals of the said other axis of said matrix display and means coupled to said means to provide unipolar pulses to selectively invert said unipolar pulses to provide a second bipolar pulse train having said given direct voltage component and having pulses in synchronism with and of opposite phases from the pulses of said first bipolar pulse train, said opposite phase bipolar pulses acting to provide the said alternating drive waveforms with substantially zero net direct voltage content across selected ones of the said display cells of said matrix display with the combined arnplitudes of said opposite phase bipolar pulses being sufficient to excite said selected ones of the display cells of said matrix display.
  • reference signal means are coupled to at least one of said first and second drive circuit means so that at least one of said first and second bipolar pulse trains is superimposed upon the reference signals from said reference signal means to form a composite bipolar pulse train signal such that the voltage levels exhibited by said composite bipolar pulse train signal are greater that the voltage levels exhibited by said unipolar pulses in said first and second drive circuit means.
  • said means to selectively invert the said unipolar pulse trains in said first and second drive circuit means each include means to provide a binary level voltage waveform and binary level logic circuit means responsive to said binary level Voltage waveform to invert the said unipolar pulses therein in dependence upon the logic level of said binary level voltage waveform.
  • first drive circuitry means for producing strobe signals for sequentially strobing the lines of one axis of said matrix display
  • said first drive circuitry means including logic gate means associated with each line of said one axis of said matrix display and signal means for providing both a strobe select signal and a strobe square wave signal in synchronism therewith to said logic gate means so as to cause said strobe select signal to be logically inverted in dependence upon the logical level of said strobe square wave signal
  • each of said first drive circuitry logic gate means and signal means having its common node commonly connected to one another to form a common node for all of said first drive circuitry means
  • second drive circuitry means for produci ng information signals for selective lines of the other axis of said matrix display
  • said second drive circuitry means including logic gate means associated with each line of said other axis of said matrix display and signal means for providing both an information select signal and an information square wave signal in synchronism therewith to said logic gate means so as to cause said information select signal to be logically inverted in dependence upon the logical level of said information square wave signal
  • each of said second'drive circuitry logic gate means and signal means having its common node commonly connected to one another to form a common node for all of said second drive circuitry means
  • reference square wave generator means coupled to the said common node of at least one of said first and second drive circuitry means so as to cause at least one of said logically inverted strobe and information select signals to be superimposed upon the reference square wave signals produced by said reference square wave generator means so as to provide composite signals thereby and said AC drive waveforms across the display cells of said matrix display.
  • reference square wave generator means producing said complementary reference square wave signals and said signal means of said first and second drive circuitry means producing said strobe and infomation square wave signals each act to produce signals having a frequency greater than the frequency of the said strobe and information select signals produced by the said signal means so that the AC drive waveform selection signals produced across the display cells of said matrix display comprise AC pulses over a strobe interval.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)
US429459A 1973-12-28 1973-12-28 Selection system for matrix displays requiring AC drive waveforms Expired - Lifetime US3911421A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
US429459A US3911421A (en) 1973-12-28 1973-12-28 Selection system for matrix displays requiring AC drive waveforms
FR7441626*A FR2256588B1 (enrdf_load_stackoverflow) 1973-12-28 1974-10-30
JP49137808A JPS5099437A (enrdf_load_stackoverflow) 1973-12-28 1974-12-03
GB53274/74A GB1489435A (en) 1973-12-28 1974-12-10 Matrix display device
DE19742459723 DE2459723A1 (de) 1973-12-28 1974-12-18 Verfahren und anordnung zum betrieb einer bildanzeigevorrichtung aus matrixartig angeordneten lichtemittierfaehigen zellen

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US429459A US3911421A (en) 1973-12-28 1973-12-28 Selection system for matrix displays requiring AC drive waveforms

Publications (1)

Publication Number Publication Date
US3911421A true US3911421A (en) 1975-10-07

Family

ID=23703343

Family Applications (1)

Application Number Title Priority Date Filing Date
US429459A Expired - Lifetime US3911421A (en) 1973-12-28 1973-12-28 Selection system for matrix displays requiring AC drive waveforms

Country Status (5)

Country Link
US (1) US3911421A (enrdf_load_stackoverflow)
JP (1) JPS5099437A (enrdf_load_stackoverflow)
DE (1) DE2459723A1 (enrdf_load_stackoverflow)
FR (1) FR2256588B1 (enrdf_load_stackoverflow)
GB (1) GB1489435A (enrdf_load_stackoverflow)

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4040721A (en) * 1975-07-14 1977-08-09 Omron Tateisi Electronics Co. Driver circuit for liquid crystal display
US4048633A (en) * 1974-03-13 1977-09-13 Tokyo Shibaura Electric Co., Ltd. Liquid crystal driving system
US4050064A (en) * 1975-05-14 1977-09-20 Sharp Kabushiki Kaisha Four-level voltage supply for liquid crystal display
US4060802A (en) * 1975-06-24 1977-11-29 Tokyo Shibaura Electric Co., Ltd. Driving circuit for a liquid crystal display device
US4097856A (en) * 1976-10-04 1978-06-27 International Business Machines Corporation Gas panel single ended drive systems
US4370647A (en) * 1980-02-15 1983-01-25 Texas Instruments Incorporated System and method of driving a multiplexed liquid crystal display by varying the frequency of the drive voltage signal
US4380008A (en) * 1978-09-29 1983-04-12 Hitachi, Ltd. Method of driving a matrix type phase transition liquid crystal display device to obtain a holding effect and improved response time for the erasing operation
US4393379A (en) * 1980-12-31 1983-07-12 Berting John P Non-multiplexed LCD drive circuit
US4465999A (en) * 1976-06-15 1984-08-14 Citizen Watch Company Limited Matrix driving method for electro-optical display device
US4496219A (en) * 1982-10-04 1985-01-29 Rca Corporation Binary drive circuitry for matrix-addressed liquid crystal display
US4638310A (en) * 1983-09-10 1987-01-20 International Standard Electric Company Method of addressing liquid crystal displays
US4728947A (en) * 1985-04-03 1988-03-01 Stc Plc Addressing liquid crystal cells using bipolar data strobe pulses
US4795248A (en) * 1984-08-31 1989-01-03 Olympus Optical Company Ltd. Liquid crystal eyeglass
US4929870A (en) * 1984-06-05 1990-05-29 Lohja Ab Oy Method for the transmission of control signals to the row drive circuits in the control of thin-film electroluminescent displays
US5111319A (en) * 1987-07-21 1992-05-05 Thorn Emi Plc Drive circuit for providing at least one of the output waveforms having at least four different voltage levels
US5448383A (en) * 1983-04-19 1995-09-05 Canon Kabushiki Kaisha Method of driving ferroelectric liquid crystal optical modulation device
US5933203A (en) * 1997-01-08 1999-08-03 Advanced Display Systems, Inc. Apparatus for and method of driving a cholesteric liquid crystal flat panel display

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3061528D1 (en) 1979-03-13 1983-02-10 Nat Res Dev Analogue displays
FR2580110B1 (enrdf_load_stackoverflow) * 1985-04-04 1987-05-29 Commissariat Energie Atomique

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3824580A (en) * 1972-10-10 1974-07-16 Ibm Gas panel matrix driver

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3824580A (en) * 1972-10-10 1974-07-16 Ibm Gas panel matrix driver

Cited By (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4048633A (en) * 1974-03-13 1977-09-13 Tokyo Shibaura Electric Co., Ltd. Liquid crystal driving system
US4050064A (en) * 1975-05-14 1977-09-20 Sharp Kabushiki Kaisha Four-level voltage supply for liquid crystal display
US4060802A (en) * 1975-06-24 1977-11-29 Tokyo Shibaura Electric Co., Ltd. Driving circuit for a liquid crystal display device
US4040721A (en) * 1975-07-14 1977-08-09 Omron Tateisi Electronics Co. Driver circuit for liquid crystal display
US4465999A (en) * 1976-06-15 1984-08-14 Citizen Watch Company Limited Matrix driving method for electro-optical display device
US4097856A (en) * 1976-10-04 1978-06-27 International Business Machines Corporation Gas panel single ended drive systems
US4380008A (en) * 1978-09-29 1983-04-12 Hitachi, Ltd. Method of driving a matrix type phase transition liquid crystal display device to obtain a holding effect and improved response time for the erasing operation
US4370647A (en) * 1980-02-15 1983-01-25 Texas Instruments Incorporated System and method of driving a multiplexed liquid crystal display by varying the frequency of the drive voltage signal
US4393379A (en) * 1980-12-31 1983-07-12 Berting John P Non-multiplexed LCD drive circuit
US4496219A (en) * 1982-10-04 1985-01-29 Rca Corporation Binary drive circuitry for matrix-addressed liquid crystal display
US6091388A (en) * 1983-04-13 2000-07-18 Canon Kabushiki Kaisha Method of driving optical modulation device
US5696526A (en) * 1983-04-19 1997-12-09 Canon Kabushiki Kaisha Method of driving optical modulation device
US5696525A (en) * 1983-04-19 1997-12-09 Canon Kabushiki Kaisha Method of driving optical modulation device
US5886680A (en) * 1983-04-19 1999-03-23 Canon Kabushiki Kaisha Method of driving optical modulation device
US5841417A (en) * 1983-04-19 1998-11-24 Canon Kabushiki Kaisha Method of driving optical modulation device
US5448383A (en) * 1983-04-19 1995-09-05 Canon Kabushiki Kaisha Method of driving ferroelectric liquid crystal optical modulation device
US5548303A (en) * 1983-04-19 1996-08-20 Canon Kabushiki Kaisha Method of driving optical modulation device
US5565884A (en) * 1983-04-19 1996-10-15 Canon Kabushiki Kaisha Method of driving optical modulation device
US5592192A (en) * 1983-04-19 1997-01-07 Canon Kabushiki Kaisha Method of driving optical modulation device
US5621427A (en) * 1983-04-19 1997-04-15 Canon Kabushiki Kaisha Method of driving optical modulation device
US5831587A (en) * 1983-04-19 1998-11-03 Canon Kabushiki Kaisha Method of driving optical modulation device
US5825390A (en) * 1983-04-19 1998-10-20 Canon Kabushiki Kaisha Method of driving optical modulation device
US5790449A (en) * 1983-04-19 1998-08-04 Canon Kabushiki Kaisha Method of driving optical modulation device
US5812108A (en) * 1983-04-19 1998-09-22 Canon Kabushiki Kaisha Method of driving optical modulation device
US4638310A (en) * 1983-09-10 1987-01-20 International Standard Electric Company Method of addressing liquid crystal displays
US4929870A (en) * 1984-06-05 1990-05-29 Lohja Ab Oy Method for the transmission of control signals to the row drive circuits in the control of thin-film electroluminescent displays
US4795248A (en) * 1984-08-31 1989-01-03 Olympus Optical Company Ltd. Liquid crystal eyeglass
US4728947A (en) * 1985-04-03 1988-03-01 Stc Plc Addressing liquid crystal cells using bipolar data strobe pulses
US5111319A (en) * 1987-07-21 1992-05-05 Thorn Emi Plc Drive circuit for providing at least one of the output waveforms having at least four different voltage levels
US5933203A (en) * 1997-01-08 1999-08-03 Advanced Display Systems, Inc. Apparatus for and method of driving a cholesteric liquid crystal flat panel display

Also Published As

Publication number Publication date
FR2256588B1 (enrdf_load_stackoverflow) 1976-10-22
GB1489435A (en) 1977-10-19
FR2256588A1 (enrdf_load_stackoverflow) 1975-07-25
DE2459723A1 (de) 1975-07-10
JPS5099437A (enrdf_load_stackoverflow) 1975-08-07

Similar Documents

Publication Publication Date Title
US3911421A (en) Selection system for matrix displays requiring AC drive waveforms
US4679043A (en) Method of driving liquid crystal matrix display
US3877017A (en) Method of driving liquid crystal display device for numeric display
US6239781B1 (en) Gray-scale signal generating circuit and liquid crystal display
US20020057244A1 (en) Driver circuit for display device
KR100324580B1 (ko) 표시장치
GB2159656A (en) Liquid crystal display arrangements
JPH01134346A (ja) 強誘電性液晶表示装置及びその駆動方法並びに駆動波形発生方法
EP0358486A2 (en) Method of driving a liquid crystal display
JPH01133033A (ja) 液晶表示装置及びそれを駆動する合成波形発生回路
EP0153172B1 (en) Electrostatic display apparatus
US4263534A (en) Single sided sustain voltage generator
US4278974A (en) Driving system of display
US5200741A (en) Liquid-crystal display apparatus
US4581611A (en) Character display system
US5315315A (en) Integrated circuit for driving display element
CA1087768A (en) Writing and erasing in ac plasma displays
KR100448937B1 (ko) 박막 트랜지스터 액정 표시 장치용 극성제어신호발생회로
KR100300617B1 (ko) 액정표시장치
KR940022149A (ko) 액정 디스플레이 장치
KR900002230A (ko) 매트릭스 표시장치와 매트릭스 표시장치에 공급될 표시데이타를 기억하기 위한 표시데이타 공급회로
US4496219A (en) Binary drive circuitry for matrix-addressed liquid crystal display
JPS6341829A (ja) 液晶表示装置及びその駆動方法
WO1987005429A1 (en) Liquid crystal display having improved electrode drive circuitry
KR930010837A (ko) 한 외부전원으로부터 다계조의 구동전압을 발생할 수 있는 디지탈 소오스 드라이버를 구비한 표시장치용 구동회로