US3286230A - Traffic signal controller - Google Patents

Description

Nov. 15, 1966 N. A. BOLTON 3,286,230

TRAFFIC SIGNAL CONTROLLER Filed July 5, 1963 5 Sheets-Sheet l I FIG. I CROSS STREET vEHICI E I DETECTION I APPARATUS lo I I 9 I [3'5 SPI Ip QSP2 SA I U W fl GSA STREET l l l I sPzfi fj I SPI I 88 I I? --H FIG. 3

VEHICLE EXTENSION PERIODS SP2 "CONT WALK" FLASHING SPI 'DONT wAI I FLASHING SPI DONT WALK" FglNG COUNTER DWELLS INVENTOR N THIS STEP IN ABSENCE OF vEHICI E -BOLTON OR PEDESTRIAN CALL W HIS ATTORNEY 1966 N. A. BOLTON 3,286,230

TRAFFIC SIGNAL CONTROLLER Filed July 5, 1963 5 Sheets-Sheet 4 FUNCTIONAL DIAGRAM FOR "PEDESTRIAN CALL FIG. 4

AUXILIARY COUNTER CYCLE START EXTENSI FOR STEP NOS,I5 AND 9- SEE F|G.3

\ NON-FLASHING SP2 "DONT WALK" INVENTOR. N. A. BOLTON BYFMMJ HIS ATTORNEY Nov. 15, 1966 N. A. BOLTON TRAFFIC SIGNAL CONTROLLER 5 Sheets-Sheet Filed July 5, 1963 z humjmm mm. i m w n9 KO 50$ L X m m E2300 @ZE United States Patent ()fifice 3,286,230 Patented Nov. 15, 1966 3,286,230 TRAFFIC SIGNAL CGNTROLLER Norman A. Bolton, Rochester, N.Y., assignor to The General Signal Corporation, Rochester, N.Y., a corporation of New York Filed July 5, 1963, Ser. No. 293,030 2 Claims. (Cl. 340-36) This invention relates to a highway traflic signal controller, and, more particularly, pertains to an electronic controller in which the operating characteristics can be readily varied electronically and modified by vehicle or pedestrian-initiated controls.

At an intersection of a main street and a cross street, it is frequently desired to maintain the green signal for the main street continuously energized to permit trafiic flow continuously on the main street until one or more vehicles approaches the intersection on the cross street or pedestrians wish to cross the main street at the intersection. Vehicle detection apparatus is normally employed on the cross street approach to the intersection for detecting the presence of a vehicle waiting to enter the intersection from the cross street to provide a green signal for cross street traffic. In addition, manual control may be initiated by pedestrians to provide a time period for operating the cross street walk signals.

It is common practice to employ a motor driven cam shaft having a plurality of cams positioned on the shaft and rotated simultaneously for operation of contacts for controlling the tratiic signals. To maintain the display of the green signal for the main street, the cam shaft is normally maintained in a given one of its positions and is operated therefrom only in response to the detection of one or more vehicles on the cross street. Thereafter, the intermittent detection of vehicles on the cross street may extend the time the cam shaft remains in a position which results in a cross street green signal, but only up to some predetermined maximum, after which the cam shaft is returned to said given position. However, it is a characteristic of such mechanical controllers that the moving parts may become worn during usage or may fail because of frost, rust, dirt, or lack of lubrication.

It is contemplated by the present invention to provide an all-electronic trafiic signal controller having its operating characteristics subject to modification by vehicle or pedestrian-initiated control and which overcomes the mechanical limitations of the motor-driven cam shaft type of system. More specificially, it is proposed herein to provide continuous operation of the green signal for the main street in the absence of both a vehicle and pedestrianinitiated control. In response to the presence of a vehicle or pedestrian-initiated control, however, the controller of the present invention initiates a new signal cycle. During such signal cycle, the controller operates successively to control the tratfic and pedestrian signals for the several different directions of traiiic to display proceed, stop, and clearance indications during different portions of the cycle. Electronic timing means is employed on each portion of the signal cycle to limit the respective time periods of display for signals allotted to the different portions of the signal cycle.

In response to the detection of one or more vehicles, and assuming that such detection occurs when the controller is in its at-rest, or dwell, condition, the controller of the present invention provides an initial green signal display for the cross street and an extension time period for each additional vehicle detected provided that successive vehicles are sufliciently closely time-spaced. In addition, a maximum time period is demarcated for the cross street green signal display; after completion of this maximum cross street green time, additional cross street vehicle detections are incapable of extending the cross street green signal. Any vehicle detection occurring at a time when the controller is not in its at-rest condition is stored for use at such time as the controller has restored itself to the at-rest condition.

In the proposed embodiment, the above-mentioned time periods for operating the trafiic signals are provided by a timing means which includes an electronic stepby-step means capable of cyclic operation through its different steps. In the absence of a vehicle detection or pedestrianinitiated control, the electronic step-by-step means dwells on a given step in which a green signal is displayed for main street traflic movements. However, a cross-street vehicle detection causes the electronic step-by-step means to operate through its difi'erent steps successively, with the time period of each steps, some of the steps being timed to have a predetermined duration and others having a duration dependent upon vehicle detections.

The electronic step-by-step means maybe successively operated through its different steps in response to a pedestrian-initiated control for operating the traffic and pedestrian signals. For the cross street pedestrian signals, an auxiliary electronic step-by-step means capable of cyclic operation is operated through its different steps in accordance with a stored pedestrian-initiated control and, concurrently, the operation of the main electronic step-'by-step means to a selected step thereof. The auxiliary step-bystep means is then operated through a cycle in a time period which is fixed by electronic timing means. During the time period that the auxiliary step-by-step means operates through its several steps, the first-mentioned step-by-step means operates through a given number of its steps over a time period established by the operation of the auxiliary step-by-step means.

The auxiliary stepper demarcates a pedestrian WALK signal independently of the main stepper. Two successive steps of the auxiliary stepper demacrate a continuous pedestrian clearance interval which may be provided by a flashing DONT WALK signal. The circuit logic is arranged in such manner that the first of these two steps must terminate simultaneously with that step of the main stepper upon which vehicle extension intervals may occur, i.e. the step immediately following the one which demarcates the initial interval. Following this, the main and auxiliary steppers both demarcate steps of equal length, the one demarcated by the main stepper being for the cross street amber signal and the one by the auxiliary stepper being for the remainder of the flashing DONT WALK signal. In this way, it is assured that the clearance periods for both the vehicle and pedestrian signals terminate simultaneously even though separate steppers are employed.

It is further contemplated in the proposed embodiment that the time periods allotted to vehicle on the artery and on the cross street can be controlled from a remote control station over a communication channel so that signalling at the intersection may be coordinated with one or more adjacent intersections. A system of control for so operating the present traflic signal controller may be of the type shown and described in the pending application Ser. No. 239,714, filed on November 23, 1962 by J. H. Auer, Jr., et al.

Thus, one object of this invention is to provide a traflic signal controller including electronic step-by-step means which is maintained on a given step until transferred, in response to a vehicle or pedestrian-initiated control, through successive steps where the elapse of time on each such successive step is electronically variable.

Another object of this invention is to provide a trafiic signal controller including electronic step-by-step means which is maintained on a given step for one or more successive extension time periods each occurring in response to a vehicle detection up to a maximum elapsed time interval which is variable electronically.

Another object of this invention is to provide a traffic signal controller in which the pedestrian clearance intervals and vehicle clearance for cross street trafiic movement are electronically variable to terminate concurrently.

Another object of this invention is to provide a traffic signal controller including electronic means, operable step-:by-step through a plurality of steps, where the elapse of time on each step is electronically variable and where the elapse of time on given steps is a minimum in response to a vehicle detection or pedestrian initiated control.

Another object of this invention is to provide an allelectronic semi-actuated trafiic signal controller which is readily varied electronically for each of a plurality of diverse operating conditions without the use of moving parts.

Other objects, purposes and characteristic features of this invention will be in part obvious from the accompanying drawings and will in part be pointed out as the description of the invention progresses.

In the description of the invention which follows, reference will be made to the accompanying drawings in which:

FIG. 1 is a diagrammatic illustration of a typical intersection having pedestrian and traflic signals which may be controlled by the controller of this invention;

FIGS. 2A and 2B when placed with FIG. 23 to the right of FIG. 2A illustrates diagrammatically and in block diagram form one embodiment of this invention;

FIG. 3 is a polar diagram illustrating a typical sequence of operation of the signals of FIG. l'for a plural- .ity of vehicle extension periods;

FIG. 4 is a partial polar diagram illustrating one typical sequence of operation of the traflic signals and pedestrian signals for the cross street; and

FIG. 5 is a diagrammatic illustration showing in detail a portion of the circuits illustrated in FIGS. 2A and 2B.

Referring now to FIG. 1, a typical intersection having a main street and a cross street is shown with related signals being diagrammatically illustrated. For purposes of discussion herein, the main street may be referred to as phase A having the trafiic signals designated SA, while the cross street may be referred to as phase B having the traflic signals designated SB. Pedestrian signals SP1 and SP2 are located as diagrammatically illustrated. Vehicle detection apparatus 9 includes detectors positioned relative to the cross street so as to detect vehicles appearing in the respective detection zones desinated 10.

It is contemplated that the intersection diagrammatically illustrated in FIG. 1 be of the type employing semiactuated control. By semi-actuated control is meant a system wherein a vehicle detection apparatus is employed on the cross street approaches to the intersection, and the length of time that a green signal is displayed to traffic travelling in such direction is a function of the number of vehicles detected, varying from some minimum value when there is but one vehicle waiting for a green signal up to a maximum when a substantially unbroken stream of trafiic seeks to enter the intersection from the cross street direction. Alternatively, the semiactuated control may be provided by pedestrian control by means of a pedestrian-actuated push-button, for example, to provide a red signal display for main street trafiic and thereby permit pedestrian passage across the main street for a predetermined length of time.

The trafiic signal controller herein will normally pre sent a green signal to the main street flow of trafiic continuously until either a vehicle is detected on the cross street approach to the main street or a pedestrian control is initiated. In response to a vehicle detection, the controller of this invention will operate the trafiic signals only for providing a green signal display to cross street traflic. The absence of a pedestrian-initiated control with a vehicle detection causes the pedestrian signals to continue to display the DONT WALK signal for main street pedestrian movement. In response to a pcdestrian-initiated control, the controller of this invention will operate the pedestrian WALK signals for permitting pedestrian movement across the main street for a predetermined time interval and will cause the green traflic signal for cross street trafiic movement to be simultaneously displayed in the absence of a vehicle detection. The successive detection of vehicles as generally described above provides extension periods up to a maximum time period for operating the green traflic signal for cross street trafiic movement. It is contemplated herein that this maximum time period for vehicles is of a longer time duration than the maximum time period for operating the pedestrian Walk signals. However, it should be understood that these time periods are relatively variable as desired.

Referring now to FIGS. 2A and 2B, each of the trafiic signals SA and SB illustrated in FIG. 1 are shown to include conventional proceed, stop and trafiic clearance signals labeled respectively G, R and Y. The pedestrian signals SP1 and SP2 are illustrated with each including a WALK-DONT WALK signal display.

The traific signals and pedestrian signals for both phase A and phase B are operated in response to outputs derived from different steps of a step-by-step ring counter circuit 13. More specifically, circuit 13 includes steps Nos. l9 designated respectively 20-28. When ring counter circuit 13 is on one of these steps 20-28, certain of the vehicular and pedestrian signals are operated. In this connection, a typical sequence of operation is illustrated by the polar diagram of FIG. 3 for these steps Nos. 1-9 Where a plurality of cross street vehicles are assumed to be detected in sequence. In describing the invention hereinafter, reference will be made to the polar diagram of FIG 3 relative to the steps Nos. 19 of circuit 13.

Each of the steps 20-28 is coupled to the next, successive step through an AND gate respectively designated 3038. Each such AND gate controls the transfer of operation between the respectively adjoining steps. Each AND gate has two inputs; one of the two inputs is supplied by the previous step such as the input supplied to AND gate 31 from step 20, and the second of the two inputs is supplied thereto from a pulsing circuit 42. The pulsing circuit 42 provides an output which is applied to each of the AND gates 3038 at a specific time as governed by the operation of a timing circuit 43. Upon receiv ing an input from timing circuit 43 pulsing circuit 42 partially gates all the AND gates 3038 but only the paricular AND gate then receiving an input from the immediately preceding step operates such particular step to its abnormal state.

Timing circuit 43 provides an output signal following a timing interval initiated by the application of an output derived from an operating step through a separate electronic timing circuit. Each of the steps 2028 except step 21 has its output connected to timing circuit 43 through a variable resistor, these resistors being designated respectively 50, 52, 53, S4, 55, 56, 57, 58 and 59. It is noted that resistors 56 and 57 are associated with step 26 and selected for use by means of switch 60. The function of each such resistor is to demarcate a time period starting from the time that ring counter 13 is operated to the particular step associated with such timing resistor and extending until the desired next stepping operation of ring counter 13. in this connection, each such resistance value may be different so as to establish diiferent minimum and maximum time intervals for the diiierent steps for operating timing circuit 43.

The output from step 21 is applied to circuit 43 through an AND gate 62. AND gate 62 is a three-input AND gate, each input of which must be applied concurrently in order to provide an output for application to circuit 43. As shown in FIG. 2, energy is applied through a switch 65 and this energy comprises one input to the AND gate 62. Step 21 when operating supplies a second input to the AND gate 5'2. The third input to AND gate 62 is supplied in response to receiving a cross street vehicle or pedestrian-response from OR gate 69 in a manner to be presently described. Thus, in the absence of the third input to AND gate 62, the ring counter circuit 13 dwells on step 21.

While the ring counter circuit 13 dwells on step 21, an output derived therefrom causes the operation of the green signal for phase A trafhc movement and the red signal for phase B traffic movement, while additionally causing the operation of the WALK signal display for cross street pedestrian movement and the DONT WALK signal display for main street pedestrian movement. More specifically, the output from step 21 is supplied over wire a to a matrix selection 75 from which it is selectively connccted to operate the trafiic signals through signal control circuits 76 and 77 and the pedestrian signals SP1 and SP2. Matrix selection 75 may be, for example, a conventional diode matrix. The signal control circuits 76 and 77 may, for example, include silicon control rectifier circuits as shown and described in the pending application, Ser. No. 283,105 filed on May 24, 1963 by N. A. Bolton et al.

The vehicle detection apparatus 9 illustrated in FIG. 1 includes vehicle relay VR shown diagrammatically in FIG. 2A which is normally energized, but dropped away for indicating each vehicle detection. One such vehicle relay may be employed with the vehicle detection apparatus for each of the vehicle detection areas 10. A vehicle memory flip fiop 67 is responsive to the dropped away condition of relay VR through its contact 68 to set the hip-flop 57 to its abnormal condition in which an output is derived and applied through an OR circuit 69 to the third input of AND gate 62. The three inputs to AND gate 62 occurring simultaneously then function to permit the timing circuit 43 to provide an output immediately which causes ring counter circuit 13 to operate to its next step 22.

Ring counter circuit 13 operates through its steps 22-24 successively and remains on each step according to the time period set by respective electronic timing circuits including resistors 52, 53 and 54. While on step 22, an output is taken therefrom and applied over wir 12 by matrix seiection 75 and the signals for operating th phase A green traihc signal and flashing the DONT WALK pedestrian signal SP1 as indicated by step No. 3 in the polar diagram of FIG. 3.

While counter 13 is operating on step 23, an output is applied from step 23 over wire 0 and through matrix selection 75 for operating the phase A amber clearanc signal and flashing the DONT WALK pedestrian signals SP1. This time period is indicated on the polar diagram of FIG. 3 as step No. 4.

The ring counter circuit 13 when operating on step 24 supplies a signal over wire d and through matrix selection 75 to operate the phase A and phase B red or stop trafi'lc signals and the DONT WALK pedestrian signals SP1 and SP2. This time period is indicated on the polar diagram of FIG. 3 as step No. 5.

Following the time period of operation on step 24 of circuit 13, step 25 is initiated into operation and operates for a time period as determined by its corresponding electronic timing circuit including variable resistor 55. During the operation of ring counter circuit 13 on step 25, an output is supplied over wire e and through matrix selection 75 to operate the phase B green trafiic signal for an initial time period and the DONT \VALK pedestrian signal SP2. This time period is indicated on the polar diagram of FIG. 3 as step No. 6 and is of sufficient duration to permit a single vehicle to pass through the intersection.

Following the operation of ring counter circuit 13 on step 25, it operates to step 26 on which step it may operate to provide extension periods for detected vehicles on the cross street. Each extension period represents a time period during which the detected vehicle can proceed through the intersection from the cross street as permitted by the phase B green signal. The polar diagram of FIG. 3 shows five such vehicle extension periods, each such extension period occurring during the time that ring counter circuit 13 is on its step 26. In addition, the DONT WALK pedestrian signal SP2 is operated.

The ouptut from step 26 is applied to a timer 70 as a START input through a variable resistor 72. Timer 70 is operated by the START input for a time period which represents the extension time period as determined by the resistance setting of resistor 72, and this time period is suificient for one cross street vehicle to traverse the intersection. Each subsequently detected vehicle resets timer 79 by causing a resetting input pulse to be applied through back contact 73 of vehicle relay VR. If, however, no additional vehicles are detected, timer 70 times out its predetermined interval at the end of the extension time period and supplies a CANCEL signal to memory flip-flop 67 for operating the flip-flop 67 to 'a normal condition.

Flip-flop 67 in its normal condition provides a NO VEHICLE SIGNAL which is supplied to AND gate 74. The purpose of AND gate 74 is to provide an output to timing circuit 43 only if three inputs are simultaneously applied thereto, one input being from step 26 when ring counter circuit 13 is operating thereon, a second input being the NO VEHICLE SIGNAL from flip-flop 67, and a third input being supplied from either of two steps of ring counter circuit 78 as will be described hereinafter.

For repeated detections of successively appearing vehicles having a time spacing less than the interval timed by timer 70, this timer is unable to provide its output CANCEL signal to flip-flop 67 since the detection of each successive vehicle causes timer 70 to be reset. Ring counter circuit 13 is then maintained on step 26 for a maximum time period determined by the setting of either resistor 56 or resistor 57 (selected by switch 69) connecting the output of step 26 to timing circuit 43. The maximum time period set by resistor 56 or resistor 57 may be sufiicient, for example, to permit ten closely-spaced vehicles through the intersection from the cross street.

Switch may be controlled from a remote position to select either resistor 56 or resistor 57 for operation with the output of step 26. The resistors 56 and 57 may have different resistance settings to permit the time period dur ing which ring counter circuit 13 remains on step 26 to be either of two maximum time periods wherein the number of possible vehicle extension periods is different.

If only a small number of closely-spaced vehicles is detected during the cross street green period, thereby providing only several vehicle extension periods as indicated by the polar diagram of FIG. 3, timer 70 will be permitted to time out, whereby the flip-flop 67 is operated to its normal condition and provides the NO VEHICLE SIGNAL to AND gate 74. With an input now being supplied 'as one input to AND gate 74 from step 92 of ring counter 78 (in which step this particular counter norm-ally dwells), through OR gate 98, and a third input being received from step 26 of ring counter circuit 13, an output is obtained from AND gate 74 and supplied over wire g to timing circuit 43 for causing operation of ring counter circuit 13 to step 27.

While ring counter circuit 13 is on step 27, an output is supplied to timing circuit 43 over wire it and through resistor 58 for determining the time period of operation of circuit 13 on step 27. The output from step 27 also operates the phase B amber or clearance traiiic signal and the DONT WALK pedestrian signal SP2 through matrix selection 75. This time period is shown on the polar diagram of FIG. 3 as step No. 8.

When timing circuit 43 operates ring counter circuit 13 to step 28 an output is supplied to AND gate 83 which then is concurrently a receiving second input from the dwell step 93 of ring counter circuit 78. Since both inputs to AND gate 83 are fulfilled, an output is provided over wire i to timing circuit 43 to advance counter 13 to step 29. During the time period that ring counter circuit 13 is on step 28, an ouput therefrom Operates the phase A and phase B stop signals as well as the DONT WALK for the pedestrian sign SP1 and SP2. This is indicated as the all red wait period on step No. 9 in the polar diagram of FIG. 3.

When ring counter circuit 13 operates to step 20 wherein the phase A-green time period is demarcated as determined by the resistance setting of resistor 50. During this time period, the WALK pedestrian signal SP1 is operated by the output from step 29 supplied over Wire j to matrix selection 75 and signal SP1. These operations occur during the time period indicated on the polar diagram of FIG. 3 as step No. 1.

The ouput from step 26 is supplied also through the switch 109 which, in the second of its positions, causes resisitor 59 to be shunted out of the circuit. The purpose of switch 109 is to provide a remote control whereby the phase A-green time period is reducible to a minimum time period when desired. In either position, however, the output of step 20 is supplied to the timing circuit 43 which operates the ring counter circuit 13 from 'step 20 to step 21 where it dwells in the absence of a vehicle or pedestrian call indication.

In accordance with the preceding description, AND gate 62 received an input from OR gate 69 in response to a cross street vehicle detection. Alternatively, AND gate 62 may receive an input from this same OR gate 69 in response to a pedestrian push-button activation, and this, too, will cause ring counter 13 to leave its dwell step 21 and step through a complete cycle of operation. Thus, when pedestrian control button 80 is actuated by a pedestrian, a SET signal is applied to pedestrian memory flip-flop 82 which is thereby operated to an abnormal condition. In such abnormal condition, an output signal from flip-flop 82 is supplied through OR gate 69 and to AND gate 62 for its third input signal as mentioned above. AND gate 62 then supplies an output to timing circuit 43 to operate counter 13 to step 22. The ring counter circuit 13 then operates through its steps 22-24 and to step 25 for the different time periods as described above. At the moment that AND gate 35 provides an output to operate ring counter circuit 13 to step 25, an input signal is also supplied to AND gate 85. Since AND gate 85 is then concurrently receiving an input from flip-flop 82, gate 85 supplies to a timing circuit 84, controlling this timing circuit so that it, in turn, will cause pulsing circuit to provide an output to the several stages of ring counter 78.

Ring counter circuit 78 includes four steps indicated as W, I, F and X designated respectively 90, 91, 92 and 93. Each of the steps 90, 91 and 92 has its output connected to timing circuit 84 through a variable resistor, these resistors respectively being designated 95, 96 and 97. Step 93, however, does not have its output connected to timing circuit 84 so that counter 78 normally dwells on step 93. Therefore, the first input pulse from pulsing circuit operates counter 78 from its dwell step 93 to step 90.

During the time period that ring counter circuit 78 is on step 90 thereof as determined by the setting of resistor 95, an output is supplied through matrix selection 75 to operate the WALK signal display of pedestrian signal SP2. When ring counter 78 operates to step 91, an out put is obtained from step 91 thereof and supplied through matrix selection 75 to operate the DONT WALK pedestrian signal SP2 in a flashing manner and thus provide a pedestrian clearance interval. At the termination of this clearance interval, as determined by the magnitude of timing resistor 96, timing circuit 84 and pulsing circuit 83 together operate ring counter circuit 78 from step 91 to step 92. On step 92 of ring counter 78, an input signal is applied to matrix sel ction 75 which acts to control the pedestrian signals SP1 and SP2 in the same manner as on step 91 of the same counter 78. In other words, on step 92 as well as on step 91, the pedestrian signal SP2 is controlled to display a flashing DONT VJALK signal.

The length of time that counter 78 remains on step 92 is determin d by the magnitude of the associated timing resistor 97 At the end of the interval demarcated by timing circuit 84, pulsing circuit 88 is controlled to supply a pulse to counter 78 which advances this counter from step 92 to its last step 93 in which is dwells. Resistor 97 is shown in FIGS. 2A and 213 as being ganged with resistor 58 which is associated with step 27 or" ring counter 13. For reasons which will be apparent later, these two resistors are ganged so that the adjustment of their values will occur simultaneously to ensure that the length of time that counter 13 remains on step 8 will be substantially identical with the length of time that counter 78 remains on step 92.

When a pedestrian call is stored in the system, it is immaterial whether a vehicle call is then also being stored insofar as operation of counter 13 is concerned since, in any event, the storage of a pedestrian call will produce an output from OR circuit 69 so as to operate counter 13 from its dwell step 21 and thus initiate a complete cycle of operation. Of course, the storage of a pedestrian call also acts to initiate operation of ring counter 78 once counter 13 operates to step 25 since, at such time, AND circuit will be receiving one input from the pedestrian memory flip-flop 82 and another input from AND gate 35 of counter 13 so that an output will be obtained from the AND circuit 85 and applied to timing circuit 84 associated with ring counter 78.

Depending upon the number of vehicles on the cross street seeking to cross the artery, the amount of time which must be provided in the signal cycle to accommodate the cross-street traflic may be either less or greater than the amount of time which is allotted to the pedestrian WALK signal. For example, if only one crossstreet vehicle is awaiting a clear signal in order to cross the artery, only one extension interval will be required when counter 13 operates to step 7, and this one extension interval timed by the time 70, when added to the initial interval timed by step 6 of counter 13 will still ordinarily be substantially less than the predetermined amount or" time which is accorded to a WALK signal for pedestrian signal SP2. To take care of this situation, the cross street vehicular signal is controlled to continue the display of a proceed indication, even though no additional vehicles are detected, until the termination of the pedestrian WALK signal and also a subsequent pedestrian clearance signal represented by a flashing DONT WALK signal. This is accomplished by maintaining counter 13 on step 7 until such time as counter 78 operates from step 91 to step 92. To accomplish this, AND gate 74 is provided with three inputs, and to fulfill these three inputs counter 13 must be on step 26, timer 7% must have timed out to thereby restore vehicle memory flipflop 67 to its normal, no-vehicle condition, and counter 78 must have progressed in its stepping operation to the point where it is on step 92 so that an output can be obtained from OR gate 98. Under the set of circumstances described, the last of these conditions to be fulfilled is the operation of counter 78 to step 92; in efiect, therefore, the operation of counter 13 to step 27 occurs substantially simultaneously with the operation of counter 78 to step 92. Once in these respective conditions. counters 13 and 78 time identical intervals in view of the gauging of timing resistors 58 and 97. Counter 78.

9 on step 92, controls signal SP2 to display a flashing DONT WALK signal just as to step 91; whereas counter 13 on step 27, controls the cross street vehicular signal to display a caution or clearance signal.

Both these signals terminate simultaneously as counter 13 operates to step 28 and counter 17 operates to step 93, since counter 13, on step 28, supplies an output to matrix selection 75 which controls all of the vehicle signals to display a red aspect; whereas counter 78, on step 93, controls both pedestrian signals SP1 and SP2 to display non-flashing DONT WALK signals.

In the event that a substantial number of vehicles are detected so that timer 7 6 does not have an opportunity to time out, then counter 78 will operate to its dwell step 93 and supply an input through OR gate 98 and AND gate 74 prior to the time that a no-vehicle signal is supplied to this AND gate 74 from the vehicle memory flip-flop 67. Under these circumstances, the transfer of operation of counter 13 from step 26 to step 27 is necessarily delayed until a no-vehicle signal is obtained from flip-flop 67. Of course, if a continuous stream of vehicles on the cross street is detected, then it may well be that a Ito-vehicle signal will not be obtained at all from flip-flop 67 prior to the time that the maximum interval is timed out by timing circuit 43 and the associated timing resistor 56. In either event, a non-flashing DONT WALK signal will be provided by pedestrian signal SP2 prior to the time that an amber signal is displayed by the cross-street traffic signal since the pedestrian clearance signal will start as soon as counter 78 operates to step 91 after a predetermined amount of time on step 90.

The ring counter circuit 78 also includes AND gates 100, 101, 102 and 163 respectively associated with steps 90, 91, 92 and 93. These AND gates 1913-1133 are employed respectively to transfer operation between the respective stages 90-93 in the manner described for ring counter circuit 13. In addition, the output from AND gate 101 is supplied to flip-flop 82 as a CANCEL signal and is employed for the purpose of resetting flip-flop 82 after it has been operated to an abnormal condition by an input initiated by pedestrian control and after counter 78 has operated through a complete cycle.

It is noted that an input is supplied to AND gate 62 through switch 65, while the output from step 26 is applied to timing circuit 43 through resistor 56 or resistor 57 and switch 119. In the second position of each of these switches 65 and 110, connection may be made to a system such as described in the pending application Ser. No. 239,714 mentioned above for providing so-called background signals for altering the operation of the controller even though vehicle detection or pedestrian-initiated control is provided. For example, switch 65 in its second position prevents AND gate 62 from providing an output even though it is receiving an input from step 21 and either flip-flop 67 or 82 until the background signal is applied through switch 65. In a similar manner, a background signal supplied through switch 119 may be employed to either shorten or lengthen the time interval during which ring counter circuit 13 operates on its step 26. As shown and described in the above mentioned pending application Ser. No. 239,714, the purpose of the background signals is to permit uninterrupted flow of traffic on the main street having a number of intersections with cross streets.

In FIG. 5, detailed circuitry for a portion of the block diagram illustration of FIGS. 2A and 2B is shown for the purpose of providing a better understanding of the detailed operation of such block diagram. It is noted here that the general manner of operation of the steps -29 and AND gates 38 of circuit 13 by the timing circuit 43 and pulsing circuit 42 as described above is similar to that disclosed in the above-mentioned pending application Ser. No. 283,105, filed on May 24, 1963 by N. A. Bolton et al. of which I am co-inventor. This manner of operation applies equally as well to circuit 78.

Referring to FIG. 5, it is noted generally that the active elements used in the various circuits illustrated are indicated to be of the solid state type, but it is to be understood that other types of active elements such as vacuum tubes, thyratron tubes, etc. may be employed to accomplish the functions set forth herein.

The ring counter circuit 13 has been described above as including nine steps 20-28. Each such step includes a solid state device generally referred to as a silicon controlled switch hereinafter referred to as a switch. In FIG. 5, switches Q1, Q2, Q3, Q4 and Q5 are illustrated which respectively correspond to steps 29, 21, 22, 2-6 and 28 of ring counter circuit 13; these switches Ql-QS are considered to be typical.

Each of these switches Q1-Q5 includes an anode A, a cathode C, an anode gate AG and a cathode gate CG. The anodes A for the switches Q1-Q5 are connected to through a resistor 118, a PNP type transistor Q6 and switch 45. The cathodes C of the switches Q1-Q5 are connected to ground through respective resistors 1219, 121, 122, 123 and 124. The cathodes C of each of the switches Q1-Q5 is further connected to its cathode gate CG through a resistor 126, each of which is provided for operating stability purposes.

The anode gate AG for each of the switches Q1-Q5 is connected through a diode 127 to its associated AND gate, these AND gates being designated in FIGS. 2A and 23 as 31), 31, 32, 36 and 38. Each such AND gate 30-38 includes a resistor and capacitor. In particular, AND gate includes resistor 1 and capacitor 131. AND gate includes resistor 132 and capacitor 133. AND gate includes resistor 134 and capacitor 135. AND gate includes resistor 136 and capacitor 137. AND gate 38 includes resistor 138 and capacitor 139.

The cathode gate CG of switch Q1 is connected to a circuit including resistor 141), capacitor 141 and diode 142 which together function to apply a positive signal to a cathode gate CG of switch Q1 upon application of energy causing switch Q1 to initially conduct.

Pulsing circuit 42 comprises transistor Q6 and biasing resistors 145 and 146. Transistor Q6 is so biased that it is normally conducting. The function of transistor Q6 when conducting is to supply (-1-) energy to AND gates 3038 and also to the anodes A of the switches included with the steps 2028. Vlhen nonconducting, transistor Q6 functions to remove the (-1-) energy from the anodes A of the switches including with steps 28-28.

Timing circuit 43 is comprised of a unijunction type transistor Q7 having an emitter E and bases B1 and B2. Base B1 is connected through resistor 148 to ground, the positive side of which is connected through a capacitor 150 to the base of transistor Q6 included with pulsing circuit 42. Base B2 is connected to a biasing circuit including resistor 152 and capacitor 153. Capacitor 153 is charged through diode 154 appearing at the positive side of resistor 146 in circuit 42 whenever transistor Q6 is conducting.

Emitter E of transistor Q7 is connected to ground through capacitor 156 and to the cathodes C of the switches included with the steps 20-28 of circuit 13 as suggested in FIGS. 2A and 2B through resistor 158. In particular, FIG. 5 shows emitter E of transistor Q7 connected directly to the cathode C of switches Q1 and Q3 through variable resistors 50 and 52. Emitter E of transistor Q7 is connected to the cathode C of switch Q2 through AND gate 62 which includes diodes 160, 151, 162 and 163. Emitter E of transistor Q7 is further connected to the cathode C of switch Q4 through switches 60 and 110 and either resistor 56 or 57. The emitter E of transistor Q7 is connected to the cathode C of switch Q5 through AND gate 83 including transistor Q8, diode 166 and resistor 167. Diodes 170, 171, 172, 173, 174 and 175 are serially connected in the circuits described above to prevent energy feed-arounds. Each circuit deaasaaso 1 i scribed including one of the resistors functions when effective to charge capacitor 156 depending upon the value of resistance selected in order to raise the potential on emitter E of transistor Q7 to a firing level for causing an output to be supplied by timing circuit 43.

Check circuit 46 includes a PNF type transistor Q9 and resistors 181 181 and 182. The purpose of circuit 46 is to insure that one and only one of the silicon controlled switches included with steps 28 is operated at the beginning of each cyclic operation of circuit 13.

In operation, energy is applied to the system, step 29 initially operates to provide a vehicle minimum green time period for phase A as described with reference to FIG. 3. In particular, capacitor 141 is charged through resistor 140. A positive signal taken from the side of resistor 146 is applied through diode 142 to the cathode gate CG of switch Q1 causing it to conduct. During the conduction of switch Q1, a positive signal is taken from the positive side of resistor 126 and applied through the circuit including switch 109, resistor 59, diode 170 and resistor 158 to the emitter circuit E of transistor Q7 for changing capacitor 156. When the charge on capacitor 156 reaches the firing level of transistor Q7, conduction of transistor Q7 occurs. Capacitor 156 in its base B1 circuit is charged through resistor 145 causing a positive signal to be applied to the base of transistor Q6 cutting this transistor ofi.

Initially, and before any of the switches included with steps 2648 is rendered conductive, the capacitor in each of the gating circuits 30-33 is charged. For example, capacitor 133 is charged through the circuit including resistors 120 and 132.

As switch Q1 conducts, capacitor 133 is discharged inasmuch as there is a voltage drop appearing across resistor 120. Upon the firing of transistor Q7 and subsequent cut off of transistor Q6, the switch Q1 has its a11- ode A supply energy through transistor Q6 interrupted thereby causing switch Q1 to cut off. Capacitor 133 now being substantially discharged is abruptly charged ca-us ing a negative-going signal to he applied through diode 127 to the anode gate AG of switch Q2 causing it to conduct. During the conduction of transistor Q2, an output is taken from the positive side of resistor 121 and applied through diode 161 included with AND gate 62 to cause capacitor 135 included with AND gate 32 to be discharged.

During the conduction of switch Q2, timing circuit 43 remains inactive inasmuch as AND gate 62 prevents positive energy from being supplied through diode 171 and resistor 158 to charge capacitor 156. More specifically, the conduction of transistor Q2 causes diode 161 to be back-biased While energy is applied through switch 65 to the negative terminal of diode 163 for back biasing such diode 163. However, in the absence of a vehicle detection or pedestrian initiated control, the rnemory flip-flop 67 and 82 are in their normal condition each of which causes a negative-going signal to be supplied to AND gate 62 and through the circuit including diode 162 and resistor 185. This circuit causes diode 160 to be back-biased thereby preventing the charging circuit for capacitor 156 to be completed.

The output derived from switch Q2 when conducting is applied through matrix selection 75 to cause the green signal for the main street to be continuously displayed. In addition, .the output from switch Q2 causes the red signal to be displayed for the cross street while causing the WALK signal to be displayed for permitting passenger movement across the cross street. This condition is maintained until a vehicle is detected or a control is initiated by a pedestrian.

The detection of a vehicle causes vehicle memory flipflop 67 to be operated from a normal to an abnormal condition wherein a positive-going output is applied .to AND gate 62 for back biasing diode 162. Diode 162 is thus forward biased to complete the charging circuit for capacitor 156 causing it to be charged very rapidly due to the relatively small resistance of resistor 158 and diode 171. When the charge on capacitor 156 very quickly reaches the firing level of transistor Q7, conduction thereof occurs causing a positive signal to be supplied to the base of transistor Q6 which cuts it oil momentarily. Transistor Q6 being cut 011 removes the anode positive energy supply for switch Q2 cutting it oh. The charging circuit for capacitor is then completed which causes a negative-going signal to be supplied to the anode gate AG of switch Q3 causing it to conduct.

Conduction of switch Q3 continues causing the capacitor 156 to be charged through a circuit including resistor 52 until it reaches the firing level of transistor Q7 which causes it to conduct. Transistor Q6 is again momentarily cut oil? causing the transfer of operation between the switch Q3 and the switch included with step 23. Operation of the ring counter circuit 13 continues in the manner described through the steps 23, 24, 25 and to step 26 with the trafiic signals SA and the pedestrian signal SP1 being operated as described with reference to FIG. 3.

During the conduct-ion of switch Q4 in step 26, a positive-going signal is taken from the side of resistor 123 and applied through resistors 158 and 56 and switches 60 and 110 to charge capacitor 156. It has been suggested that the resistance of either resistor 56 or 57 be adjusted to a value such that a diiIerent number of vehicles are permitted to traverse the intersection from the cross street when selected from a remote location.

On step 26 of ring counter circuit 13, capacitor 156 may be charged by another circuit including only resistor 158 if the number of closely spaced vehicles detected by the vehicle detection apparatus 9 is less than ten. More specifically, the output from switch Q4 is also supplied to timer 70 which as described above is employed to operate flip-flop 67 to a normal condition. If, however, a vehicle is detected causing the vehicle relay VR to be dropped away, ground is connected to timer 70 through back contact 73 of relay VR preventing the timer 76 from supplying the CANCEL signal to flip-flop 67. Pip-flop 67 then remains in its abnormal condition wherein the NO VEHICLE SIGNAL is not supplied.

AND gate 74 functions to complete the charging circuit for capacitor 156 through resistor 158 and diode 174 only when switch Q4 is conducting, the NO VE- HICLE SIGNAL is supplied and the input from either step F or step X of circuit 78 are provided concurrently. AND gate 74 includes diodes 192, 193, 194 and 195. The output from either step F or step X of circuit 98 back biases diode 1-92. The output from switch Q4 of ring counter circuit 13 back biases diode 194. The presence of the NO VEHICLE SIGNAL is employed to back bias diode 193, but the absence of such NO VEHICLE SIGNAL forward biases diode 193 causes current to flow through resistor 197 and diode 193 which causes diode 195 to be back biased. Switch Q4 thus continues to conduct causing the green signal for the cross street to be displayed and the red signal for the main street to be displayed in step No. 6.

The absence of vehicle detection permits timer 70 to provide the CANCEL signal for operating flip-flop 67 to its normal condition wherein the NO VEHICLE SIG- NAL is provided. The application of the NO VEHICLE SIGNAL back biases 193 which causes diode 195 to be forward biased. The charging circuit for capacitor 156 is thus completed with causes the operation of transistor Q7 and Q6 as described and the transfer of operation from switch Q4 to switch Q5.

AND gate 83 causes capacitor 156 to be charged according to the resistance value of resistor 59 provided that switch Q5 is conducting and that a positive-going output is supplied from step X of ring counter circuit 78. More specifically, diode 166 in AND gate 83 is back biased by such positive-going output supplied from step X. The positive-going signal taken from the positive side of resistor 124 is supplied to the base of transistor Q8 through resistor 167 to turn such transistor off. energy is then connected through transistor Qgand resistor 59 to timing circuit 43 for charging capacitor 156 and thus causing operation of transistors Q6 and Q7 for transferring operation between steps 28 and 20 of ring counter circuit 13.

If a pedestrian-initiated control is in effect at the time that ring counter circuit 13 is operating on step 28 while switch Q5 is conducting, diode 166 of AND gate 83 is forward biased by a circuit including resistor 124 and resistor 199. The ring counter circuit 78 is operated on one of the steps 90-92 which permits step 93 to apply a ground signal to diode 166. Until ring counter circuit 78 operates to its step 93, the base of transistor Q8 is coupled to ground potential causing the transistor Q8 to remain cut off. On step 93, however, energy is supplied to the base of transistor Q8 as described above to cause transfer of operation between steps 28 and 20 of ring counter circuit 13.

In employing the background signal as supplied from a centralized communication system, for example, AND gate 62 remains effective to prevent transfer of operation from step 21 to step 22 even though a vehicle is detected or a pedestrian initiated control has been effected. In this respect, the diode 163 is connected by switch 65 t the phase A background signal input and may be back biased even though a vehicle is detected or a pedestrian control is in effect to permit traffic on the main street to be efficiently moved through the signaled intersection. Switch 110 when connected to its input background signal terminal receives an input from the centralized communication system which coordinates the movement of cross street traffic and pedestrian movement with the traffic movement on the main street.

The check circuit 46 is connected between pulsing circuit 42 and ring counter circuit 13 as shown in FIGS. 2A and 5 to insure that a step selected from the steps 20-28 is operated initially at the beginning of each cycle period for circuit 13 and thereafter where a failure of operation occurs for one of the other steps. More specifically, transistor Q9 is normally nonconductive when ositive energy is applied to the anode A circuits of the switches included with steps 20-28 inasmuch as ground is applied to the emitter of the transistor Q9. Capacitor 141 is charged upon application of energy to the circuits as described above and is maintained charged throughout the time such energy is applied. When transistor Q6 is cut off for transferring operation between one switch to the adjacent switch transistor Q9 remains cut off in that both its base and emitter are connectcd to ground potential through respective resistors 182, 118 and 146. If, however, a malfunction occurs such that the adjacent switch does not conduct upon application of positive energy to its anode circuit, transistor Q9 is rendered conductive which causes a positive-going signal to be supplied to the cathode gate CG of switch Q1 through diode 142 causing switch Q1 to conduct. The green signal for main street traffic is then displayed and remains conducting even through a vehicle is detected or a pedestrian control is initiated. If, for example, transistor Q6 malfunctions such that it shorts out, the switch then operating will continue to operate and maintain its corresponding signals energized. Should transistor Q6 open, all switches remain in the their nonconductive conditions. The signal control circuits 76 and 77 then may be effective to operate no signals resulting in a dark display or, alternatively, may operate all of the stop traffic signals.

Both in the specification and the claims, reference is made to a so-called "ring counter." This terminology is intended to cover ring counters of various types, ineluding those which use vacuum tube flip-flop stages,

solid-state bistable state devices, and the like. The term is intended to apply not only to ring counters wherein each stage is directly coupled to the next, but to apply also to ring counter of the type wherein momentarily all of the stages may be restored to their normal state at some point in a complete cycle of operation, with additional circuit means being provided to detect that such a condition exists so as to immediately thereafter operate a selected stage of the ring counter to its active state. Ring counters of this latter type have been devised to ensure that not more than one stage of the counter will at any instant be in its active state, but otherwise the operation is the same as that of the more conventional ring counters in that, in effect, the active stat of a stage is continually being advanced sequentially to the successive stages of the ring counter so that cyclical operation of the counter occurs. Counters of the latter type are disclosed in the GE. Transistor Manual, 6th edition, published 1962, at page 365, figure 19.49.

Having described a traffic signal controller of the semiactuated type for highways as a specific embodiment of the present invention, it should be understood that the embodiment illustrated is considered as being merely typical and that various modifications and alterations may be made to the specific form shown without departing from the spirit or scope of this invention.

What I claim is:

1. A signal controller for controlling the signal indications displayed by vehicular and pedestrian signals at the intersection of a main street and a cross street comprising in combination, an electronic ring counter having a predetermined number of steps and operable from one step to the next sequentially in response to each of a succession of discrete input signals, timing means including a plurality of individually adjustable timing circuit elements selected in turn in accordance with the thenoperated step of said counter, traffic responsive means operated in response to traffic crossing said main street, means responsive to said counter for differently controlling said vehicular signals to provide different combinations of signal indications as said counter is operated to successive steps sequentially, means permitting operation of said counter in response to one of said discrete sigpals from the particular step which controls said vehicular signals to display a proceed indication to main street traffic only when said traffic responsive means has been operated, whereby said stepping means normally dwells on said particular step and thereafter operates through a cycle of operation comprising a plurality of individually timed segments only in response to detection of a vehicle by said traflic responsive means, a second electronic ring counter also having a predetennined number of steps and operable from one step to the next simultaneously in response to each of a succession of discrete input signals applied thereto, said second counter normally dwelling on a selected step but operable between successive steps one at a time sequentially in respouse to respective discrete input signals when once operated from said selected step, counter controlling means including a plurality of individually adjustable timing elements selected on respective steps of said second counter for controlling the time spacing of successive of said discrete signals applied to said second counter, said second counter on each of a plurality of its steps controlling said pedestrian signals to display a different one of a plurality of pedestrian signal indications, a pedestrianactuated switch, and means effective only when said pedestrian switch has been operated to operate said second counter from said second step concurrently with the operation of said first counter to the particular step on which said first counter controls the cross street signals to display a proceed aspect.

2. The signal controller of claim 1 which further includes means for operating both said first and second counters simultaneously to selected steps on which said 15 first counter controls said vehicle signals to display a vehicle clearance indication and said second counter controls said pedestrian signal to display a pedestrian clearance indication, and means for controlling both said first and second counters to remain on said selected steps for equal time periods.

References Cited by the Examiner UNITED STATES PATENTS 2,719,958 10/1955 Jefiers 340-36 Chase 340--38 Barker 34.038

Barker 34036 Brockett 340-36 Hendricks 34041 Hilliker 34036 NEIL C. READ, Primary Examiner.

T. B. HABECKER, Assistant Examiner.

Claims (1)

1. A SIGNAL CONTROLLER FOR CONTROLLING THE SIGNAL INDICATIONS DISPLAYED BY VEHICULAR AND PEDESTRIAN SIGNALS AT THE INTERSECTION OF A MAIN STREET AND A CROSS STREET COMPRISING IN COMBINATION, AN ELECTRONIC RING COUNTER HAVING A PREDETERMINED NUMBER OF STEPS AND OPERABLE FROM ONE STEP TO THE NEXT SEQUENTIALLY IN RESPONSE TO EACH OF A SUCCESSION OF DISCRETE INPUT SIGNALS, TIMING MEANS INCLUDING A PLURALITY OF INDIVIDUALLY ADJUSTABLE TIMING CIRCUIT ELEMENTS SELECTED IN TURN IN ACCORDANCE WITH THE THENOPERATED STEP OF SAID COUNTER, TRAFFIC RESPONSIVE MEANS OPERATED IN RESPONSE TO TRAFFIC CROSSING SAID MAIN STREET, MEANS RESPONSIVE TO SAID COUNTER FOR DIFFERENTLY CONTROLLING SAID VEHICULAR SIGNALS TO PROVIDE DIFFERENT COMBINATIONS OF SIGNAL INDICATIONS AS SAID COUNTER IS OPERATED TO SUCCESSIVE STEPS SEQUENTIALLY, MEANS PERMITTING OPERATION OF SAID COUNTER IN RESPONSE TO ONE OF SAID DISCRETE SIGNALS FROM THE PARTICULAR STEP WHICH CONTROLS SAID VEHICULAR SIGNALS TO DISPLAY A PROCEED INCICATION TO MAIN STREET TRAFFIC ONLY WHEN SAID TRAFFIC RESPONSIVE MEANS HAS BEEN OPERATED, WHEREBY SAID STEPPING MEANS NORMALLY DWELLS ON SAID PARTICULAR STEP AND THEREAFTER OPERATES THROUGH A CYCLE OF OPERATION COMPRISING A PLURALITY OF INDIVIDUALLY TIMED SEGMENTS ONLY IN RESPONSE TO DETECTION OF A VEHICLE BY SAID TRAFFIC RESPONSIVE MEANS, A SECOND ELECTRONIC RING COUNTER ALSO HAVING A PREDETERMINED NUMBER OF STEPS AND OPERABLE FROM ONE STEP TO THE NEXT SIMULTANEOUSLY IN RESPONSE TO EACH OF A SUCCESSION OF DISCRETE INPUT SIGNALS APPLIED THERETO, SAID SECOND COUNTER NORMALLY DWELLING ON A SELECTED STEP BUT OPERABLE BETWEEN SUCCESSIVE STEPS ONE AT A TIME SEQUENTIALLY IN RESPONSE TO RESPECTIVE DISCRETE INPUT SIGNALS WHEN ONCE OPERATED FROM SAID SELECTED STEP, COUNTER CONTROLLING MEANS INCLUDING A PLURALITY OF INDIVIDUALLY ADJUSTABLE TIMING ELEMENTS SELECTED ON RESPECTIVE STEPS OF SAID SECOND COUNTER FOR CONTROLLING THE TIME SPACING OF SUCCESSIVE OF SAID DISCRETE SIGNALS APPLIED TO SAID SECOND COUNTER, SAID SECOND COUNTER ON EACH OF A PLURALITY OF ITS STEPS CONTROLLING SAID PEDESTRIAN SIGNALS TO DISPLAY A DIFFERENT ONE OF A PLURALITY OF PEDESTRIAN SIGNAL INDICATIONS, A PEDESTRIANACTUATED SWITCH, AND MEANS EFFECTIVE ONLY WHEN SAID PEDESTRIAN SWITCH HAS BEEN OPERATED TO OPERATE SAID SECOND COUNTER FROM SAID SECOND STEP CONCURRENTLY WITH THE OPERATION OF SAID FIRST COUNTER TO THE PARTICULAR STEP ON WHICH SAID FIRST COUNTER CONTROLS THE CROSS STREET SIGNALS TO DISPLAY A PROCEED ASPECT.

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