US3250922A - Current driver for core memory apparatus - Google Patents

Description

May 10, 1966 o. D. PARHAM CURRENT DRIVER FOR CORE MEMORY APPARATUS 3 Sheets-Sheet 1 Filed June 12, 1964 Mw/az.

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May 10, 1966 o. D. PARI-IAM CURRENT DRIVER FOR CORE MEMORY APPARATUS 3 Sheets-Sheet 2 Filed June 12, 1964 Vaga May 10, 1966 o. D. PARI-IAM 3,250,922

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United States Patent O 3,250,922 CURRENT DRIVER FOR CORE MEMORY APPARATUS D Parham, Downey, Calif., assiguor to Hughes Aircraft Company, Culver City, Calif., a corporation of Delaware Filed June 12, 1964, Ser. No. 374,697 4 Claims. (Cl. 307-885) This invention relates to a high-speed current driver for inductive load-s and, more particularly, to a current driver including 1a low voltage `constant-current apparatus capable of driving a core memory at high speed.

Typical core memory devices invariably present an inductive load to a driving apparatus employed for sensing purposes. In order to achieve high speed sensing with an inductive load, it has usually been Ifound necessary to employ a high voltage power source to overcome the inductive reactance of the load. The use of a high voltage power supply further complicates the switching problern when it is desired to sense at very rapid rates. In addition, the utilization of a high voltage power supply requires the concommitant use of substantial amounts of direct-current electrical energy which, in some applications, is considered undesirable.

It is therefore a general object of the present invention to p-rovide an improved high-speed current driver for inductive loads. l l

Another object of the present invention is to provide a current driving apparatus including a low-voltage constant-current apparatus for core memories.

Still another object of the present invention is to provide a high-speed current driving apparatus for inductive loads utilizing exclusively solid state devices.

A further object of the present invention is to provide a high-speed current driving apparatus lhaving an output switching transistor capable of developing a driving pulse therea-cross of amplitude larger than the normal collectorytocmitter breakdown voltage thereof.

In accordance with the present invention, a constant current is directed through an inductance to an output terminal and from the output terminal through a switching transistor to ground, the constant current being of sufficient amplitude to normally maintain the switching transistor in a statur'ated state. A voltage limiter is connected to the output terminal to limit the voltage excursion of the driving pulse generated thereat so as to not exceed .the collector-to-base breakdown voltage of the switching transistor. In addition, an enhancement-type diode is connected to the output terminal for the purpose of completely discharging the storage charge accumulated by the switching transistor prior to cutting off current flow therethrough. In operation, current ow through the switching transistor is cut otf whereby the charge accumulated during the period of current conduction is diverted through the enhancement-type diode thereby to allow a voltage greater than the normal em-itter-to-collector breakdown voltage to be developed thereacross by the collapse of current flow through the indUCtOr. A bias is maintained across the load to prevent current ilow through the enhancement-type diode during the sensing period which lis `terminated by allowing the switching transistor to again conduct to saturation.

The above-mentioned and other lfeatures and objects olf this invention and the lmanner of obtaining them will be- 'come more apparent by reference to the following description taken in conjunction with the accompanying drawings, wherein:

FIG. 1 is la schematic circuit diagram of the apparatus of the present invention.

FIG. 2 is the collector characteristic of the switching transistor in the apparatus o'f FIG. l.

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FIG. 3 illustrates the current conduction characteristic of an enhancement-type diode upon changing from aback to a forward Ibias thereacross; and

FIG. 4 illustrates various voltage |and current wave- Iforms in the apparatus of FIG. 1.

Referring now to FIG. 1 of the drawings, there is shown a preferred embodiment of the apparatus of the present invention. This apparatus includes a low voltage constant current apparatus 10 having a power input connected to the positive terminal of a battery 11, the negative terminal of which is referenced to ground. The low voltage constant current apparatus 10 provides la constant current, Il, that is directed through an inductor 12 to an outputjunction 13. The inductor 12 may, for example, have an inductanoe of the order of .80 microhenries. In addition to the above, a' switching transistor 14 includes a collec-tor 15 connected to the output junction 13, an emitter 16 that is referenced to ground, and a base 17 connected to a junction 18 which is, in turn, connected through diodes 19 and 20 to an input terminal 21. The diodes 19, 20 are both poled to allow normal current flow in a direction towards the input terminal 21. The switching transistor 14 is of a low storage variety such as a type designated commercially as ,2N24l0, and the diodes 19, 20 are of a type having the commercial designation of 1N914 lor equivalent. Diodes 19, 20 are connected in series toincrease the forward voltage drop thereacross when no signal is applied thereby to maintain the transistor 14 in a saturated state as will be hereinafter explained. Voltage dropping resistors 22, 23 are connected, respectively, from the positive terminal of the battery 11 to the junction 18, and from junction 18 to the .negative terminal of a battery 24, an intermediate terminal of which is referenced to ground. In particular, resistors 22, 23 have ohmic Values of 300 ohms and 2000 ohms, respectively, and the negative terminal of battery 24 provides a potential .of the order of -3 volts relative to ground. As previously specified, the positive terminal rof battery 11 provides a potential of the order of +10 volts relative to ground whereby the base 17 of transistor 14 is maintained positive by the forward voltage dr-op across the diodes 19, 20 when the input terminal 21 is at zero volts.

Further,` in order to limit thevoltage developed lat the collector 15 of transistor 14 to a potential, for example, of +60 volts relative to ground, the output junction 13 is connected through a diode 2,5 to the positive terminal of a `battery 26, the negative terminal of which is referlenced to ground. In this case, the diode 25 is poled to allow current ow towards the positive terminal of battery 26 which develops a voltage of the order of 60 volts relative to ground. Lastly, an enhancement-type diode 29 is connected to output junction 13 and through a variable resistor 28 to the positive terminal of battery 11 which develops a potential of the order of +10 volts relative to ground. The enhancement-type diode 29 may Abe of a type designated commercially as FD300 and which has current waveforms of the type illustrated in FIG. 3.

Referring to FIG. 3, a current through the enhancement-type diode 29 in the forward direction results in a positive potential voltage drop thereacross which increases proportionately as illustrated by a forward current characteristic 30. A current, I2, flowing through diode 29 in a forward direction develops a voltage drop of the order of V2 volts, as shown in the ligure. Enhancementtype diode 29 is characterized in that upon reversal of the biasv thereacross, a current I3, ows therethrough in the opposite direction for a period, AT, as illustrated by current waveform 31, FIG. 3. In general, the amplitude of current, I3, is characteristic of a particular enhancementtype diode and the time interval, AT, is determined by the forward current, I2, flowing therethrough prior to the ltime biasv -across the diode 29 was reversed. Thus, the

time interval, AT, can be adjusted by means of the variable resistor 28 which determines the forward current ow through enhancement-type diode 29. In order to provide a low impedance path for the reverse current pulse which flows through the enhancement diode 29 upon reversal yof the bias thereacross, a diode 32 is connected from the junction between variable resistor 28 and enhancement-type diode 29 to the positive terminal of the battery 24 which develops of :the order of +2 volts relative to ground.

The high-speed driving current apparatus of the invention is primarily designed t-o drive an inductive load. Accordingly, an inductive load 34, which may comprise an associative memory, is connected to the output junction 13. Inductive load 34 includes networks 351, 352, 351 each of which includes, connected from output junction 13 in the order named, a diode 36, an inductive load 37 constituting a series of corememory elements to be sensed, and a plane switch 38 which in each case is connected to the positive terminal of a battery 40 which provides a bias potential of +4 volts, the negative terminal of which is referenced to ground. The switches '38 Iare, in turn, controlled by a control network 42. In the drawing, the elements 36, 37, 38 have subscripts corresponding to the branch in which they are located. Also, the diodes 361, 362 36n are poled to allow normal current flow in a direction away from the output junction 13.

It is evident that any constant current apparatus may be employed to provide the constant current, I1, directed through inductor 12 of the present invention. lIt is often necessary, however, to generate a constant current from a low voltage source, particularly in circumstances where solid state circuitry is employed. In accordance with the present invention, -the low voltage constant current apparatus has an input junction 50 that is connected to the positive terminal of batter 11 which is maintained at 10 volts relative to ground; an input junction 52 that is connected to the positive terminal of battery 24 which provides a potential of +2 volts relative to ground; and an output terminal 54 that is connected to the inductor 12.

The low voltage constant current apparatus 10 includes a pfn-p transistor 56 including an emitter 57 connected to input junction 50, a base 58, and a collector 59 connected through a resistor 60 to the output terminal 54. The transistor 56 may be any high power silicon or germanium transistor such as, for example, a type designated cornmercially as 2N2696. The ohmic value of resistor 60 is of the order of 10 ohms.

In addition, -a Zener diode 62 is connected to output terminal 54 and through a resistor 63 to the input junction 50. The resistor 63 has an ohmic value of the order of 560 ohms and the Zener diode 62 is of a type which maintains 6 volts thereacross when minimum current ows therethrough. A Zener diode having this characteristic is designated commerically as 1N746A. Also, the low voltage constant current apparatus 10 includes n-p-n `transistors 65, 66 having collectors 67, 68, bases 69, 70,

and emitters 71, 72, respectively, the emitters being connected to ground through a common resistor 73 having an ohmic value vof 82 ohms. The base 69 of transistor 65 is connected to the junction intermediate the Zener diode 62 and resistor 63, and the collector 67 is connected to the base 58 of transistor 56 and through a resistor 78 of ohmic value 1000 ohms to the input junction 50. The

base 70 of transistor 66, on the other hand, is connected to the junction between resistor 70 and collector 59 of transistor 56, and the collector 68 of transistor 66 is connecteddirectly to input junction 50. A resistor 80 of ohmic value 2200 ohms and a diode 81 are serially connected in the order named from the input junction 50 to enhancement-type diode 82 is then connected from the junction intermediate the resistor 80 and the diode 81 to the output terminal 54. The enhancement-type diode 82 is poled in a manner to provide a path for current owing through Zener diode 62 during instants when current ow at the output terminal 54 is interrupted.

In the operation of the low voltage current apparatus 10, a constant potential of 6 volts is developed across the Zener diode 62. This potential is applied to the base 69 of transistor 65, the collector of which is connected to the base 58 of transistor 56, the collector 59 of which is connected to one extremity of the resistor 60. In that the remaining extremity of-Zener diode 62 is connected -the input junction 52, the diode 81 being poled to allow across the resistor 60, the maximum Voltage that may be developed thereacross is limited substantially to the voltage across the Zener diode 62. The enhancement-type diode 82 provides a path for the current flow through Zener diode `62 when the current flow I1, into the inductor 12, is cut off and the potential at output terminal 54 increases above +2 volts relative to ground. In addition, the emitter 72 of transistor 66 is connected directly to the emitter 71 of transistor 65, the base 69 of which is connected to the Zener diode 62. The collector 68 of transistor 66, on the other hand, is connected directly to the positive terminal of battery 11 which develops a potential of +10 volts relative to ground, whereby the base provides current to prevent the voltage developed across resistor 60 from falling below that developed across the Zener diode 62. Thus, in that the voltage across resistor 60 is maintained constant and equal to that developed across the Zener diode 62, it is evident that the current owing through resistor 60 is of constant amplitude. From the foregoing description, it is evident that the voltage requirements of the apparatus 10 may be decreased still further by employing a Zener diode that develops a lower voltage thereacross than that developed by the Zener diode 62.

In the operation of the low voltage high speed current driver of the present invention, the voltage dividing network formed by resistors 22, 23 apply a voltage to the base 17 of transistor 14 to maintain the base 17 positive relative =to the emitter 16 thereof when `the input 21 is maintained at substantially zero volts relative to ground. Under these circumstances, the constant current apparatus 10 develops a constant current, I1, which flows through the inductor 12 and through the transistor 14 to ground. In order to initiate the driving current pulse through the inductive load 34, a control signal having a waveform 50, FIG. 4, which has a negative excursion of -2 volts from 0 volts is applied tothe input 21. During the interval that the control signal of waveform 50 is at -2 volts relative to ground, the junction 18 and, hence, the base 17 of tran- .sistor 14 are pulled negative relative to ground thereby shutting oi current ow through transistor 14.

Referring to FIG. 2, the characteristics 51, 52, 53, 54 and 55 illustrate the collector-to-base breakdown voltage, VCBO, for various collector currents. These breakdown voltages are the maximum voltages at the respective right extremities of the characteristics 51-55, as viewed in the drawing. As is evident from the characteristics 51-55, decreasing values of collector current correspond to increasingly higher collector-to-base breakdown voltages. A transistor, such as transistor 14, conducting in the saturated condition stores a predetermined charge which must be discharged as collector current to achieve maximum build up of voltage thereacross, as illustrated by characteristic 55, FIG. 2. In order to achieve this build up of voltage in the apparatus of the present invention, the interruption of current ow through inductor 12 reverses the bias across enhancement diode 29 which then draws current illustrated by the waveform 56, FIG. 4,

vwhich corresponds to the negative flow of current through enhancement diode 29 shown by waveform 31, FIG. 3. The current through enhancement diode 29 in the forward direction is determined by the variable resistor 28 and,

in turn, controls the width of the waveform 56. The current is adjusted through enhancement diode 29 i-n the forward direction along the characteristic 30, FIG. 3, to a value of I2 which corresponds to a width of the waveform S6 sufiicient to completely discharge the charge stored by transistor 14. In that this current corresponding to waveform 56 fiows through diode 32 to the positive terminal of battery 24 maintained `at +2 volts relative to ground, the initial voltage waveform 58 developed at the load 34 is +2 volts as illustrated by the portion 59 of the waveform 5S. This discharge of the charge stored by transistor 14 is achieved in less than 100 nanoseconds.

After current flow through enhancement diode 29 in the reverse direction has terminated, the rate of change of current decrease through inductor 12 produces a pulse illustrated by portion 60 of waveform 58, FIG. 4, which normally could have a positive excursion of from 80 to 110 volts. In the event the transistor 14 has not been completely turned ofi, the transistor 14 will latch-up, i.e., there will be a breakdown of collector-to-emitter voltage at approximately 40 volts, as illustrated by the characteristics 52, S3, FIG. 2. By completely discharging the stored charge in transistor 14, the voltage build-up thereacross may be much greater as illustrated by characteristic 55, FIG. 2. In order to insure that the breakdown voltage, VCBO, of characteristic 55 is not exceeded, the positive excursion developed at the load 34 is limited to 60 volts by the limiting action of diode 25 and battery 26. The rise time of pulse 60 requires from 20 to 30 nanoseconds. The pulse 60 remains at 60 volts for a' peri-oddetermined -by the inductance of inductor 12 and the magnitude of the current, I1, initially iiowing therethrough. In the present case, the pulse 60 remains at 60 volts for a period of 30 to 40 nanoseconds, the time required for a current through the inductive load 34, as illustrated by waveform 62, to reach a magnitude of IL. The control 4Z determines the branch of the inductive load that is sensed by closing the switch 38 corresponding thereto. The switch 38 back-biases the corresponding diode 36 from battery 40 whereby the voltage at the load decreases to only 4 volts during the remainder of the sense pulse 60, as illustrated by portion 64 of waveform 58, FIG. 4. In the present example, the decrease of pulse 60 from 60 volts to 4 volts required only from 20 to 30 nanoseconds. Also, the current, IL, flowing through inductive load 34 remains constant and substantially equal to I1 for the remainder of the control signal of waveform 50, after which time there is an exponential decrease to zero. Thus, even though a comparatively low Voltage source of power, such as battery 11, is employed, current fiow through inductive load 34 increases to its maximum amplitude in an extremely short interval of time. In actual duration, this interval of time is less than the width of the pulse 60 of waveform 58, FIG. 4. Pulse 60, as previously described, is substantially higher than the collector-to-base breakdown voltage capable of producing latch-up of the switching transistor 14.

Although the invention has been shownlin connection with a certain specific embodiment, it will be readily apparent to those skilled in the art that various changes in form and arrangement of parts may be made to suit requirements without departing from the spirit and scope of the invention.

What is claimed is:

1. A high-speed current driving apparatus comprising an inductor having first and second terminals; a transistor having a collector, an emitter and a base, said emitter and collector being connected between said second terminal of said inductor and a reference junction maintained at a substantially constant reference potential level and said base being biased to allow saturation current to flow through said transistor; means connected to said first terminal of said inductor for normally maintaining a substantially constant current flow therethrough; an enhancement-type diode connected between said second terminal of said inductor and a first junction, said enhancementtype diode being poled in a direction to be back-biased upon the interruption of current flow through said inductor; means connected to said first junction for limiting Voltage excursions thereat to a predetermined potential level and for producing a residual current flow in a forward direction through said enhancement-type diode; a utilization device to be driven connected between said v second terminal of said inductor and a second junction maintained at a potential level capable of backbiasing said enhancement-type diode; 'and means connected to said fbase of said transistor for interrupting current flow therethrough thereby to initiate a driving current through said utilization device.

2. The high-speed current driving apparatus as deiined in claim 1 additionally including means connected to said second terminal of said inductor for limiting the maximum voltage generated thereat to a voltage less than the collector-to-base breakdown voltage of said transistor at substantially zero collector current.

' 3. The high-speed current driving apparatus as defined in claim 2 wherein said means connected to said first terminal of said first inductor for normally maintaining a substantially constant current flow therethrough includes first and second input terminals and an output terminal, said output terminal being connected to said first terminal of said inductor; a p-n-p type transistor having an emitter, a collector and a base, said emitter being connected to said first input terminal; a first resistor of comparatively -low ohmic value connected from said collector of said p-n-p type transistor to said output terminal; a second resistor of comparatively high ohmic value and a Zener diode serially connected in the order named from said first input terminal to said output terminal; first and second n-p-n type transistors having first and second collectors, first and second bases and first and second emitters, respectively, said first base of said first n-p-n transistor being connected to the junction between said Zener diode and said second resistor, said first collector being connected to said base of said p-n-p transistor, said second collector being connected to said first input terminal, said second base being connected to said collector of said p-n-p transistorand said first and second emitters connected through a common bias resistor to ground; a third resistor of comparatively high ohmic value connected from said first collector to said first input terminal; a fourth resistor of comparatively high ohmic value and a diode serially `connected in the order named from said first to said second input terminals, said diode being poled to allow normal current flow toward said second input terminal; an enhancement-type diode connected from the junction between said fourth resisto-r and said diode and said output terminal, said enhancement-type diode being poled to allow current tiow towards said output terminal; means connected to said first input terminal for applying aA first direct-current voltage of positive polarity thereto, said first direct-current voltage being greater than the rated voltage developed across said Zener diode; and means connected to said second input terminal for applying a second direct-current voltage of positive polarity thereto of amplitude less than said first direct-current voltage whereby a substantially constant current flows through said first resistor towards said output termin-al.

4. A high-speed current driving apparatus comprising an inductor having first and second terminals; an n-p-n type transistor having a collector, an emitter and a base, said collector being connected to said second terminal of said inductor and said emitter being connected to ground; means connected to said first terminal of said first inductor for normally maintaining substantially constant current flow therethrough from said first to said second terminals thereof; signal control means connected to said base of said transistor, said signal control means having a rst level for allowing saturation current to iiow through said transistor and a second level for cutting off said current ow; an enhancement-type diode connected between said second terminal of said inductor and a rst junction, said enhancement-type diode being poled to allow normal current ow in a direction towards said second terminal of said inductor; means connected to said rst junction for limiting positive voltage excursion thereat to a predetermined potential level and for producing a residual current ow in a forward direction through said enhancement-type diode; a utilization device to be driven connected between said second terminal of said inductor and a second junction maintained at a potential level slightly positive relative to said predetermined potential level whereby a driving current is initiated through said utilization device in response to the cutting oit of said current through said n-p-n type transistor by said signal control means.

References Cited by the Examiner UNITED STATES PATENTS 2,866,105 12/1958 Eckert 307-885 3,124,698 3/1964 Semmer et al. 307-885 3,174,094 3/ 1965 Farnsworth et al. 307-885 i 3,191,062 6/1965 Forge 307-885 3,205,374 9 /1965 Cajal et al. 307-885 FOREIGN PATENTS 927,468 5/ 1963 Great Britain.

OTHER REFERENCES Electronic Design, Problems in Designing High Speed Comparators, by Wait et al., Aug. 30, 1963; pages 41-45 relied on.

JOHN w. HUCKERT, Primary Examinar. ARTHUR GAUss, J. D.l CRAIG, Assisiam Examiners.

Claims (1)

1. A HIGH-SPEED CURRENT HAVING APPARATUS COMPRISING AN INDUCTOR HAVING FIRST AND SECOND TERMINALS; A TRANSISTOR HAVING A COLLECTOR, AN EMITTER AND A BASE, SAID EMITTER AND COLLECTOR BEING CONNECTED BETWEEN SAID SECOND TERMINAL OF SAID INDUCTOR AND A REFERENCE JUNCTION MAINTAINED AT A SUBSTANTIALLY CONSTANT REFERENCE POTENTIAL LEVEL AND SAID BASE BEING BIASED TO ALLOW SATURATION CURRENT TO FLOW THROUGH SAID TRANSISTOR; MEANS CONNECTED TO SAID FIRST TERMINAL OF SAID INDUCTOR FOR NORMALLY MAINTAINING A SUBSTANTIALLY CONSTANT CURRENT FLOW THERETHROUGH; AN ENHANCEMENT-TYPE DIODE CONNECTED BETWEEN SAID SECOND TERMINAL OF SAID INDUCTOR AND A FIRST JUNCTION, SAID ENHANCEMENTTYPE DIODE BEING POLED IN A DIRECTION TO BE BACK-BIASED UPON THE INTERRUPTION OF CURRENT FLOW THROUGH SAID INDUCTOR; MEANS CONNECTED TO SAID FIRST JUNCTION FOR LIMITING VOLTAGE EXCURSIONS THEREAT TO A PREDETERMINED POTENTIAL LEVEL AND FOR PRODUCING A RESIDUAL CURRENT FLOW IN A FORWARD DIRECTION THROUGH SAID ENHANCEMENT-TYPE DIODE; A UTILIZATION DEVICE TO BE DRIVEN CONNECTED BETWEEN SAID SECOND TERMINAL OF SAID INDUCTOR AND A SECOND JUNCTION MAINTAINED AT A POTENTIAL LEVEL CAPABLE OF BACKBIASING SAID ENHANCEMENT-TYPE DIODE; AND MEANS CONNECTED TO SAID BASE OF SAID TRANSISTOR FOR INTERRUPTING CURRENT FLOW THERETHROUGH THEREBY TO INITIATE A DRIVING CURRENT THROUGH SAID UTILIZATION DEVICE.

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