US3158820A

US3158820A - Electronic servo system for automatically locking two alternating current sources inphase

Info

Publication number: US3158820A
Application number: US106750A
Authority: US
Inventors: Joseph J Lamplot
Original assignee: Avco Corp
Current assignee: Avco Corp
Priority date: 1961-05-01
Filing date: 1961-05-01
Publication date: 1964-11-24
Anticipated expiration: 1981-11-24

Description

Nov. 24, 1964 J. J. LAMPLOT 3,158,820

ELECTRONIC SERVO SYSTEM FOR AUTOMATICALLY LOCKING TWO ALTERNATING CURRENT SOURCES IN PHASE Filed May 1, 1961 2 Sheets-Sheet 1 CLOCK ST'D. FREQ. GEN.

OUTPUT ,ls 12 106? as REE V DET. MIX v. E0. REACT CONTROL MOD. GEN. T|

? INVENTOR.

JOSEPH J. LAMPLOT. Wfl M 7-: G

ATT RNEYS.

Nov. 24, 1964 J. J. LAMPLOT 3,

ELECTRONIC SERVO SYSTEM FOR AUTOMATICALLY LOCKING TWO ALTERNATING CURRENT SOURCES IN PHASE Filed May 1-. 1961 2 Sheets-Sheet 2 FROM 3500A; zu'ios MIXER l2 3,300.11 u-F I 02M; TO REACT INVENTOR.

JOSEPH LAMPL OT.

- WPGQ A AT RNEYS.

CONTROL.

United States Patent Ice e-iterated Nov. 2 954 .ioseph 3. Lampiot, Cincinnati, assignor to Avco Qorporation, incinnati, Shin, a corporation of Delaware Filed May 1, li i, Ser. No. 36,759 12 Claims. (Cl. 332- 5} This invention relates to a unique servo system for locking two high frequency sources in phase.

Modern communications equipment frequently requires operation in several hundred channels with control from a single standard clock reference. A major need in such systems is for positive tie-in of the selected channel to the clock. Such means must maintain firm control while the channel is in use, but upon command it must also permit rapid release of the channel and rapid search and positive ease-into-control of the new channel to be used. Phase-lock systems in common use frequently incorporate gain with phase-determining elements which are useful to suppress loop oscillations and to reduce spurious frequencies which tend to supermodulate the control oscillator. However, these systems often encounter low requency spurs or crossovers which require the application of a transfer of function with an extremely low frequency roll-over characteristic. Such low frequency damping networks, desirable for eliminating low frequency spurs, result in a long or slow indecisive lock-in action.

The present invention avoids these objections by using two low pass filters or damping networks, one of medium frequency characteristic in the lock-in phase of operation, and anod'ler having a low frequency characteristic. The second or low frequency network is effectively gated into the circuit only after lock-in to efiect the rejection of spurious responses, and the gating is accomplished gradually and electronically.

An object of this invenn'on is to provide a second order servo system for automatically locking in the phase of two alternating current sources.

Another object of this invention is to provide a second order servo system having two low pass filters or damping networks, one of medium frequency characteristic operating during pe iods of search and lock-in, and a second of low frequency characteristic automatica ly and gradually connected into the s stem when the sou ces are in phase.

For other objects and for a more complete understanding of the nature of this invention, reference should now be made to the following specification and to the accompanying drawing in which:

FIG. 1 represents a portion of a phase-lock system operable in accordance with certain principles of this invention;

FIG. 2 represents a preferred embodiment of this invention; and

FIG. 3 illustrates a specific form of modulator generator incorporated in this invention.

The system illustrated in FIG. 1 consists of a phase detector D in which two signals applied at terminals T and T are compared. When the two signals are out of phase, then the output from the detector includes com onents" having frequencies of each signal as well as the beat fre queucy. The low beat frequency components are applied through a double filter networic to a terminal T which is then connected into a servo loop to effect a phase correction. In addition, under conditions where there is a large frequency difference, a modulation generator G automatically superimposesa drive on the system for the purpose of efiecting a rapid lock-in.

The first filter network, which includes resistor R capacitor C and resistor R represents a low pass filter having a very low cut-oif frequency, for example, less than one cycle per second, and a maximum attenuation of 35 db. The second fillter network, which includes the load impedance of a modulation generator G (capacitor C and resistor R capacitor C and resistor R is also a low pass filter network having a higher cut-off frequency, for example, at about cycles per second. In practice, the closest corner frequencies of the two filters are separated by about one octave. Thus, the first filter provides a very low impedance shunt for any-frequency above one cycle per second, while the second filter provides a very low impedance shunt for any frequency above 60 cycles per second. The problem is that when the system is locked in, and only small phase errors occur, the first low pass filter network is necessary for the purpose of preventing responses to short-term spurs, etc. Gn the other hand, with a large frequency error, the time constants involved would provide a hunt or search for the correct frequency requiring perhaps 30 seconds.

In order to overcome the conflicting requirements of stability during lock-in and high-speed searching, a switch S is inserted in the first low pass filter or damping network in series with the resistors R and capacitor C By means of this invention, the switch S, or its equivalent, is automatically and gradually connected, but rapidly disconnected from the circuit at appropriate times.

in a preferred embodiment of this invention, as shown in FIG. 2, the output from a variablefrequency oscillator 11% is controlled within very precise limits and locked in phase, a cycle for cycle with a clock frequency reference 11. For this purpose, a portion of the output of the oscillator 10 is applied to a mixer 12 where it is mixed with the output from a standard frequency generator 14 to produce an intermediate frequency. The standard frequency generator and the variable frequency oscillator may be manually switched simultaneously for producing any output frequency for the variable frequency oscillator while maintaining a given intermediate frequency mixer output. The intermediate frequency output from the mixer 12 is then applied to a phase detector 16 where it is compared in phase with the output from a reference frequency generator 18. Both the reference and the

standard frequency generator

18 and 14 are controlled by the clock reference 11. In addition, a portion of the output from the mhrer 12 is applied to a modulator generator 2% for a purpose which will hereinafter be described.

If the outputs from mixer 12 and the reference frequency generator l8 are in phase, then output from the etector 16 will contain only the intermediate (radio) frequency components superimposed on a direct voltage corresponding to the time displacement between the two outputs. On the other hand, if the outputs from the mixer 12 and the reference frequency generator 18 are out of phase, then a beat frequency alternating current having a frequency proportional to the phase error, will be produced and superimposed on the radio frequency output.

The radio frequency components appearing at the output of detector liiare impressed across a double filter network, the first leg of which presents a very low reactive impedance to the high frequency components. This leg includes a resistor 22, capacitor 24, resistor 26, and an automatically regulated gate which is comprised of the junction of collector 27 and emitter 29of a tran sister 28, and may be considered the automatic equivalent of the leg including the switch S of FIG. 1. The second filter includes the load impedance of the modulator generator 2% (as represented by the resistor 38 and capacitor 31), capacitor 32, and resistor 34. The radio frequency output from the detector 15, when applied through the first filter networhtends to maintain the transistor 23 in aisaszs f magnitude'an'cl rate dependent on the in thegoutputof mixer 12."

id a state of high conduction to connect this network in circuit and thus prevent system-response to low frequency spurs.

When the outputs from the generator 18 and the mixer 12 are out of phase, the relatively low audio frequency alternating current error voltage produced at the output of the phase detector '16 is simultaneously applied in two paths, the first through the resistor 22 and the load imped phase detector 16 is through a low reactive impedance path includingresistor 38 and a capacitor 40 to two stages of amplification which include a transistor 42 having a base 44, an emitter 46, and a collector 48, and a transistor, 50 having a base52, an emitter 54, and a collector56. Direct current bias for the base 44 of transistor 42 is provided by means'of a battery 58, or any other convenient source of direct currents, through a resistor 69, andfor the collector 48 through a resistor 62,

the emitter. 46 being connected to the other side of the battery 58 through an emitter-resistor 64. The output from the transistor 42 is applied from the collector 48 directly to the base 520i transistor 59, the collector 55 i being connected directly to one side of the battery 58, the emitter 54 being connected to the other side through an emitter-resistor 66. The power-amplified output appearing across the emitter-resistor 66 is applied to the base vs68 of transistor 28 through a capacitor 70, a resistor 71, and a voltage-doubling rectifying network which includes.

diodes

72 and 74,

capacitors

76 and 78, and resistors 80 and Y82. Bias for the

diodes

72 and 74 is supplied from'the battery 58 through a resistor 84.

Thus, a negative voltage is developed at the base 68 of transistor 28 to oppose the normal forward bias supplied by the battery '58, and depending on the magnitude of the error voltageat the output of the phase detector i 16, the level of conduction through the collector-emitter junction of transistor 28 will be varied towards saturation or cut-otf at a rate dependingupon the phase differ- 'ence between the outputs from the reference generator 18 and the mixer 12." a

In the event there is a substantial phase difference between, the, outputs from the variable frequency oscillator 10 and the reference generator 18, as would occur when switching from one station to another, then the sum or difference frequency output of mixer 12 automatically produgesahunt output from modulator generatQrZtt. In general, modulator generator zfltconsisted of a discriminator-type network having a' swe'ep output voltage with a frequency change v The details of the modulatorgenerator 20forrn no part of the-present invention, and any system capable of generating a'drive for the, reactive control 'device Fae-auto.-

rnatically in response to a deviation'in frequency from V the output of 'the mixer 12 will be suitable for this applicag tion, However, the details, including circuit parameters, of the modulator: generator 20 as reducedto practice in a complete and operative system are shownin'FiG. 3;

t The outputof the'rnodulator genefatorfli producesla 1 rapid {sweeping of the reactive control device 36 for the purpose of producing the proper output from the variable frequency oscillator 10 at a very rapid rate. Such action is possiblesince th'e first low pass filter network is'gate'd out of the circuit by the biasing error the-transistor 28 by the output from the phase detector i6. Had .this 'net-' work noLbeen biased to a relatively high impedance,

7 difference which, exist's'b'etwee'ri'the charge on capacitoi;

i then the hunt output could not produce the required frequency change in a reasonable time; for example, a half second, since the time constants of the low frequency network might require as much as 30 seconds.

Consider again the manual circuit of FIG. 1. The switch S, normally open during search and lock-in procedure, is closed after lock-in to insert the very low frequency network C and R into the system. 'It will be seen that the insertion and activation of this network suddenly throws the capacitor C into circuit, and since capacitor C will probably be charged to some potential varying greatly from the voltage at the output of the detector D, the charge or discharge resulting from circuit completion will act to kick the system out of control or phase lock. This condition was overcome in the circuit shown in FIG. 2 by automatic control of the charge a V on the capacitor 24. 3

The transistor 28 is normally conducting to provide a low collector-emitter impedance during lock-in operation; that is, high frequency currents from the output of the detector 16 are effectively impressed across the'capacitor 24, the resistor 26, and the collector-emitter electrodes of transistor 28. Note that the high frequencies are also applied to the transistors 42 and 50 and these high fro quency signals, when rectified,'establish an initial operating condition for transistor 28 When a high level beat frequency output from the phase detector 16 appears at the junction of the

resistors

22 and 38 when, phase lock is lost, the beat frequency alternating current error voltage produced is applied through the "resistor 38 and the capacitor 46 for amplification by transistors 42 and 50; the transistor 59 functioning as an emitter followerpower driver for the transistor 28. The alternating current corn ponents in thepower output of transistor 50 feed the two diodes which are effectively connected in voltage-doubling circuitry, and the resulting direct current components establish a varying back bias on the base 68 of transistor 23 which is in opposit ion to the forward bias quiescently imposed by the batterySS. I V At the same time the output from the mixer 12 applied to the modulator generator 20 produces a drivehaving a magnitude and rate proportional to the frequency error at the mixer 12. This output from the modulator generator 25) is applied to the reactance control device 36 to' provide a correction for the frequencyof the oscillator T tor 20 is reduced to zero. There is, however, a very, 1ow

magnitude and frequency alternating current output which serves to maintain the system in a state of continuous dither. V I t s When inthe range of the phase detector 16, the reactance control device Sa is then, controlled by the output. from the detector 16; When the system is locked in phase,

, the output from the detector'will bea directcurrent hav 7 ing a magnitude and phase proportional to the time dis placement of the input signals to the detector. Since the output from the detector 16 contains no low'fre quency alternating current components due to-a phase error, the

capacitors

76 and 78 will discharge at an feir pone'n'tial rate det'erminedby the R-C tim'e constants, t 7, thereby permitting the gradual conduction of the transistor ZS and hence the gradual insertion-of the capacitor 1 24 into the network; Since this insertion is gradual,,,;any

i 24 and the voltage at the junctio'n'of capacitor Hand 7 resistor 22 is gradually discharged without kicking the system out of phase lock. The resultant direct mirage. output from the detector 16 maintains the reactive control device at the proper level topro'vide the exact adjustment for the variable'frequencyoscillator '10.:

H As previously noted, theoutputfrom'the phase detector lo'contains intermediate frequency' alternatingcurrent components which are impresseda'cross the filter network 7 including the emitter-collector junction of transistor 28. This alternating component serves to efiect a modulation on the system and it tends to govern the frequency and gain characteristics of the damped oscillations in the network including transistors 42 and 5d.

The following circuit parameters representing a system actually reduced to practice are cited below. t is to be understood that these parameters should in no way be construed as limiting the invention, but are included for the purpose of enabling persons skilled in the art to reproduce this invention.

Resistor 22 183'. ohms.

esistor 26 150 ohms. Resistor 34 470 ohms. Resistor 33 223: ohms. Resistor 56 4.7K ohms. Resistor 6t) 18K ohms. Resistor 62 22K ohms. Resistor 64 5.6K ohms. Resistor 71 109K ohms. Resistor St; 47K ohms. Resistor 82 2.7K ohms. Capacitor 24 5d of. Capacitor 3" .3 ,uf. Capacitor 4t l f. Capacitor 70 5 pf. Capacitor 76 55 ,uf. Capacitor 78 55 gf. Diodes '72 and 74 Type 1N252. Transistor 28 Type 2N706. Transistor 42. Type 2N706. Transistor 'Sil Type 2N439.

Thus there has been described and illustrated a unique second order servo system which permits inter-channel transfer; that is, command channel selection, such that service may be stepped, channel to channel or across a number of channels in a given control range. The action in this regard is somewhat like that of a follower servo while the lock-in action encompasses the functions of a second order system; i.e., a double integrating loop with respect to time. The principle of this double action servo system may be applied broadly although it is shown here as reduced to practice in a reference frequency turn'ng system. It will be understood that many other circuit arrangements may be expected without departure from the inventive features of this invention. it is intended, therefore, that the invention be limited only by the appended claims as interpreted in the light of the prior art.

What is claimed is:

1. A system for synchronizing the phase of the output of an adjustable frequency source with the phase of the output of a reference generator comprising:

phase comparison means receiving both of said outputs and delivering an output control voltage having a magnitude and frequency proportional to the phase displacement between said outputs;

control means for said adjustable frequency source,

said control means receiving said output control volage, said control means being responsive to said control voltage for adjusting the frequency of the output from said adjustable frequency source in a direction towards phase synchronization Wi said output from said reference generator;

a coupling network interposed between the output from said phase comparison means and said control means, said coupling means including a reactive branch presenting a low impedance shunt to frequenciesproduced by relatively lmge variations from said phase comparison means, and a current flow control device effectively enabling and disabling said reactive branch;

said'-lcurrent flow control device having a collecting electrode, an emitting electrode, a current flow controlling electrode, said emitting andcollecting electrodes being'connected in series with said reactive branch across said phase comparison means, the operating bias for said collecting and emitting electrodes being provided solely from the output of sad phase comparison means through said reactive branch;

and frequency responsive means coupled to the output of said phase comparison means for providing a direct voltage back bias for said control electrode in proportion to the frequency of said output control voltage from said phase comparison means, whereby said electronic current flow control device is rendered non-conductive and said reactive branch is disconnected when the frequency of said output control voltage exceeds a predetermined frequency.

2. The invention as defined in claim 1 wherein said current flow control device is a transistor having base, emitter, and collector electrodes.

3. The invention as defined in claim 1 wherein said adjustable frequency source is a mixer having an intermediate ifrequency output developed by heterodyning the outputs of a clock-controlled standard frequency generator and a variable frequency oscillator, and wherein the frequency of the output or" said reference generator is controlled by said clock, and wherein the frequency of the output of said variable frequency oscillator is adjusted by said control means.

4. The invention as defined in claim 1 wherein said frequency responsive means includes:

an alternating current amplifier;

means capacitively coupling a portion of the output of said phase comparison means to said alternating current amplifier for amplifying the alternating current components thereof;

rectdying means for rectifying said amplified alternating current components;

a capacitive network, said capacitive network being connected in a fast-charging circuit with said rectifying means and in a slow-discharging circuit with said controlling and emitting electrodes, the voltage charge on said capacitive network delivered by said rectifying means back biasing said current flow con trol device to render said device non-conductive when said outputs of said variable frequency source and said reference generator are out of phase, whereby said current flow control device is rendered non-conductive at a relatively fast rate following the occurrence of out-of-phase relationship between said ou puts, but is rendered conductive at a relatively slow rate after said outputs are in phase.

5. The invention as defined in claim 4 wherein said rectifying means is a voltage-doubling network.

6. A system for synchronizing the phase of the output of an adjustable fiequency source with the phase of the output of a reference generator comprising:

a modulation generator, said modulation generator having an input cir nit receiving a portion of the "output from said adjustable frequency source, and

having an output circuit delivering a drive voltage which varies in magnitude and rate dependent on the magnitude of deviation in frequency of said adjustable frequency source from the frequency of said reference generator; 1 control means for said adjustable frequency source, said control -rneans receiving said output control voltage and said-drive voltage, said control means beingresponsive to both said control and drive voltages for adjusting the frequency of the output from said adjustable frequency source in a direction towards phase synchronization with said output from said reference generator;

a coupling network interposed between the output from said phase comparison means and said control means, said coupling means including. a reactive bnanch presenting a low impedance shunt to frequencies produced by relatively large variations from said phase comparison means; and

means responsive to an alternating current output from said phase comparison means for effectively disabling said reactive branch.

7. The invention as defined in claim 6 wherein said means responsive to an alternating current output from said phase comparison means for efiectively disabling said reactive branch comprises:

a current flow control device having a collecting electrode, an emitting electrode, and a current flow controlling electrode, said emitting and collecting electrodes being connected in series with said reactive branch across said phase comparison means, the operating bias for said collecting and emitting electrodes being provided solely from the output of said phase comparison means through said reactive branch;

8. The invention as defined in claim 7, wherein said currentfiow control device is a transistor having emitter, collector and base electrodes.

9. The invention as defined in claim 7 wherein said adjustable frequency source is a mixer having an intermediatefrequency output developed by heterodyning the outputs of a clock-controlled standard frequency generator and a variable frequency oscillator, and wherein the frequency of the output of said reference generator is controlled by said clock, and wherein the frequency. of the output of said variable frequency oscillator is adjusted by said control means.

8 10. The invention as defined in claim '7 wherein said frequency responsive means includes:

an alternating current amplifier; V

means capacitively coupling a portion of the output of said phase comparison means to said alternating current amplifier, for amplifying the alternating current components thereof;

rectifying means for rectifying said amplified alternating current components; v

a capacitive network, said capacitive network being connected in a fast-charging circuit With said rectifying means and in a slow-discharging circuit with said controlling and emitting electrodes, the voltage charge on said capacitive network delivered by said rectifying means back biasing said current flow con trol device to render said device nonrconductive when said outputs ofsaid variable frequency source and said reference generator are out of phase, whereby said current flow control device is rendered nonconductive at arelatively fast rate following the.

occurrence of out-'of-phase relationship between said outputs, but is rendered conductive at a relatively slow rate after said outputs are in phase.

11. The invention as defined in claim 10- wherein said i rectifying means is a voltage-doubling network.

12. The invention as defined inclaim 6 wherein said adjustable frequency source is'amixer having an inter mediate frequency output developed by heterodyning the controlled by said clock, and'wherein the frequency of j the output of said variable frequency oscillator is adjusted by said control means.

References Cited by the Examiner UNITED STATES PATENTS 2,828,419 3/58 Gruen 3319-17 2,962,666 11/60 Pollak 331-l7 ROY LAKE, PrimaryExaminer.

' JOHN KOMINSKI, Examiner.

Claims

1. A SYSTEM FOR SYNCHRONIZING THE PHASE OF THE OUTPUT OF AN ADJUSTABLE FREQUENCY SOURCE WITH THE PHASE OF THE OUTPUT OF A REFERENCE GENERATOR COMPRISING: PHASE COMPARISON MEANS RECEIVING BOTH OF SAID OUTPUTS AND DELIVERING AN OUTPUT CONTROL VOLTAGE HAVING A MAGNITUDE AND FREQUENCY PROPORTIONAL TO THE PHASE DISPLACEMENT BETWEEN SAID OUTPUTS; CONTROL MEANS FOR SAID ADJUSTABLE FREQUENCY SOURCE, SAID CONTROL MEANS RECEIVING SAID OUTPUT CONTROL VOLTAGE, SAID CONTROL MEANS BEING RESPONSIVE TO SAID CONTROL VOLTAGE FOR ADJUSTING THE FREQUENCY OF THE OUTPUT FROM SAID ADJUSTABLE FREQUENCY SOURCE IN A DIRECTION TOWARDS PHASE SYNCHRONIZATION WITH SAID OUTPUT FROM SAID REFERENCE GENERATOR; A COUPLING NETWORK INTERPOSED BETWEEN THE OUTPUT FROM SAID PHASE COMPARISON MEANS AND SAID CONTROL MEANS, SAID COUPLING MEANS INCLUDING A REACTIVE BRANCH PRESENTING A LOW IMPEDANCE SHUNT TO FREQUENCIES PRODUCED BY RELATIVELY LARGE VARIATIONS FROM SAID PHASE COMPARISON MEANS, AND A CURRENT FLOW CONTROL DEVICE EFFECTIVELY ENABLING AND DISABLING SAID REACTIVE BRANCH; SAID CURRENT FLOW CONTROL DEVICE HAVING A COLLECTING ELECTRODE, AN EMITTING ELECTRODE, AND A CURRENT FLOW CONTROLLING ELECTRODE, SAID EMITTING AND COLLECTING ELECTRODES BEING CONNECTED IN SERIES WITH SAID REACTIVE BRANCH ACROSS SAID PHASE COMPARISON MEANS, THE OPERATING BIAS FOR SAID COLLECTING AND EMITTING ELECTRODES BEING PROVIDED SOLELY FROM THE OUTPUT OF SAID PHASE COMPARISON MEANS THROUGH SAID REACTIVE BRANCH; AND FREQUENCY RESPONSIVE MEANS COUPLED TO THE OUTPUT OF SAID PHASE COMPARISON MEANS FOR PROVIDING A DIRECT VOLTAGE BACK BIAS FOR SAID CONTROL ELECTRODE IN PROPORTION TO THE FREQUENCY OF SAID OUTPUT CONTROL VOLTAGE FROM SAID PHASE COMPARISON MEANS, WHEREBY SAID ELECTRONIC CURRENT FLOW CONTROL DEVICE IS RENDERED NON-CONDUCTIVE AND SAID REACTIVE BRANCH IS DISCONNECTED WHEN THE FREQUENCY OF SAID OUTPUT CONTROL VOLTAGE EXCEEDS A PREDETERMINED FREQUENCY.