US3156903A - Signal delay circuit - Google Patents

Signal delay circuit Download PDF

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Publication number
US3156903A
US3156903A US828910A US82891059A US3156903A US 3156903 A US3156903 A US 3156903A US 828910 A US828910 A US 828910A US 82891059 A US82891059 A US 82891059A US 3156903 A US3156903 A US 3156903A
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Prior art keywords
core
signal
delay
winding
output
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US828910A
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Richard K Gerlach
Royal E Howes
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NCR Voyix Corp
National Cash Register Co
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NCR Corp
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Priority to NL133132D priority Critical patent/NL133132C/xx
Priority to NL253379D priority patent/NL253379A/xx
Application filed by NCR Corp filed Critical NCR Corp
Priority to US828910A priority patent/US3156903A/en
Priority to GB23079/60A priority patent/GB907492A/en
Priority to CH819360A priority patent/CH364003A/en
Priority to DEN18651A priority patent/DE1114534B/en
Priority to FR833422A priority patent/FR1263576A/en
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Publication of US3156903A publication Critical patent/US3156903A/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/26Time-delay networks
    • H03H11/265Time-delay networks with adjustable delay
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/80Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using non-linear magnetic devices; using non-linear dielectric devices
    • H03K17/82Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using non-linear magnetic devices; using non-linear dielectric devices the devices being transfluxors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/45Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of non-linear magnetic or dielectric devices
    • H03K3/49Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of non-linear magnetic or dielectric devices the devices being ferro-resonant
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/45Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of non-linear magnetic or dielectric devices
    • H03K3/51Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of non-linear magnetic or dielectric devices the devices being multi-aperture magnetic cores, e.g. transfluxors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/04Shaping pulses by increasing duration; by decreasing duration

Definitions

  • the present invention relates to signal translator cirn cuits and more particularly to a signal translator circuit for providing a signal delay having a time period which is readily adjustable.
  • the present invention is directed to methods and apparatus for delaying signals by storing a predetermined magnitude of magnetic flux in a core of magnetic material wherein the flux magnitude is a function of the desired time period of delay.
  • the signals to be delayed reverse the direction of flow of substantially only the stored magnetic ilux in the core and the signals are delayed for a time period dependent upon the time period required for the reversal of stored magnetic ilux.
  • the time period of delay of the signals is controlled electronically.
  • Certain types of cores which are formed from magnetic material have been found to have desirable characteristics which are inherently well suited for electronically controlling the time period of the delay of signals.
  • the cores of the preferred type are formed of magnetic material having a high residual magnetism and a hysteresis characteristic curve which is substantially rectangular.
  • the preferred cores have a plurality of apertures wherein the storage and adjustment of predetermined magnitudes of magnetic flux in paths about an aperture is readily accomplished electronically.
  • the Itime period of delay can be varied over the range of magnetic flux storage capacity of the individual core. Further, in a preferred circuit arrangement, the time period of delay of signals has been made to correspond directly to the volt-microsecond integral of a setting signal.
  • the translator circuit Another advantage of the cores having a plurality of apertures included in the preferred embodiment oi the translator circuit is that a single settincr signal can provide for the storage and use of a magnitude of magnetic ilux indefinitely and the magnitude of said magnetic llux stored can be accurately adjusted by controlling the time interval of the setting sign. It is an object therefore, of the present invention, to provide a signal translator circuit oi the type described above for delaying signals.
  • Another object of the present invention is the provision of a delay for signals and controlling the period of delay electronically.
  • Another object of the invention is tie provision of delay of a signal wherein the period of delay is adjusted by controlling the magnitude of magnetic ilus stored in a core of 'magnetic material.
  • a further object is to provide a method of delaying a signal for a time period required to reverse a predetermined magnitude of magnetic ilux stored in a core of magnetic material.
  • a still further object of the invention is the provision of a method for delaying changes in logical level ot a signal wherein the duration or" delay is controlled by the duration of another signal.
  • Another object of the invention is to provide apparatus for the delay oi asignal wherein the period of delay corresponds directly to the time interval ot another signal.
  • FIG. 1 is a circuit diagram of the preferred embodiment of the invention
  • FIG. 2 is a graph showing typical waveforms of certain signals utilized in the operation oi the preferred circuit embodiment of FIG. l;
  • FG. 3 is a circuit diagram of a portion of the preferred embodiment shown in FIG. l to illustrate the circuit in a state providing a typical time period of dela FlGS.
  • 4a and 4b are typical hysteresis characteristic curves which will result from interrogation of the large and small apertures respectively of a multi-apertured core as illustrated by the preferred embodiment in FIG. 1;
  • FIG. 5 is a circuit diagram of an alternate embodiment of the invention.
  • FlG. 6 illustrates waveforms ot typical signals employed during the operation of the alternate embodiment shown in FlG. 5;
  • FG. 7 is a graph of a typical hysteresis characteristic curve of a translator core in the alternate embodiment o PEG. 5.
  • FIG. 1 illustrates a preferred embodiment, a signal translator circuit arrangement for delaying signals.
  • the translator circuit includes a translator core 12 having a plurality of apertures for storing predetermined magnitudes of magnetic flux to provide corresponding signal delays.
  • the circuits for storing the magnetic ilux include a clearing circuit i4 or applying a magnetizing force to the translator core to saturate the core with magnetic flux in one direction; and a setting signal circuit 16 for coupling setting signals to the translator core for partly reversing the direction of this magnetic flux and thereby storing the desired magnitude of magnetic flux in the core.
  • the signal to be delayed is coupled to the input of a signal delay circuit 18 which latter is inductively coupled to the core.
  • the signals in the output of this circuit are delayed for a time period determined by the setting signals.
  • a resetting circuit 20 resets the translator core l2 and supplies a signal to the output of the signal delay circuit l5 to eiiect delay of the trailing edges of the signals being delayed.
  • the translator core i2 employed in the circuit ot the present invention stores magnitudes of magnetic iiux wherein the magnitudes of magnetic flux are a function of the desired durations of signal delay.
  • the translator core l2 provides a convenient and reliable means ror storing magnitudes of magnetic flux in a core within the individual magnetic flux capacity of cores.
  • the magnetic ilux stored in an individual core can be varied from zero to an amount saturating an annular minor flux path 24:, indicated by dotted lines in FlGS. 1 and 3, surrounding a minor aperture 56,
  • the maximum storage capacity of the signal translator core l2 is determined by the maximum residual magnetic ilux capacity around the minor aperture 3). ln turn, the maximum time period of delay is limited to the time interval required for the reversal of the magnetic ilux stored in the core in ux paths around the minor aperture 3G, wherein the time interval does no exceed the time interval between variations in the levels of the signals, in order to prevent losses in portions of the signals.
  • a multi-apertured core such as the core element 12 having at least two apertures including a minor aperture 3i? and a major aperture 32, can be used to store mag- .magnitude of magnetic llux.
  • the initial step in storing a magnetic llux which will be available for use, is to apply a magnetizing force to the translator core to saturate the core with magnetic flux in a lirst direction.
  • the translator core l2 can be so initially saturated, as indicated by the arrows, by applying a magnetizing force to the core produced by a current through a winding threaded through a major aperture 32 and wound about an outer core portion 36.
  • the cross sectional area of the core portion 36 is substantially equal to the sum of the cross sectional areas of core portions 33 and 49, and the cross sectional areas of core portions 3d and dll are also substantially equal.
  • the stated core parameters provide for greater eliciency in the use of core material whereby the maximum storage of magnetic flux around the minor aperture is determined by the core dimensions.
  • arrows i2 and 44 indicate the direction of a typical resultant magnetic liux flow immediately surrounding the aperture 32 as the result of providing a magnetic llux storage around aperture Since the demagnetizing force producing the magnetic flux reversal tends to reverse the ilow of llux in shorter magnetic paths before reversing the flux in longer paths, the reversal of the initial magnetic lilux commences immediately adjacent the annular periphery of the major aperture 32, and the reversal of magnetic llux extends radially from the maior aperture with an increasing demagnetizing force produced by the setting signal.
  • this stored flux is reversed in direction in the process of translating signals by a magnetizing force applied to an outer core portion 3S and produced by a winding threaded through the minor aperture and wound around the core portion 38.
  • the magnetic flux flow in theminor path which is available for reversal in response to interrogation by windings around core portion 38, is the stored magnetic flux.
  • the time interval required for reversal of this stored magnetic flux by the signal to be delayed is the time period of delay.
  • FIG@ 3 illustrates the translator core l2 after a setting signal has been applied to the translator circuitvto store a
  • the magnetic l'lux in llux paths around the major aperture 52, indicated by arrows d2 and d4, haveV been reversed to thereby form the annu'- lar minor liux paths around the minor aperture di?.
  • the magnetic flux in annular ux paths around the minor aperture Btl," as indicated by arrows 3S and d4, is the magnetic flux stored in the translator core.
  • the magnetic flux flow in FlG. 3 is typical; however, it should be realized that the flux llow produced by a single setting signal represents a single predetermined magnitude of magnetic ux only which is stored in the translator core l2, and the magnetic flux stored varies with different desired delay periods.
  • a relatively short setting signal applying a small demagnetizing force to the core for relatively short time periods of delay will reverse, and thereby store, only a small quantity of magnetic llux in the core. Under these conditions, only a small amount of magnetic llux will be reversed around the major aperture 32, and only a small amount of flux will be flowing in annular minor linx paths about the minor aperture Sti.
  • the magnetic flux flow in the annular minor linx paths is stored magnetic llux wherein the linx magnitude in the miner paths is a function of the time period of delay.
  • the time interval of reversal of the stored magnetic llux and therefore the time period of delay is a function of: the flux magnitude, the amplitude of the signal coupled to the core and the number of turns of windings threaded through aperture 3d and Wound about outer core portion 38.
  • the demagnetization force applied to the core is produced by a voltmicrosecond signal having a predetermined constant voltage and a predetermined time period.
  • the signal is coupled to the setting winding 46 which is threaded through the major aperture 32 and wound around the outer core It should be noted that thesetting winding may be ⁇ wound about an inner core portion dll.
  • the polarity of the setting signal and the direction of the winding is such that a translator core initially saturated by a clearing pulse is demagnetized a predetermined amount by reversing the ow of magnetic tlux in the core; and, more particularly, by reversing the direction of magnetic liux in the core adjacent to the aperture 32, wherein the radial distance of reversed magnetic llux from the aperture 32 increases as the setting signal-'time interval increases.
  • rl ⁇ he signals to be delayed are coupled to the translator core by a signal delay winding dd which is threaded through the minor aperture Sil and wound around the outer core portion 33.
  • the signals reverse the direction of the stored magnetic llux around the minor aperture d@ and are delayedduring the period of reversal.
  • the initial variations of the signal wave forms or the leading edges coupled to the input are delayed in the output by adjusting the magnetic iiuX stored in the minor iluX paths about aperture 30.
  • the signal energy is dissipated in reversing the stored magnetic flux. Since the signal energy is not returned to the delay circuit output, an additional provision must be made to the circuit arrangement or delaying the return variations or trailing edges of the signal waveforms.
  • the resetting circuit 20 has been provided for resetting the stored magnetic iiux flow in the translator core and also for aiding in delaying the return variations of the signal waveforms in the signal delay output circuit.
  • the resetting circuit includes a winding 5t) threaded about core portion 38 of the minor aperture 3G.
  • the winding 50 is coupled to a supply voltage source through a current limiting resistor S2 and a clamping voltage source through a diode 84, whereby the current amplitude is limited to produce a magnetizing force which is sufficient to reset the stored magnetic ux only about aperture 38.
  • the level of the magnetizing force produced by the resetting circuit is too low to disturb the iluX in the flux path around the major aperture 32.
  • the reset circuit 20 resets the ilux about minor aperture 3i) to prepare for delay of subsequent signal waveforms.
  • the circuit arrangement for the signal translator provides for the initial clearing, i.e., saturating the translator core 12, by coupling a clearing signal 54 to the clearing circuit input terminal 56.
  • the clearing signal is coupled to the clearing winding 34 having an opposite end connected to a ground 58.
  • a clearing signal having the proper polarity as indicated in FIG. l initially saturates the translator core in the clockwise direction.
  • a setting signal 60 is coupled to the input terminal 62 of the circuit 16 to store magnetic iiux in the translator core by applying a demagnetizing force to the core to place the core in a partial state of saturation, preferably at a residual state between points 1 and 4 on the vertical axis of the t1-H curve, illustrated in FIG. 4a.
  • the setting signal is coupled from the input terminal 62 to the base of the transistor 64 by a parallel input circuit 65 including a source of positive bias 68.
  • the transistor 64 is of the PNP type having an emitter coupled to ground and a collector connected to one end of the setting winding 46.
  • the opposite end of the setting winding is connected to the setting winding supply voltage which is clamped to a predetermined voltage, eg., 4 volts.
  • the supply circuit providing the clamped voltage includes a diode 78 connecting a clamped voltage supply source, e.g., -4 volts, to the setting winding and a higher voltage supply source, e.g., 5G volts, through a current limiting resistor 72.
  • Signal delay circuit 18 includes an input circuit having an input terminal 74- and a parallel input coupling circuit 76 for coupling an input signal waveform. '78 to the base of a transistor 80, which is preferably of the PNP type.
  • a collector of the transistor Si couples the input signal waveform to the delay circuit winding whereby the initial Variations in the signal waveform are delayed during the reversal of the stored magnetic ux around the minor aperture 30.
  • the signal delay winding 48 is threaded through the minor aperture 3) and wound around the outer core portion 38.
  • the opposite end of the signal delay winding is coupled to voltage supply sources which are common to both the signal delay circuit and the resetting circuit.
  • the voltage supplied to the signal delay circuit is clamped at 4v by a supply circuit including a diode 31.
  • the collector of a transistor 86 is coupled to the output of the signal delay circuit and the output terminal 88.
  • the transistor 86 preferably of the PNP type, has an emitter coupled to a ground 94 whereby the output circuit is connected to groundl through an alternate path during the time period the stored magnetic flux is being reset.
  • the output circuit is coupled to ground through this alternate path including the transistor 86.
  • the base of the transistor 86 is coupled to a lead connecting the collector of the transistor to the signal delay winding 48 by a capacitor 92.
  • the capacitor 92 has a short response time and develops a negative charge that is coupled to the base of the transistor 86 whereby it is made conductive to couple the output of signal delay circuit to the ground 94.
  • the output signal will not follow the trailing edge of the input signal during the brief interval between the trailing edge of the input signal and the leading edge of the negative portion 9i) of the resetting signal.
  • the transistor 86 remains conductive until the negative portion 98 of the resetting signal takes over to maintain conduction through transistor 86 and therefore maintain connection of the output circuit to ground through the valternate path.
  • a clearing signal 54 is coupled to the translator core 12 by a clearing winding 34 to saturate the core about the major aperture 32 in a clockwise direction in major flux paths indica-ted by the arrows 26, 27, and 28.
  • a setting signal is coupled to the core by a setting signal winding 46.
  • the setting signal 68 provides a predetermined volt-microsecond signal corresponding to the desired time period of delay.
  • the setting signal winding applys to demagnetizing -force to the core to reverse the iow of magnetic iiux in the major iiuX paths, preferably setting the core in a residual state of magnetism between states 1 and 4, as indicated by the curve in FIG. 4a.
  • the reversal of magnetic flux flow in the major flux paths as indicated by the arrows 42 Eand 44 in FIG. 3, also reverses the flux in the inner core portion 4% between the apertures 30 and 32.
  • the reversal of magnetic ilux in the inner core portion 46 produces magnetic flux ow in annular minor flux paths around the minor aperture 30.
  • the iioW of magnetic flux about the minor aperture 30 can now be considered separately and individually until it is necessary to store a different magnitude of magnetic linx about the minor yaperture to provide different time periods of delay.
  • the magnetic tlux which is available for reversal about the minor aperture 30 by windings 48 and Si) or other interrogation windings, which are threaded through the minor aperture 30 only, or other minor apertures in a more than two-apertured core, is the stored magnetic flux in the translator core.
  • the reversal of the stored magnetic flux in the minor flux paths will produce a curve similar to one of the typical hysteresis curves 1a to 7a, shown in the family of curves in FIG. 4b.
  • the signal waveform '78 to be delayed is applied at the input terminals 74.
  • the variations in level of the signal waveform, i.e., the leading and trailing edges are separated by time intervals which are at least equal to and preferably greater than the time period or" delay to prevent loss of a portion of the signals.
  • the transistor Si When the signal waveform goes negative at its 'leading edge, the transistor Si) conducts and the clamped voltage supply (-4 v.) is coupled directly across the winding 4S.
  • the current through the signal delay winding 48 is delayed during the time interval the stored magnetic llux in the minor ilux paths 24 around the aperture 3d is being reversed.
  • the resistor 96 acts yas a current limiter and the signal output voltage rises to ground potential from the level (-4 v.) of the clamped supply voltage.
  • the leading edge of the signal waveform V is delayed for the particular time period of the delay set into the translator circuit.
  • the ampere-turns of the signal Winding 48 is approximately twice the ampere-turns produced by the resetting winding 5t) under quiescent conditions.
  • the resultant ampere turns produced by the signal delay winding prevents the resetting of the stored magnetic flux and the stored magnetic flux in the core portion around the minor aperture remains reversed.
  • the transistor Si When the input signal level returns, at the trailing edge 9S, the transistor Si) will turn olf and a negative spike is produced in the winding rid.
  • the negative spike is coupled by the capacitor 92 to the base of the transistor Sti to turn on the transistor S6 to provide an alternate path to ground for the supply current in the output of the signal delay circuit.
  • the resetting circuit takes over control of the translator.
  • the resetting circuit including the winding Si), produces a magnetizing force in the outer core portion about aperture 3i) to reset the stored magnetic flux in the minor iiux paths about the minor aperture Sil.
  • the end of the resetting winding connected to the voltage supply goes negative by an amount determined by the clamped supply voltage.
  • the time interval required for resetting the stored magnetic liux around the minor aperture is equal to the time period the input signal was delayed in the signal delay output circuit, i.e., during the period of reversal of stored magnetic flux.
  • the resetting signal returns to the bias signal level of the quiescent state and the transistor Se isr returned to its non-conduotive state.
  • the output of the signal delay circuit is disconnected from ground through the alternate path and the output signal is returned to the signal level of its clamped Y supply voltage (-4 v.).
  • the time interval of the input and output signals of the delay circuit are substantially equal ⁇ 'and the input signal has been delayed for the desired time period.
  • a signal translator circuit 101i includes a conventional ⁇ toroidal core 162 formed from magnetic material having a hysteresis characteristic which is approximately rectangular.
  • the toroid forming the translator core V1i2 is magnetically coupled to each of several operational circuits by their respective windings.
  • a clearing circuit ldd includes a winding 106 threaded through an aperture 1% and wound around the core.
  • One end of the clearing winding is coupled to the clearing circuit input terminal 11u which is provided for coui tion as Vindicated by the arrow 112.
  • FIG. 7 a typical hysteresis characteristic curve of a core suitable for use in the circuit of FIG. 5 has been illustrated.
  • ln a typical clearing operation the clearing signal initially drives the 'core 1tl2 into a state of saturation, indicated generally by the reference character 116 in FlG. 7, in response to an applied magnetizing force H. After the clearing pulse, the core returns to a residual state of flux at point 118 in FIG. 7.
  • a setting circuit 121 is coupled to the translator core 102 by a winding 122 threaded through the aperture 108 and wound around a portion of the core.
  • the circuit arrangement for storing magnetic flux in the core 102 is similar to the circuit provided in FIG. l for storing magnetic linx in the core 12.
  • a setting signal having a predetermined time interval is coupled to an input terminal 126 connected to the base of the transistor 128.
  • the transistor 128 controls the current from a supply source through the setting winding 122 wherein the total magnetic ilux stored in the core is dependent upon the time interval of the setting signal and the supply voltage for the setting circuit.
  • the supply voltage for the setting winding 122 is clamped at a predetermined voltage, e.g., -4 volts, by a supply circuit 12h.
  • the collector of the transistor 128 is coupled to the output of a signal delay circuit 130. ln the preferred arrangement oi the circuit shown in FlG. 5, the leading edge of the setting signal 124 is timed to occur simultaneously with the trailing edge of the input signal. As shown in FIG. 6, the trailing edges or returns in level of the ,input signal in the output circuit are delayed by the addition of the inverted settiny signal pulse VR to the output signal V0.
  • the signal VR is coupled to the output of the signal delay circuit by a diode 132 and a lead 135 connected to the collector o the transistor 128.
  • the signal delay circuit includes a signal delay winding 134 which is threaded through the aperture 1418 wound around a portion of the core 1612.
  • the signal to be delayed is coupled to the delay winding by an input circuit including an input terminal 136 and a parallel network 133 coupled toa bias supply source at the terminal 14n.
  • the input-circuit couples the signals to the base of the transistor 142 having an emitter connected to ground and a collector coupled to an end of the delay winding.
  • the opposite end of the delay winding is coupled to a winding supply voltage which is clamped to a predetermined voltage, e.g., ,-4 volts, by a supply circuit ncluding a diode led and a current limiting resistor 14u.
  • the output circuit includes a diode 143 which couples delayed output signals from the delay winding to ⁇ an output terminal ld.
  • the diodes132 and 148 are coupled to a negative voltage supply terminal 152 through a summing resistor 15d whereby portions of the output signal cou pled to either diode are formed on output terminal 150.
  • the delayed signal level above the clamped voltage of the supply, correspondingrtoV the leading edgeY of the output signal VD, is passed lthrough diode 132; and a signal level above the clamped voltage ofthe supply, as passed through diode 143, effectively serves to delay the return of the output signal V0 ,during the time interval of the signal VR.
  • the signal VR has a time interval which is equal to the time interval of the setting signal 124i.
  • the translator core 102 isMdriven into saturation by a clearing signal Vc applying arnagnetizin g force to the core by the clearing winding 1% to saturate the core with magnet-icjflux iiow in the clockwise direc-
  • a setting signal applies a demagnetizing force to the core Vto reverse the magnetic llux in the inner radial portion of the core, driving the core into a state of partial saturation, i.e., a residual state of magnetism, eg., at 'a point dR onthe vertical axis where theporticn 16@ of 'the curve, indicated ⁇ by the dotted line, intersects the vertical axis.
  • the available magnetic flux storedrin the core is'equal to the difference in flux of the 4residual states of magnetism, eg., the dilerence in llux of residual states indicated in FIG. 7 at 11S and dR.
  • the signals to be delayed, VIN, are sequentially coupled to the transistor 142 to apply magnetizing forces to the core 102 by the delay winding 134.
  • the magnet-izing force produced by each signal drives the core back into saturation, indicated on the curve of FIG. 7 at IE6.
  • the leading edges of signals are delayed, preferably for the same time period which was required for setting the core.
  • the transistor 142 remains conductive and the signal output level remains constant.
  • the output signal level of the signal delay circuit is prevented from returning at the trailing edge of the input signal and the trailing edge is delayed in the output by the signal VR whose leading edge is coincident with the trailing edge of the input signal VIN.
  • the trailing edge of the output signal is delayed by the same time period that the leading edge was delayed, assuming that the number of windings in 134 and 122 are equal, whereby the time interval between leading and trailing edges of the input and output signals remains substantially constant.
  • an input signal can be delayed for a time period which can be varied by a setting signal where the period of delay varies between O and the time interval of the signal to be delayed.
  • a translator core can be set by a permanent magnet or other means capable of applying predetermined magnetizing force to the core to set the core by storing any desired magnetic ux therein.
  • the clearing circuit arrangement for clearing the translator core can be modilied or eliminated by providing other means for saturating the core by applying a magnetizing force to the core to produce magnetic ilux saturating the core in a predetermined direction. Saturation of the core can be followed by a setting or storing in which a demagnetizing force is applied to the core by suitable means to reverse the flow of magnetic flux in the core.
  • the size of the core may be tailored to the desired time period of delay in which the magnetic ilux stored therein at saturation corresponds to the desired time period of delay of the signals coupled to the core. Also, by adjusting circuit parameters, i.e., ampere-turns of the windings, the time period of delay may be adjusted relative to the magnetic llux stored in a translator core, for example, the turns of the windings and the clamped voltage may be adjusted in the signal delay circuit to vary the period of delay for a given stored magnetic flux in the core.
  • a circuit arrangement for delaying variations in level or pulses to be delayed comprising: means coupled to the core for storing predetermined different magnitudes of residual magnetic ux in the minor flux paths wherein the magnitude ofthe magnetic ilux is a function of the desired delay; and circuit means having an input and output and a pulse delay winding having one end thereof coupled to said input and the other end coupled to said output for p y serially interconnecting the input to the output, said lili ilux paths .to reduce the impedance or" said winding to place both ends of said winding at substantially the same level after said magnetic flux reversal, said circuit means being operative in response to each of the pulses applied on the input to produce a delayed pulse in the output wherein the time period of delay is substantially equal to the time interval required
  • a translator circuit arrangement for providing an adjustable delay period which comprises: a translator core of magnetic material having a hysteresis characteristic which is approximately rectangular, said core having a plurality of apertures including a major aperture and a minor aperture; a clearing winding threading the major aperture to induce a magnetizing force and a magnetic ux around the major aperture for saturating the core in a first direction; circuit means including a setting winding threading at least the major aperture for coupling a constant amplitude signal having a predetermined time period which is a function of the preselected period of delay wherein said latter signal produces a demagnetizing force in the core and a predetermined stored magnetic flux about the minor aperture; signal circuit means including a signal delay winding threading a minor aperture, a signal output coupled to one end of said signal delay winding and an input coupling signals to be delayed to the other end of said signal delay winding, each of said signals coupled to said input producing a magnetizing force reversing the direction of stored magnetic liux around said minor aperture to
  • a translator circuit arrangement for providing an adjustable delay period which comprises: a translator core of magnetic material having a hysteresis characteristie which is approximately rectangular, said core having a plurality or" apertures including a major aperture and a minor aperture; a clearing winding threading said major aperture to induce a magnetizing force and a magnetic flux around the major aperture for saturating the core in a first direction; setting circuit means including a setting winding threaded through at least the major aperture for coupling a constant amplitude signal having a predeter mined voltage time period which is a function of the preselected period of delay wherein said latter signal produces a demagnetizing force in the core inducing a predetermined stored magnetic iiux in the opposite direction around the minor aperture and magnetic llux ilow in minor iux paths around said minor aperture; signal circuit means including a signal delay winding threaded through said minor aperture and wound about the outer minor core portion, a signal output coupled to one end of said signal delay winding and an input coupling signals
  • a circuit arrangement for delaying input pulses and producing a delayed output pulse having the same time duration as each respective input pulse comprising: setting circuit means coupled to the translator core for coupling a setting signal having a constant voltage and a predetermined time ⁇ interval which is a function of the desired time period of delay to apply a demagnetizing force in the translator core for storing a predetermined magnetic flux; signal circuit means having an input and an output coupled to the core for producing a magnetizing force in the core in response to each ot the input pulses coupled to the input to reverse the direction of flux ow of all of the stored magnetic ux in the annular minor flux paths whereby the leading edges of each of the input pulses are delayed in said output during the respective iiux reversals; and resetting circuit means coupled to the core to produce a magnetizing force for resetting the direction of flow of the
  • a translator circuit for delaying a signal Waveform which is characterized by a change from a first potential level toa second potential level and back Vto the iirst potential level and producing an output signal waveform having the same time duration as each respective input signal waveform, comprising: a core of magnetic material; means for storing magnetic ux in the core wherein the magnitude of theiiux is a function of the desired time period of delay to be given to said signal Waveform; circuit means for applying said signal waveform to said core to reverse the magnetic tlux stored therein to'delay the appearance on the output of said circuit means of the change of said signal waveform trom said lirst potential level to said second potential level during the time period of the reversal of said stored magnetic ux; and means restoring said magnetic flux into the core and delaying the appearance on the output of said circuit means of the change of said signal waveform from said second potential level back to said rst potential level.
  • a translator circuit for delaying a rectangularly.
  • shaped signal waveform to provide an output signal waveform havmg the same time duration as each respective input signal waveform comprising: a core of magnetic material; adjustable means for storing magnetic flux 1n the core wherein the magnitude Vof the iux is a function of the desiredl time period of delay to be given to said signal Waveform; circuit means having antinput and an output connected by a winding inductively coupled to said core; means for applying said signal wave-V form to the input of saidcircuit means to reverse the magnetic llux stored in said core to thereby delay the appearance ofV the leading edge of the signal waveform on the output of said circuit means during the time period of reversal of said stored magnetic flux; a resetting circuit means having a winding coupled to said core and responsive to the termination of said signal Waveform to restore the magnetic flux in the core in a time period equal to the time period of reversal of said stored magnetic liux; and switching means coupling said resetting circuit means to the output of said circuit means for extending the duration of the signal waveform
  • a delay circuit producing an output signal waveform having the same time duration as each respective input signal waveform comprising: a magnetic core; a setting Winding inductively coupling a setting signal source to the core and operative when energized to coerce at least a portion of the core to a selected irst state of flux; a signal delay Winding coupling an input signal source to at least a portion of the core and operative in response to the leading portion of an input signal waveform supplied thereto to coerce the said at least a portion of the core to a second ilux state, to thereby delay the appearance of the leading edge of the output signal waveform on the output of said delay Winding during the time period of said change in state of ux; means including a restore winding coupling a direct current -bias source to the core capable of coercing said at least a portion of the core back into said rst state in the absence of any input signal waveform to restore the said at least a portion of the core to the said rst ilux state
  • a delay circuit for providing a delayed output signal waveform having the same time duration as each respective input signal waveform comprising: a saturable magnetic core; a first means coupled to the core for coercing at least a portion of the core to a selected rst ux state; a signal delay winding coupled to the core; switching means for supplying to the signal delay winding an input signal waveform of a predetermined amplitude, the leading portion of which is dissipated in coercing the core to a second ilux state such that in dependence upon the particular rst iiux state selected, the leading'edge of the output signal waveform is delayed, by a predetermined time interval during the change in flux states, relative to the leading edge of the input signal waveform; means including a restore winding coupled to the core and effective following cessation of the input signal waveform to restore the said at least a portion of the core to the rst ux state in said predetermined time interval; and an alternate Vcurrent source means including a switching means coupling the
  • a delay circuit providing an output pulse for each input pulse comprising: amulti-aperture magnetic core formed Vof a magnetic material having a high residual magnetism and a hysteresis characteristic curve which ⁇ is substantially rectangular, said core having a major aperture in the center and a minor aperture which is oiiset from the center of the core; circuit means for saturating said ycore in a first direction around said major aperture and producing a magnetic tiux in the'opposite direction for storing' a residual magnetic'tiux in conentric magnetic tlux paths around said minor aperture,
  • circuit means including a set winding threading said major aperture and set switching means coupled to said set winding for coupling a set pulse having a variable time duration and a predetermined voltage amplitude to said set winding; signal delay circuit means for reversing the residual magnetic flux stored around said minor aperture in a time period equal to the time duration of the set pulse storing said residual magnetic iluX, in response to said input pulse, said delay circuit means including an input, an output, signal switching means coupled to said input, a signal delay winding threading said minor aperture and coupling the output of said switching means to said signal delay circuit output, said switching means being responsive to said input pulse to produce a pulse of said predetermined voltage amplitude on said signal delay winding; reset circuit means including a reset winding threading said minor aperture; and pulse forming switching means having an input coupled to the output of said signal delay circuit switching means and to said reset winding, and a pulse forming circuit output coupled to the output of said delay circuit means, Said reset winding being connected to a source of bias potential capable of restoring said
  • the method of delaying pulses to provide a delayed output pulse for each input pulse which comprises: magnetically storing a setting signal by producing a magnetizing force in a core of magnetic material and storing a magnetic flux the magnitude of which is a predetermined function of a desired time period of delay; producing a magnetizing force by each input pulse to be delayed to reverse all of the magnetic llux in the core produced by the stored setting signal in a time interval which is substantially equal to the time period of delay, whereby the leading edge of each input pulse is delayed for said time period; producing a magnetizing force which is initiated at the trailing edge ot each input pulse for resetting the stored magnetic flux back into the core; 'and delaying the trailing edge of each input pulse in the output during the time interval that the stored magnetic linx is being reseti 11.
  • the method of delaying pulses wherein a delayed output pulse is produced for each input pulse comprises: magnetically storing a residual flux in at least a portion of a core by a set pulse of adjustable time duration and producing a predetermined magnetizing force wherein the magnitude of the magnetic flux is a predetermined function of a desired time period of delay; coupling an input pulse to be delayed to said core and to an output to produce the same predetermined magnetizing force for reversing said residual uX to saturate said portion of said core wherein the leading edge ot said pulse is delayed in said output for the same time period as the set pulse; producing a reset pulse beginning at the trailing edge oi the input pulse having a time duration equal to said time period of delay; and coupling said reset pulse to said output to delay the trailing edge or the pulse in the output to reform 'the input pulse and to said core to restore the esidual linx in said core for delaying the next input pulse to be delayed and for the saine time period.
  • the method of delaying signals having a longer time duration than the period of delay in which an output signal is produced for each input signal comprising: storing a residual magnetic linx about an aperture in a core of magnetic material in a iirst direction wherein the magnitude of the residual magnetic linx is adjustaoly controlled to produce the desired time delay of said signal; inductively coupling a rst portion of an input signal to said core to produce an input magnetizing force for reversing the residual linx stored therein and coupling the remaining portion of said input signal to an output to thereby provide the rst portion of an output signal having a delayed leading edge equal to said time delay; continuously applying a resetting magnetizing force to said core which force is less than said input magnetizing force to said core to restore said residual magnetic linx in a time period equal to the time period of delay; producing a signal in said output in response to said restoration of said residual flux beginning at the trailing edge of said input signal to maintain the signal level of said output signal and delay the
  • the method of delaying pulses wherein a delayed output pulse is produced for each input pulse comprises: magnetically storing a residual flux in at least a portion of a core wherein the magnitude of the magnetic ⁇ flux is a predetermined function of a desired time period of delay; coupling an input pulse to be delayed to said portion of said core and to an output to produce a magnetizing force in said portion of said core for reversing said residual ux to saturate said portion of said core wherein the formation of the leading edge of said pulse is delayed in said output during the time period of residual ilux reversal; applying an opposing magnetizing force to said portion of said core capable of restoring said residual magnetic iux in said portion in the desired time period of delay in the absence of an input pulse; producing a pulse having a time duration equal to said time period of delay in response to the change in flux during the restoring of the residual magnetic ilux in said portion of said core; and couplinD said pulse to said output to delay the formation of the trailing edge of said input pulse where

Description

Nov. 10, 1.964
Filed July 22. 1959 R. K. GERLACH ETAL SIGNAL DELAY CIRCUIT 2 Sheets-Sheet 1 Nov. 10, 1964 Filed July 22. 1959 R. K. GERLACH ETAL SIGNAL DELAY CIRCUIT 2 Sheets-Sheet 2 JWM@ United States Patent O 3,156,903 SIGNAL DELAY CIRCUIT Richard K. Gerlach, Gardena, and Royal E. Howes, Inglewood, Calif., assignors to The National Cash Register Company, Dayton, Ghio, a corporation of Maryland Filed July 22, 1959, Ser. No. 28,910 i3 Claims. (Cl. 346-174) The present invention relates to signal translator cirn cuits and more particularly to a signal translator circuit for providing a signal delay having a time period which is readily adjustable.
Generally, the present invention is directed to methods and apparatus for delaying signals by storing a predetermined magnitude of magnetic flux in a core of magnetic material wherein the flux magnitude is a function of the desired time period of delay. The signals to be delayed reverse the direction of flow of substantially only the stored magnetic ilux in the core and the signals are delayed for a time period dependent upon the time period required for the reversal of stored magnetic ilux.
In the preferred arrangement of the invention, the time period of delay of the signals is controlled electronically. Certain types of cores which are formed from magnetic material have been found to have desirable characteristics which are inherently well suited for electronically controlling the time period of the delay of signals.
The cores of the preferred type are formed of magnetic material having a high residual magnetism and a hysteresis characteristic curve which is substantially rectangular. The preferred cores have a plurality of apertures wherein the storage and adjustment of predetermined magnitudes of magnetic flux in paths about an aperture is readily accomplished electronically. By the inclusion of these cores having a plurality of apertures or multi-apertured cores in the translator circuits, the Itime period of delay can be varied over the range of magnetic flux storage capacity of the individual core. Further, in a preferred circuit arrangement, the time period of delay of signals has been made to correspond directly to the volt-microsecond integral of a setting signal.
Another advantage of the cores having a plurality of apertures included in the preferred embodiment oi the translator circuit is that a single settincr signal can provide for the storage and use of a magnitude of magnetic ilux indefinitely and the magnitude of said magnetic llux stored can be accurately adjusted by controlling the time interval of the setting sign. it is an object therefore, of the present invention, to provide a signal translator circuit oi the type described above for delaying signals. Y
Another object of the present invention is the provision of a delay for signals and controlling the period of delay electronically.
Another object of the invention is tie provision of delay of a signal wherein the period of delay is adjusted by controlling the magnitude of magnetic ilus stored in a core of 'magnetic material.
A further object is to provide a method of delaying a signal for a time period required to reverse a predetermined magnitude of magnetic ilux stored in a core of magnetic material.
A still further object of the invention is the provision of a method for delaying changes in logical level ot a signal wherein the duration or" delay is controlled by the duration of another signal. i
Another object of the invention is to provide apparatus for the delay oi asignal wherein the period of delay corresponds directly to the time interval ot another signal.
' Further objects and features of the invention will be 3,156,903 Patented Nov. 10, 1964 ice readily apparent to those skilled in the art from the specification and appended drawings illustrated for cer tain preferred embodiments in which:
FIG. 1 is a circuit diagram of the preferred embodiment of the invention;
FIG. 2 is a graph showing typical waveforms of certain signals utilized in the operation oi the preferred circuit embodiment of FIG. l;
FG. 3 is a circuit diagram of a portion of the preferred embodiment shown in FIG. l to illustrate the circuit in a state providing a typical time period of dela FlGS. 4a and 4b are typical hysteresis characteristic curves which will result from interrogation of the large and small apertures respectively of a multi-apertured core as illustrated by the preferred embodiment in FIG. 1;
FIG. 5 is a circuit diagram of an alternate embodiment of the invention;
FlG. 6 illustrates waveforms ot typical signals employed during the operation of the alternate embodiment shown in FlG. 5;
FG. 7 is a graph of a typical hysteresis characteristic curve of a translator core in the alternate embodiment o PEG. 5.
Referring now to the drawings wherein like reference characters designate like or corresponding parts throughout the several views, there is shown in FIG. 1, which illustrates a preferred embodiment, a signal translator circuit arrangement for delaying signals. The translator circuit includes a translator core 12 having a plurality of apertures for storing predetermined magnitudes of magnetic flux to provide corresponding signal delays. The circuits for storing the magnetic ilux include a clearing circuit i4 or applying a magnetizing force to the translator core to saturate the core with magnetic flux in one direction; and a setting signal circuit 16 for coupling setting signals to the translator core for partly reversing the direction of this magnetic flux and thereby storing the desired magnitude of magnetic flux in the core.
The signal to be delayed is coupled to the input of a signal delay circuit 18 which latter is inductively coupled to the core. The signals in the output of this circuit are delayed for a time period determined by the setting signals. A resetting circuit 20 resets the translator core l2 and supplies a signal to the output of the signal delay circuit l5 to eiiect delay of the trailing edges of the signals being delayed.
The translator core i2 employed in the circuit ot the present invention stores magnitudes of magnetic iiux wherein the magnitudes of magnetic flux are a function of the desired durations of signal delay.
The translator core l2 provides a convenient and reliable means ror storing magnitudes of magnetic flux in a core within the individual magnetic flux capacity of cores. The magnetic ilux stored in an individual core can be varied from zero to an amount saturating an annular minor flux path 24:, indicated by dotted lines in FlGS. 1 and 3, surrounding a minor aperture 56, The maximum storage capacity of the signal translator core l2 is determined by the maximum residual magnetic ilux capacity around the minor aperture 3). ln turn, the maximum time period of delay is limited to the time interval required for the reversal of the magnetic ilux stored in the core in ux paths around the minor aperture 3G, wherein the time interval does no exceed the time interval between variations in the levels of the signals, in order to prevent losses in portions of the signals.
A more detailed explanation will next be presented of how a multi-apertured core, such as the core element 12 having at least two apertures including a minor aperture 3i? and a major aperture 32, can be used to store mag- .magnitude of magnetic llux.
es netic llux which is available to interrogating windings threaded through the minor aperture.
The initial step in storing a magnetic llux, which will be available for use, is to apply a magnetizing force to the translator core to saturate the core with magnetic flux in a lirst direction.
In the preferred arrangement shown in FlG. l, the translator core l2 can be so initially saturated, as indicated by the arrows, by applying a magnetizing force to the core produced by a current through a winding threaded through a major aperture 32 and wound about an outer core portion 36. Preferably, the cross sectional area of the core portion 36 is substantially equal to the sum of the cross sectional areas of core portions 33 and 49, and the cross sectional areas of core portions 3d and dll are also substantially equal. The stated core parameters provide for greater eliciency in the use of core material whereby the maximum storage of magnetic flux around the minor aperture is determined by the core dimensions.
A reversal of the initial magnetic flux in the path about the major aperture 32, produced by a-demagnetizing force applied to the core, stores in the path about the minor aperture 30 of the core a predetermined magnitude of flux which is available for use. In FIG. 3, arrows i2 and 44 indicate the direction of a typical resultant magnetic liux flow immediately surrounding the aperture 32 as the result of providing a magnetic llux storage around aperture Since the demagnetizing force producing the magnetic flux reversal tends to reverse the ilow of llux in shorter magnetic paths before reversing the flux in longer paths, the reversal of the initial magnetic lilux commences immediately adjacent the annular periphery of the major aperture 32, and the reversal of magnetic llux extends radially from the maior aperture with an increasing demagnetizing force produced by the setting signal. Having once stored magnetic flux in the flux paths around the minor aperture, this stored flux is reversed in direction in the process of translating signals by a magnetizing force applied to an outer core portion 3S and produced by a winding threaded through the minor aperture and wound around the core portion 38. The magnetic flux flow in theminor path, which is available for reversal in response to interrogation by windings around core portion 38, is the stored magnetic flux. The time interval required for reversal of this stored magnetic flux by the signal to be delayed is the time period of delay.
The previous discussion of the operation of the translator circuit is consistent with the theory that'the energy required to reverse the liow of magnetic llux in an annular llux path about the aperture of a core increases with the radial distance of the flux path from the inner periphery of the core about the aperture. lso, magnetic liux flow in opposite directions can saturate a core in different areas simultaneously while the whole core will be in a state of partial saturation. ln view of the foregoing, it is apparent that after initial saturation of the core l2 by a magnetic flux oW in a clockwise direction, by a clearing signal coupled to the lclearing winding 3d, a magnetic flux can be stored around the minor aperture 3d of the core by the application of a control or setting signal having a constant voltage and a time interval which is controlled, to adjust the magnitude of thestored magnetic flux. The resulting state of the translator core, wherein magnetic llux flow is in opposite directions simultaneously about the major aperture, is a state of partial saturation.
FIG@ 3 illustrates the translator core l2 after a setting signal has been applied to the translator circuitvto store a The magnetic l'lux in llux paths around the major aperture 52, indicated by arrows d2 and d4, haveV been reversed to thereby form the annu'- lar minor liux paths around the minor aperture di?. The magnetic flux in annular ux paths around the minor aperture Btl," as indicated by arrows 3S and d4, is the magnetic flux stored in the translator core.
v portion 3d.
The magnetic flux flow in FlG. 3 is typical; however, it should be realized that the flux llow produced by a single setting signal represents a single predetermined magnitude of magnetic ux only which is stored in the translator core l2, and the magnetic flux stored varies with different desired delay periods. For example, a relatively short setting signal applying a small demagnetizing force to the core for relatively short time periods of delay will reverse, and thereby store, only a small quantity of magnetic llux in the core. Under these conditions, only a small amount of magnetic llux will be reversed around the major aperture 32, and only a small amount of flux will be flowing in annular minor linx paths about the minor aperture Sti. As stated previously, the magnetic flux flow in the annular minor linx paths is stored magnetic llux wherein the linx magnitude in the miner paths is a function of the time period of delay. Further, the time interval of reversal of the stored magnetic llux and therefore the time period of delay is a function of: the flux magnitude, the amplitude of the signal coupled to the core and the number of turns of windings threaded through aperture 3d and Wound about outer core portion 38.
In FlG. 4a, the magnetic llux and magnetizing force have been plotted to show the transition in steps from the residual state of magnetism il corresponding to saturation in a first direction following a clearing signal 54 to successive residual states of magnetism corresponding to saturation in the opposite direction by sequential application of signals to a setting winding 46, The states of partial saturation of the core, after each setting signal, have been indicated by the typical residual magnetic states of magnetism 2 to 6. T he sequential application of setting signals will move the residual state of magnetism of the translator core, in steps, from residual states l to 7 in a path such as indicated by the. dotted line connecting the residual magnetic states ll to 7. The magnitudes of stored magnetic liux in the llux paths Z4 around the minor aperture 30 and the related hysteresis characteristic curves which correspond to residual states of magnetism ll to 7 of the translator core l2, are indicated in FEiG. 4b by curves lla to '7a. It can be seen by an examination of these curves that the residual state 4 of the translator core provides a maximum magnetic flux storage around the minor aperture 3@ wherein hysteresis curve corresponds to the residual state i of the translator core l2.
ln order to produce a stored magnetic flux of predetermined magnitude in the translator core l2, the demagnetization force applied to the core is produced by a voltmicrosecond signal having a predetermined constant voltage and a predetermined time period. The signal is coupled to the setting winding 46 which is threaded through the major aperture 32 and wound around the outer core It should be noted that thesetting winding may be `wound about an inner core portion dll. The polarity of the setting signal and the direction of the winding is such that a translator core initially saturated by a clearing pulse is demagnetized a predetermined amount by reversing the ow of magnetic tlux in the core; and, more particularly, by reversing the direction of magnetic liux in the core adjacent to the aperture 32, wherein the radial distance of reversed magnetic llux from the aperture 32 increases as the setting signal-'time interval increases.
rl`he signals to be delayed are coupled to the translator core by a signal delay winding dd which is threaded through the minor aperture Sil and wound around the outer core portion 33. The signals reverse the direction of the stored magnetic llux around the minor aperture d@ and are delayedduring the period of reversal.
It is readily apparent from the foregoing discussion that by a proper choice of corresponding supply voltages f and number of turns of the windings around the core that vthe time period of delay can be made to correspond directly to the time interval of a setting signal. In order to insure a constant supply voltage for the signal windings 4S and the setting winding 46, the supply circuits have been arranged to limit the supply voltage whereby the translator core 12 is set into a condition of partial saturation by the amount of flux determined by the time interval of the setting signal coupled to the input of the setting circuit.
In the signal delay circuit 1S, the initial variations of the signal wave forms or the leading edges coupled to the input are delayed in the output by adjusting the magnetic iiuX stored in the minor iluX paths about aperture 30. During the period of delay, the signal energy is dissipated in reversing the stored magnetic flux. Since the signal energy is not returned to the delay circuit output, an additional provision must be made to the circuit arrangement or delaying the return variations or trailing edges of the signal waveforms.
The resetting circuit 20 has been provided for resetting the stored magnetic iiux flow in the translator core and also for aiding in delaying the return variations of the signal waveforms in the signal delay output circuit. The resetting circuit includes a winding 5t) threaded about core portion 38 of the minor aperture 3G. The winding 50 is coupled to a supply voltage source through a current limiting resistor S2 and a clamping voltage source through a diode 84, whereby the current amplitude is limited to produce a magnetizing force which is sufficient to reset the stored magnetic ux only about aperture 38. The level of the magnetizing force produced by the resetting circuit is too low to disturb the iluX in the flux path around the major aperture 32. Thus, the reset circuit 20 resets the ilux about minor aperture 3i) to prepare for delay of subsequent signal waveforms.
The circuit arrangement for the signal translator provides for the initial clearing, i.e., saturating the translator core 12, by coupling a clearing signal 54 to the clearing circuit input terminal 56. The clearing signal is coupled to the clearing winding 34 having an opposite end connected to a ground 58. A clearing signal having the proper polarity as indicated in FIG. l initially saturates the translator core in the clockwise direction.
A setting signal 60 is coupled to the input terminal 62 of the circuit 16 to store magnetic iiux in the translator core by applying a demagnetizing force to the core to place the core in a partial state of saturation, preferably at a residual state between points 1 and 4 on the vertical axis of the t1-H curve, illustrated in FIG. 4a. The setting signal is coupled from the input terminal 62 to the base of the transistor 64 by a parallel input circuit 65 including a source of positive bias 68. Preferably the transistor 64 is of the PNP type having an emitter coupled to ground and a collector connected to one end of the setting winding 46. The opposite end of the setting winding is connected to the setting winding supply voltage which is clamped to a predetermined voltage, eg., 4 volts. The supply circuit providing the clamped voltage includes a diode 78 connecting a clamped voltage supply source, e.g., -4 volts, to the setting winding and a higher voltage supply source, e.g., 5G volts, through a current limiting resistor 72.
Signal delay circuit 18 includes an input circuit having an input terminal 74- and a parallel input coupling circuit 76 for coupling an input signal waveform. '78 to the base of a transistor 80, which is preferably of the PNP type. A collector of the transistor Si) couples the input signal waveform to the delay circuit winding whereby the initial Variations in the signal waveform are delayed during the reversal of the stored magnetic ux around the minor aperture 30. The signal delay winding 48 is threaded through the minor aperture 3) and wound around the outer core portion 38. The opposite end of the signal delay winding is coupled to voltage supply sources which are common to both the signal delay circuit and the resetting circuit. The voltage supplied to the signal delay circuit is clamped at 4v by a supply circuit including a diode 31.
The collector of a transistor 86 is coupled to the output of the signal delay circuit and the output terminal 88. The transistor 86, preferably of the PNP type, has an emitter coupled to a ground 94 whereby the output circuit is connected to groundl through an alternate path during the time period the stored magnetic flux is being reset. Thus, in response to the negative por-tion 9d of resetting signal VR, the output circuit is coupled to ground through this alternate path including the transistor 86.
There may be a very brief time interval between the trailing edge of the input signal and the leading edge of the negative portion 90 of the resetting signal. In order to maintain a connection to ground via transistor 86 during this brief time interval, the base of the transistor 86 is coupled to a lead connecting the collector of the transistor to the signal delay winding 48 by a capacitor 92. The capacitor 92 has a short response time and develops a negative charge that is coupled to the base of the transistor 86 whereby it is made conductive to couple the output of signal delay circuit to the ground 94. As a result of this coupling, the output signal will not follow the trailing edge of the input signal during the brief interval between the trailing edge of the input signal and the leading edge of the negative portion 9i) of the resetting signal. The transistor 86 remains conductive until the negative portion 98 of the resetting signal takes over to maintain conduction through transistor 86 and therefore maintain connection of the output circuit to ground through the valternate path.
In the operation of the preferred embodiment, shown in FIG. l, a clearing signal 54 is coupled to the translator core 12 by a clearing winding 34 to saturate the core about the major aperture 32 in a clockwise direction in major flux paths indica-ted by the arrows 26, 27, and 28. After the translator core is saturated by the clearing signal 54, a setting signal is coupled to the core by a setting signal winding 46. The setting signal 68 provides a predetermined volt-microsecond signal corresponding to the desired time period of delay. The setting signal winding applys to demagnetizing -force to the core to reverse the iow of magnetic iiux in the major iiuX paths, preferably setting the core in a residual state of magnetism between states 1 and 4, as indicated by the curve in FIG. 4a. The reversal of magnetic flux flow in the major flux paths, as indicated by the arrows 42 Eand 44 in FIG. 3, also reverses the flux in the inner core portion 4% between the apertures 30 and 32. The reversal of magnetic ilux in the inner core portion 46 produces magnetic flux ow in annular minor flux paths around the minor aperture 30. The iioW of magnetic flux about the minor aperture 30 can now be considered separately and individually until it is necessary to store a different magnitude of magnetic linx about the minor yaperture to provide different time periods of delay. The magnetic tlux which is available for reversal about the minor aperture 30 by windings 48 and Si) or other interrogation windings, which are threaded through the minor aperture 30 only, or other minor apertures in a more than two-apertured core, is the stored magnetic flux in the translator core. The reversal of the stored magnetic flux in the minor flux paths will produce a curve similar to one of the typical hysteresis curves 1a to 7a, shown in the family of curves in FIG. 4b.
Referring now to the delay portion of the circuit for a description of its operation, the signal waveform '78 to be delayed is applied at the input terminals 74. The variations in level of the signal waveform, i.e., the leading and trailing edges are separated by time intervals which are at least equal to and preferably greater than the time period or" delay to prevent loss of a portion of the signals. When the signal waveform goes negative at its 'leading edge, the transistor Si) conducts and the clamped voltage supply (-4 v.) is coupled directly across the winding 4S. The current through the signal delay winding 48 is delayed during the time interval the stored magnetic llux in the minor ilux paths 24 around the aperture 3d is being reversed. After reversal of the stored magnetic flux, the resistor 96 acts yas a current limiter and the signal output voltage rises to ground potential from the level (-4 v.) of the clamped supply voltage. Thus, as shown in FIG. 2, the leading edge of the signal waveform V is delayed for the particular time period of the delay set into the translator circuit.
While the input signal is still negative the current in the signal delay winding 43 provides a sufficient nurnber of ampere-turns on the core portion 33 to overcome the ampere-turns produced by the resetting winding 50. In the preferred arrangement, the ampere-turns of the signal Winding 48, during the time interval of the input signal, is approximately twice the ampere-turns produced by the resetting winding 5t) under quiescent conditions. During the time interval of the input signal, the resultant ampere turns produced by the signal delay winding prevents the resetting of the stored magnetic flux and the stored magnetic flux in the core portion around the minor aperture remains reversed.
When the input signal level returns, at the trailing edge 9S, the transistor Si) will turn olf and a negative spike is produced in the winding rid. The negative spike is coupled by the capacitor 92 to the base of the transistor Sti to turn on the transistor S6 to provide an alternate path to ground for the supply current in the output of the signal delay circuit.
ln order to delay the trailing edge or return of the output signal for the entire time period of delay, the resetting circuit takes over control of the translator. At the trailing edge ofthe Vinput signal waveform, after the tnansistor d@ has gone into a state of non-conduction, the resetting circuit, including the winding Si), produces a magnetizing force in the outer core portion about aperture 3i) to reset the stored magnetic flux in the minor iiux paths about the minor aperture Sil. During the time interval the stored magnetic linx is being reset, the end of the resetting winding connected to the voltage supply goes negative by an amount determined by the clamped supply voltage. The time interval required for resetting the stored magnetic liux around the minor aperture is equal to the time period the input signal was delayed in the signal delay output circuit, i.e., during the period of reversal of stored magnetic flux. After the stored magnetic llux around the minor aperture is reset, the resetting signal returns to the bias signal level of the quiescent state and the transistor Se isr returned to its non-conduotive state. Upon the transistor Se returning to its noncon ductive state, the output of the signal delay circuit is disconnected from ground through the alternate path and the output signal is returned to the signal level of its clamped Y supply voltage (-4 v.). The time interval of the input and output signals of the delay circuit are substantially equal `'and the input signal has been delayed for the desired time period.
vReferring now to PEG. 5, an alternate embodiment has been shown in which a signal translator circuit 101i includes a conventional `toroidal core 162 formed from magnetic material having a hysteresis characteristic which is approximately rectangular. The toroid forming the translator core V1i2 is magnetically coupled to each of several operational circuits by their respective windings. A clearing circuit ldd includes a winding 106 threaded through an aperture 1% and wound around the core.
One end of the clearing winding is coupled to the clearing circuit input terminal 11u which is provided for coui tion as Vindicated by the arrow 112.
pling the clearing signals Vc to the clearing winding and to ground 111i.V In the preferred arrangement of the. alter- Y native embodiment shown in FlG. 5, the clearing circuit ti saturates core 1tl2 with magnetic ilux flowing in the clockwise direction as indicated by the arrow 112.
ln FIG. 7, a typical hysteresis characteristic curve of a core suitable for use in the circuit of FIG. 5 has been illustrated. ln a typical clearing operation the clearing signal initially drives the 'core 1tl2 into a state of saturation, indicated generally by the reference character 116 in FlG. 7, in response to an applied magnetizing force H. After the clearing pulse, the core returns to a residual state of flux at point 118 in FIG. 7.
A setting circuit 121 is coupled to the translator core 102 by a winding 122 threaded through the aperture 108 and wound around a portion of the core. The circuit arrangement for storing magnetic flux in the core 102 is similar to the circuit provided in FIG. l for storing magnetic linx in the core 12. A setting signal having a predetermined time interval is coupled to an input terminal 126 connected to the base of the transistor 128. The transistor 128 controls the current from a supply source through the setting winding 122 wherein the total magnetic ilux stored in the core is dependent upon the time interval of the setting signal and the supply voltage for the setting circuit. The supply voltage for the setting winding 122 is clamped at a predetermined voltage, e.g., -4 volts, by a supply circuit 12h.
The collector of the transistor 128 is coupled to the output of a signal delay circuit 130. ln the preferred arrangement oi the circuit shown in FlG. 5, the leading edge of the setting signal 124 is timed to occur simultaneously with the trailing edge of the input signal. As shown in FIG. 6, the trailing edges or returns in level of the ,input signal in the output circuit are delayed by the addition of the inverted settiny signal pulse VR to the output signal V0. The signal VR is coupled to the output of the signal delay circuit by a diode 132 and a lead 135 connected to the collector o the transistor 128.
The signal delay circuit includes a signal delay winding 134 which is threaded through the aperture 1418 wound around a portion of the core 1612. The signal to be delayed is coupled to the delay winding by an input circuit including an input terminal 136 and a parallel network 133 coupled toa bias supply source at the terminal 14n. The input-circuit couples the signals to the base of the transistor 142 having an emitter connected to ground and a collector coupled to an end of the delay winding. The opposite end of the delay winding is coupled to a winding supply voltage which is clamped to a predetermined voltage, e.g., ,-4 volts, by a supply circuit ncluding a diode led and a current limiting resistor 14u. The output circuit includes a diode 143 which couples delayed output signals from the delay winding to` an output terminal ld. The diodes132 and 148 are coupled to a negative voltage supply terminal 152 through a summing resistor 15d whereby portions of the output signal cou pled to either diode are formed on output terminal 150. For example, the delayed signal level above the clamped voltage of the supply, correspondingrtoV the leading edgeY of the output signal VD, is passed lthrough diode 132; and a signal level above the clamped voltage ofthe supply, as passed through diode 143, effectively serves to delay the return of the output signal V0 ,during the time interval of the signal VR.r The signal VR has a time interval which is equal to the time interval of the setting signal 124i.
ln operation, the translator core 102 isMdriven into saturation by a clearing signal Vc applying arnagnetizin g force to the core by the clearing winding 1% to saturate the core with magnet-icjflux iiow in the clockwise direc- Subsequently, a setting signal applies a demagnetizing force to the core Vto reverse the magnetic llux in the inner radial portion of the core, driving the core into a state of partial saturation, i.e., a residual state of magnetism, eg., at 'a point dR onthe vertical axis where theporticn 16@ of 'the curve, indicated `by the dotted line, intersects the vertical axis. The available magnetic flux storedrin the core is'equal to the difference in flux of the 4residual states of magnetism, eg., the dilerence in llux of residual states indicated in FIG. 7 at 11S and dR.
The signals to be delayed, VIN, are sequentially coupled to the transistor 142 to apply magnetizing forces to the core 102 by the delay winding 134. The magnet-izing force produced by each signal drives the core back into saturation, indicated on the curve of FIG. 7 at IE6. During the interval the core 102 is being driven back into saturation, the leading edges of signals are delayed, preferably for the same time period which was required for setting the core. During the remaining time interval of the input signal, the transistor 142 remains conductive and the signal output level remains constant.
The output signal level of the signal delay circuit is prevented from returning at the trailing edge of the input signal and the trailing edge is delayed in the output by the signal VR whose leading edge is coincident with the trailing edge of the input signal VIN. As shown, the trailing edge of the output signal is delayed by the same time period that the leading edge was delayed, assuming that the number of windings in 134 and 122 are equal, whereby the time interval between leading and trailing edges of the input and output signals remains substantially constant.
As can be seen from the discussion of the operation of the circuit FIG. 5, an input signal can be delayed for a time period which can be varied by a setting signal where the period of delay varies between O and the time interval of the signal to be delayed.
In light of the above teachings, various modifications of the invention are contemplated and will be apparent to those skilled in the art without departing from the spirit and-scope of the invention. For example, a translator core can be set by a permanent magnet or other means capable of applying predetermined magnetizing force to the core to set the core by storing any desired magnetic ux therein. Also, the clearing circuit arrangement for clearing the translator core can be modilied or eliminated by providing other means for saturating the core by applying a magnetizing force to the core to produce magnetic ilux saturating the core in a predetermined direction. Saturation of the core can be followed by a setting or storing in which a demagnetizing force is applied to the core by suitable means to reverse the flow of magnetic flux in the core. Also, in the preferred embodiment of FIG. l, or the alternate embodiment of FIG. 5, the size of the core may be tailored to the desired time period of delay in which the magnetic ilux stored therein at saturation corresponds to the desired time period of delay of the signals coupled to the core. Also, by adjusting circuit parameters, i.e., ampere-turns of the windings, the time period of delay may be adjusted relative to the magnetic llux stored in a translator core, for example, the turns of the windings and the clamped voltage may be adjusted in the signal delay circuit to vary the period of delay for a given stored magnetic flux in the core.
What is claimed is:
l. In combination, with a core having major concentric iiux paths about a major aperture and minor concentric flux paths about a minor aperture wherein the minor flux paths provide for the storage of predetermined diterent magnitudes of residual magnetic iiux, a circuit arrangement for delaying variations in level or pulses to be delayed comprising: means coupled to the core for storing predetermined different magnitudes of residual magnetic ux in the minor flux paths wherein the magnitude ofthe magnetic ilux is a function of the desired delay; and circuit means having an input and output and a pulse delay winding having one end thereof coupled to said input and the other end coupled to said output for p y serially interconnecting the input to the output, said lili ilux paths .to reduce the impedance or" said winding to place both ends of said winding at substantially the same level after said magnetic flux reversal, said circuit means being operative in response to each of the pulses applied on the input to produce a delayed pulse in the output wherein the time period of delay is substantially equal to the time interval required to reverse the stored magnetic ilux in the minor magnetic flux paths.
2. A translator circuit arrangement for providing an adjustable delay period which comprises: a translator core of magnetic material having a hysteresis characteristic which is approximately rectangular, said core having a plurality of apertures including a major aperture and a minor aperture; a clearing winding threading the major aperture to induce a magnetizing force and a magnetic ux around the major aperture for saturating the core in a first direction; circuit means including a setting winding threading at least the major aperture for coupling a constant amplitude signal having a predetermined time period which is a function of the preselected period of delay wherein said latter signal produces a demagnetizing force in the core and a predetermined stored magnetic flux about the minor aperture; signal circuit means including a signal delay winding threading a minor aperture, a signal output coupled to one end of said signal delay winding and an input coupling signals to be delayed to the other end of said signal delay winding, each of said signals coupled to said input producing a magnetizing force reversing the direction of stored magnetic liux around said minor aperture to produce respective signals at said signal output which are delayed'for said preselected period; resetting circuit means coupled to said signal output including a resetting winding for producing a magnetizing force around said minor aperture for reset ting the stored magnetic flux around the minor aperture in the absence of a signal on the signal delay winding, said resetting circuit means being responsive to the reversal of magnetic ilux iiow during resetting of the stored magnetic ux to produce a reset signal having a time duration that is a function of the magnitude of the stored magnetic flux and that is substantially the same as the time period of delay of the signals, whereby each of the signals in the output of said signal circuit means is delayed for the desired time period and is of the same time duration.
3. A translator circuit arrangement for providing an adjustable delay period which comprises: a translator core of magnetic material having a hysteresis characteristie which is approximately rectangular, said core having a plurality or" apertures including a major aperture and a minor aperture; a clearing winding threading said major aperture to induce a magnetizing force and a magnetic flux around the major aperture for saturating the core in a first direction; setting circuit means including a setting winding threaded through at least the major aperture for coupling a constant amplitude signal having a predeter mined voltage time period which is a function of the preselected period of delay wherein said latter signal produces a demagnetizing force in the core inducing a predetermined stored magnetic iiux in the opposite direction around the minor aperture and magnetic llux ilow in minor iux paths around said minor aperture; signal circuit means including a signal delay winding threaded through said minor aperture and wound about the outer minor core portion, a signal output coupled to one end of said signal delay winding and an input coupling signals to be delayed to the other end o said signal delay winding, each of said signals coupled to said input producing a magnetizing force around said minor aperture for reversing the direction of stored magnetic flux in said minor tlux paths to produce respective signals at said signal output which are delayed tor said preselected period; and resetting circuit means coupled to said signal output including a resetting winding for producing a magnetizing force for resetting the stored magnetic ilux around the minor aperture at the termination of the signal on the signal delay winding, said resetting circuit means being responsive to the reversal of magnetic ilux flow during resetting of the stored magnetic flux to produce a reset signal having a time duration which is a function of the magnitude of the stored magnetic flux and is substantially the same time period as the time period of delay of the signals, whereby each of the signals in the output is delayed for the desired time period and reformed in the output.
4. In combination with a translator core of magnetic material having at least one major aperture and at least one minor aperture providing annular major and minor flux paths for storing preselected magnitudes of magnetic flux, a circuit arrangement for delaying input pulses and producing a delayed output pulse having the same time duration as each respective input pulse comprising: setting circuit means coupled to the translator core for coupling a setting signal having a constant voltage and a predetermined time `interval which is a function of the desired time period of delay to apply a demagnetizing force in the translator core for storing a predetermined magnetic flux; signal circuit means having an input and an output coupled to the core for producing a magnetizing force in the core in response to each ot the input pulses coupled to the input to reverse the direction of flux ow of all of the stored magnetic ux in the annular minor flux paths whereby the leading edges of each of the input pulses are delayed in said output during the respective iiux reversals; and resetting circuit means coupled to the core to produce a magnetizing force for resetting the direction of flow of the stored magnetic ilux after each input pulse and between each of the input pulses, said reset circuit means also being coupled to the output of said signal circuit means and producing a reset signal after each input pulse during the time interval the stored magnetic flux in the minor iiux paths is being reset to delay the trailing edges of each of the input pulses in the output for the same time period as the leading edges of the pulses.
5. A translator circuit for delaying a signal Waveform which is characterized by a change from a first potential level toa second potential level and back Vto the iirst potential level and producing an output signal waveform having the same time duration as each respective input signal waveform, comprising: a core of magnetic material; means for storing magnetic ux in the core wherein the magnitude of theiiux is a function of the desired time period of delay to be given to said signal Waveform; circuit means for applying said signal waveform to said core to reverse the magnetic tlux stored therein to'delay the appearance on the output of said circuit means of the change of said signal waveform trom said lirst potential level to said second potential level during the time period of the reversal of said stored magnetic ux; and means restoring said magnetic flux into the core and delaying the appearance on the output of said circuit means of the change of said signal waveform from said second potential level back to said rst potential level.
6. A translator circuit for delaying a rectangularly.
shaped signal waveform to provide an output signal waveform havmg the same time duration as each respective input signal waveform comprising: a core of magnetic material; adjustable means for storing magnetic flux 1n the core wherein the magnitude Vof the iux is a function of the desiredl time period of delay to be given to said signal Waveform; circuit means having antinput and an output connected by a winding inductively coupled to said core; means for applying said signal wave-V form to the input of saidcircuit means to reverse the magnetic llux stored in said core to thereby delay the appearance ofV the leading edge of the signal waveform on the output of said circuit means during the time period of reversal of said stored magnetic flux; a resetting circuit means having a winding coupled to said core and responsive to the termination of said signal Waveform to restore the magnetic flux in the core in a time period equal to the time period of reversal of said stored magnetic liux; and switching means coupling said resetting circuit means to the output of said circuit means for extending the duration of the signal waveform on the output ot said circuit means for the time interval that the magnetic flux is being restored back into the core.
7. A delay circuit producing an output signal waveform having the same time duration as each respective input signal waveform comprising: a magnetic core; a setting Winding inductively coupling a setting signal source to the core and operative when energized to coerce at least a portion of the core to a selected irst state of flux; a signal delay Winding coupling an input signal source to at least a portion of the core and operative in response to the leading portion of an input signal waveform supplied thereto to coerce the said at least a portion of the core to a second ilux state, to thereby delay the appearance of the leading edge of the output signal waveform on the output of said delay Winding during the time period of said change in state of ux; means including a restore winding coupling a direct current -bias source to the core capable of coercing said at least a portion of the core back into said rst state in the absence of any input signal waveform to restore the said at least a portion of the core to the said rst ilux state following the cessation of said input signal waveform on said signal delay winding; and circuit means coupling said signal delay winding and said restore Winding for extending the duration of the said output signal waveform for a time interval equal to the delay of the leading edge of the output signal by connecting said bias source to the output of said delay winding during the restoration of said at least a portion of the core to the said first iux state.
8. A delay circuit for providing a delayed output signal waveform having the same time duration as each respective input signal waveform comprising: a saturable magnetic core; a first means coupled to the core for coercing at least a portion of the core to a selected rst ux state; a signal delay winding coupled to the core; switching means for supplying to the signal delay winding an input signal waveform of a predetermined amplitude, the leading portion of which is dissipated in coercing the core to a second ilux state such that in dependence upon the particular rst iiux state selected, the leading'edge of the output signal waveform is delayed, by a predetermined time interval during the change in flux states, relative to the leading edge of the input signal waveform; means including a restore winding coupled to the core and effective following cessation of the input signal waveform to restore the said at least a portion of the core to the rst ux state in said predetermined time interval; and an alternate Vcurrent source means including a switching means coupling the output ofthe signal delay winding and the restore Winding such that in response to the potential present on the restore winding during restoration of at least a portion of a core, the duration of the output signal waveiorm is eifectively extended for a timerinterval equal to the dissipated leading portion of the input signal waveform.
9. A delay circuit providing an output pulse for each input pulse comprising: amulti-aperture magnetic core formed Vof a magnetic material having a high residual magnetism and a hysteresis characteristic curve which `is substantially rectangular, said core having a major aperture in the center and a minor aperture which is oiiset from the center of the core; circuit means for saturating said ycore in a first direction around said major aperture and producing a magnetic tiux in the'opposite direction for storing' a residual magnetic'tiux in conentric magnetic tlux paths around said minor aperture,
said circuit means including a set winding threading said major aperture and set switching means coupled to said set winding for coupling a set pulse having a variable time duration and a predetermined voltage amplitude to said set winding; signal delay circuit means for reversing the residual magnetic flux stored around said minor aperture in a time period equal to the time duration of the set pulse storing said residual magnetic iluX, in response to said input pulse, said delay circuit means including an input, an output, signal switching means coupled to said input, a signal delay winding threading said minor aperture and coupling the output of said switching means to said signal delay circuit output, said switching means being responsive to said input pulse to produce a pulse of said predetermined voltage amplitude on said signal delay winding; reset circuit means including a reset winding threading said minor aperture; and pulse forming switching means having an input coupled to the output of said signal delay circuit switching means and to said reset winding, and a pulse forming circuit output coupled to the output of said delay circuit means, Said reset winding being connected to a source of bias potential capable of restoring said residual ilux about said minor aperture during the time interval of delay in the absence of an input pulse of said predetermined amplitude o-n said delay Winding, said pulse forming switching means being connected to a source of said predetermined voltage amplitude and responsive to a reset pulse produced on the reset winding during restoration of said residual magnetic ilux to produce a pulse on the delay circuit output for maintaining the output signal level during the time period of restoration of said residual magnetic tlux whereby the output pulses produced by said delay circuit are of the same time duration as the time duration of the input pulses and delayed for the time period of said set pulse.
10. The method of delaying pulses to provide a delayed output pulse for each input pulse which comprises: magnetically storing a setting signal by producing a magnetizing force in a core of magnetic material and storing a magnetic flux the magnitude of which is a predetermined function of a desired time period of delay; producing a magnetizing force by each input pulse to be delayed to reverse all of the magnetic llux in the core produced by the stored setting signal in a time interval which is substantially equal to the time period of delay, whereby the leading edge of each input pulse is delayed for said time period; producing a magnetizing force which is initiated at the trailing edge ot each input pulse for resetting the stored magnetic flux back into the core; 'and delaying the trailing edge of each input pulse in the output during the time interval that the stored magnetic linx is being reseti 11. The method of delaying pulses wherein a delayed output pulse is produced for each input pulse which method comprises: magnetically storing a residual flux in at least a portion of a core by a set pulse of adjustable time duration and producing a predetermined magnetizing force wherein the magnitude of the magnetic flux is a predetermined function of a desired time period of delay; coupling an input pulse to be delayed to said core and to an output to produce the same predetermined magnetizing force for reversing said residual uX to saturate said portion of said core wherein the leading edge ot said pulse is delayed in said output for the same time period as the set pulse; producing a reset pulse beginning at the trailing edge oi the input pulse having a time duration equal to said time period of delay; and coupling said reset pulse to said output to delay the trailing edge or the pulse in the output to reform 'the input pulse and to said core to restore the esidual linx in said core for delaying the next input pulse to be delayed and for the saine time period.
12. The method of delaying signals having a longer time duration than the period of delay in which an output signal is produced for each input signal comprising: storing a residual magnetic linx about an aperture in a core of magnetic material in a iirst direction wherein the magnitude of the residual magnetic linx is adjustaoly controlled to produce the desired time delay of said signal; inductively coupling a rst portion of an input signal to said core to produce an input magnetizing force for reversing the residual linx stored therein and coupling the remaining portion of said input signal to an output to thereby provide the rst portion of an output signal having a delayed leading edge equal to said time delay; continuously applying a resetting magnetizing force to said core which force is less than said input magnetizing force to said core to restore said residual magnetic linx in a time period equal to the time period of delay; producing a signal in said output in response to said restoration of said residual flux beginning at the trailing edge of said input signal to maintain the signal level of said output signal and delay the trailing edge of the output signal for the desired time delay, whereby the output signal has the same time duration as the input signal but delayed for the desired time period and said residual magnetic llux is restored in the core for delaying the next input signal for the desired time period of delay.
13. The method of delaying pulses wherein a delayed output pulse is produced for each input pulse which method comprises: magnetically storing a residual flux in at least a portion of a core wherein the magnitude of the magnetic `flux is a predetermined function of a desired time period of delay; coupling an input pulse to be delayed to said portion of said core and to an output to produce a magnetizing force in said portion of said core for reversing said residual ux to saturate said portion of said core wherein the formation of the leading edge of said pulse is delayed in said output during the time period of residual ilux reversal; applying an opposing magnetizing force to said portion of said core capable of restoring said residual magnetic iux in said portion in the desired time period of delay in the absence of an input pulse; producing a pulse having a time duration equal to said time period of delay in response to the change in flux during the restoring of the residual magnetic ilux in said portion of said core; and couplinD said pulse to said output to delay the formation of the trailing edge of said input pulse whereby the delayed pulse in the output has the same time duration as the input pulse.
References Cited in the tile of this patent UNITED STATES PATENTS 2,757,297 Evans et al. July 31, 1956 2,770,737 Rainey Nov. 13, 1956 2,988,653 Samusenko June 13, 1961 2,992,415 Bauer July 11, 1961

Claims (1)

1. IN COMBINATION, WITH A CORE HAVING MAJOR CONCENTRIC FLUX PATHS ABOUT A MAJOR APERTURE AND MINOR CONCENTRIC FLUX PATHS ABOUT A MINOR APERTURE WHERIN THE MINOR FLUX PATHS PROVIDE FOR THE STORAGE OF PREDETERMINED DIFFERENT MAGNITUDES OF RESIDUAL MAGNETIC FLUX, A CIRCUIT ARRANGEMENT FOR DELAYING VARIATIONS IN LEVEL OF PULSES TO BE DELAYED COMPRISING: MEANS COUPLED TO THE CORE FOR STORING PREDETERMINED DIFFERENT MAGNITUDES OF RESIDUAL MAGNETIC FLUX IN THE MINOR FLUX PATHS WHEREIN THE MAGNITUDE OF THE MAGNETIC FLUX IS A FUNCTION OF THE DESIRED DELAY; AND CIRCUIT MEANS HAVING AN INPUT AND OUTPUT AND A PULSE DELAY WINDING HAVING ONE END THEREOF COUPLED TO SAID INPUT AND THE OTHER END COUPLED TO SAID OUTPUT FOR SERIALLY INTERCONNECTING THE INPUT TO THE OUTPUT, SAID WINDING BEING THREADED THROUGH SAID MINOR APERTURE FOR COUPLING SAID PULSES TO BE DELAYED TO THE CORE TO REVERSE THE DIRECTION OF THE MAGNETIC FLUX STORED IN THE MINOR FLUX PATHS TO REDUCE THE IMPEDANCE OF SAID WINDING TO PLACE BOTH ENDS OF SAID WINDING AT SUBSTANTIALLY THE SAME LEVEL AFTER SAID MAGNETIC FLUX REVERSAL, SAID CIRCUIT MEANS BEING OPERATIVE IN RESPONSE TO EACH OF THE PULSES APPLIED ON THE INPUT TO PRODUCE A DELAYED PULSE IN THE OUTPUT WHEREIN THE TIME PERIOD OF DELAY IS SUBSTANTIALLY EQUAL TO THE TIME INTERVAL REQUIRED TO REVERSE THE STORED MAGNETIC FLUX IN THE MINOR MAGNETIC FLUX PATHS.
US828910A 1959-07-22 1959-07-22 Signal delay circuit Expired - Lifetime US3156903A (en)

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US828910A US3156903A (en) 1959-07-22 1959-07-22 Signal delay circuit
GB23079/60A GB907492A (en) 1959-07-22 1960-07-01 Delay circuits
CH819360A CH364003A (en) 1959-07-22 1960-07-15 Pulse delay circuit
DEN18651A DE1114534B (en) 1959-07-22 1960-07-19 Pulse delay circuit
FR833422A FR1263576A (en) 1959-07-22 1960-07-20 Pulse delay circuits

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US3337746A (en) * 1965-03-12 1967-08-22 Dresser Ind Acoustic well logging with time interval multiplication

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US4432314A (en) * 1980-08-22 1984-02-21 General Supply (Construction) Co., Ltd. Internal combustion engine

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US2757297A (en) * 1955-06-07 1956-07-31 Westinghouse Electric Corp Time delay devices
US2770737A (en) * 1953-05-18 1956-11-13 Jr Robert A Ramey Magnetic delay line
US2988653A (en) * 1958-06-03 1961-06-13 Rca Corp Transfluxor counting circuit
US2992415A (en) * 1956-10-04 1961-07-11 Ibm Magnetic core pulse circuits

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US2770737A (en) * 1953-05-18 1956-11-13 Jr Robert A Ramey Magnetic delay line
US2757297A (en) * 1955-06-07 1956-07-31 Westinghouse Electric Corp Time delay devices
US2992415A (en) * 1956-10-04 1961-07-11 Ibm Magnetic core pulse circuits
US2988653A (en) * 1958-06-03 1961-06-13 Rca Corp Transfluxor counting circuit

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