US3128377A

US3128377A - Log-time voltage generator

Info

Publication number: US3128377A
Application number: US98397A
Authority: US
Inventors: Murray C Goddard
Original assignee: Eastman Kodak Co
Current assignee: Eastman Kodak Co
Priority date: 1961-03-27
Filing date: 1961-03-27
Publication date: 1964-04-07
Anticipated expiration: 1981-04-07
Also published as: GB932835A; DE1159502B

Description

April 7, 1964 M. c. GODDARD LOG-TIME VOLTAGE GENERATOR Filed March 27,

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ATTORNEY/S United States Patent Oice 3,128,377 Patented Apr. 7, 1964 3,123,377 LG-TME VOLTAGE GENERATGR Murray C. Goddard, Rochester, NX., assignmto Eastman Kodak Company, Rochester, NX., a corporation of New Jersey Filed Mar. 27, 1961, Ser. No. 93,397 6 Ciaims. (Cl. 235197)l This invention relates to a log-time voltage generator, the output voltage of which varies substantially directly as the logarithm of the time which elapses following the act of placing the unit in operation.

In the field of photography, for example, in color printing, it is frequently desirable to measure or control exposure times over a range of approximately 100 to 1, for example, from .0l sec. to l sec. A timer which produces an output voltage which varies with time, is commonly used for this purpose. Such a timer preferably provides a voltage which, rather than varying directly as the elapsed time, varies as the logarithm thereof. This permits much more accurate control of the exposure particularly when relatively short exposure periods are involved.

While there are many known devices which Will approximate a log-time output voltage, those heretofore used have been unduly bulky, complicated, and/or expensive and have, at best, been only moderately satisfactory for the intended purpose.

It is an object of this invention to produce a log-time voltage generator of relatively simple construction which uses a relatively few readily available components and yet which, over a considerable time range will produce voltages which follow very closely the theoretical log/ time curve.

Further objects and advantages of this invention will become apparent from the following description and claims, particularly when considered in the light of the accompanying drawing wherein:

FIG. 1 is an electrical diagram of my improved log timer;

FIG. 2 is a graph showing the voltage vs. time relationships which exist at an intermediate point in the timer;

FIG. 3 is a graph of the output voltage of my improved timer plotted against elapsed time.

As shown in FIG. l my improved log timer comprises a rst D.C. amplifier provided with a feed back capacitor 11 connected between its input and

output terminals

12, 13. While any good quality amplifier could be used for amplifier 10, the particular unit diagrammatically illustrated in FIG. 1 is a commercially available amplifier known as the Philbrick Model USA-3 Operational Amplifier manufactured by the George A. Philbrick Researchers, lnc. This unit is shown in the drawing merely in block diagram form and would, of course, in actual practice, include the usual provisions (not shown) for supplying the necessary operating potentials thereto. Connected to the input terminal 12 of amplifier 10 is an input resistance means 14 which, in turn, is connected at 15 to a current-limiting resistor 16.

The log timer is intended to be controlled in accordance with the polarity of a control voltage applied to input control terminal 17 and, to obtain this control voltage, I have shown, merely for purposes of illustration, a switch 70 for selectively connecting terminal 17 to a source 71 of positive potential (+30 volts) or to a source 72 of negative potential (-30 volts). When the switch is in the position shown, wherein positive potential is present at terminal 17, the unit will be in its Ol or Reset condition. Movement of the switch to its other or On position will place the unit into operation.

A diode 13 has its cathode connected to the junction 15 and its anode to a source of fixed negative bias voltage of about 5.6 volts provided by a resistor 19 and Zener diode 20 connected, as shown, across a suitable source of negative voltage. Another diode 21 is arranged with its anode connected to junction 15 and its cathode to ampliiier input terminal 12, while still another diode 22, similarly polarized, connects from the amplifier input terminal 12 to an adjustable tap 23 on a potentiometer 23. Potentiometer 23 has its one end connected through a second Zener diode 24 to the amplifier output terminal 13 and has its other end connected through a relatively high value resistor 25 to a source 25 of positive potential.

A resistive feed-back circuit 30, current flow through which is controlled by a diode 31 incorporated therein, is connected from the output terminal 13 to the input terminal 12 of amplifier 10 in parallel with feed-back capacitor 11. An intermediate point 32 on this resistive circuit 30 is connected to the anode of another diode 33, the cathode 34 of which is connected to a source of low positive bias voltage provided, as shown, by resistor 35 and Zener diode 36.

Coupled by a multi-branch diode-controlled resistance network 40 to the output terminal 13 of amplifier 10 is a second D.C. amplifier 41 having input and

output terminals

42 and 43. As shown in the drawing the output from this second amplifier serves also as the output of the log timer itself. Amplifier 41 is preferably of the same general type as amplifier 10 and is provided with a resistive feed-back circuit 44 from the output terminal 43 to input terminal 4.2. The value of resistor 44 is preferably substantially equal to the efiective resistance of the resistance network 40 (when the

diodes

51, 52 and 53 therein are reversely biased to render them non-conductive). The input terminal 42 of amplifier 41 is also connected through a resistor 45 of similar value to an intermediate point 46 on a voltage divider 46. This latter connection is used to provide a small degree of positive biasing potential for amplifier 41 to bring the initial output voltage to the desired D.C. level.

Network 40 comprises four

resistance branches

47, 48, 49 and S0, the last three of which have the anode terminals of

diodes

51, 52, 53 respectively connected to

intermediate points

54, 55, 56 thereon. The cathodes of these diodes are connected together to a source of low positive potential 57 provided by Zener diode 58 and resistor 59.

The particular log timer shown in FIG. l is intended to provide a voltage which may be expressed as:

throughout the range wherein t varies from 0.1 to 10.0 seconds. During operation, as will be more fully explained below, the input voltage applied to terminal 17 will be negative and the voltage at the output 13 of amplifier 10 will rise from a slightly negative initial value to a positive value. Amplier 41, however, will cause an inverting action so that the desired negative output voltages, called for by the above equation, will be obtained.

To prepare the timer for operation, switch 70 must first be returned to its Off or Reset condition shown, so that the positive potential from terminal 71 will be applied through resistor 16 and diode 21 to the input terminal 12 of amplifier 10. The voltage at output terminal 13 of amplifier 10 will thereupon begin to drop rapidly from its previous positive potential, at a rate determined mainly by the values of resistor 16 and capacitor 11, and Will continue to fall until it reaches a value of approxi- 'Y mately -10 volts, when the potential at the tap 23 of l53 at 6.935 seconds.

potentiometer 23 will reach ,such a value as to render diode 22 conductive. This will stop further change in voltage at the output terminal 13 and the voltage will therefore remain at this l volt Reset level until the timer isiagain placed in operation. The voltage at output terminal 43 will, of course, also similarly change (although in the opposite direction) to its corresponding approximately volt positive initial or Reset Value.

To start a timing operation, switch 70 is switched On vto apply 30 volts negative potential to input terminal 17.

This will render diode 13 conductive and will cause the voltage at junction 15 to fall to a steady, approximately 6 volt negative operating potential as determined by Zener `diode 2t). Diodes 21 and 22 will, of course, then be -reversely biased so that they will no longer be conductive.

As is well known by those skilled in the art, the circuit formed by input resistance 14, amplifier 1f) and feedback capacitor 11 constitutes a time integrating circuit, and the voltage at the output terminal 13 of amplifier itl will therefore begin to rise linearly as indicated at 61' in FIG. 2.

When the voltage at terminal 13 reaches substantially Zero, as indicated at point 62', diode 31 in the resistive feedback circuit 30 will become conductive. This will effectively place resistive circuit 30 in shunt with capacitor 11, and the effective feed-back due to this combined capacitive and resistive feed-back action will now be such that the voltage at point 13 will begin to rise exponentially as indicated at 63 until it reaches such a value that the vpotential at point 32 on circuit 3i) becomes sufiiciently positive as to render diode 33 conductive. At this time, indicated by the point 64 in FiG. 2, resistive network 30 becomes incapable of further effect so far as the feedback characteristics are concerned and the voltage at terminal 13 will once again begin a linear rise, as at 65', which, as indicated in FIG. 2, will be at a somewhat lower rate than the initial portion and will continue through the remainder of the design time range of the unit (10 sec. in this case).

.Meanwhile the amplifier 41, with its resistive input network 40 and feed-back resistor 44, effectively inverts the voltage at terminal 13 so that, as shown in FIG. 3, the output voltage at output terminal 43 will vary as at --61, from its initial +10 volt value linearly in a negative direction to the point 62, then exponentially as at 63 until the-point 64 is reached and then will again continue lin- `early as at 65 until such time as the voltage at point 54 on branch 58 becomes sufliciently positive to render diode 51 conductive. This point is indicated at 66 on FIG. 2 and 66 on FIG. 3. At this time the ratio of the effective resistance of network 40 to feed-back resistor 44 is changed so that the voltage at the output of amplifier 41 will increasenegatively at a somewhat slower rate with respect to the rate of change of the voltage at point 13. This is indicated by the straight line portion 67 in FG. 3. This will continue until such-time (indicated at 63, 63') as diode 52 becomes conductive when, once again, the rate of change of the output voltage at terminal 43 will be further decreased. Fially diode S3 will become conductive causing a still further decrease in voltage/time characteristics as indicated at-69.

As shown in FIGS. 2 and 3 the values of the various components utilized in the particular timer illustrated have been so chosen that diode 31 becomes conductive when the output voltage is substantially at Zero volts, which occurs 1/10 of a second after initiation of operation of the timer. Diode 33 becomes conductive at .767 second as indicated at 64 and 64'; diode 51 becomes conductive at 1.573 seconds; diode 52, at 3.392 seconds; and diode A comparison of the curve of FIG. 3 with the desired log-time curve (V=-25 log ltlt) will show that the output matches extremely closely the desired characteristics over the entire 100:1 time range. As shown in the drawing, most of the resistive paths include a plurality of series-connected resistors of standard values which are readily available on the open market. Obviously it would, of course, be kperfectly possible to use other combinations of standard resistors or, if desired, even to use single resistors or potentiometers of nonstandard values without adversely affecting the operation so long as the over-all resistances of the various circuits were of the same approximate values. The Zener voltage of the various Zener diodes used in the particular timer illustrated is shown adjacent each such Zener diode. The other, normal, diodes 1S, 21, etc., may conveniently be type INS/15 silicon diodes.

By effectively utilizing first capacitive feed-back, then a combination of capacitive and resistive feed-back, and finally, once again, capacitive feed-back around the first amplifier 1Q, the first portion of the desired logarithmic curve is approximated very closely over a time range of better than l0 to 1 with but a minimum of components. This logarithmic portion is actually being generated by the first amplifier section alone, amplifier 41 merely serving to invert the voltage appearing at point 13. Thus, with this arrangement, itis possible to extend the useful range to over a to l time range while requiring but three additional diode-controlled branches in the resistance network 40. Any attempt to approach a log-time curve by using this latter type of straight line curve-segment matching over the entire range would require a much larger number of diode-controlled resistive branches. Moreover with the arrangement shown reset is very readily and quickly accomplished by merely changing the value of the voltage applied to the input terminal 17.

Obviously many changes can be made in the specific arrangement shown and described without departing from the spirit and scope of the invention as defined by the appended claims.

I claim:

1. A log time voltage generator comprising a voltageintegrating D.C. amplifier including a feed-back capacitor and adapted upon application of a predetermined D.C. potential to the input thereof to produce an output voltage which varies substantially linearly with time, a resistive feed-back circuit shunting said capacitor and comprising a first resistance means and a first diode connected in series with one'another and means including a second diode connecting an intermediate point on said resistance means to a point of predetermined reference potential, the values in said shunt circuit being so selected that said first diode will become conductive when the output from said amplifier reaches a first predetermined value and said second diode will subsequently become conductive when the output reaches a second predetermined value whereby the output voltage from said amplifier will vary linearly withrespect to ,time until said first diode becomes conductive, then generally exponentially until said second diode becomes conductive, and then again linearly for the remainder of its intended period of operation, a second D.C. amplifier having a resistance feedback circuit in shunt therewith and a plurality of parallel resistance paths connecting its input to the output of said first mentioned amplifier, certain of said parallel resistance paths .each having a diode connecting an intermediate `point on said resistance path of a point of predetermined reference potential, said diodes being arranged to sequentially become conductive in response to the output voltage from said first amplifier reaching corresponding predetermined values during said second linear period of operation to effectively vary the response of said second amplifier to the output of said first amplifier 2. A log time voltage generator comprising a D.C. amplifier, first resistance means having one end connected to theinput of said amplifier, control means operable to apply a DC. operating voltage of predetermined value to the other end of said resistance means, and a feedback capacitor connected from the output to the input of said amplifier, a resistive feed-back circuit shunting said feed-back capacitor and including second resistance means and a first diode connected in series with one another, and a second diode connecting an intermediate point on said second resistance means to a point of predetermined reference potential, said diodes being polarized so as to become conductive in response to predetermined relationships of the voltage at the output of said amplifier relative respectively to the voltage at the input thereof and to said reference potential whereby, upon application of voltage from said source, the output voltage will vary first linearly with respect to time then generally exponentially, and finally again linearly but at a different rate than during said first period of linear operation.

3. A log time voltage generator as in claim 2 wherein said control means is selectively operable to apply either said D.C. operating voltage or a reset voltage of a second predetermined value to said other end of said first resistance means, a third resistance means connecting the output of said amplifier to a second source of reference potential, a first reset diode shunting said first resistance means, and a second reset diode connecting the input of said amplifier to an intermediate point on said third resistance means, said reset diodes being polarized so as to be reversely biased during operation of said timer but sequentially rendered conductive in the order named upon application of said reset Voltage to bring said output voltage to a predetermined initial or reset value preparatory for a subsequent timing operation.

4. A log time voltage generator comprising a D.C. amplifier, first resistance means in series with the input of said amplifier, a feed-back capacitor connected from the output to the input of said amplifier whereby said amplifier, resistance means and feed-back capacitor conjointly form an integrator wherein the voltage at the output of said amplifier varies directly as the time integral of voltage applied to that end of said resistance means remote from said amplifier, control means including means selectively operable between a reset condition wherein said output voltage is caused to assume a first predetermined value and an operating condition wherein an operating voltage of fixed value and polarity is applied to said end of said resistance means to initiate a timing operation, a resistive feed-back circuit connecting the output to the input of said amplifier and comprising a diode connected in series with a second resistance means, said diode being so polarized as to maintain said resistive feed-back circuit ineffective during the intial portion of said timing operation, but being responsive to said output voltage attaining a second predetermined value to render said resistive feed-back circuit effective to shunt said capacitor to produce a non-linear, generally exponential variation of said output voltage during a second portion of said timing operation, and a second diode connecting an intermediate point on said second resistance means to a source of predetermined reference potential, said second diode being so polarized as to be non-conductive during said initial and second timing portions but being rendered conductive upon said output voltage attaining a third predetermined value to render said resistive circuit ineffective thereafter as a feed-back path during the third and subsequent portion of said timing operation.

5. A log-time voltage generator as in claim 4, further comprising a second D.C. amplifier, a resistance network coupling the input of said second amplifier to the output of said first amplifier, feed-back resistance means shunting said second amplifier, said network including at least two parallel resistance branches, a diode connecting an intermediate point on one of said branches to a point of predetermined reference voltage said diode being so polarized and arranged as to be reversely biased throughout said initial and second timing portions but rendered conductive upon said output voltage from said first amplier attaining, during said third timing portion, a fourth predetermined value.

6. A log-time voltage generator comprising a first D.C. amplifier having a capacitor in shunt therewith, a control terminal, and resistance means connecting said control terminal to the input of said amplifier, reset means responsive to voltage of predetermined value applied to said control terminal for bringing the voltage at the output of said amplifier to a predetermined initial value, a resistive feed-back path shunting said amplifier and including a diode therein so polarized as to block said path when said output voltage is at said initial Value but responsive to the output voltage from said amplifier reaching a predetermined value to render said path conductive to cause said output to vary generally exponentially with time, and a second diode connecting an intermediate point on said resistance feed-back path to a predetermined reference potential, and adapted upon said output voltage from said amplifier reaching a second predetermined value to render said resistive path ineffective for further feed-back action.

References Cited in the file of this patent UNITED STATES PATENTS Raymond et al July 21, 1959 OTHER REFERENCES

Claims

1. A LOG TIME VOLTAGE GENERATOR COMPRISING A VOLTAGEINTEGRATING D.C. AMPLIFIER INCLUDING A FEED-BACK CAPACITOR AND ADAPTED UPON APPLICATION OF A PREDETERMINED D.C. POTENTIAL TO THE INPUT THEREOF TO PRODUCE AN OUTPUT VOLTAGE WHICH VARIES SUBSTANTIALLY LINEARLY WITH TIME, A RESISTIVE FEED-BACK CIRCUIT SHUNTING SAID CAPACITOR AND COMPRISING A FIRST RESISTANCE MEANS AND A FIRST DIODE CONNECTED IN SERIES WITH ONE ANOTHER AND MEANS INCLUDING A SECOND DIODE CONNECTING AN INTERMEDIATE POINT ON SAID RESISTANCE MEANS TO A POINT OF PREDETERMINED REFERENCE POTENTIAL, THE VALUES IN SAID SHUNT CIRCUIT BEING SO SELECTED THAT SAID FIRST DIODE WILL BECOME CONDUCTIVE WHEN THE OUTPUT FROM SAID AMPLIFIER REACHES A FIRST PREDETERMINED VALUE AND SAID SECOND DIODE WILL SUBSEQUENTLY BECOME CONDUCTIVE WHEN THE OUTPUT REACHES A SECOND PREDETERMINED VALUE WHEREBY THE OUTPUT VOLTAGE FROM SAID AMPLIFIER WILL VARY LINEARLY WITH RESPECT TO TIME UNTIL SAID FIRST DIODE BECOMES CONDUCTIVE, THEN GENERALLY EXPONENTIALLY UNTIL SAID SECOND DIODE BECOMES CONDUCTIVE, AND THEN AGAIN LINEARLY FOR THE REMAINDER OF ITS INTENDED PERIOD OF OPERATION, A SECOND D.C. AMPLIFIER HAVING A RESISTANCE FEEDBACK CIRCUIT IN SHUNT THEREWITH AND A PLURALITY OF PARALLEL RESISTANCE PATHS CONNECTING ITS INPUT TO THE OUTPUT OF SAID FIRST MENTIONED AMPLIFIER, CERTAIN OF SAID PARALLEL RESISTANCE PATHS EACH HAVING A DIODE CONNECTING AN INTERMEDIATE POINT ON SAID RESISTANCE PATH OF A POINT OF PREDETERMINED REFERENCE POTENTIAL, SAID DIODES BEING ARRANGED TO SEQUENTIALLY BECOME CONDUCTIVE IN RESPONSE TO THE OUTPUT VOLTAGE FROM SAID FIRST AMPLIFIER REACHING CORRESPONDING PREDETERMINED VALUES DURING SAID SECOND LINEAR PERIOD OF OPERATION TO EFFECTIVELY VARY THE RESPONSE OF SAID SECOND AMPLIFIER TO THE OUTPUT OF SAID FIRST AMPLIFIER.