US2979699A

US2979699A - Electronic switching network

Info

Publication number: US2979699A
Application number: US607916A
Authority: US
Inventors: David P Goodwin; Richard W Spencer
Original assignee: Sperry Rand Corp
Current assignee: Sperry Corp
Priority date: 1956-09-04
Filing date: 1956-09-04
Publication date: 1961-04-11
Anticipated expiration: 1978-04-11
Also published as: DE1059030B; GB851455A

Description

April 1951 D. P. GOODWIN ET AL 2,979,699

ELECTRONIC SWITCHING NETWORK Filed Sept. 4, 1956 3 Sheets-Sheet 1 M N P INVENTOR.

RICHARD W. SPENCER DAVIDPGOODWIN AGENT 9 April 1961 D. P. GOODWIN ETAL 2,979,699

ELECTRONIC SWITCHING NETWORK 3 Sheets-Sheet 2 Filed Sept. 4, 1956 Cwwwmv AGENT United States Patent ELECTRONIC SWlTCHIN G NETWORK David P. Goodwin and Richard W. Spencer, Philadelphia, Pa., assignors to Sperry Rand Corporation, New York, N .Y., a corporation of Delaware work for selecting a particular impedance element in a matrix array. More particularly this invention relates to 'a single switch device in the matrix comprising an electric winding Wrapped about a magnetic core member, which preferably exhibits a rectangular hysteresis char acteristic. Magnetic materials exhibiting this characteristic are well known in the art and may comprise compounds of substantially 4% molybdenum, 79% nickel and 27% iron or 50% iron and 50% nickel. These magnetic core materials are sold commercially under various trade names such as 4-79 Molypermoloy, Deltamax, and Orthonik. i

The windings wound on a core structure having a rectangular hysteresis characteristic will exhibit either a high or low impedance to signal pulses of a given polarity applied to the windings depending on the state of core magnetization. Use is made of this phenomenon to selectively direct electrical signals through a network compris- Q the elements in the matrix array take the form of magnetic read-record heads. Matrices comprising other types of impedance or storage elements are well known in the computer art. Primarily, the preferred embodiment of this invention is directed to a switching system for selecting a particular element (read-record head) in the matrix.

However, it is within the purview of this application that the novel switching means disclosed herein may be used with a matrix array comprising storage elements.

In the past, the matrix element selection devices comprised a vacuum tube system for selectively passing electrical current through the selected matrix element. These known forms of switching or selection systems suffer from the disadvantages inherent in using vacuum tubes, namely, they are relatively bulky, expensive, fragile and often unreliable. The selection system of the present invention employs a magnetic amplifier having as part of its load, a winding wrapped around a core used in the selection device which selects a particular impedance element (read-recordhead) in the matrix. contrasted to the vacuum tube selection systems, those systems employing magnetic amplifiers are relatively far more reliable,

compact and sturdy. While it is realized that other selection systems exist which employ magnetic amplifiers, it should be noted that the system herein disclosed employs features which makes the instant invention novel and superior to those magnetic amplifier selection'systems now in existence. Forexample, as will later be discussed in greater detail, the magnetic amplifier herein disclosed not only controls the impedance offered by a given core and its associated windings in the selection device but directly controls the impedance of certain unidirectional current conductors associated with the elements in the matrix array. Further as willbe shown in one embodiment of the invention the magnetic core inlthe selection device opera ates on a portion of the hysteresis curve not customarily used. It will be shown later that by operating the core in this manner, voltage surges may be eliminated or greatly reduced at certain times in the operation of the selection system.

In the embodiment of'the invention, as further described in the body of the specification, there are a plurality of read-record heads which comprise the elements of a matrix array. Each of the read-record heads may be associated with a common rotatable magnetic storage drum or other type of moving storage medium. in addition each of the read-record heads are selectively connected to information. generating sources or to an information receiving device.

Accordingly it is an object of this invention to permit the transfer of information from one source to any one of several magnetic read-write heads and alternately to se lectively allow one of several heads or group of heads to detect information from a memory and transfer information via a common circuit.

Another object of this invention is to provide a means for routing electrical signals through a network comprising selectively controllable impedance paths.

Yet another object of this invention is to provide a novel selection system for a matrix having a plurality of unidirectional elements, wherein the impedance of the unidirectional elements in the matrix is determined by the operation of the selection system.

Still another object of this invention is to provide a matrix comprising a plurality of magnetic elements and improved means for driving the magnetic elements.

It is yet another object of this invention to provide a new and improved switching network. 7

Other objects of this invention will become apparent to those skilled in the electronic arts as the specification is read in conjunction with the accompanying drawings, in which I Figure 1 shows a first embodiment of the invention;

Figure 2 illustrates a preferred hysteresis loop for core material used in the embodiment of Figure 1;

Figure 3 illustrates a timing diagram;

Figure 4 shows a second drive means for the embodi- I Dot and dash line 24H] indicates that each column may,

comprise any number of heads and the dash extension of lines R, S, T and U indicates that the rows may con; tain any number of heads. I

All the read-record heads are identical and have similar circuit connections in the matrix. Thus it will suffice to show how read-record head A is connected in the matrix as an illustration of the circuit connectionof allthe other heads. 7 Q A The winding 109 for read-record head A is wrapped about a magnetically soft material havingan' air gapQ This winding is center tapped and is connected from its center tapped point 161 to an associated column selection line M. All the head windings 180 in column A through A are connected at their center tapped point 101 to the column selection line M and thence through signal winding 29 of a column selection core 3. p in addition winding of head A is connected at its ends through diodes 20 and 21 to a pair of lines R and S respectively which jointly act as row selection lines. Each of the read-record heads A, B, C is connected through similar diodes to the row selection lines R and S. These lines R and S are in turn connected to a pair of

windings

25 and 26 which are coupled to a row selection drive core 1. Core 1 is similar to the column selection core 3 except that core 1 has two

signal windings

25 and 26 thereon instead of the single winding 2h used on core 3. Terminal 25b of signal winding 25 is connected to the junction of the cathodes of two diodes 15d and 151 in the write circuits. The anodes of diodes 15%) and 151 are connected to the primary winding of an output transformer 156 and the output of a binary write amplifier respectively. In like manner every head Winding T103 in the row of heads A, B, C is connected through its respective diodes (e.g. 21) to signal winding 26 and thence through diode 161 to the output of a binary 1 Write amplifier and through diode 160 to the other side of the primary winding of output transformer 156. The primary winding of transformer 156 is con-- nected at its center tap through a resistor to a read signal terminal 201. The secondary of transformer 156 is connected to a read amplifier which in turn may drive another memory circuit or an arithmetic circuit of a computer.

As is apparent each head in the matrix is associated with one vertical or column selection line, M, N etc. and a pair of horizontal or row selection lines (R, S) (T, U) etc. The two horizontal lines in the pair may in turn be classified as the 0 line (e.g. line R) or the 1 line (cg. line S). In addition each horizontal line in the pair includes a signal winding which is wrapped about a common switch core; for example,

windings

25 and 26 are wrapped about core 1. Each vertical line includes one signal winding associated with a switch core, for example; signal winding 2? on core 3. Further it is apparent that each head is associated with two switch cores; the one core common to a pair of horizontal lines and the one core in the vertical line.

The apparatus which serves to drive a column or row selection core to saturation is shown at 50. Only the drive apparatus 50 for core number 3 is shown in detail; however, the drive apparatus for all the other row and column selection cores are identical in circuitry and operation. i

. For a clearer understanding of the particular circuit arrangements shown at St), and for convenience in describing the circuits in detail, typical values for the potentials of the various power sources have been given. Reference to these potentials, is therefore, intended to indicate appropriate power sources. it will be understood, of course, that the potential values are given by way of illustration only, and that they ma be varied depending upon the specific circuit conditions. Drive apparatus 5t} includes a select winding 51, which is wrapped about core 3 and is connected at one end to the cathode of diode 55 and one terminal of resistor 53. The anode of diode 55 is connected to a source 7% of positive potential which may be 7.6 volts. The other terminal of resistor 53 is con nected to a source 71 of negative potential which may be of the order of minus 28 volts. The remaining end of select winding 51 is connected to a source or positive potential which may be 3.6 volts through diode 52 and is connected to the select signal terminal 54 through diode 7 Also included in the drive apparatus 5%) are the reset winding 56 and the hold winding 59, both of which are wrapped about core 3. One end of the reset winding 56 is connected to a source of positive potential which may be +7.6 volts and the other end of winding 56 is connected through diode 3d and resistor 53 to a source of -28 volts. The cathode of diode 3%? is connected to a source'of positive voltage (+3.6 volts) through diode 57.

Hold winding 59 is connected-at one end to the hold signal terminal-62 through diode 60 and at its other end to a source of '-28 volts through, resistor 31 and to a source of +7.6 volts through diode 61.

One contemplated use of the embodiment of the invention shown in Figure 1 presupposes it is desirable to direct a given information signal to only one preselected readrecord head in the matrix; that is, it is desired to place information in a preselected location of the memory that may be associated with this matrix.

Before explaining how information is placed in a particular memory location it will be advantageous to examine the condition of the drive apparatus 50 in its quiescent condition. The term quiescent condition means that none of the selectively applicable signals are being applied to any of the terminals of either the drive apparatus 50 or the matrix. All references to a core flipping or traversing its hysteresis loop, or being at plus or minus flux saturation are made in connection with Figure 2 which shows a preferred hysteresis loop for the column and row selection cores.

Referring now to Figures 3A and 1, it is shown that prior to time t and during the quiescent condition of the system the potential at the select signal terminal 54 is negative in the absence of an applied select signal. There fore with no signal present at terminal 54, current will flow from the source of positive potential of 7.6 volts through diode S5, resistor 53, to the negative terminal point of minus 28 volts, thereby making the potential at the cathodes of

diodes

52 and 63 nearly +7.6 volts.

Diodes

52 and 63 will be open since their respective cathodes are more positive than their anodes. Therefore no current will flow in the select winding 51 which is in series with these diodes.

In addition no current will flow through the hold winding 59 because the potential at the hold terminal 62 (Figure 3E) and therefore, the anode of diode 6% prior to time t is negative during the quiescent condition. The cathode of diode 60 is held positive with respect to its anode due to the clamping action of the circuit comprising the source of +7.6 volts, diode 61, resistor 81 and the negative source of 28 volts. Therefore diode 69 is opened and no current flows through winding 59 which is in series with diode 60.

However, current will flow through the reset winding 56 from the +7.6 volt source through the aforementioned winding, diode 8t), resistor 58 through to the negative source of 28 volts. The current flowing through the reset winding 56is in such a direction as to drive the core (e.g. 3) to negative saturation -B (Fig. 2). Therefore initially, before any information is routed through the matrix all the columns and row drive cores are held at negative saturation --B due to the current flowing in the reset winding 56.

Due to the parameters of the circuit comprising reset Winding 56, the reset time (time to switch the core from positive saturation +B to negative saturation -B,) is much longer than the set time (time to selectively switch'the core from negative B to positive saturation +8 The time relation between the set and reset periods is'shown in Figure 3F.

The information to be stored in a memory associated with this matrix is supplied by the 0" write amplifier or the 1 write amplifier. Signals from either of these amplifiers take the form of positive pulses and are illustrated in Figures 313 and 3C. It should be noted that the outputs of the write amplifiers are negative during the time when a writing operation is not taking place, so that

diodes

151 and 161 are held open in the absence of a write information signal. Selection of a head for either reading orwriting is accomplished by saturating to +13, the column and row selection cores (hereinafter called the selected cores) associated with the selected head, makingthe signal windings of these cores appear as a low impedance to signal current. Further as shown in Figure 3F the selected cores are saturated before an information signal is generated.

Pr'esuming now that information generated by the,

,associated with the read-write head A.

' If a "l-T. pulse were to be insertedin a me o g apropos" location, e.g'., the 'memory location associated with head A, then the matrix shown in Figure 1 is operated in the following manner: firstly, a positive select signal (Figure 3A) is applied to the select terminals 54 of the windings associated with selected cores 1 and 3 for a period of time not exceeding the commencement of the write operation. This positive pulse, applied to each of the aforementioned windings, must contain enough energy to drive two cores (1 and 3) from negative saturation, -B to positive saturation, +B (see Figure 2). The select windings 51 are so oriented with respect to the cores that current caused to flow through these windings due to the application of a positive select signal to terminal 54 will produce flux tending to saturate the cores 1 and 3 in a positive direction. Simultaneously, with the application of a select signal to the two selected cores 1 and 3 and for the duration of the write operation there is applied to the hold terminal 62 of all the row and column drive apparatus 50 a positive pulse of low amplitude (Fig. 3E). Current, therefore, will be caused to flow in the hold windings 59 of all the drive apparatus 50 in a direction tending to drive all the cores toward positive flux saturation. The magnetic field produced in winding 59 due to the application of a hold signal at terminal 62 is both greater and opposite in direction to the field produced by the current flowing in the reset winding 56. Thus, the selected cores will remain positively saturated as shown in Fig. 3F even after the select signal is removed, as long as the hold signal is applied.

With respect to the cores, associated with the remaining heads (hereinafter called the unselected cores) the field produced by the current in the hold windings will tend to drive even these cores to positive saturation. However, the unselected cores will not reach positive saturation, +13 for two reasons; firstly, the volt seconds or the amount of energy contained within the hold signal is not enough to cause the core to completely traverse its hysteresis loop during the time allotted for writing to take place (see Figure 3F); secondly, when writing actually takes place, signal current is caused to flow in the

signal windings

27, 28, 30 and 31 of the unselected cores 2, 4 and 5 due to the application of the information signal from the 0 or 1 write amplifier. This signal current produces a flux change in the unselected cores and induces a voltage across the hold windings 59 of the unselected cores. The voltage thus induced drives the ends of windings 59 connected to diodes 60 positive; thereby opening diodes. 60 and preventing current flow through windings 59 of the unselected cores.

After the two selected cores associated with head A have been driven to positive saturation, the head A is in a condition to read or write. In the assumed example where it is desired to write, positive signal pulses such as depicted in Figs. 38 and 3C are used to effect the recordation of the

binary digits

1 and 0. Current will flow from the source of positive potential (0 write amplifier) through diode 151, signal winding 25, diode 20,the upper portion of winding 100 of head A, line M, signal winding 29, to ground potential. The signal current thus caused to fiow in

windings

25 and 29 is in such direction as to produce-a positive flux through the cores associated with these aforementioned windings. As these cores 1 and3 have already been driven to positive saturation, circuit elements comprising these cores will present a low impedance to current which tends to produce an increasein positive flux. Therefore, nearly the entire positive-0 pulse will be developedacross the upper portion of winding 100 of head A. The current caused to flow in the upper'portion of the head winding 100 will produce a flux which will magnetize in a given direction a portion of: the 'magnetizable storage mediunu tion asso ia ed t jhead ,A in t ad. of an 0 the matrix would operate in substantially the sameman her as previously described. The path for the signal current flow would be as follows: from the source of positive (1 write amplifier), diode 161, signal winding 26, diode 21, the lower portion of the winding 100 of head A, line M, signal winding 29, to ground potential. The essential difference in writing a 1 signal pulse or a 0 rests in the direction of current flow through the head winding 100. When a 0 signal pulse is pro duced the end of winding 100 connected to diode 20 is made positive with respect to the center tap point 101, and when a 1 signal pulse is produced, the end of winding 109 connected to diode 21 is made positive with respect to the center tap point 101. Thus it can be seen that the direction of current flow through a given head winding and consequently the direction of the flux gen-5 erated, depends on whether a 1 or a 0 pulse is generated.

As to the remaining heads in the matrix, very little current will flow through the windings 100 associated' therewith due to the application of a l or 0 signal pulse.

signal current will produce a flux that tends to drive the unselected cores from negative flux saturation, -B,,* to positive flux saturation, +B Nearly all the voltagev made available by either of the write amplifiers will be expended in driving the unselected cores through their respective hysteresis loops and no or very little voltage will be produced across the head windings of any of the remaining unselected heads. It should be noted here that there is an obvious limitation as to the amount of energy contained within the signal pulses produced by the write amplifiers. The energy or volt seconds contained within the signal pulses from either write amplifier cannot be enough to cause the unselected cores to traverse their hysteresis loop; for if this occurs, writing may simultaneously take place in all the memory locations associated with all the heads, respectively, and the reset winding 56 to drive the selected cores to negative saturation, -B before a new head can be selected for reading or writing.

To perform a read operation the method of head selection is the same as that used for writing. If head A is to be selected for reading information on the memory associated therewith, then, prior to and till the commencement of the read operation a positive select signal Fig. 3A,

is applied to the drive apparatus associated with cores 1 and 3. The select signal causes current to flow through select windings 51 of cores land 3 in such direction as to produce flux which drives these cores to positive saturation +13 As, before in the writing operation, a lowamplitude positive hold signal (Fig. 3E) is applied to all the hold terminals 62 simultaneously with the application .of the select signal. and for a period covering thejentire' 5 reading operation. The current causeduto flow in the. hold winding 59 due to theapplication of the positive, hold signal produces a: field which is greater than and j opposite in directionto'the field generated by the currents which is always flowing in the reset Winding56 The. net field produced by the current inithe reset winding 56 and the hold winding 59 tends to drive allthe cores to positive saturation -+B However, the? effect of the net fipositive field depends onwhethen thefparticularih'bre ,has" been positively saturated due tithe-application *of a' select signal."f Vith regard tofthe :due',to'the application "of aiselect signal, thenetpo'sitive'f The

signal windings

27, 28, 30 and 31 for these' heads are all in their high impedance state; that is, the

cores positively saturatedr iyof head A is modulated.

level +3 even after the removal of the select signal. However, with regard to the unselected cores the net positive field tends to drive these cores from their quiescent state, negative flux saturation B to positive saturation +B As previously mentioned the hold signal is a low amplitude positive pulse and consequently a comparatively long time is necessary to iiip the unselected cores from negative saturation -B to positive saturation +13 As will be explained later, the time a lotted for reading is limited to the amount of time necessary to flip the unselected cores from negative saturation B to positive saturation +13 clue to the action of the hold signal. By observing Fig. 3F it will be noted that all during the read operation the flux is changing (increasing positive flux) in the unselected cores. This change in flux induces a voltage in the

signal windings

27, 2 5, 3d and 31 associated with the unselected cores in such polarity as to put a positive bias on the cathodes of all the matrix diodes Zll and 21 not associated with the selected head. As will be pointed out later in the description of the reading operation, the biasing of the diodes associated with the unselected heads aids in increasing the selectivity of the matrix.

In addition to the hold and select signals which are applied to the drive apparatus 56, a positive read signal shown in Figure 3D, must be applied to the read Signal terminal 201 before information can be detected by the read-write heads. In the quiescent condition prior to time t the read signal terminal Zilll (Fig. 3D) is held negative so that the anodes of diodes 15% and lot} which are coupled to terminal 2M are more negative than their respective cathodes. Therefore, these diodes appear as an open circuit, in the absence of an applied positive read signal. Hence current may not flow through the primary winding of transformer 156, which is in series with the diodes 15d and 160, until the anodes of the aforementioned diodes are driven positive. The positive read signal (Fig. 31)), which is applied to terminal 2% before signals are to be read by the head from the memory associated therewith, drives the anodes of diodes 15%) and 160 positive and has the effect of connecting the ends of the primary winding of transformer 156 to every pair of horizontal lines (R, S) (T, U) etc., in the matrix.

The positive read signal causes a small amount of direct current to flow through winding 1% of selected readwrite head A. The path of this current flow is as follows: from the read signal terminal 261 and the resistor connected thereto, to the center tapped primary winding of 156, through one leg of a parallel circuit comprising the upper half of the primary winding of transformer 156, diode 150, winding 25, diode 2% to the upper half of winding 1% through to the center tapped point lili and through a second leg of the parallel circuit comprising the lower half of transformer winding 155, diode is signal winding 26,' transformer 21, the lower half of winding 1th) through to the center tapped point tor and thence through line M, signal winding 29 to ground potcntial. Current will not how through the windings of the unselected heads due tothe. application ofa read signal because the diodes (e.g. diodes 2d and 2 1i) associated with the windings 1% of the unselected heaos are biased to appearas an open circuit due to the action of the hold signal which has been previously described.;

When a change in flux density in the memory is detected .by head A the direct current passing through winding H39 Accordingly current passing through the primary winding of transformer 156," which change in current in the primary windingcauses a voltage to be induced across the secon'dary winding of translf; the readdoperatcn istlallowedt to Qjccntinu'e for a d 75,

{.Yis in series with all'the head windings, changes.-- This former 156. 'lhe voltage across the secondary winding of transformer 1 56, may then-be transmitted toa read in amplifier and thence to another indefinite. time, then all the cores (1 to 5) will eventually be driven to +B due to the current passing through the hold windings 59. Assuming all the cores have thus been driven to positive saturation (+13 then continued current passing through hold windings 5) would no longer induce, a biasing voltage across the signal windings cone nected to the. diodes associated with the unselected readrecord heads. Then current would pass through windings 1th of all the read-record heads on the application ot a read signal and all the heads would be able to detect information from the memory associated therewith. Thus it can be seen that the time allotted for reading must be limited to the amount of time necessary to flip the unselected cores due to the current passing through the hold windings.

Referring now to Figure 4- there is shown a second drive apparatus 53A which is identical to the drive apparatus '30 of Figure 1 except for the additional read select winding 99 and its related circuitry. Therefore only the circuit connections for the read select winding will be described. Winding N) is Wrapped about a magnetic core material (eg. core 3) and one terminal thereof is coupled through diode 93 to read select terminal 94. The other terminal of the read select winding 9 is coupled through resistor 91 to a source of minus 28 volts and through diode 92 to a source of positive voltage which may be 7.6 volts. Current flows through the circuit comprising diode 92 and resistor 91 so that the cathode of diode 92 is maintained at approximately plus 7.6 volts. Since the cathode of diode 92 is coupled through winding 9% to the cathode of diode hf: it too will be held at plus 7.6 volts. Figure 38 illustrates that the voltage level at the read select terminal 94, and therefore the anode of diode 93. is negative in the quiescent condition prior to time t Since the anode of diode 93 is negative with respect to its cathode, the diode 93 will appear as an open circuit and current will not flow in the read select winding 90 which is in series with the aforementioned diode. When terminal 94 is made positive by the application of read select signal, current will flow from the read select terminal through diode 93, winding 99 through resistor 91 to the supply of minus 28 volts.

The quiescent condition of the other windings in drive apparatus 50A remains the same as explained in connection with drive apparatus 5%. Therefore, as already noted, the cores associated with drive apparatus 5i) are initially held at negative flux saturation (-43 due to the current flow in the reset Winding 55.

During the write operation no current passes through the read select winding9tl, therefore, electrically the drive apparatus 54? and Sit-A are identical during writing. in addition the operation of the drive apparatus StlA during writing is exactly the same as drive apparatus 59, and therefore its mode of operation will not be discussed.

During the read operation no signal is applied to the select winding 51 and a significant change takes place over the reading operation obtained by the use of the circuit 50. If head A (Figure l) is to be selected for readcores 1 and is. Application of a positive read select signal (Fig. 38) causes. current to liow through winding 95. of cores 1, and 3 in such a direction as to drive these vcores further along the flat portion, of their hysteresis loops, that is to a more, remote point (P) along the H axis in the third quadrant (see Figure 2). Thus it can be seen'that the positive read select signal causes very little flux change in thev selected coresd and 3. Simultaneously with the application of a read select signal a lowamplitude. positive hold signal' i's applied to all the -holditerminals, 62 foraperiod covering the entireread operation. Ilie-current-cau'sed to flow' through t-li'e hold 9 ,f windings 59 due to the application of a positive hold signal produces; (l) a field in the unselected cores which is greater than and opposite in direction to the field generated by the current which is always flowing in the reset winding; (2) a field in the selected cores 1 and 3 which is less than and opposite in direction to the combined field generated by the current which is always flowing in the reset windings 56 and the current caused to flow in the read select windings 90 due to the application of a positive read select signal.

Thus the net field in the selected cores 1 and 3 holds these cores at negative saturation and the net field in the unselected cores tends to drive these cores from their quiescent state, negative flux saturation (-33), to positive fiux saturation (+8 By observing Figure 3H it will be noted that all during the read operation the flux remains constant in the selected cores and is changing (increasing positive flux) in the unselected cores. This change in flux in the unselected cores (2, 4 and 5) produces a voltage in the

signal windings

27, 28, 30 and 31 associated with the aforementioned cores in such polarity as to put a positive bias on the cathodes of all the diodes not associated with the selected head. As previously explained in connection with Figure l, the biasing of these diodes effectively prevents the unselected heads from transmitting information from the memory to the transformer 156 and to the read amplifier.

The timing and operation of the read select signal, applied to terminal 201, is of course the same as was described in connection with Figure l. The field produced by the current caused to flow in the signal windings (

e.g. windings

25, 26 and 29) by the read signal (Fig. 3D) tends to drive even the selected cores (1 and 3) towards positive saturation. However, the current in the read select winding 90 produces a net flux which maintains the selected cores at negative flux saturation even after the application of the read signal at terminal 201.

During the reading operation the selected cores 1 and 3 associated with head A will be held at negative fiux saturation B Signal current generated by winding 100 of head A when information is detected from the memory associated therewith modulates the direct current flow through the low impedance circuit, already described in detail in connection with Fig. 1, which comprises

signal windings

25, 26 and 29, diodes 20 and 2-1 and the primary of transformer 156. The change in current generated by winding 100 of head A will induce a voltage by transformer action across the windings of transformer 156 and will be transmitted to the read amplifier.

Having described the operations of drive apparatus 50A the differences and similarities between it and drive apparatus 50 are briefly outlined in chart 1 below:

A. (Writing) 1) The operation of the two drive apparatus 50'and 50A is the same.

B. (Reading) (1) The operation of the two

drive apparatus

50 and 50A is the same with respect to the unselected cores.

(2) The operation of the two

drive apparatus

50 and 50A is difierent only in respect to their effect on the selected cores. 7

Drive Apparatus 50A 1 A atus 50 Dr W (21) has read select winding (:1) has no read select windin s (b) ilures and the head as- (b) Cores and the head associated therewith are selected for reading by ap-' plication of select signals 1". (c) The selected cores are experisociated therewith are selected for reading by application of read select signals (Fig. 3G)

(0) The selected cores are maintained at negative flux saturation (Bs) due to the application of the read select sign (11) selected cores experience no or little flux change prising a third selectively operable saturating means for' The main advantage of using the drive apparatus 50A accompanying transients which may introduce an error in the reading operation.

While preferred embodiments of the present invention have been described, it will be appreciated that this description is meant to be illustrative only and is not limitative of our invention. Many variations will be suggested to those skilled in the art, and all such variations as are in accord with the principles discussed, are meant to fall within the scope of the appended claims. I

In accordance with the description of our invention we claim:

- l. The combination comprising a signal generator, a magnetic member having a signal winding coupled thereto and to said signal generator, said member having a first and second magnetic state, a load circuit, a unidirectional current element connecting said signal winding to said load circuit, saturating means for applying a constant bias force tending to maintain said member in said first state, first selectively operable saturating means for driving said member from said first state to said second state, and second selectively operable saturating means for driving said magnetic member to said second state at a slower rate thansaid first selectively operable saturating means and for controlling the conduction of current through said unidirectional current element to said load circuit.

2. The combination defined in claim 1, further comprising a third selectively operable saturating means for rendering said second saturating means ineffective.

3. The combination defined in claim 1, wherein said first selectively operable saturating means controls the impedance of said signal winding.

4. The combination comprising a signal generator. a plurality of magnetic cores each having a signal windlng coupled thereto and to said signal generator, said cores having first and second magnetic states, a plurality of load circuits, a plurality of unidirectional current elements connecting said signal windings to said load circuits, saturating means for applying a constant bias force to all of said cores tending to maintain said cores in said first state, first selectively operable saturating means for driving at least one selected core from said first state to said second state, second selectively operable saturating means for driving remaining unselected cores to said second state at a slower rate than said first saturating means, for maintaining said selected core at said second state and for controlling the conduction of current through said unidirectional current elements connecting said signal windings to said load circuits.

5. The combination defined in claim 4, wherein the conduction of said unidirectional current elements is controlled by said second selectively operable saturating means during the time when the unselected cores are driven from said first state to said second state.

6. The combination defined in claim 4, wherein said first means is operated during a first time period and said second means is operated during a second time period commencing after the start of said first period.

7. The combination defined in claim 4, further commaintaining at least one selected core at said first state. 8. The combination defined in claim 4, wherein said first selectively operable saturating means controls the impedance of said signal windings.

9. ,The combination comprising a signal generator, a plurality of magnetic cores each having a signal winding coupled thereto and to said signal generaor, said cores having first and second magnetic states, a. plurality of load circuits, a plurality of unidirectional current elements each connecting a respective signal winding and load circuit,.saturating means for applying a constant bias force to all of said cores tending to maintain said cores in said first state, first selectively operable saturating means for driving said cores from said first state to said second state, and second selectively operable saturating means for rendering ineiiective said first selectively operable saturating means on selected cores, wherein said first selectively operable means controls the conduction of said unidirectional current elements connected to the signal windings of the remaining unselected cores.

10. The combination defined in claim 9 wherein said first and second selectively operable means are operated simultaneously.

11. The combination comprising a plurality of signal current generators, a common load circuit, a plurality of magnetic cores each having a pair of signal windings coupled thereto and connected in series to said common load circuit, said cores being capable of assuming two states of magnetic remanence, a separate plurality of unilateral current conductors connecting each of said signal generators to at least one of said pairs of signal windings and means for selectively controlling the im-! pedance of each of said unilateral current conductors to the flow of signal current from said signal generators.

12. The combination comprising a plurality of signal generators, a common load circuit, a plurality of magnetic cores each having a signal winding coupled thereto and to said load circuit, said cores having first and second magnetic states, a separate plurality of unilateral current conductors connecting each of said signal generators to at least one of said signal windings, saturating means for applying a constant bias force to all said cores tending to maintain said cores in said first state, first selec-' tively operable saturating means for driving at least one selected core from said first state to said second state, second selectively operable saturating means for driving remaining unselected cores toward second state at a slower rate than said first saturating means, for maintaining said selected core at said second state and for controlling the conduction of said unilateral current conductors connected to the signal windings coupled to the unselected cores.

13. The combination comprising a plurality of signal generators, at common load circuit, a plurality of magnetic cores each having a signal winding coupled thereto and to said load circuit, said cores having first and secondmagnetic states, a separate plurality of unilateral current conductors connecting each of said signal generators to at least one of said signal windings, saturating means for applying a constant bias force to all said cores tending to maintain said cores in saidfirst. state, first selectively operable saturating means for driving said cores from said first state to said second state, second selectively operable saturating means forrendering ineffective said first selectively operable saturating means on selected cores, wherein said first selectively operable means controls the conduction of said unilateral current conductors connected to the signal windings coupled to. the remaining unselected cores.

14. The combination definedj in claim lBwhereinsaid first and second selectively operable means are operated simultaneously.

15. A matrix comprising, a, plurality of read-record heads arranged in columns and rows, each of said heads including a center tap winding having first and second terminals, a plurality of pairs of conductors wherein each pair of conductors is associated with one row of, heads by being connected to all the read-record heads in said row and each conductor in the pair includes a signal winding wrapped about a magnetic core material common to the signal windings of'both conductors in the pair, said cores being capable of assuming two states of magnetic remanence, a plurality of single signal condoctors wherein each of said single conductors'is connected to a column of heads by a connection at the center tap of the winding associated therewith and each single conductor comprises a signal winding wrapped about a magnetic core material, first and second unidirectional current elements associated with each head winding wherein said first unidirectional current element couples said head winding from said first terminal to one of the conductors in the pair and the second unidirectional current element couples said head windings 'from said second terminal to the remaining conductor in the pair, first and second information pulse sources, said first information pulse source being selectively connected to a selected conductor of every pair of conductors and said second information pulse source being selectively connected to the remaining conductor in every pair of conductors, and a plurality of driving units coupled to said cores for controlling the magnetic state of the cores and for controlling the conduction of said unidirectional current elements.

16. The combination comprising a signal generator, a plurality of magnetic cores each having a signal winding coupled thereto and to said signal generator, said cores having first and second magnetic states, a plurality of load circuits, a plurality of current conducting elements connecting said signal windings to said load circuits wherein each said current conducting element comprises at least one electrode for receiving a signal determinative of the current passed by said element, saturating means for applying a constant bias force to all of said cores tending to maintain said cores in said first state, first selectively operable saturating means for driving at least one, selected core from said first state to said second state, second selectively operable saturating means for driving remaining unselected cores to said second state at a slower rate than said first saturating means, for maintaining said selected core at said second state and for producing a signal controlling the conduction of current through said current conducting elements connecting said signal windings to said load circuits.

17. The combination comprising a plurality of signal generators, a common load circuit, a plurality of magnetic cores each having a signal winding coupled thereto and to said load circuit, said cores having first and second magnetic states, a separate plurality of current conducting elements connecting each of said signal generators to at least one of said signal windings wherein each said current conducting element comprises at least one electrode for receiving a-signal determinative of the current passed by said element, saturating means for applying a constant bias force to all said cores tending to maintain said cores; in said first state, first selectively operable saturatmg means for driving at least one selected core from said first state to said second state, second selectively operable saturating means for driving remaining unselected cores toward said second state at a slower rate than said first saturating means, for maintaining said selected core at said second state and for producing a signal controlling the conduction of said-current conducting elements counected to the signal windings coupled to the unselected cores.

References Cited in the file of this patent UNITED sTATEs PATENTS 'Karnaugh Oct. 4, 1955 'Couruhan et al. ;Apr. 3, 1956 OTHER REFERENCES