US2970294A - Magnetic control circuits for shift registers - Google Patents

Description

Jan. 31, 1961 s. s. GUTERMAN 2,970,294

MAGNETIC CONTROL CIRCUITS FORV SHIFT REGISTERS 'III'IA V l l I iff /I SHIFT SIGA/9L 2,970,294 Patented Jan. 31, 1961 MAGNETIC CONTRL CIRCUITS FOR SHIFT REGISTERS Sadia Sydney Guterman, Dorchester, Mass., assignor to Raytheon Company, a corporation of Delaware Filed May 20, 1954, Ser. No. 431,129 4 Claims. (Cl. 340-474) This invention relates to magnetic control circuits, and more particularly to linkage circuits used between input and output windings on successive cores in such a circuit.

It has previously been known that information could be stored in magnetic cores by driving the cores into saturation. If the cores were made of a material having a high magnetic retent1vity, the information would remain in the core as a magnetized condition of a certain polarity as long as desired. This information could be read out of the core by subjecting it to a current pulse of a predetermined polarity and of a su'icient amplitude to drive the core from saturation in one magnetic polarity into saturation in the opposite polarity. An output winding would then produce an output pulse if the core were driven from saturation of one polarity to saturation of the other polarity but would produce no output pulseV if the core were previously saturated in the polarity represented by the incoming pulse. Thus each core could be used to store a binary digit of information. It has also been previously known that groups of cores could be orientated and interconnected to produce various combinations of saturation and transfer systems for computer purposes.

A system of this sort has been disclosed in the application for United States Patent, Serial No. 395,692, led December 2, 1953 by Way Dong Woo, Robert D. Kodis, and Smil Ruhman. Previously the system of the application comprised a plurality of cores, each of which had an input winding and an output winding and an actuation or transfer winding positioned thereon. The output winding of one core was connected to the input winding of another core through circuitry, including a unidirectional conductor, and the actuation coils of all the cores were connected in series with each other to a source of actuation pulses which preferably comprised a constant current driver, such as a vacuum tube pentode amplifier. The circuit connection between the output windings and the input windings of the different cores contained time delay devices which delayed the output pulse. Briey this comprised a condenser connected in series with the unidirectional conductor across the output winding of the core, said condenser being connected in series with a resistor across the input winding of the next core. The condenser is charged by the signal available at the output winding of the previous core to a high enough energy level to adequately actuate the input winding of the next core when discharged through the said winding in series with the resistor.

By the present invention series inductance is added to the delay circuit. The presence of the inductance de creases the load presented to the output winding of the lirst core. Therefore, the rst core changes ux faster when a shift or transfer pulse is applied, resulting in a larger output voltage. The presence of the inductance also delays the discharge of the condenser until the shift pulse is finished, thus making more of the discharge current effective in switching the next core to the desired polarty since any current in the input winding during the shift pulse is not effective for establishing the new condition. The inductance also diminishes the current caused by a negative voltage developed on the input winding of the second core when a major flux change takes place in that core. This current can cause a llux change in the lirst core which is harmful and is to be avoided.

Additional series inductances and shunt capacitors enhance the elect and permit the use of a smaller resistor while still preventing ringing and undershoot of the voltage across the lirst capacitor. This lower resistance reduces the losses in the resistor and reduces the dischargev time of the capacitor to increase the permissible repetition rate. The added inductance and capacitor also increase the difference in voltage between a l and a 0 to increase the signal-to-noise ratio of the circuit.

Other and further advantages of this invention will be apparent as the description thereof progresses, reference being had to the accompanying drawings in which:

Fig. 1 is a circuit diagram of one embodiment of the invention;

Fig. 2 is a group of graphs of the current and voltage at different points of the circuit of Fig. l at. different timesunder representative conditions; and

Fig. 3 is a circuit diagram of a second embodiment off the invention.

In Fig. 1, the reference numerals 10 and 11 designate two cores, preferably of annular shape, having a recf tangular hysteresis loop that provides a ratio of residual flux to saturation liux close to one. Each has three toroidal windings: input windings 12 and 13, output windings 14 or 15, and shift windings 16 or 17. The output Winding 14 of the core 10 is connected to the put winding 13 of the core 11 through a rectifier 18, preferably either a selenium rectifier or a germanium diode, an inductance 2t] and a resistor 21. The rectifier 18 and winding 14 are shunted by a capacitor 22. The input winding 12 of core 10 is connected to the output of a signal source 23. The shift windings 16 and 17 are connected in series across the output of a source 24 of shift current pulses.

The operation of the circuit is best understood by reference to Fig. 2 in which time is plotted horizontally along the line 30 and either current or voltage vertically along the line 31. A shift current pulse of the rectangular form shown by the curve 32 with an amplitude sufflcient to reverse the polarity of magnetization of the core is applied to all the cores through the shift windings 16 and 17. The curve 33 represents the voltage appearing across the capacitor 22 when such a current pulse as pulse 32 is applied to the shift windings 16 and changes the ux through the core 10. The discharge of the capacitor 22 through the inductance 2t), the resistor 21, and the input winding 13 of the core 11 results in a current pulse of the form shown by the curve 34 in Fig. 2.

It will be noted that most of the energy in the pulse 34 occurs after the shift pulse 32. As point-ed out above, this is desirable in that any portion of thisI pulse occur-- ring while the shift pulse is on is not effective for storing information in the core. This delay in the pulse 34, with llux change takes place in that core.

core 10.

The advantages of the circuit of Fig. 1 are increased byV adding a second inductance and shunt capacitor as shown,V in Fig. 3. Two cores 40 and 41 are provided with input.

windings 42 or 43, output windings 44 or 45, and shift windings 46 or 47, respectively. The output `winding 44 of core 40 is connected to `the input winding 43 of core 41 through a rectifier 48, two inductances 50 and 51, and a' resistor `52. The rectifier 48 and winding-44` are shunted by a capacitor 53 andthe inductance50 'by Aa second l,c apacitor54. The input winding 42 of core '40 is connected -to vthe output of a signal rsource"`"5. The shift ' windings 46 and 47 are connected in series across the output of-fa source '56 of shift current pulses. Capacitor 55 is larger than capacitor 54 and inductance :50 is greaterthan inductance 5.1.

The operation of this circuit is similar 'to that of the circuit of Fig. 1 'except that 'the Adesirable effects of this circuit are increased 4by the 'addition of the second capacitor A54 and the second inductance 51so that the 'current through 'the input winding is delayed sufficiently for almost .all this `current to iiow after-the Ishift pulse ends. Due to this, the circuit can Aapproach the critically damped condition, .which will not cause 'an undershoot ofthe voltage when capacitor 53 discharges 'with -a smaller value of Vresistor 52 than in the `circuit of Fig. 1. Thus 'the efficiency of .the llink is increased as the ylosses 'in the resistor are smaller. This smaller resistor -52 also results in faster discharge of ,the capacitor 53 without reducing the .initial delay in the current vto Ythe input Winding 43 of the core 41. This permits o peration ata higher repetition rate. Due to the greater efficiency, the input winding can be made smaller, so that this circuit `is -a'ole to produce better discrimination against undesirable nfeedback to the yprevious core lwhen a major flux takes place in the second core. In certain cases the nrequired value for the inductance 51 is so small that it maybe =left out with an insignificant loss in the quality ofthe circuits performance. The links shown in Figs. 1 and 3 can ybe used in magnetic control circuits other than those shown. The shift winding and the output lwinding may `be com bined as a common winding. The link circuit can be connected between the output and the input windings on the same core without affecting the operation of the link of this invention.

'This invention `is not limited to the particular details of construction, materials and processes described, as many equivalents will suggest themselves to those skilled in the art.

What is claimed is:

1. A magnetic control circuit comprising at least two magnetic cores, first, second, and third electrical windings on each of said cores, electrical circuitry for feeding signals from said third winding of a rst of said cores to said first winding of a second of said cores -comprising a rectifier, and a time delay circuit including series inductance and resistance and shunt capacity and means for feeding said second winding Ion 'each of said cores in Aseries from a source of actuating signals.

2. A magnetic control circuit comprising at least two magnetic cores, first, second, and third electrical windings on each of said cores, electrical circuitry for feeding signals from said third winding of a first of said cores to said nfirst winding of a second of said cores comprising a rectifier, and a time delay .circuit including a capacitor connected in series with the rectifier across the said third winding on .the first core and an inductance and .resistor connected in series with said capacitor across the first winding von said second .core means ,for feeding said second winding on each of said cores in series from a source of actuating signals.

3. A magnetic control circuit comprising at least two magnetic cores, first, second, and third electrical windings on each of said cores, electrical circuitry for feeding signals from saidthird winding of a first of .said cores to said "first winding o'f a second -of said cores comprising a rectifier, a resistor, and a time delay circuit in two sections, each section including series inductances and .shunt capacity and means for feeding said second winding on each of said cores in series from a sourceof actuating signals.

4. A magnetic control .circuit comprising at Ileast two magnetic cores, first, second and third electrical windings on each of said cores, electrical circuitry for feeding signals from .saidthird winding of a first of said cores 'to said first winding of a second of said cores comprising a rectifier, anda time delay circuit including a capacitor connected in series with vthe Irectifier and said third winding on thefirst core and an inductance and resistor connected in series with said capacitor and said first winding onfthe second core and means for feeding said second :winding on each of sa'id ycores in series ,from a source of actuating signals.

References vCited in the fiile of this patent UNITED STATES PATENTS 2,652,501 Wilson Sept. 15,l 1953 l2,661,453 'Hemingway et al. Dec. 1,` 1953 2,683,819 Rey July 13.19'54 OTHER REFERENCES Publication I, IRE National Convention Record, part 7, Mar.` 23, 1953, pp. 38-42.

Advertising Sheet, Epsco Encapsulated Magnetic Storage Elements (form `S-'5), Epsco, Incorporated, 126 Ave., Boston 15. Printed and distributed in March 19

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