US2944205A

US2944205A - Frequency divider

Info

Publication number: US2944205A
Application number: US630876A
Authority: US
Inventors: Eugene O Keizer; Robert F Sanford
Original assignee: RCA Corp
Current assignee: RCA Corp
Priority date: 1956-12-27
Filing date: 1956-12-27
Publication date: 1960-07-05
Anticipated expiration: 1977-07-05

Description

July 5, 1960 E, Q KEIZER ET AL 2,944,205

FREQUENCY DIVIDER Arrow www July 5, 1960 E. o. KEIZER ETAI- FREQUENCY DIVIDER 2 Sheets-Sheet 2 Filed Dec. 27, 1956 INVENTORS Eusnrr D. Ksxzin BY Rosin-r F. Sam-ann ,aum/. MfS/www Las United States Patent Oce 2,944,205 iatented July 5, 1960` FREQUENCY DIVIDER Eugene 0. Keizer, Princeton, 'and Robert F. Sanford, Cranbury, NJ., assignors to Radio Corporation of America, a corporation of Delaware y Filed Dec. Z7, 1956, Ser. No. 630,876 1s claims. (Cl. 321-69) having lan amplitude suicient to provide output oscillations of a frequency lower than the frequency of the source signals. These output oscillations may be derived from the capacitor, and may have a frequency whichy is any fractional part of the frequency of thesource signals, and may Abe locked to maintain `this fractional frequency.

In accordance with another embodiment of the invenl tion, there is employed a series circuit capable of passing direct current yand which includes a junction diode and two inductors. The same source of alternating current signals mentioned above is coupled to one of the inductors so that the source is effectively in series with the series circuit. Output oscillations of a frequency -lower than the frequency of the source signals are derived from a resonant circuit coupled to the other of the inductors. 'These output oscillations may have a frequency which is-any fractional part of the frequency of the source signals, and may be locked to maintain this frequency.

The invention is explained in detail in connection with the accompanying drawing. In order that the invention may be better understood, a theoretical explanation will be given. It is to be understood, however, that this theoretical explanation is given only in Sorder that the invention may be better understood and appreciated, and while such explanation is believed to be correct, itis not of necessity complete, norV does the successful operation of the invention depend upon the accuracy of this theoretical explanation.

In the drawing:

Fig. 1 shows a circuit diagram ofone embodiment'of the invention; i

Figs. 2 and 3 show curves and waveforms, respectively, which are given in order that the theoretical explanation ofthe invention may be better understoody'a'nd Figs. 4 thru 8 show circuit diagrams of other embodiments of the invention.

Fig. 1 illustrates the circuit diagram of one embodiment of the frequency divider in accordance with the invention. Basically, the frequency divider includes ,a junctiony diode or device -which is connected in series with an inductor p 12. This device 10 may be a variable-capacitance germa- `niunr junction diode, such as the type described beginning tricallyA in parallel Awith the diode portion of the device 10. Furthermore, this capacity varies in accordance with the amount of voltage which is present across the terminals of the device 10. Consequently, the device 10 is schematically shown yas a capacitor and a diode connected as ya unit in parallel. One end of a parallel circuit comprising a capacitor 14 and a resistor 16 is connected to one end o the series circuit comprising the inductor 12 and the device 10. A source 18 that provides alternating current signals is connected between the other end'of the parallel circuit and the other end of the sexies circuit to form a complete frequencyr divider in accordance with the invention. In the circuit of Fig. 1, the complete frequency divider circuit including the source 18 provides a path that permits direct current to flow. For reasons that will be explained, the source 18 must produce signals having an amplitude that is suilicient to sustain the output oscillations of lower frequency than the applied signals. The various elements of the series circuit may -be altered-in the frequency divider circuit. For example, the parallel circuit and the inductor 12 can be interchangedl in location,

or `the device 10 can be interchanged in position with the source 18, or as another alternative the device 10 can be located in the lower connection between the source 18 and the parallel circuit.` Output oscillations having a frequency that is lower than the frequency of the applied signals may be derived from a pair of output terminals 20 Vwhich are connected across the capacitor 14 Iand the resistor 16. The complete frequency dividerfmay be con'- nected to a point of reference potentialV or ground -at any desired point, such as at the junction of the parallel circuit and the source 18 as shown in the circuit diagram of Fig. l.k i

During thetime the source 18 produces an alternating current input signal having an amplitude suicient to sustain lower frequency output oscillations, the device 10 is alternately conductinggand non-conducting. '-Each time that the device 10 conducts, the capacitor 14 receives a charge, .the amount of the charge depending, among other things, upon the magnitude of the capacitor 14 and the amount of charge already on the capacitor `14. .Eventually, the capacitor 14 is charged to an ultimate value about which its charge then varies or yoscillates at a frequency that Iis lower than the frequency of the signals from the source 18. Again, the amount of this ultimate value of charge -will depend, among other things, upon the magnitudes of they capacitor 14 vand the resistor 16.

The Iamount of capacity exhibited by the device 10 devaried by a bias or instantaneous voltage. The-device 10 be considered `as having a capacity which is elecpends upon the bias voltage across the terminals of the device 10. And, the amount of bias voltage present across the terminals ofthe device 10 depends upon the amount of charge on the capacitor 14. Since the device 10 is connected lin series with the inductor 12, the capacity exhibited by the device 10 forms a series resonant circuit withV the inductor 12 `in the complete circuit of the frequency divider. As is known, when a signal of given frequency is applied to a series resonant circuit,the peak voltage `which exists across the 'capacitor of such a seriesresonant circuit depends-upon the size of the capacitor. The greatest voltage is developed across the capacitor when its capacity is ythe magnitude needed to resonate with the inductor in the series resonant circuit for the particular frequency of the signal which is applied to the` series resonant circuit. During the time when the device 10 is nonconducting, a volt-age is developed across the device 10 so that the capacity exhibited by the device 10 is electively in series with the inductor 12. And as previously mentioned, the amount of capacity which the device 10 exhibits is determined by the amountof bias voltage across the terminals of the device 10.

u. The change in peak voltage present -across the termi-v nais ofthe device 10, resulting from the' change in 'ca- 9 shows that the peak voltage across the terminals of the device 10, starts at some value when the bias voltage across the device 10 is zero. As the bias voltage increases toward the right, that is, in the direction of reverse bias or less diode conduction, the peak voltage across the device 10 also increases, and reaches a point 11 at that value of bias voltage at which the capacity exhibited by the device 10 resonates with the inductor 12 at the frequency of the applied signal. The peak voltage then diminishes or falls toward zero again as the bias voltage is increased still farther in the direction of reverse bias. It should be understood, of course, that this peak voltage would be developed across the terminals of the device 10 when only the capacity exhibited by the device 10 is taken into consideration, and the conduction characteristie of the device 10 is not presen-t. The operation of the device 10 is shown by the diode characteristic curve 13 in Fig. 2. The diode characteristic curve 13 shows the amount of peak voltage needed across the terminals of the device 10, as a function of the bias voltage across the terminals of the device 10, so as to render the device 10 conductive. This diode characteristic curve 13 starts at zero and rises as the bias voltage is increased in the direction of reverse bias or less diode conduction. Thus, when the bias voltage across the terminals of the device 10 is increased in the direction of reverse bias, a greater peak voltage is needed across device 1t) in order for the device 10 to conduct. The conducting and non-conducting regions of the device 10 are also indicated in Fig. 2.

When the source 1S produces an alternating current input signal having an amplitude sufcient to sustain low frequency oscillations, the frequency divider circuit shown in Fig. l will eventually reach the condition Where the bias voltage present across the capacitor 14 reaches an ultimate value about which it oscillates. Again, as stated hereinbefore, the amount of this ultimate bias voltage depends, among other things, upon the size of the capacitor 14 and the size of the resistor 16. The amount of ultimate bias voltage also depends upon the magnitude of the current thru the device 10 each time the input signal is sufficient to overcome the bias voltage on the device 10. Thus, with reference to Fig. 2, the ultimate bias voltage across the capacitor 14 will oscillate about a stable point 15 indicated in Fig. 2. The position of this stable point 15 with relation to the bias voltage depends upon the amplitude of the input signal from the source 18. The bias voltage then oscillates or varies about the bias voltage corresponding to the stable point 15 at a rate dependent, among other things, upon the values of the capacitor 14 and the resistor 16. This oscillation may be explained if, at rst, it be assumed that the bias voltage increases in the direction of reverse bias or less diode conduction. The device 10 is then non-conductive for a greater length of time than before the increase in the direction of reverse bias, and this condition permits the capacitor 14 to discharge some slight amount thru the resistor 16 during the non-conduction interval, and to decrease the -bias voltage in the direction of forward bias or greater diode conduction. When the bias voltage decreases to the left, that is, in the direction of forward bias, the device 10 is then conductive for a greater length of time, and this condition permits the capacitor 14 to receive an additional charge and to increase the bias Voltage in the direction of reverse bias again. Thus the capacitor 14 is alternately charged and discharged at a rate dependent, among other things, upon the value or magnitude of the capacitor 14 and the resistor 16. This rate of charge and discharge is, of course, less than the frequency of the input signal. And, it is this alternate charge and discharge of the capacitor 14 which provides output oscillations having a frequency that is less than the frequency of the input oscillations. If the amplitude of the input signal from the source 18 is insufficient to maintain the bias voltage at the stable point about which the bias voltage oscillates, then it has been found that the lower frequency oscillations or variations of the bias voltage no longer occur, and so no lower frequency output oscillations appear at the output terminals 20 for this condition.

Fig. 3 shows waveforms, plotted on a common time axis, of voltages present in the frequency divider circuit of Fig. l when the circuit is in operation. Curve (a) of Fig. 3 shows the waveform of an alternating current signal which the source 18 produces. Curve (b) of Fig. 3 shows a waveform of the voltage present across the terminals of the device 10 corresponding to the source signal. The peaks of voltage in curve (b) occur during the time `that the device 10 is non-conducting, and the lower Frat portions are present when the device 10 is conducting. And, curve (c) of Fig. 3 shows the instantaneous output signal voltage as it appears across the capacitor 14, and also as it appears after the high frequency component has been filtered or removed. The output signal voltage shown in curve (c) shows clearly how the instantaneous amount or magnitude of charge on the capacitor 14 varies or rises and falls, and also shows that the greatest amount of charge (that is, the greatest charge in the direction of reverse bias or less diodo conduction) occurs at the same time that the greatest voltage appears across the terminals of the device 10. A comparison of curves (a) and (c) of Fig. 3 shows that the frequency of the signal across the capacitor 14 is `less than the input signal frequency. In ythe waveforms shown, the frequency of the output signal is one-fifth the frequency of the input signal. Ideally, of course, the instantaneous output signal as it appears across the capacitor 14 is a pure sine wave. However, in practice and as shown in curve (c), the shape of the instantaneous koutput signal across the capactior 14 may have a high frequency component present in it. The shape of theoutput signal may be improved by applying the output signal to a filter circuit which removes the high frequency component. Or, the output signal may be applied to a vacuum tube or other amplifying device which has a parallel resonant circuit tuned to the frequency of the output signal and connected into the output circuit of the amplifying device. Such an arrangement would isolate the output signal present across the output terminals 20 from the output signal which would be present across the tuned circuit connected in the output circuit of the amplifying device, and would serve to'provide an output signal that is substantially a pure sine wave.

Still another way of improving the shape of the output signal is shown in the circuit arrangement in Fig. 4. 'The circuit arrangement of Fig. 4 is substantially the same as the circuit arrangement shown in Fig. l, with one exception, namely the use of an inductor 22 in place of the resistor 16. The inductor 22 has a magnitude of such value that it resonates with the capacitor 14 in the region of the lower frequency cf the output signal. The Voperation of the circuit shown in Fig. 4 is believed to be substantially the same as the operation of the circuit shown in Fig. 1, since the inductor 22 forms the equivalent functions of the resistor 16 shown in the circuit diagram of Fig. 1. The output signal is derived across the output terminals 20 which are connected across the capacitor 14.

Three other embodiments are shown in the circuit diagrams of Figs. 5, 6, and 7 respectively. An examination of the respective circuit diagrams vof Figs. 5, 6, and 7 will show that the frequency divider circuit has the same fundamental components as the circuit diagram shown in Fig. 1, namely, a series circuit having an inductor, a

junction diode or device, and effectively a parallel circuit having a capacitor and an inductor or a capacitor an a resistorand a source of signals.

In Fig. 5, the source 18 is connected into the frequency divider circuit thru a capacitor 24 and a parallel resonant be derived from an inductor ((not shown) coupled to-the .inductor 22. The circuit shown in Fig.- was built and operated satisfactorily with components having the following values:

Source 18 Ferris signal generator, Model 22A. Capacitor 24 39 mmfd.- Tuned circuit 2 5 Inductor 64-105 microhenries..

,Capacitor 330 mmfd. Inductor 26 About tive turns wound at one end of the inductor of the tuned ch'- cuit 25. l

Inductor 12 64-105 microhenries. Device RCA Experimental SX-104 diode having approximately 80 4mmfd. capacity at a reverse bias of,5 volts. The diode had a forward resistance of approximately `1 ohm, and a back resistance of apf. proxlmately meghoms. Capacitor 14 3300 mmfd.

Inductor 22 500-1000 microhenrles.

With the circuit of Fig. 5 having the above components, the source 18 was set to produce an input signal of one megacycle with a power between 30 and 50 milliwatts. The circuit was easily capable of dividing by a factor of 10 to'produce output oscillations `of 100 kilocycles at a peak-to-peak voltage of one-half volt across a load of 8,000 ohms connected between the output terminals 26. The waveform of the output oscillationswas approximately a sine Wave with a remnant of the one megacycle 'signal-imposed on it. v

' -In the embodiment shown in Fig. 6, the source 1S is also coupled into the frequency divider circuit thru the inductor 26.` Additional inductance iscoupled into the frequency divider circuit thru the input coupling arrangement shown to compensate for the fact that the inductor 12 (shown in Figs. l, 4 and 5) is omitted. It will be noted that the capacitor 14- (shown in Figs. l, 4 and 5) is also omitted. However, the necessary capacitance is effectively coupled o-r introduced in series with the frequency divider circuit thru the inductor 27 which is coupled to a capacitor 30 thru an inductor 32.

1 Fig. 7 Shows a circuit diagram of another embodiment ofy the invention. In Fig. 7, it will be seen that there are input and output-parallel resonant circuits 34 and 36. The input parallel resonant circuit 34 is tuned to resonate in the region of a frequency equal to the difference in the frequencies of the input signal and the output oscillations. The output parallel resonant circuit 36 is tuned to resonate in theregion of tliefrequency` of the output oscillations which are lower in frequency than the linput signal. The source 18 of input signals is coupled into the frequency divider circuit -thru the coupled inductors 38,

40, 1and the output oscillations are derived from the frequency Vdivider' circuit thru an inductor 42 coupledA to the'inductor of the output parallel resonant circuit 36. The circuit diagram of Fig. 7 differs from the circuit diagrams `of Figs. 1, 4, 5, and 6, in that a capacitory 44 is connected in series with rthe frequency divider circuit in addition to the capacitor in the output parallel resonant circuit 36 which` develops the output signal. `In certain application, it hasbeen found that a source of bias voitage is helpful and necessary to ystart the operation of the frequency divider circuit shown in Fig. 7. 'This source of bias voltage comprises a source of unidirec tional potential 48 connected inparallelwith a resistor 46. #Onenside of the resistor 46 is connected to one side of the capacitor 44, and a tapor variable arm 50 is conjnected betweentheresistor 46'and the other side of ythe capa`c`itor'44; The source of unidirectional potential 48 iS-:connected sothat nit -tendstb bias the device loin-th reverse bias direction. However, in other applications it has been found desirable to connect the'source of unidirectional potential 48 so that it tends to bias the device 10 in the forward direction. When the circuit shown in Fig. 7 was operated, it was found that if the capacitor 44 was shunted by asufliciently large resistance, the source of unidirectional potential 4S could be removed after operation was initiated, and the bias would then be maintained by the circuit itself. Y In such cases, apulse of back-bias exceeding'a critical minimum value would also start operation, and a pulse in the opposite polarity or an instantaneous shorting of the capacitor 44 would stopoperation. When/the resistance presented across the capacitor 44 by the resistor 46 was very high, such as an effective open circuit, it` was found that the circuit began'operating when the charge applied by the pulse of back-bias leaked off so that the proper bias voltage was reached. When a steady external bias voltage was appliedv thru a relatively low value of the resistor 46, the critical amount of bias voltage did not change noticeably over a wide range. That is, the bias could be varied as much as 20% in either direction about a value of 5 volts.

One practical application of the frequency divider circuit built and tested in accordance with the invention is shown in Fig. 8. In this application, it was desired to have a 3-step binary divider which divided an input sig` nal of 2.5 megacycles down to anoutput signal of 0.3125 megacycle. Basically, .the circuit arrangement shown in Fig. 8 comprises three of the circuit arrangements shown in Fig. 6, the three basic circuits being connected in tandem or in series by means of vacuum tubes. Each of the basic frequency divider circuits shown in Fig. 8 divided the frequency of the input signal by two, and it will be seen that with an input signal of 2.5 megacycles, the, output oscillations had a frequency that is one-eighth the input signal frequency, or 0.3125 megacycle. ,n

Experiments utilizing the frequency divider circuit in accordance with the invention have shown that a source 18 of rather vlow impedance produces excellent results. The frequency divider circuit in accordance with the invention is extremely simple, and has the advantage that no direct current power supply is needed, as it is in conventional frequency divider circuits using vacuum tubes. The only source of power needed is` the source of signals whose frequency is to be divided. However, it has been found that frequency division factors as high as 2O have been practical, and still maintain locked output oscillations. l't has also been found that input signal frequencies as high as 30 megacycles have been satisfactorily divided.

However, these figures do not-appear to be the upper limit of the frequency dividers capabilities. However,f

could beobtained in addition to division by wholeintegers, such as Y2, 3, etc. Thus, the frequency divider circuit is extremely useful in many applications.

What is claimed is: i

l. A frequency divider circuit comprising a junction diode device functioning as a capacitor in shunt with a resistance, an inductor, a parallel circuit comprising a capacitor and an impedance element, means connecting said diode device, said induetor, and said parallel circuit effectively in series to form a series circuit capable of passing direct current, means for applying a signal in series with said series circuit, and means for deriving a signal from said parallel circuit. f f

2. A frequency changer comprising a junction diode device functioning as a capacitor in shunt withga resistance, a first inductor, a parallel circuit comprising a` capacitor and al second inductor, means connecting said diode device, said first inducton'and said parallel 'circuit I series circuit, and means for deriving a signal from said parallel circuit.

3. A frequency divider circuit comprising a junction diode device functioning as a capacitor in shunt with a resistance, an inductor, a parallel circuit comprising a capacitor and a resistor, means connecting said diode device, said inductor, and said parallel circuit in series to form a series circuit capable of passing direct current, means for applying a signal in series with said series circuit, and means for deriving a signal from said parallel circuit.

4. A frequency divider circuit that produces an output signal, the energy of which is derived solely from the energy of an input signal, comprising a junction diode device functioning as a capacitor in shunt with a resistance, an inductor, a parallel circuit comprising a capacitor and an impedance device, means connecting said diode dcvice, said inductor, and said parallel circuit in series to form a series circuit capable of passing direct current, means for applying an input signal in series with said series circuit, and means coupled to said parallel circuit for deriving said output signal.

5. A frequency divider circuit that produces an output signal, the energy of which is derived solely from the energy of an input signal, comprising a first inductor, a second inductor, a junction diode device functioning as a capacitor in shunt with a resistance, a parallel resonant circuit comprising a capacitor and a third inductor, means connecting said first inductor, said second inductor, said diode device, and said parallel resonant circuit in series to form a series circuit capable of passing direct current, a second parallel resonant circuit comprising a second capacitor and a fourth inductor, means coupling said fourth inductor to said first inductor, means for applying an input signal across said second parallel resonant circuit, and means coupled to said third inductor for deriving said output signal.

6. A frequency divider circuit that produces an output signal, the energy of which is derived solely from the energy of an input signal, comprising a first inductor, a junction diode device functioning as a capacitor in shunt with a resistance, a second inductor, means connecting said first inductor, said diode device, and said second inductor in series to form a series circuit capable of passing direct current, an input parallel resonant circuit comprising a first capacitor and a third inductor, means coupling said third inductor to said first inductor, means for applying an input signal to said input parallel resonant circuit, an output parallel resonant circuit comprising a second capacitor and a fourth inductor, means coupling said fourth inductor to said second inductor, and means coupled to said output paraliel resonant circuit for deriving said output signal.

7. A frequency divider circuit that produces an output signal, the energy of which is derived solely from the energy of an input signal, comprising a junction diode device functioning capacitor in shunt with a resistance, a rst capacitor, a first inductor, an input parallel resonant circuit comprising a second capacitor and a second inductor, an output parallel resonant circuit comprising a third capacitor and a third inductor, means connecting said diode device, said first capacitor, said first inductor, said input parallel resonant circuit, and said output parallel resonant circuit in series to form a series circuit. a fourth inductor coupled to said first inductor, means for applying an input signal to said fourth inductor, means for applying a source of bias potential across said first capacitor to bias said diode device in the reverse direction7 a fifth inductor coupled to said third inductor, and means coupled to said fifth inductor for deriving said output signal.

8. A frequency divider circuit including a first capacitor connected in series with a device functioning as a non-linear capacitor in shunt with a non-linear resistance, means to apply an input signal in series with said 8 l device, a load device connected across said first capacitor, and means to derive an output signal from said load device, said circuit producing output signal energy supplied solely from said input signal and of a frequency less than the frequency of said input signal.

9. A frequency divider circuit including a capacitor connected in series with a device functioning mainly as a non-linear capacitive reactance for signal energy flowing in one direction and functioning mainly as a low resistance for signal energy flowing in the opposite direction, means to apply an input signal in series with said device, a load device connected across said first capacitor, and means to derive an output signal from said load device, said circuit producing output signal energy supplied solely from said input signal and of a frequency less than the frequency of said input signal.

10. A frequency divider circuit including a first capacitor, a device functioning as a non-linear capacitor in shunt with a non-linear resistance, an inductor, means connecting said capacitor, saidfdevice and said inductor in series to form a series circuit, means for applying input signal energy in series with said series circuit, and a load device connected across said first capacitor to provide a discharge path for said first capacitor, and means to derive an output signal from said load device, said frequency divider circuit producing output signal energy that is supplied solely from said input signal energy and that has a frequency less than the frequency of said input signal energy.

1l. A frequency divider circuit including a first capacitor, a device functioning mainly as a non-linear reactance for signal energy flowing in one direction and functioning mainly as a low resistance for signal energy owing in the opposite direction, an inductor, means connecting said capacitor, said device and said inductor in series to form a series circuit, means for applying input signal energy in the megacycle range in series with said series circuit, a discharge path having impedance connected across said capacitor, and means coupled to said path for producing an output signal, said frequency divider circuit producing output signal energy that is supplied solely from said input signal energy and that has a frequency less than the frequency of said input signal energy.

l2. A frequency divider circuit comprising a junction diode device, an inductor, a parallel circuit comprising a capacitor and an impedance element, means connecting said diode device, said inductor, and said parallel circuit in series to form a series circuit capable of passing direct current, means for applying a signal in series with said series circuit, means for applying a biasing potential to said junction diode device, and means for deriving a signal from said parallel circuit.

13. A frequency changer comprising a variable capacitance junction diode, an inductor, a circuit including a real and a reactive impedance, means connecting said diode, said inductor and said circuit effectively in series to form a series circuit capable of passing direct current, means to apply an alternating current signal in series with said series circuit, and means for deriving an output signal from said first-mentioned circuit.

14. A frequency divider circuit that produces an output signal, the energy of which is derived solely from the energy of an input signal, comprising an inductor, a variable capacitance junction diode, a parallel circuit including a capacitor and a resistor, and a source of a single alternating current input signal all coupled in series to form a series circuit capable of passing direct current, and means for deriving an output signal from across said parallel circuit.

l5, A frequency divider circuit that produces an output signal, the energy of which is derived solely from the energy of an input signal, comprising a rst inductor, a variable capacitance junction diode, a parallel circuit including a capacitor and a second inductor, and a source of a single alternating current input signal all coupled in series to form a series circuit capable of passing direct current, and means for deriving an output signal from across said parallel circuit.

16. A frequency divider circuit comprising a diode device, said device being a variable capacitance semiconductor junction diode, an inductor, a tuned circuit including a capacitive impedance device, means connecting said diode device, said inductor and said tuned circuit in series to form a series circuit capable of passing direct current, means to apply an input signal in series with said diode device, and means to derive an output signal from said tuned circuit.

17. A frequency divider circuit comprising a series resonant circuit including Va variable capacitance junction diode, a parallel resonant circuit, means to connect said series resonant circuit and said parallel resonant circuit in series -to form a series circuit capable of passing direct current, means to apply energy of a first frequency to said series resonant circuit and to derive energy of a second frequency from said parallel resonant circuit.

18. A frequency changer comprising a series resonant circuit including a variable capacitance semi-conductor junction diode, a parallel resonant circuit, means to connect said series resonant circuit and said parallel resonant circuit in series to form a series circuit capable of passing direct current, means connected in series with said series circuit and including a source of unidirectional potential for applyingv a biasing potential to said diode, and means to apply signal energy of a first frequency to said series resonant circuit and derive signal energy of a second lower frequency from said parallel resonant circuit.

References Cited in the tile of this patent UNITED STATES PATENTS Muss et al Mar. 24, 1959