US2462275A - Electronic computer - Google Patents

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US2462275A
US2462275A US464293A US46429342A US2462275A US 2462275 A US2462275 A US 2462275A US 464293 A US464293 A US 464293A US 46429342 A US46429342 A US 46429342A US 2462275 A US2462275 A US 2462275A
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tube
anode
pulses
trigger
pulse
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US464293A
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George A Morton
Leslie E Flory
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RCA Corp
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RCA Corp
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    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K23/00Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/82Pulse counters comprising counting chains; Frequency dividers comprising counting chains using gas-filled tubes

Description

Feb. 22, 1949. G. A. MoRToN Er AL ELECTRONIC COMPUTER Filed Nov. 2, 1942 LefLle-FLOQL;

.illl lll lg lf- Z l ""0 Geose HmoRTon Eg 'b- (Ittorneg Patented Feb. Az2, 1949 ELECTRONIC COMPUTER George A. Morton, Haddon Heights, and Leslie E. Flory, Oaklyn, N. J assignors to Radio Corporation of America, a corporation oi' Delaware Application November 2, 1942, Serial No. 464,293

This invention relates generally to electronicv 6 Claims. (Cl. 235-92) computers and particularly to electronic apparatus for counting voltage pulses and for adding and subtracting groups of such pulses.

The basic circuit utilized in adapting the invention herein to the various circuits to be described is the well known trigger circuit of the general type described in Theory and Application of Vacuum Tubes by Herbert J. Reich.

In one of 'its simplest forms, this trigger circuit includes two triodes in which the grid of the first triode is coupled to the anode of the second triode through a network comprising a parallel connected resistor and capacitor, and the grid of the second triode is similarly coupled to the anode of the first triode through a similar coupling network. The cathodes of both triodes are grounded. Grid and anode potentials are applied to the respective electrodes through separate resistors. If desired, a gaseous discharge tube may be connected across one of the anode resistors to indicate circuit operation.

In operation, if a negative voltage is applied to the grid of the first triode, the anode current of the triode will be reduced and the anode potential will become more positive. Due to the connection through the coupling resistor, the grid potential of the second triode will become more positive, causing an increase in the anode current of the second triode, with a resultant decrease in the second triode anode potential. This decrease in anode potential will, in turn, cause the grid potential of the rst triode to become more negative. This action will continue until the anode current of the rst triode is -cut off. The

i'lrst triode will remain cut oil, and the second triode will remain conducting, until' a positive potential is applied to the grid of the rst triode or a negative potential is applied to the grid of the second triode. In either latter instance, the tube operating conditions will be reversed and the rst triode will become conducting and the anode current of the second triode will be cut off.

One of the features of the instantinvention is the utilization of such trigger circuits in cascade arrangement, whereby a predetermined change in the polarization or activation of one triode of the trigger circuit will generate a pulse to trigger or activate a succeeding trigger circuit in the cascade arrangement, As many trigger circuits as desired may be connected in cascade. The instant invention is a modification of that disclosed in our copending application Serial No. 459,404. filed September 23. 1942. now Patent No. 2,442,403, granted June l, 1948, which de- Vilar nature.

scribes a cascade trigger circuit arrangement for counting voltage pulses to derive a sum in the scale of 10. The instant invention, however, is adapted to counting voltage pulses and indicating the sum as 'a binary number. In addition, provision is made for deriving the binary difference or the binary sums of two or more succeeding series of voltage pulses.

The binary system of computation is particularly suited to electronic computers since a complete binary order of a binary number may be expressed in terms of the conducting or cut- A off condition of the anode circuit of a conventional vacuum tube. A saving in the number of tubes required for a given number is also posvsible in a ratio of 3 to 1 over the scale of 10 system. More complete discussions of the binary and similar systems of computation may be found in Elementary Number Theory by Uspenski and 'Heaslet, Mathematical Excursions by H. A. Merrill, and "A Mathematician Explains by M. I. Logston. i

The conventional trigger circuit described heretofore eects a reversal in polarization or activation by succeeding applied pulses of a sim- The circuits to -be described hereinafter are adapted to accomplish this purpose in response to negative operating pulses applied to the anode circuits of the trigger tubes.

Among the objects of the invention are to provide a new and improved means for counting voltage pulses. Another object of the invention is to'provide improved means for utilizing conventional trigger circuits in a novel cascade arrangement for counting voltage pulses. Still another object is to provide an improved means for connecting conventional trigger circuits so as to provide a progressive summation of a series of input pulses. improved means for clearing the counter after each summation for conditioning the circuit for counting succeeding applied pulses. Another object is to provide a new and improved means for deriving the binary sum of a series of pulses applied to a thermionic tube trigger circuit. Still another object is to provide a new and improved means for deriving the binary difference between the binary sums of succeeding series of voltage pulses applied to a series of cascaded trigger circuits Within limits determined by the number of trigger circuits included in said means.

The invention will be described by reference to the accompanying drawing of which Figure 1 is a schematic circuit diagram of the apparatus required for a single binary order; Figure 2 is a A further object is to provide schematic circuit diagram of the invention as adapted to compute the binary difference or the binary sums of two series of applied pulses; and Figure 3 is a block diagram of an extension of the circuit shown in schematic form in Figure 2. Similar reference numerals are applied to similar elements throughout the drawings.

Referring to the drawing, Figure 1 comprises a trigger circuit of the type described heretofore. The grid gl of a first triode I is connected to the anode p2 of a second triode 2 through a network comprising the parallel connected resistor rl" and capacitor cI. The anode pI of the flrsttriode I is connected to the grid g2 of the second triode 2 through a second network comprising the parallel connected resistor r2 and capacitor c2. The cathodes of the rst and second triodes I, 2 are grounded. A source of negative bias potential 1 is connected to the grid gI oi the first tube I through a grid resistor rl, and to the grid g2 of the second triode 2 through a second grid resistor r4. The positive terminal of the bias potential source .'I is grounded. Anode potential from the source I8 is applied to the anode pI of the first tube I through an anode coupling resistor ri, and to the anode p2 of the second tube 2 through a second anode coupling resistor r6. The negative terminal of the anode potential source is grounded. A gaseous indicator tube 3, which may be a conventional neon tube, is connected across the second anode resistor f to indicate when the anode current exceeds a predetermined value, which is a function of the anode current ilowing in the second tube 2. A choking resistor rl is connected in series with the positive anode power supply lead to the common terminals of the anode resistors f5 and r6. Negative input control pulses 4 are applied to the input terminals 5 between ground and the common terminal of the anode resistors f5 and r6, through an input coupling capacitor c3.

In operation, if it is assumed that the first tube I initially is drawing anode current, the second tube 2 will be biased oil. A negative pulse I, applied to the input terminals 5, will appear on the anode/p2 of the tube 2 and on the grid gI of the first tube I which will in turn reduce the anode current in the first tube I. This, in turn, will make the potential on the anode pI of the iirst tube I more positive, and degenerate simultaneously any of the original negative pulse ap plied at pl. Thus a positive pulse will be applied` to the grid g2 of the tube 2 causing the tube 2 to become conducting. This effect will increase and continue, because of the dierence in the potential charges on the capacitors cI' and c2, until the ilrst tube I iscut oil, and the second tube 2 becomes completely conducting. A subsequent negative pulse applied to the input terminals I will cause the stable conditions of the trigger tubes I, 2 to be reversed since the circuit is completely symmetrical. l

Theindicator tube 3 will be illuminated when the second tube 2 is conducting, since only under this condition is there an appreciable voltage drop across the anode coupling resistor ri. If

we assume that the conducting condition of thev first tube pI represents zero. and the conducting condition of the second tube 2 represents 1, the result is a binary counter in which zero is indicatedmn the indicator itube 3 whenthe tube is extinguished, and 1 is indicated when the tube is illuminated. The second pulse applied to the input terminals 5 will cut oil the second trigger tube 2 and cause the nrst tube I to again be- 4 come conducting. In order to indicate that two pulses have occurred instead of none, it is essential that a carryover system be' employed which will provide a second indication representative of the second order of the binary total.

Figure 2 is a modification of Figure 1 which employs two trigger circuits connected in a novel cascade arrangement whereby carryover or two orders of a binary total may be indicated. Provision is also made for both adding and subtracting series of pulses applied to the input terminals of the counter. Essentially, the circuit comprises two trigger circuits oi the type described in Figure l, but it should be understood that as many such circuits as required may be connected in cascade arrangement in a similar manner. The first and second trigger tubes I and 2, and the first indicator tube I perform the functions required in the indication of the rst order of the binary total. The third and` fourth trigger tubes I`I and I2 and the second indicator tubeIS perform the functions required in the indication of the second order of the binary total. Connections I6 and I1 from the anodes pI I' and pil, respectively, are provided for coupling to succeeding trigger circuits of similar type in which the higher orders of the binary total may be indicated. Input pulses are applied to the input terminals 5, in the same manner as described in Figure 1. 4

The grid of a first transfer amplifier 6 isconnected` through a second coupling capacitor c4 to the anode pI of the first trigger tube I, and through` a grid resistor f8 to the movablecontact of a single 'pole-double throw switch sl. The ilxedcontacts of the switch sl are lconnected to diiferent negative terminals of a source of potential l. The positive terminal of the potential source l is connected to ground, and tothe `cathode of the first transfer tube 6. The grid of' a second transfer tube 8 is connected through a third coupling capacitor c5, to the anode p2 of the second trigger tube 2 and through a grid resistor r9 to the movable contact of a second single pole-double throw switch s2. The fixed contacts of the second switch s2 areconnected to different negative terminals of a second potential source 9. The positive terminal of the second potential source 9 is connected to ground,

and to the cathode of the second transfer tube 8.-

The anodes ofthe first and second transfer tubes 6 and 8 are both connected to the common ter minal of the anode resistors rI5, rIB and rll of the second trigger circuit comprising the tubes II and I2. The grids of the second and fourth trigger tubes 2 and I2 are connected respectively through suitable choking resistors rIlI and r2 to a iixed contact of a reset switch s3. The movable contact of the reset switch s3 is connected to a suitable negative terminal of the potential source 9 to providevcut-off grid bias for the tuba: 2 and I'2 when the switch is closed.A

In operation, if the tubes I and II are assumed to be conducting and the tubes 2 and I2 to be cut oif, the first negative pulse applied to the input terminals 5 will reverse the stable conditions of the trigger tubes causing the second tube 2 to become conducting and illuminating the first indicator tube 3. The second pulseapplied to the input terminals` 5 will again reverse the.

right or highest negative terminal provided by the source 1, they rst transfer tube 6 will be cut oil'. If the movable contact of the second switch s2 is connected to the position marked Normal." normal grid bias will be provided for the second transfer tube 8, When the second trigger tube 2 becomes non-conducting upon the application of `the second input pulse to the input terminals cator tube 3. The second pulse applied to the circuit will extinguish the first indicator tube 3" and illuminate the second indicator tube I3. A third pulse applied to the input terminals 5 will illuminate the rst indicator 3. The indicator I3,

however, will remain lighted because the transfer of current conduction to the tube 12 makes the grid of the tube Ii more negative, thus reducing the current which the tube 8 draws through the resistor rII and applying to the common anode terminal of the trigger circuit II-I2 a positive pulse which is incapable of changing the conductive condition of this trigger circuit.

If the iirst switch sI is connected to the con- -f tact marked Normal to provide normal bias for the rst transfer tube 6 and the movable terminal of the second switch s2 is connected to the contact connected to the source of cut-olf bias for the grid of the second transfer tube 8, a third pulse may be subtracted from the previouly indicated total of two pulses. This is accomplished since the control pulse for the second trigger circuit comprising the tubes II and I2 is now derived from the anode pI which becomes more positive when current is transferred from the tube i to the tube 2 by the third pulse applied at the terminals 5. Tubes 2 and II are now conducting and the lamp 3 is lighted indicating a count of l.

A fourth pulse is subtracted, without change in connections, by its applicatipn to the terminals 5 and the resulting transfer of current from the tube 2 to the tube I. Tubes I and II are'now conducting and a count of zero is indicated, After deriving the desired total or difference of applied pulses, the circuit may be reset for further computation by closing the reset switch s3. In its closed position, the reset switch applies a source of cut-off potential to the second and fourth trigger tubes 2 and I2, thereby extinguishing both indicator lamps 3 and I3.

Figure 3 is a block diagram in which the square blocks correspond to the first and second trigger tubes of cascaded trigger circuits of the type described in Figure 2, and the circular blocks correspond to the transfer tubes. The circular blocks A indicate transfer tubes which are conducting when the circuit is utilized to add input pulses applied to the first trigger circuit. The circular blocks S indicate the transfer tubes which are utilized t0 actuate succeeding trigger circuits when input pulses are to. be subtracted from previously applied input pulses. It should be understood that as many trigger circuits and transfer tubes may be used as will be required to indicate the highest binary quantity to be computed.

Thus, the invention described comprises a new 6 and improved means for utilizing conventional trigger circuits to provide a binary counter in which voltage pulses may be either added or subtracted, and in which the answer is indicated in terms of a binary member.

We claim as our invention: y

1. The combination of a pair of units each having an input terminal and each including a pair of electron discharge elements having their anodes and control grids cross-connected so that current conduction is shifted from one to another of said elements in response to the application of a voltage pulse to said input terminal, a pair of transfer means each connected between a different anode of the rst of said units and the input terminal of the second of said units, and means for selectively controlling said pulse transfer means to pass a pulse to the input terminal of said second unit only in response to a pulse from one or the other anode of said'first unit.

2. The combination of a pair of units each having an input terminal -and each including a pair of electron discharge elements having their anodes and control grids cross-connected so that current conduction is shifted from one to another of said elements in response to the application of a voltage pulse to said input terminal, a pair of triodes having their anodes connected to the input terminal of the second of said units and their grids each connected to a different anode of the first of said units, and means for selectively controlling the grid potentials of said triodes to pass pulses to the input terminal of said second unit only in response yto pulses at one or the other anode of said first unit. Y

3. The combination of a pair of units each including a pair of electron discharge elements Which have operating potential applied to their anodes through a common resistor and through separate resistors individual to said anodes and have their anodes and grids cross-connected so that current conduction is shifted from one to another of said elements in response to the application of a voltage pulse to an input terminal common to said common and separate resistors, a pair of transfer means each connected between a different anode of the rst of said units and the input terminal of the second of said units, and means for selectively controlling said pulse transfer means to pass pulses to the input terminal of said second unit only in response to pulses at one or the other anode of said rst unit.

4. The combination of a pair of units each including first and second electron discharge elements which have operating potential applied to their anodes through a common resistor and through separate resistors individual to said anodes and have their anodes and grids crossconnected so that current conduction is shifted from one to another of said elements in response to the application of a voltage pulse to an input terminal common to said common and separate resistors, a pair of transfer means each connected between a different anode of the rst of said units and the input terminal of the second of said units, means for selectively controlling said pulse transfer means to pass pulses to the input terminal of said second unit only in response to pulses at one or the other anode of said first unit, and means for applying to the grid of said rst element of each of said units a pulse whereby current conduction is established in said second elements of each of said units.

5. The combination of a pair of units operable sans 'l eitbertoabinaryoneorabinaryaeroeondion in response to an input pulse. a pair of pulse transfer means connected between said unit, andmeansforselectivelycontrollingsaidtnnsiermeanstopassaninputpulsetromtbeilrstto theseeondoi'saidunits onlyinresponsetoa binaryoneorabinarynerooonditionofsaid -rst unit.

6. The combination of a pair oi' units operable either to a binary one or a binary zero condition in response to an input pulse, a pair of pulse transfer means connected between said units, means for controlling the ilrst of said transfer means to pass input pulses from the first to the second of said units for adding pulses applied to the input of said ilrst unit, and means for controlling the second of said transfer means to pass input pulses from the ilrst to the second of said units i'or subtracting from said added pulses further pulses applied to the input of said nrst unit.

GEORGE A. MCRTON. LESLIE E. FLRY.

l'hei'ollowingrefereneesareolreeordinthe illeofthispatent:

UNITED STATE PAMB Number Name Date 2,289,987' Norton July 14. ilu 2,348,016 mem In: 3.1.44 2,349,810 Cook Il I, 10M

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Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2536916A (en) * 1945-12-21 1951-01-02 Ibm Electronic counting system
US2547511A (en) * 1948-09-22 1951-04-03 Nuclear Instr And Chemical Cor Electrical apparatus
US2554994A (en) * 1949-02-16 1951-05-29 Gen Electric Electronic switching circuit
US2566918A (en) * 1948-12-01 1951-09-04 Ibm Binary-decade counter
US2595519A (en) * 1946-04-13 1952-05-06 Geohegan William Anthony Electronic counter
US2616627A (en) * 1948-10-06 1952-11-04 Bell Telephone Labor Inc Counter circuit
US2626751A (en) * 1948-06-11 1953-01-27 Int Standard Electric Corp Gas discharge tube counting arrangement
US2656460A (en) * 1949-10-28 1953-10-20 Bell Telephone Labor Inc Bidirectional counter
US2656106A (en) * 1942-08-10 1953-10-20 Howard P Stabler Shaft position indicator having reversible counting means
US2662692A (en) * 1947-12-18 1953-12-15 Csf Reversible electronic counter
US2665068A (en) * 1950-08-18 1954-01-05 Northrop Aircraft Inc Add-subtract binary counter circuit
US2703201A (en) * 1949-03-24 1955-03-01 Ibm Electronic divider
US2703202A (en) * 1949-04-14 1955-03-01 Ibm Electronic binary algebraic accumulator
US2735005A (en) * 1956-02-14 Add-subtract counter
US2737342A (en) * 1948-08-04 1956-03-06 Teleregister Corp Rotary magnetic data storage system
US2745599A (en) * 1949-03-24 1956-05-15 Ibm Electronic multiplier
US2750114A (en) * 1949-09-21 1956-06-12 Sperry Rand Corp Reversible accumulator
US2764349A (en) * 1951-07-28 1956-09-25 Northrop Aircraft Inc Differential ring counter
US2795695A (en) * 1953-02-09 1957-06-11 Vitro Corp Of America Information processing apparatus
US2819839A (en) * 1951-02-23 1958-01-14 Donald H Jacobs High speed register using gating circuits to bypass delay elements
US2829822A (en) * 1949-10-24 1958-04-08 Marchant Calculators Inc Binary value calculator
US2836356A (en) * 1952-02-21 1958-05-27 Hughes Aircraft Co Analog-to-digital converter
US2841705A (en) * 1953-05-29 1958-07-01 Nathan A Moerman Reversible electronic decade counter
US2842661A (en) * 1947-09-26 1958-07-08 Padevco Inc Counters
US2850240A (en) * 1952-10-28 1958-09-02 Ibm Rotational displacement indicating system
US2933251A (en) * 1953-10-16 1960-04-19 Ibm Record controlled machine
US3159792A (en) * 1961-09-05 1964-12-01 Beckman Instruments Inc Reversible counter circuit with means for detecting a predetermined total count for controlling counter reversal
US5540917A (en) * 1992-06-24 1996-07-30 Hoffmann-La Roche Inc. Biomass lipase inhibitor useful for treating adiposity

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2289987A (en) * 1940-12-28 1942-07-14 Rca Corp Electronic keying device
US2348016A (en) * 1941-11-13 1944-05-02 Gen Electric Countercircuit
US2349810A (en) * 1941-12-01 1944-05-30 Gen Electric Counter circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2289987A (en) * 1940-12-28 1942-07-14 Rca Corp Electronic keying device
US2348016A (en) * 1941-11-13 1944-05-02 Gen Electric Countercircuit
US2349810A (en) * 1941-12-01 1944-05-30 Gen Electric Counter circuit

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2735005A (en) * 1956-02-14 Add-subtract counter
US2656106A (en) * 1942-08-10 1953-10-20 Howard P Stabler Shaft position indicator having reversible counting means
US2536916A (en) * 1945-12-21 1951-01-02 Ibm Electronic counting system
US2595519A (en) * 1946-04-13 1952-05-06 Geohegan William Anthony Electronic counter
US2842661A (en) * 1947-09-26 1958-07-08 Padevco Inc Counters
US2662692A (en) * 1947-12-18 1953-12-15 Csf Reversible electronic counter
US2626751A (en) * 1948-06-11 1953-01-27 Int Standard Electric Corp Gas discharge tube counting arrangement
US2737342A (en) * 1948-08-04 1956-03-06 Teleregister Corp Rotary magnetic data storage system
US2547511A (en) * 1948-09-22 1951-04-03 Nuclear Instr And Chemical Cor Electrical apparatus
US2616627A (en) * 1948-10-06 1952-11-04 Bell Telephone Labor Inc Counter circuit
US2566918A (en) * 1948-12-01 1951-09-04 Ibm Binary-decade counter
US2554994A (en) * 1949-02-16 1951-05-29 Gen Electric Electronic switching circuit
US2703201A (en) * 1949-03-24 1955-03-01 Ibm Electronic divider
US2745599A (en) * 1949-03-24 1956-05-15 Ibm Electronic multiplier
US2703202A (en) * 1949-04-14 1955-03-01 Ibm Electronic binary algebraic accumulator
US2750114A (en) * 1949-09-21 1956-06-12 Sperry Rand Corp Reversible accumulator
US2829822A (en) * 1949-10-24 1958-04-08 Marchant Calculators Inc Binary value calculator
US2656460A (en) * 1949-10-28 1953-10-20 Bell Telephone Labor Inc Bidirectional counter
US2665068A (en) * 1950-08-18 1954-01-05 Northrop Aircraft Inc Add-subtract binary counter circuit
US2819839A (en) * 1951-02-23 1958-01-14 Donald H Jacobs High speed register using gating circuits to bypass delay elements
US2764349A (en) * 1951-07-28 1956-09-25 Northrop Aircraft Inc Differential ring counter
US2836356A (en) * 1952-02-21 1958-05-27 Hughes Aircraft Co Analog-to-digital converter
US2850240A (en) * 1952-10-28 1958-09-02 Ibm Rotational displacement indicating system
US2795695A (en) * 1953-02-09 1957-06-11 Vitro Corp Of America Information processing apparatus
US2841705A (en) * 1953-05-29 1958-07-01 Nathan A Moerman Reversible electronic decade counter
US2933251A (en) * 1953-10-16 1960-04-19 Ibm Record controlled machine
US3159792A (en) * 1961-09-05 1964-12-01 Beckman Instruments Inc Reversible counter circuit with means for detecting a predetermined total count for controlling counter reversal
US5540917A (en) * 1992-06-24 1996-07-30 Hoffmann-La Roche Inc. Biomass lipase inhibitor useful for treating adiposity

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