US20140377949A1 - Method of depositing copper using physical vapor deposition - Google Patents

Method of depositing copper using physical vapor deposition Download PDF

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US20140377949A1
US20140377949A1 US14/315,003 US201414315003A US2014377949A1 US 20140377949 A1 US20140377949 A1 US 20140377949A1 US 201414315003 A US201414315003 A US 201414315003A US 2014377949 A1 US2014377949 A1 US 2014377949A1
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layer
copper
tantalum
less
vapor deposition
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US14/315,003
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Wen Yu
Stephen B. Robie
Jeremias D. Romero
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Advanced Micro Devices Inc
Morgan Stanley Senior Funding Inc
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Advanced Micro Devices Inc
Spansion LLC
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Assigned to MORGAN STANLEY SENIOR FUNDING, INC. reassignment MORGAN STANLEY SENIOR FUNDING, INC. SECURITY INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CYPRESS SEMICONDUCTOR CORPORATION, SPANSION LLC
Assigned to SPANSION LLC reassignment SPANSION LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ROBIE, STEPHEN B., ROMERO, JEREMIAS D.
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by physical means, e.g. sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • This invention relates generally to formation of layers on a semiconductor device, and more particularly, to formation of a thin copper layer.
  • PVD Physical Vapor Deposition
  • the PVD process is a well-known magnetron sputtering process for depositing a layer on a substrate 20 supported on a platform 21 .
  • a target 22 of the desired layer material is provided inside a vacuum chamber 24 , and argon gas is introduced into the chamber 24 and is ionized to a positive charge ( 26 ).
  • the target 22 is held at negative, while the wall of the chamber 24 is grounded, so that DC power is applied to add energy to the argon gas ions 26 , causing the ions 26 to be accelerated toward the target 22 .
  • the ions 26 gain momentum and strike the target 22 . This causes atoms or molecules 28 of the target 22 to scatter in the chamber 24 , with some being deposited on the substrate 20 .
  • Formation of a thin (for example 20 angstroms thick), continuous copper layer on an oxide layer of a wafer using a copper target 29 ) has proven problematical.
  • high surface tension causes the copper to form in large separate grains/crystals during the initial deposition, to minimize surface energy (so-called island growth).
  • This island growth causes the deposited copper to agglomerate into distinct, separate copper globules 32 ( FIG. 2 ) rather than a smooth, continuous, uniform layer as is desired.
  • the present method of forming an electronic structure comprises providing a base layer and depositing a layer of copper by physical vapor deposition with the temperature of the base layer at 50.degree. C. or less, with the deposition taking place at a power level of 300 W or less.
  • FIGS. 1 and 2 illustrate a typical prior approach in using PVD to deposit copper
  • FIG. 3-8 illustrate the present approach in using PVD to deposit copper
  • FIG. 9-11 are systems incorporating devices formed using the present method.
  • a base layer of tantalum 40 is deposited on an oxide layer, for example an SiO.sub. 2 layer 42 of a wafer 44 on platform 45 ( FIG. 3 ).
  • This process is undertaken in a deposition chamber 46 (internal temperature approximately 30.degree. C.) using conventional DC magnetron PVD techniques. That is, a target 48 of tantalum is provided inside chamber 46 , and argon gas is introduced into the chamber 46 and is ionized to a positive charge ( 50 ).
  • the target 48 is held at negative, while the wall of the chamber 46 is grounded, so that DC power is applied to add energy to the argon gas ions 50 , causing the ions 50 to be accelerated toward the target 48 .
  • the ions 50 gain momentum and strike the target 48 .
  • This causes tantalum atoms 52 of the target 48 to scatter in the chamber 46 , with some being deposited on the oxide layer 42 of the wafer 44 to form tantalum layer 40 .
  • the striking of the tantalum target material 48 with argon ions 50 causes the tantalum target material 48 to greatly increase in temperature, causing the temperature of the deposited tantalum layer 40 to be at a greatly elevated temperature (for example 200.degree. C.).
  • the resulting wafer 44 with tantalum 40 thereon which is at the above described elevated temperature of approximately 200.degree. C., is immediately transferred to another DC magnetron sputtering chamber 54 , so as to avoid contamination ( FIG. 4 ), placed on platform 55 therein (internal temperature of chamber 54 approximately 30.degree. C.) for formation of a thin copper layer on the tantalum layer 40 , by means of a copper target 56 as will be shown and described.
  • a pumpdown step is undertaken to provide a vacuum in the chamber 54 ( FIG. 5 ). This step takes only a short time (in this example 3 seconds) and so the temperature of the tantalum layer 40 remains near 200.degree. C.
  • a cooling step is undertaken, with argon gas flowing ( FIG. 6 ), but without DC power.
  • This step is undertaken for an extended period of time, in this embodiment 60 seconds, with argon gas flowing to the backside of the wafer 44 to effectively cool down the wafer 44 and tantalum layer 40 . so that the tantalum layer 40 cools down to 50.degree. C. or less, preferably to approximately 30.degree. C., the internal temperature of the chamber 54 .
  • a deposition step is undertaken ( FIG. 7 ), with low DC power applied (300 w or less, in this embodiment 200 W).
  • Argon gas continues to be introduced into the chamber 54 to establish a pressure of approximately 5 mTorr, and is ionized to a positive charge ( 58 ).
  • the pressure and DC power level are carefully selected in order to obtain a stable plasma.
  • the target 56 is held at negative, while the wall of the chamber 54 is grounded, so that DC power is applied to add energy to the argon gas ions 58 , causing the ions 58 to be accelerated toward the target 56 .
  • the ions 58 gain momentum and strike the copper target 56 . This causes atoms 60 of copper to scatter in the chamber 54 , with some being deposited on the tantalum layer 40 .
  • This deposition step is undertaken in this example for 10 seconds.
  • the tantalum layer 40 at low temperature promotes smooth copper nucleation across the surface of the tantalum layer 40 , avoiding the island growth described above.
  • the low temperature of the tantalum layer 40 along with low power applied during the deposition step (for example 200 W rather than for example 800 W or more as previously applied) promotes formation of a smooth, continuous, uniform, thin copper layer 62 (30 angstroms or less, in this embodiment approximately 20 angstroms) on the tantalum layer 40 by avoiding formation of globules thereof as described thereof.
  • the present method succeeds in forming a thin, uniform smooth, continuous copper layer 62 .
  • FIG. 9 illustrates a system 200 utilizing devices formed using the method described above.
  • the system 200 includes hand-held devices in the form of cell phones 202 , which communicate through an intermediate apparatus such as a tower 204 (shown) and/or a satellite. Signals are provided from one cell phone to the other through the tower 204 .
  • a cell phone 202 with advantage uses devices formed as shown and described.
  • One skilled in the art will readily understand the advantage of using such devices in other hand-held devices which utilize data storage, such as portable media players, personal digital assistants, digital cameras and the like.
  • FIG. 10 illustrates another system 300 utilizing devices formed using the method described above.
  • the system 300 includes a vehicle 302 having an engine 304 controlled by an electronic control unit 306 .
  • the electronic control unit 306 with advantage uses such devices.
  • FIG. 11 illustrates yet another system 400 utilizing devices formed using the method described above.
  • This system 400 is a computer 402 which includes an input in the form of a keyboard, and a microprocessor for receiving signals from the keyboard through an interface.
  • the microprocessor also communicates with a CDROM drive, a hard drive, and a floppy drive through interfaces. Output from the microprocessor is provided to a monitor through an interface.
  • memory Also connected to and communicating with the microprocessor is memory which may take the form of ROM, RAM, flash and/or other forms of memory. The system with advantage uses such devices.

Abstract

The present method of forming an electronic structure includes providing a tantalum base layer and depositing a layer of copper on the tantalum layer, the deposition being undertaken by physical vapor deposition with the temperature of the base layer at 50.degree. C. or less, with the deposition taking place at a power level of 300 W or less.

Description

    RELATED APPLICATIONS
  • The present Application is a divisional of application Ser. No. 11/641,647, (Attorney Docket Number SPSN-AF01925) entitled “Method of Depositing Copper Using Physical Vapor Deposition” filed Dec. 19, 2006, which is all incorporated herein by reference.
    • BACKGROUND OF THE INVENTION
  • 1. Technical Field
  • This invention relates generally to formation of layers on a semiconductor device, and more particularly, to formation of a thin copper layer.
  • 2. Background Art
  • A common technique for forming device layers of various materials is PVD (Physical Vapor Deposition). With reference to FIGS. 1 and 2, the PVD process is a well-known magnetron sputtering process for depositing a layer on a substrate 20 supported on a platform 21. Typically (FIG. 1), a target 22 of the desired layer material is provided inside a vacuum chamber 24, and argon gas is introduced into the chamber 24 and is ionized to a positive charge (26). The target 22 is held at negative, while the wall of the chamber 24 is grounded, so that DC power is applied to add energy to the argon gas ions 26, causing the ions 26 to be accelerated toward the target 22. During the acceleration, the ions 26 gain momentum and strike the target 22. This causes atoms or molecules 28 of the target 22 to scatter in the chamber 24, with some being deposited on the substrate 20.
  • Formation of a thin (for example 20 angstroms thick), continuous copper layer on an oxide layer of a wafer using a copper target 29) has proven problematical. When using conventional PVD processes to form such a thin copper layer (containing only a small amount of copper) on an oxide such as SiO.sub.2 30, high surface tension causes the copper to form in large separate grains/crystals during the initial deposition, to minimize surface energy (so-called island growth). This island growth causes the deposited copper to agglomerate into distinct, separate copper globules 32 (FIG. 2) rather than a smooth, continuous, uniform layer as is desired.
  • What is needed is an approach wherein a smooth, continuous, uniform, thin copper layer may be formed.
    • DISCLOSURE OF THE INVENTION
  • Broadly stated, the present method of forming an electronic structure comprises providing a base layer and depositing a layer of copper by physical vapor deposition with the temperature of the base layer at 50.degree. C. or less, with the deposition taking place at a power level of 300 W or less.
  • The present invention is better understood upon consideration of the detailed description below, in conjunction with the accompanying drawings. As will become readily apparent to those skilled in the art from the following description, there is shown and described an embodiment of this invention simply by way of the illustration of the best mode to carry out the invention. As will be realized, the invention is capable of other embodiments and its several details are capable of modifications and various obvious aspects, all without departing from the scope of the invention. Accordingly, the drawings and detailed description will be regarded as illustrative in nature and not as restrictive.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The novel features believed characteristic of the invention are set forth in the appended claims. The invention itself, however, as well as said preferred mode of use, and further objects and advantages thereof, will best be understood by reference to the following detailed description of an illustrative embodiment when read in conjunction with the accompanying drawings, wherein:
  • FIGS. 1 and 2 illustrate a typical prior approach in using PVD to deposit copper;
  • FIG. 3-8 illustrate the present approach in using PVD to deposit copper; and
  • FIG. 9-11 are systems incorporating devices formed using the present method.
    •  BEST MODE(S) FOR CARRYING OUT THE INVENTION
  • Reference is now made in detail to a specific embodiment of the present invention which illustrates the best mode presently contemplated by the inventors for practicing the invention.
  • In the present approach, in forming an electronic structure, prior to the formation of a copper layer, a base layer of tantalum 40 is deposited on an oxide layer, for example an SiO.sub.2 layer 42 of a wafer 44 on platform 45 (FIG. 3). This process is undertaken in a deposition chamber 46 (internal temperature approximately 30.degree. C.) using conventional DC magnetron PVD techniques. That is, a target 48 of tantalum is provided inside chamber 46, and argon gas is introduced into the chamber 46 and is ionized to a positive charge (50). The target 48 is held at negative, while the wall of the chamber 46 is grounded, so that DC power is applied to add energy to the argon gas ions 50, causing the ions 50 to be accelerated toward the target 48. During the acceleration, the ions 50 gain momentum and strike the target 48. This causes tantalum atoms 52 of the target 48 to scatter in the chamber 46, with some being deposited on the oxide layer 42 of the wafer 44 to form tantalum layer 40. The striking of the tantalum target material 48 with argon ions 50 causes the tantalum target material 48 to greatly increase in temperature, causing the temperature of the deposited tantalum layer 40 to be at a greatly elevated temperature (for example 200.degree. C.).
  • The resulting wafer 44 with tantalum 40 thereon, which is at the above described elevated temperature of approximately 200.degree. C., is immediately transferred to another DC magnetron sputtering chamber 54, so as to avoid contamination (FIG. 4), placed on platform 55 therein (internal temperature of chamber 54 approximately 30.degree. C.) for formation of a thin copper layer on the tantalum layer 40, by means of a copper target 56 as will be shown and described.
  • Immediately after the wafer 44 with tantalum layer 40 thereon enters the chamber 54, a pumpdown step is undertaken to provide a vacuum in the chamber 54 (FIG. 5). This step takes only a short time (in this example 3 seconds) and so the temperature of the tantalum layer 40 remains near 200.degree. C.
  • After this step is completed, a cooling step is undertaken, with argon gas flowing (FIG. 6), but without DC power. This step is undertaken for an extended period of time, in this embodiment 60 seconds, with argon gas flowing to the backside of the wafer 44 to effectively cool down the wafer 44 and tantalum layer 40. so that the tantalum layer 40 cools down to 50.degree. C. or less, preferably to approximately 30.degree. C., the internal temperature of the chamber 54.
  • After this step is completed, a deposition step is undertaken (FIG. 7), with low DC power applied (300 w or less, in this embodiment 200 W). Argon gas continues to be introduced into the chamber 54 to establish a pressure of approximately 5 mTorr, and is ionized to a positive charge (58). The pressure and DC power level are carefully selected in order to obtain a stable plasma. The target 56 is held at negative, while the wall of the chamber 54 is grounded, so that DC power is applied to add energy to the argon gas ions 58, causing the ions 58 to be accelerated toward the target 56. During the acceleration, the ions 58 gain momentum and strike the copper target 56. This causes atoms 60 of copper to scatter in the chamber 54, with some being deposited on the tantalum layer 40. This deposition step is undertaken in this example for 10 seconds.
  • The tantalum layer 40 at low temperature promotes smooth copper nucleation across the surface of the tantalum layer 40, avoiding the island growth described above. In addition, the low temperature of the tantalum layer 40 along with low power applied during the deposition step (for example 200 W rather than for example 800 W or more as previously applied) promotes formation of a smooth, continuous, uniform, thin copper layer 62 (30 angstroms or less, in this embodiment approximately 20 angstroms) on the tantalum layer 40 by avoiding formation of globules thereof as described thereof.
  • Finally, another pump-down step is undertaken (FIG. 8).
  • The present method succeeds in forming a thin, uniform smooth, continuous copper layer 62.
  • FIG. 9 illustrates a system 200 utilizing devices formed using the method described above. As shown therein, the system 200 includes hand-held devices in the form of cell phones 202, which communicate through an intermediate apparatus such as a tower 204 (shown) and/or a satellite. Signals are provided from one cell phone to the other through the tower 204. Such a cell phone 202 with advantage uses devices formed as shown and described. One skilled in the art will readily understand the advantage of using such devices in other hand-held devices which utilize data storage, such as portable media players, personal digital assistants, digital cameras and the like.
  • FIG. 10 illustrates another system 300 utilizing devices formed using the method described above. The system 300 includes a vehicle 302 having an engine 304 controlled by an electronic control unit 306. The electronic control unit 306 with advantage uses such devices.
  • FIG. 11 illustrates yet another system 400 utilizing devices formed using the method described above. This system 400 is a computer 402 which includes an input in the form of a keyboard, and a microprocessor for receiving signals from the keyboard through an interface. The microprocessor also communicates with a CDROM drive, a hard drive, and a floppy drive through interfaces. Output from the microprocessor is provided to a monitor through an interface. Also connected to and communicating with the microprocessor is memory which may take the form of ROM, RAM, flash and/or other forms of memory. The system with advantage uses such devices.
  • The foregoing description of the embodiment of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Other modifications or variations are possible in light of the above teachings.
  • The embodiment was chosen and described to provide the best illustration of the principles of the invention and its practical application to thereby enable one of ordinary skill of the art to utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. All such modifications and variations are within the scope of the invention as determined by the appended claims when interpreted in accordance with the breadth to which they are fairly, legally and equitably entitled.

Claims (20)

What is claimed is:
1. A method of forming an electronic structure comprising:
providing a tantalum layer; and
depositing a layer of copper of a substantially uniform thickness of 30 angstroms or less on the tantalum layer.
2. The method of claim 1, wherein the layer of copper is deposited by physical vapor deposition with the temperature of the tantalum layer at 50° C. or less.
3. The method of claim 2, wherein the layer of copper is deposited by physical vapor deposition with the temperature of the tantalum layer at approximately 30° C.
4. The method of claim 1, wherein the base layer is formed on a layer of oxide that is formed on the surface of a wafer.
5. The method of claim 4, wherein the wafer, the layer of oxide, and the base layer are transformed to a chamber, after forming the base layer, to avoid contamination and to provide a vacuum.
6. The method of claim 5, further comprising a pump-down step to provide the vacuum.
7. The method of claim 1, wherein the layer of copper is deposited by physical vapor deposition at a power level of 300 W or less.
8. The method of claim 7, wherein the layer of copper is deposited by physical vapor deposition at a power level of approximately 200 W.
9. The method of claim 1, further comprising rapid cooling of the layer of oxide and the base layer, wherein rapid cooling is performed for an extended period of time.
10. The method of claim 1, wherein a power level of 300 W or less and a cool base layer promote a smooth, continuous, uniform, and thin formation of the layer of copper.
11. The method of claim 1, wherein said electronic structure is incorporated in a system.
12. The method of claim 1, wherein the system is selected from the group consisting of a vehicle, and a computer.
13. A method of forming an electronic structure incorporated in a hand-held device, said method comprising:
providing a base layer on a layer of oxide that is formed on the surface of a wafer; and
depositing a layer of copper of a substantially uniform thickness of 30 angstroms or less on the tantalum layer.
14. The method of claim 13, wherein the layer of copper is deposited by physical vapor deposition with the temperature of the tantalum layer at 50° C. or less.
15. The method of claim 13, wherein the layer of copper is deposited by physical vapor deposition at a power level of 300 W or less.
16. The method of claim 13, wherein the wafer with the layer of oxide and the base layer are transformed to a chamber, after forming the base layer, to avoid contamination and to provide a vacuum.
17. The method of claim 16, further comprising a pump-down step to provide the vacuum.
18. The method of claim 13, further comprising rapid cooling of the layer of oxide and the base layer.
19. The method of claim 13, wherein the power level of 300 W or less and a cool base layer promote a smooth, continuous, uniform, and thin formation of the layer of copper.
20. The method of claim 19, wherein the rapid cooling is performed after forming of the tantalum layer.
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