US20140267300A1  Rendering in computer graphics systems  Google Patents
Rendering in computer graphics systems Download PDFInfo
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 US20140267300A1 US20140267300A1 US14/205,907 US201414205907A US2014267300A1 US 20140267300 A1 US20140267300 A1 US 20140267300A1 US 201414205907 A US201414205907 A US 201414205907A US 2014267300 A1 US2014267300 A1 US 2014267300A1
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 238000009877 rendering Methods 0.000 title claims abstract description 33
 230000000875 corresponding Effects 0.000 claims description 5
 238000000034 methods Methods 0.000 description 25
 238000005070 sampling Methods 0.000 description 12
 238000006243 chemical reaction Methods 0.000 description 4
 XUIMIQQOPSSXEZUHFFFAOYSAN silicon Chemical compound data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nMzAwcHgnIGhlaWdodD0nMzAwcHgnIHZpZXdCb3g9JzAgMCAzMDAgMzAwJz4KPCEtLSBFTkQgT0YgSEVBREVSIC0tPgo8cmVjdCBzdHlsZT0nb3BhY2l0eToxLjA7ZmlsbDojRkZGRkZGO3N0cm9rZTpub25lJyB3aWR0aD0nMzAwJyBoZWlnaHQ9JzMwMCcgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHRleHQgZG9taW5hbnQtYmFzZWxpbmU9ImNlbnRyYWwiIHRleHQtYW5jaG9yPSJzdGFydCIgeD0nMTMyLjY1NScgeT0nMTU2JyBzdHlsZT0nZm9udC1zaXplOjQwcHg7Zm9udC1zdHlsZTpub3JtYWw7Zm9udC13ZWlnaHQ6bm9ybWFsO2ZpbGwtb3BhY2l0eToxO3N0cm9rZTpub25lO2ZvbnQtZmFtaWx5OnNhbnMtc2VyaWY7ZmlsbDojM0I0MTQzJyA+PHRzcGFuPlNpPC90c3Bhbj48L3RleHQ+CjxwYXRoIGQ9J00gMzIuNzI3MywxMTMuNjM2IEwgMzIuNjk3LDExMi45MzMgTCAzMi42MDYzLDExMi4yMzUgTCAzMi40NTYsMTExLjU0NyBMIDMyLjI0NzEsMTEwLjg3NSBMIDMxLjk4MTIsMTEwLjIyMyBMIDMxLjY2MDMsMTA5LjU5NiBMIDMxLjI4NjYsMTA5IEwgMzAuODYzMSwxMDguNDM3IEwgMzAuMzkyOCwxMDcuOTE0IEwgMjkuODc5MiwxMDcuNDMyIEwgMjkuMzI2MSwxMDYuOTk2IEwgMjguNzM3NiwxMDYuNjEgTCAyOC4xMTgxLDEwNi4yNzYgTCAyNy40NzIxLDEwNS45OTYgTCAyNi44MDQ0LDEwNS43NzMgTCAyNi4xMjAxLDEwNS42MDcgTCAyNS40MjQsMTA1LjUwMiBMIDI0LjcyMTUsMTA1LjQ1NiBMIDI0LjAxNzcsMTA1LjQ3MiBMIDIzLjMxNzcsMTA1LjU0NyBMIDIyLjYyNjksMTA1LjY4MyBMIDIxLjk1MDMsMTA1Ljg3NyBMIDIxLjI5MjgsMTA2LjEyOSBMIDIwLjY1OTUsMTA2LjQzNiBMIDIwLjA1NDksMTA2Ljc5NyBMIDE5LjQ4MzYsMTA3LjIwOCBMIDE4Ljk0OTgsMTA3LjY2NyBMIDE4LjQ1NzMsMTA4LjE3IEwgMTguMDEsMTA4LjcxNCBMIDE3LjYxMSwxMDkuMjk0IEwgMTcuMjYzNCwxMDkuOTA2IEwgMTYuOTY5NywxMTAuNTQ2IEwgMTYuNzMyMSwxMTEuMjA5IEwgMTYuNTUyMywxMTEuODg5IEwgMTYuNDMxNywxMTIuNTgzIEwgMTYuMzcxMiwxMTMuMjg0IEwgMTYuMzcxMiwxMTMuOTg4IEwgMTYuNDMxNywxMTQuNjkgTCAxNi41NTIzLDExNS4zODMgTCAxNi43MzIxLDExNi4wNjQgTCAxNi45Njk3LDExNi43MjcgTCAxNy4yNjM0LDExNy4zNjcgTCAxNy42MTEsMTE3Ljk3OSBMIDE4LjAxLDExOC41NTkgTCAxOC40NTczLDExOS4xMDIgTCAxOC45NDk4LDExOS42MDUgTCAxOS40ODM2LDEyMC4wNjQgTCAyMC4wNTQ5LDEyMC40NzYgTCAyMC42NTk1LDEyMC44MzYgTCAyMS4yOTI4LDEyMS4xNDQgTCAyMS45NTAzLDEyMS4zOTYgTCAyMi42MjY5LDEyMS41OSBMIDIzLjMxNzcsMTIxLjcyNiBMIDI0LjAxNzcsMTIxLjgwMSBMIDI0LjcyMTUsMTIxLjgxNiBMIDI1LjQyNCwxMjEuNzcxIEwgMjYuMTIwMSwxMjEuNjY1IEwgMjYuODA0NCwxMjEuNSBMIDI3LjQ3MjEsMTIxLjI3NyBMIDI4LjExODEsMTIwLjk5NyBMIDI4LjczNzYsMTIwLjY2MyBMIDI5LjMyNjEsMTIwLjI3NiBMIDI5Ljg3OTIsMTE5Ljg0MSBMIDMwLjM5MjgsMTE5LjM1OSBMIDMwLjg2MzEsMTE4LjgzNSBMIDMxLjI4NjYsMTE4LjI3MyBMIDMxLjY2MDMsMTE3LjY3NiBMIDMxLjk4MTIsMTE3LjA1IEwgMzIuMjQ3MSwxMTYuMzk4IEwgMzIuNDU2LDExNS43MjYgTCAzMi42MDYzLDExNS4wMzggTCAzMi42OTcsMTE0LjM0IEwgMzIuNzI3MywxMTMuNjM2IEwgMjQuNTQ1NSwxMTMuNjM2IFonIHN0eWxlPSdmaWxsOiMwMDAwMDA7ZmlsbC1ydWxlOmV2ZW5vZGQ7ZmlsbC1vcGFjaXR5PTE7c3Ryb2tlOiMwMDAwMDA7c3Ryb2tlLXdpZHRoOjEwcHg7c3Ryb2tlLWxpbmVjYXA6YnV0dDtzdHJva2UtbGluZWpvaW46bWl0ZXI7c3Ryb2tlLW9wYWNpdHk6MTsnIC8+CjxwYXRoIGQ9J00gMjgzLjYzNiwxMTMuNjM2IEwgMjgzLjYwNiwxMTIuOTMzIEwgMjgzLjUxNSwxMTIuMjM1IEwgMjgzLjM2NSwxMTEuNTQ3IEwgMjgzLjE1NiwxMTAuODc1IEwgMjgyLjg5LDExMC4yMjMgTCAyODIuNTY5LDEwOS41OTYgTCAyODIuMTk2LDEwOSBMIDI4MS43NzIsMTA4LjQzNyBMIDI4MS4zMDIsMTA3LjkxNCBMIDI4MC43ODgsMTA3LjQzMiBMIDI4MC4yMzUsMTA2Ljk5NiBMIDI3OS42NDcsMTA2LjYxIEwgMjc5LjAyNywxMDYuMjc2IEwgMjc4LjM4MSwxMDUuOTk2IEwgMjc3LjcxNCwxMDUuNzczIEwgMjc3LjAyOSwxMDUuNjA3IEwgMjc2LjMzMywxMDUuNTAyIEwgMjc1LjYzMSwxMDUuNDU2IEwgMjc0LjkyNywxMDUuNDcyIEwgMjc0LjIyNywxMDUuNTQ3IEwgMjczLjUzNiwxMDUuNjgzIEwgMjcyLjg1OSwxMDUuODc3IEwgMjcyLjIwMiwxMDYuMTI5IEwgMjcxLjU2OSwxMDYuNDM2IEwgMjcwLjk2NCwxMDYuNzk3IEwgMjcwLjM5MywxMDcuMjA4IEwgMjY5Ljg1OSwxMDcuNjY3IEwgMjY5LjM2NiwxMDguMTcgTCAyNjguOTE5LDEwOC43MTQgTCAyNjguNTIsMTA5LjI5NCBMIDI2OC4xNzMsMTA5LjkwNiBMIDI2Ny44NzksMTEwLjU0NiBMIDI2Ny42NDEsMTExLjIwOSBMIDI2Ny40NjEsMTExLjg4OSBMIDI2Ny4zNDEsMTEyLjU4MyBMIDI2Ny4yOCwxMTMuMjg0IEwgMjY3LjI4LDExMy45ODggTCAyNjcuMzQxLDExNC42OSBMIDI2Ny40NjEsMTE1LjM4MyBMIDI2Ny42NDEsMTE2LjA2NCBMIDI2Ny44NzksMTE2LjcyNyBMIDI2OC4xNzMsMTE3LjM2NyBMIDI2OC41MiwxMTcuOTc5IEwgMjY4LjkxOSwxMTguNTU5IEwgMjY5LjM2NiwxMTkuMTAyIEwgMjY5Ljg1OSwxMTkuNjA1IEwgMjcwLjM5MywxMjAuMDY0IEwgMjcwLjk2NCwxMjAuNDc2IEwgMjcxLjU2OSwxMjAuODM2IEwgMjcyLjIwMiwxMjEuMTQ0IEwgMjcyLjg1OSwxMjEuMzk2IEwgMjczLjUzNiwxMjEuNTkgTCAyNzQuMjI3LDEyMS43MjYgTCAyNzQuOTI3LDEyMS44MDEgTCAyNzUuNjMxLDEyMS44MTYgTCAyNzYuMzMzLDEyMS43NzEgTCAyNzcuMDI5LDEyMS42NjUgTCAyNzcuNzE0LDEyMS41IEwgMjc4LjM4MSwxMjEuMjc3IEwgMjc5LjAyNywxMjAuOTk3IEwgMjc5LjY0NywxMjAuNjYzIEwgMjgwLjIzNSwxMjAuMjc2IEwgMjgwLjc4OCwxMTkuODQxIEwgMjgxLjMwMiwxMTkuMzU5IEwgMjgxLjc3MiwxMTguODM1IEwgMjgyLjE5NiwxMTguMjczIEwgMjgyLjU2OSwxMTcuNjc2IEwgMjgyLjg5LDExNy4wNSBMIDI4My4xNTYsMTE2LjM5OCBMIDI4My4zNjUsMTE1LjcyNiBMIDI4My41MTUsMTE1LjAzOCBMIDI4My42MDYsMTE0LjM0IEwgMjgzLjYzNiwxMTMuNjM2IEwgMjc1LjQ1NSwxMTMuNjM2IFonIHN0eWxlPSdmaWxsOiMwMDAwMDA7ZmlsbC1ydWxlOmV2ZW5vZGQ7ZmlsbC1vcGFjaXR5PTE7c3Ryb2tlOiMwMDAwMDA7c3Ryb2tlLXdpZHRoOjEwcHg7c3Ryb2tlLWxpbmVjYXA6YnV0dDtzdHJva2UtbGluZWpvaW46bWl0ZXI7c3Ryb2tlLW9wYWNpdHk6MTsnIC8+Cjwvc3ZnPgo= data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nODVweCcgaGVpZ2h0PSc4NXB4JyB2aWV3Qm94PScwIDAgODUgODUnPgo8IS0tIEVORCBPRiBIRUFERVIgLS0+CjxyZWN0IHN0eWxlPSdvcGFjaXR5OjEuMDtmaWxsOiNGRkZGRkY7c3Ryb2tlOm5vbmUnIHdpZHRoPSc4NScgaGVpZ2h0PSc4NScgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHRleHQgZG9taW5hbnQtYmFzZWxpbmU9ImNlbnRyYWwiIHRleHQtYW5jaG9yPSJzdGFydCIgeD0nMjUuMjQ2OCcgeT0nNDcuNzk1NScgc3R5bGU9J2ZvbnQtc2l6ZTozOHB4O2ZvbnQtc3R5bGU6bm9ybWFsO2ZvbnQtd2VpZ2h0Om5vcm1hbDtmaWxsLW9wYWNpdHk6MTtzdHJva2U6bm9uZTtmb250LWZhbWlseTpzYW5zLXNlcmlmO2ZpbGw6IzNCNDE0MycgPjx0c3Bhbj5TaTwvdHNwYW4+PC90ZXh0Pgo8cGF0aCBkPSdNIDguNzcyNzMsMTguMDQ1NSBMIDguNzY0MTUsMTcuODQ2MiBMIDguNzM4NDYsMTcuNjQ4NCBMIDguNjk1ODcsMTcuNDUzNSBMIDguNjM2NjksMTcuMjYzIEwgOC41NjEzNSwxNy4wNzgzIEwgOC40NzA0MSwxNi45MDA4IEwgOC4zNjQ1NSwxNi43MzE3IEwgOC4yNDQ1NCwxNi41NzI0IEwgOC4xMTEyOSwxNi40MjQgTCA3Ljk2NTc3LDE2LjI4NzYgTCA3LjgwOTA1LDE2LjE2NDIgTCA3LjY0MjMyLDE2LjA1NDcgTCA3LjQ2Njc4LDE1Ljk1OTkgTCA3LjI4Mzc2LDE1Ljg4MDcgTCA3LjA5NDU5LDE1LjgxNzQgTCA2LjkwMDY4LDE1Ljc3MDYgTCA2LjcwMzQ3LDE1Ljc0MDcgTCA2LjUwNDQyLDE1LjcyNzggTCA2LjMwNSwxNS43MzIxIEwgNi4xMDY2OSwxNS43NTM1IEwgNS45MTA5NSwxNS43OTE5IEwgNS43MTkyNCwxNS44NDcgTCA1LjUzMjk3LDE1LjkxODMgTCA1LjM1MzUyLDE2LjAwNTQgTCA1LjE4MjIzLDE2LjEwNzYgTCA1LjAyMDM1LDE2LjIyNDIgTCA0Ljg2OTEsMTYuMzU0MiBMIDQuNzI5NTgsMTYuNDk2OCBMIDQuNjAyODMsMTYuNjUwOCBMIDQuNDg5NzksMTYuODE1MSBMIDQuMzkxMywxNi45ODg2IEwgNC4zMDgwOCwxNy4xNjk5IEwgNC4yNDA3NiwxNy4zNTc2IEwgNC4xODk4MiwxNy41NTA1IEwgNC4xNTU2NiwxNy43NDcgTCA0LjEzODUxLDE3Ljk0NTcgTCA0LjEzODUxLDE4LjE0NTIgTCA0LjE1NTY2LDE4LjM0MzkgTCA0LjE4OTgyLDE4LjU0MDQgTCA0LjI0MDc2LDE4LjczMzMgTCA0LjMwODA4LDE4LjkyMTEgTCA0LjM5MTMsMTkuMTAyMyBMIDQuNDg5NzksMTkuMjc1OCBMIDQuNjAyODMsMTkuNDQwMSBMIDQuNzI5NTgsMTkuNTk0MSBMIDQuODY5MSwxOS43MzY3IEwgNS4wMjAzNSwxOS44NjY3IEwgNS4xODIyMywxOS45ODMzIEwgNS4zNTM1MiwyMC4wODU1IEwgNS41MzI5NywyMC4xNzI2IEwgNS43MTkyNCwyMC4yNDM5IEwgNS45MTA5NSwyMC4yOTkgTCA2LjEwNjY5LDIwLjMzNzQgTCA2LjMwNSwyMC4zNTg4IEwgNi41MDQ0MiwyMC4zNjMxIEwgNi43MDM0NywyMC4zNTAyIEwgNi45MDA2OCwyMC4zMjAzIEwgNy4wOTQ1OSwyMC4yNzM1IEwgNy4yODM3NiwyMC4yMTAzIEwgNy40NjY3OCwyMC4xMzEgTCA3LjY0MjMyLDIwLjAzNjIgTCA3LjgwOTA1LDE5LjkyNjcgTCA3Ljk2NTc3LDE5LjgwMzMgTCA4LjExMTI5LDE5LjY2NjkgTCA4LjI0NDU0LDE5LjUxODUgTCA4LjM2NDU1LDE5LjM1OTIgTCA4LjQ3MDQxLDE5LjE5MDEgTCA4LjU2MTM1LDE5LjAxMjYgTCA4LjYzNjY5LDE4LjgyNzkgTCA4LjY5NTg3LDE4LjYzNzQgTCA4LjczODQ2LDE4LjQ0MjUgTCA4Ljc2NDE1LDE4LjI0NDcgTCA4Ljc3MjczLDE4LjA0NTUgTCA2LjQ1NDU1LDE4LjA0NTUgWicgc3R5bGU9J2ZpbGw6IzAwMDAwMDtmaWxsLXJ1bGU6ZXZlbm9kZDtmaWxsLW9wYWNpdHk9MTtzdHJva2U6IzAwMDAwMDtzdHJva2Utd2lkdGg6MnB4O3N0cm9rZS1saW5lY2FwOmJ1dHQ7c3Ryb2tlLWxpbmVqb2luOm1pdGVyO3N0cm9rZS1vcGFjaXR5OjE7JyAvPgo8cGF0aCBkPSdNIDc5Ljg2MzYsMTguMDQ1NSBMIDc5Ljg1NTEsMTcuODQ2MiBMIDc5LjgyOTQsMTcuNjQ4NCBMIDc5Ljc4NjgsMTcuNDUzNSBMIDc5LjcyNzYsMTcuMjYzIEwgNzkuNjUyMywxNy4wNzgzIEwgNzkuNTYxMywxNi45MDA4IEwgNzkuNDU1NSwxNi43MzE3IEwgNzkuMzM1NSwxNi41NzI0IEwgNzkuMjAyMiwxNi40MjQgTCA3OS4wNTY3LDE2LjI4NzYgTCA3OC45LDE2LjE2NDIgTCA3OC43MzMyLDE2LjA1NDcgTCA3OC41NTc3LDE1Ljk1OTkgTCA3OC4zNzQ3LDE1Ljg4MDcgTCA3OC4xODU1LDE1LjgxNzQgTCA3Ny45OTE2LDE1Ljc3MDYgTCA3Ny43OTQ0LDE1Ljc0MDcgTCA3Ny41OTUzLDE1LjcyNzggTCA3Ny4zOTU5LDE1LjczMjEgTCA3Ny4xOTc2LDE1Ljc1MzUgTCA3Ny4wMDE5LDE1Ljc5MTkgTCA3Ni44MTAxLDE1Ljg0NyBMIDc2LjYyMzksMTUuOTE4MyBMIDc2LjQ0NDQsMTYuMDA1NCBMIDc2LjI3MzEsMTYuMTA3NiBMIDc2LjExMTMsMTYuMjI0MiBMIDc1Ljk2LDE2LjM1NDIgTCA3NS44MjA1LDE2LjQ5NjggTCA3NS42OTM3LDE2LjY1MDggTCA3NS41ODA3LDE2LjgxNTEgTCA3NS40ODIyLDE2Ljk4ODYgTCA3NS4zOTksMTcuMTY5OSBMIDc1LjMzMTcsMTcuMzU3NiBMIDc1LjI4MDcsMTcuNTUwNSBMIDc1LjI0NjYsMTcuNzQ3IEwgNzUuMjI5NCwxNy45NDU3IEwgNzUuMjI5NCwxOC4xNDUyIEwgNzUuMjQ2NiwxOC4zNDM5IEwgNzUuMjgwNywxOC41NDA0IEwgNzUuMzMxNywxOC43MzMzIEwgNzUuMzk5LDE4LjkyMTEgTCA3NS40ODIyLDE5LjEwMjMgTCA3NS41ODA3LDE5LjI3NTggTCA3NS42OTM3LDE5LjQ0MDEgTCA3NS44MjA1LDE5LjU5NDEgTCA3NS45NiwxOS43MzY3IEwgNzYuMTExMywxOS44NjY3IEwgNzYuMjczMSwxOS45ODMzIEwgNzYuNDQ0NCwyMC4wODU1IEwgNzYuNjIzOSwyMC4xNzI2IEwgNzYuODEwMSwyMC4yNDM5IEwgNzcuMDAxOSwyMC4yOTkgTCA3Ny4xOTc2LDIwLjMzNzQgTCA3Ny4zOTU5LDIwLjM1ODggTCA3Ny41OTUzLDIwLjM2MzEgTCA3Ny43OTQ0LDIwLjM1MDIgTCA3Ny45OTE2LDIwLjMyMDMgTCA3OC4xODU1LDIwLjI3MzUgTCA3OC4zNzQ3LDIwLjIxMDMgTCA3OC41NTc3LDIwLjEzMSBMIDc4LjczMzIsMjAuMDM2MiBMIDc4LjksMTkuOTI2NyBMIDc5LjA1NjcsMTkuODAzMyBMIDc5LjIwMjIsMTkuNjY2OSBMIDc5LjMzNTUsMTkuNTE4NSBMIDc5LjQ1NTUsMTkuMzU5MiBMIDc5LjU2MTMsMTkuMTkwMSBMIDc5LjY1MjMsMTkuMDEyNiBMIDc5LjcyNzYsMTguODI3OSBMIDc5Ljc4NjgsMTguNjM3NCBMIDc5LjgyOTQsMTguNDQyNSBMIDc5Ljg1NTEsMTguMjQ0NyBMIDc5Ljg2MzYsMTguMDQ1NSBMIDc3LjU0NTUsMTguMDQ1NSBaJyBzdHlsZT0nZmlsbDojMDAwMDAwO2ZpbGwtcnVsZTpldmVub2RkO2ZpbGwtb3BhY2l0eT0xO3N0cm9rZTojMDAwMDAwO3N0cm9rZS13aWR0aDoycHg7c3Ryb2tlLWxpbmVjYXA6YnV0dDtzdHJva2UtbGluZWpvaW46bWl0ZXI7c3Ryb2tlLW9wYWNpdHk6MTsnIC8+Cjwvc3ZnPgo= [Si] XUIMIQQOPSSXEZUHFFFAOYSAN 0.000 description 2
 238000004458 analytical methods Methods 0.000 description 1
Images
Classifications

 G—PHYSICS
 G06—COMPUTING; CALCULATING; COUNTING
 G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
 G06T11/00—2D [Two Dimensional] image generation
 G06T11/20—Drawing from basic elements, e.g. lines or circles

 G—PHYSICS
 G06—COMPUTING; CALCULATING; COUNTING
 G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
 G06T15/00—3D [Three Dimensional] image rendering
 G06T15/005—General purpose rendering architectures

 G—PHYSICS
 G06—COMPUTING; CALCULATING; COUNTING
 G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
 G06T17/00—Three dimensional [3D] modelling, e.g. data description of 3D objects
 G06T17/20—Finite element generation, e.g. wireframe surface description, tesselation

 G—PHYSICS
 G06—COMPUTING; CALCULATING; COUNTING
 G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
 G06T15/00—3D [Three Dimensional] image rendering

 G—PHYSICS
 G06—COMPUTING; CALCULATING; COUNTING
 G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
 G06T11/00—2D [Two Dimensional] image generation
 G06T11/40—Filling a planar surface by adding surface attributes, e.g. colour or texture

 G—PHYSICS
 G06—COMPUTING; CALCULATING; COUNTING
 G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
 G06T15/00—3D [Three Dimensional] image rendering
 G06T15/50—Lighting effects
 G06T15/80—Shading

 G—PHYSICS
 G06—COMPUTING; CALCULATING; COUNTING
 G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
 G06T3/00—Geometric image transformation in the plane of the image
 G06T3/20—Linear translation of a whole image or part thereof, e.g. panning

 G—PHYSICS
 G06—COMPUTING; CALCULATING; COUNTING
 G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
 G06T7/00—Image analysis
 G06T7/10—Segmentation; Edge detection
 G06T7/13—Edge detection

 G—PHYSICS
 G06—COMPUTING; CALCULATING; COUNTING
 G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
 G06T2207/00—Indexing scheme for image analysis or image enhancement
 G06T2207/10—Image acquisition modality
 G06T2207/10028—Range image; Depth image; 3D point clouds

 G—PHYSICS
 G06—COMPUTING; CALCULATING; COUNTING
 G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
 G06T2207/00—Indexing scheme for image analysis or image enhancement
 G06T2207/20—Special algorithmic details
 G06T2207/20016—Hierarchical, coarsetofine, multiscale or multiresolution image processing; Pyramid transform

 G—PHYSICS
 G06—COMPUTING; CALCULATING; COUNTING
 G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
 G06T2207/00—Indexing scheme for image analysis or image enhancement
 G06T2207/20—Special algorithmic details
 G06T2207/20021—Dividing image into blocks, subimages or windows
Abstract
A graphics system has a rendering space divided into a plurality of rectangular areas, each being subdivided into a plurality of smaller rectangular areas of a plurality of pixels. Data is received representing a tiled set of polygons to be rendered in a selected one of the rectangular areas. For each polygon, a determination is made whether that polygon is located at least partially inside a selected one of the smaller rectangular areas in the selected rectangular area. If so, which pixels of the plurality of pixels in the selected smaller rectangular area are inside the polygon are identified. Or, if that polygon is not located at least partially inside the selected smaller rectangular area, no further processing of the polygon is performed at one or more of the plurality of pixels in the smaller rectangular area.
Description
 Computer graphics systems generally comprise a geometry processing unit which receives data defining the geometry to be rendered and converts this to a set of graphics primitives (also referred to as polygons), typically triangles, which are used when rendering the image. The surfaces of each object are subdivided into these graphics primitives. Each triangular primitive is defined by a set of vertices which, in turn, defines the planar surface and the extent of that surface.
 There are two main families of computer graphics systems: tilebased systems and immediate mode systems.
 In tilebased rendering systems, the display or framebuffer is conceptually subdivided into a plurality of rectangular areas, known as “tiles”, each corresponding to a (usually) predetermined number of pixels (e.g. 32*32). For each tile, an object list is compiled which references or contains (at least) the primitives in the image which intersect, or potentially intersect, that tile. This process is sometimes referred to as “tiling” or “binning”. Thus, tiles do not need to process the objects which do not intersect them. A tiling unit is often used to improve the speed of creating the pertile lists.
 In immediate mode renderers, although scanlineorder processing of primitives is frequently employed, some systems instead opt to divide the screen into tiles of pixels. The rendering of each primitive is done on a tile by tile basis, with each pixel in a tile being processed before progressing to the next tile. The rendering order is chosen to improve locality of memory references e.g. the texture fetches. Note that, with immediate mode renderers, no pertile lists are created and each primitive appears to be rendered immediately—although, due to pipelining and parallelism, there may, of course, be a number of primitives being processed simultaneously.
 During the rendering of the pixels (in either tilebased or immediate mode rendering systems), a graphics system will usually determine which pixels an object intersects (also known as scan conversion) and which object is visible at each pixel using depth testing to find the closest object to a view point. Texturing and shading data can then be applied to the pixel.
 Where objects are transparent, data from a frontmost object and from objects behind it may be required to properly texture and shade a pixel.
 A rendering technique for a computer graphics system is described in which each rectangular area (tile) is divided into smaller rectangular areas (microtiles), each comprising a plurality of pixels. During rendering of a tile, for each polygon associated with that tile, a coarse grain evaluation is used to identify the set of microtiles covered, wholly or partially, by the polygon. Those microtiles may be referred to as the active microtiles. For each active microtile (and only those microtiles), scan conversion and other rasterization processes, such as depth processing, are then applied to the pixels in that microtile. The microtiles in the active set can be processed in any order, or even in parallel given sufficient resources.
 According to a first aspect, there is provided a method of rendering in a graphics system having a rendering space divided into a plurality of rectangular areas and having each rectangular area subdivided into a plurality of smaller rectangular areas each comprising a plurality of pixels, the method comprising: receiving data representing a tiled set of polygons to be rendered in a selected one of the rectangular areas; for each polygon in the tiled set, determining whether that polygon is located at least partially inside a selected one of the smaller rectangular areas in the selected rectangular area; and if that polygon is located at least partially inside the selected smaller rectangular area, determining which of the plurality of pixels in the selected smaller rectangular area are inside the polygon, or if that polygon is not located at least partially inside the selected smaller rectangular area, performing no further processing of the polygon at one or more of the plurality of pixels in the smaller rectangular area.
 Thus, the method first identifies which smaller rectangular areas (microtiles) are intersected by the polygon (i.e. fall at least partially inside the polygon), and then only processes those identified smaller rectangular areas. Thus, the smaller rectangular areas identified are the active microtiles. By performing the initial identification at microtile scale, which is a relatively coarse grain evaluation, subsequent processing costs can be reduced. Relatively inexpensive low precision calculations may be used to initially identify those smaller rectangular areas which are intersected by the polygon. Small polygons in a large rectangular area (tile) may be dealt with efficiently; in a tilebased renderer, using larger tiles reduces the cost of the tiling and binning process. Polygons with extreme aspect ratios, such as line polygons, may be dealt with more efficiently. Smaller rectangular areas (microtiles) may be processed in any order, which allows implementation of load balancing schemes in subsequent processing steps.
 The size, number and shape of the rectangular areas and the smaller rectangular areas may be selected as desired. The size of the smaller rectangular areas may be determined by the amount of computing or silicon resources available in a single clock cycle for the step of determining which of the plurality of pixels in the selected smaller rectangular area are inside the polygon. Choosing smaller rectangular areas that are square, or nearly square, will typically result in the highest utilisation of the parallel pixel units used to evaluate a smaller rectangular area. By using smaller rectangular areas having a square aspect ratio, there will be relatively little disparity between processing of polygons with extreme aspect ratios at different angles of orientation.
 In one example, a rectangular area (tile) of 32*32 pixels may be subdivided into 64 4*4 smaller rectangular areas (microtiles). For example, computing resources may be available to process one 4*4 microtile per clock cycle. Therefore, in this example, a polygon covering the entire 32*32 tile would be processed in 64 clock cycles, but a small polygon covering only one microtile would be processed in only 1 clock cycle.
 In one example, the method further comprises: receiving a plurality of image polygons to be rendered in the rendering space; and tiling the image polygons to generate the tiled set of polygons by determining at least those image polygons that are located within the selected rectangular area.
 In one example, determining whether the polygon is located at least partially inside the selected smaller rectangular area comprises: providing a plurality of sample points for each rectangular area, the number of sample points in a rectangular area being equal to the number of smaller rectangular areas in the rectangular area and each sample point being located in a respective smaller rectangular area; and identifying the sample points falling inside the polygon. In that example, in order for a sample point identified as falling inside the polygon to correspond to its smaller rectangular area falling at least partially inside the polygon, an edge of the polygon and/or the sample point may be adjusted. For example, an edge of the polygon and/or the sample point may be translated. The translation may be dependent on the location of the sample point in the smaller rectangular area and the orientation of the edge.
 Determining whether the polygon is located at least partially inside the selected smaller rectangular area may comprise: deriving a plurality of edges from the polygon; and comparing each of the plurality of edges with a sample point associated with the selected smaller rectangular area to determine whether the selected smaller rectangular area is located wholly outside any of the edges; wherein if the selected smaller rectangular area is not located wholly outside any of the edges then the polygon is determined to be located at least partially inside the selected smaller rectangular area.
 Typical systems render convex polygons. If the sampling point for a smaller rectangular area falls inside all edges of a convex polygon (for example, inside all three edges for a triangular polygon), we can conclude that the smaller rectangular area falls wholly or partially within the polygon. The edge equation for each polygon edge is computed from vertex data defining the vertices of the polygon. The sample points provide a low resolution grid which may be used for the coarse grain evaluation to identify the active smaller rectangular areas (microtiles). The location of each sample point in its respective smaller rectangular area may be selected as desired. However, all sample points are located in the same position in the respective smaller rectangular areas, thereby providing a regularly spaced grid of sample points. For example, each sample point may be located at the top left corner of its smaller rectangular area.
 In an example, comparing each of the plurality of edges comprises: processing each of the plurality of edges to derive a plurality of processed edges, wherein the processing comprises, for each edge, determining an orientation of the respective edge and applying a translation to the respective edge in accordance with the orientation; and comparing each of the plurality of processed edges with the sample point.
 The translation ensures that, if the sample point is found to fall inside the edge, at least a part of the selected smaller rectangular area falls inside the edge, and if the sample point is found to fall outside the edge, the entire selected smaller rectangular area falls outside the edge. This avoids the possibility that the sample point is found to fall outside the edge, but part of the selected smaller rectangular area actually falls inside the edge. This may occur for certain sample point locations within the selected smaller rectangular area and certain edge orientations. Thus, the translation may be dependent on the location of the sample point in the selected smaller rectangular area and the orientation of the edge. The translation may be zero in some cases.
 Applying the translation to the respective edge in accordance with the orientation may comprise: applying a translation to the respective edge in one dimension, applying a translation to the respective edge in two dimensions, or applying no translation to the respective edge.
 Each processed edge may be represented by a respective edge equation, and comparing each of the plurality of processed edges with the sample point may comprise evaluating the respective edge equation at the sample point and determining whether the evaluation exceeds a predetermined threshold.
 It is possible to use the evaluation to determine whether the smaller rectangular area or the sample point falls inside or outside the edge because the edge equations have direction around the polygon. Determining simply whether the evaluation exceeds a predetermined threshold is a relatively simple calculation—more straightforward than evaluating the actual value. The predetermined threshold may be zero, in which case, the determining determines whether the evaluation is positive or negative.
 The method may further comprise using the determination of whether the evaluation exceeds a predetermined threshold to determine whether the sample point is located inside or outside the processed edge.
 Typically, the edge equations are directed in a clockwise direction around the polygon. Thus, in that example, if the processed edge equation evaluated at the sample point is positive, the smaller rectangular area with which that sample point is associated is identified as falling inside the edge from which the processed edge was derived and, if the processed edge equation evaluated at the sample point is negative, the smaller rectangular area with which that sample point is associated is identified as falling outside the edge from which the processed edge was derived. If the processed edge equation evaluated at the sample point is zero, the sample point falls exactly on the edge from which the processed edge was derived. For simplicity in this coarse grain evaluation (i.e. the initial identification of which smaller rectangular areas fall at least partially inside the polygon), the rectangular area with which that sample point is associated may be treated as inside the polygon edge. The edge equation for each polygon edge may be equivalent to data defining a surface perpendicular to a viewpoint and facing towards the polygon.
 In one example, if the sample point is located inside the processed edge, then the smaller rectangular area, with which the sample point is associated, is located at least partially inside the edge from which the processed edge was derived, and if the sample point is located outside the processed edge, then the smaller rectangular area, with which the sample point is associated, is located wholly outside the edge from which the processed edge was derived.
 Each edge equation may be of the form E(x,y)=Ax+By+C, where A, B and C are constants specific to the processed edge, and determining whether the evaluation exceeds a predetermined threshold may comprise comparing −Ax with By+C.
 The edge equation E(x,y)=Ax+By+C for each polygon edge is computed from vertex data defining the vertices of the polygon. x and y represent a screen location, a pixel location or a subpixel location. Constant C may be adjusted so that the scene origin is at the location of the top left sample point. This increases efficiency of the processing, because the magnitude of the x and y values is smaller.
 The method may further comprise outputting a first value if By+C>−Ax and outputting a second value if By+C<−Ax, one of the first value and the second value indicating that the sample point is located inside the processed edge and the other of the first value and the second value indicating that the sample point is located outside the processed edge.
 Thus, a single output value can indicate whether the sample point is located inside or outside the processed edge. Hence, it can be determined whether the selected smaller rectangular area is located wholly outside the edge. If the output bits for all edges of the polygon indicate that the smaller rectangular area falls inside (or partially inside) all edges, that rectangular area can be identified as a smaller rectangular area which falls at least partially inside the polygon.
 In one example, if By+C=−Ax (i.e. if the sample point falls exactly on the processed edge), the value which indicates that the sample point falls inside the processed edge may be output. That is, in this coarse grain evaluation, it may be sufficient to treat sample points falling exactly on an edge as inside that edge. However, in an alternative example, a tiebreaking rule may be applied.
 Comparing −Ax with By+C for each processed edge for all sample points in a rectangular area may be performed using a plurality of comparators, each comparator associated with one sample point and one smaller rectangular area in the rectangular area. Thus, the number of comparators is equal to the number of sample points and smaller rectangular areas in the rectangular area. Such a plurality of comparators may be referred to as an array of comparators. For example, if a rectangular area (tile) of 32*32 pixels is subdivided into 64 4*4 smaller rectangular areas (microtiles), 64 comparators (8*8) may be provided. Such an array or plurality may be provided for each polygon edge. For example, if the polygons are triangles (which is typically the case), three arrays of comparators may be provided. Alternatively, the same array of comparators may be used sequentially for each edge.
 Comparing −Ax with By+C for the processed edge may comprise reducing the precision of “By+C” and comparing “−Ax” with the reduced precision “By+C”. By reducing the precision of the By+C expression, before comparing it with the −Ax expression, the cost of the comparison may be reduced. Since a comparison must be made for each processed edge against each sample point, a large total number of comparisons need to be made. Thus, any (even small) cost reduction in each individual comparison may significantly reduce the total cost.
 According to a first example, the step of, for each polygon in the tiled set, determining whether that polygon is located at least partially inside a selected one of the smaller rectangular areas in the selected rectangular area, is performed for all smaller rectangular areas in the rectangular area in parallel for each edge of the polygon.
 The comparison for all smaller rectangular areas in a given rectangular area may be performed in a single step. In this example, if an edge equation is provided to define each polygon edge, the edge equation is compared with all sample points (i.e. all smaller rectangular areas) in the rectangular area in parallel. If each edge equation is of the form E(x,y)=Ax+By+C, −Ax may be compared with By+C for all sample points in parallel.
 The comparisons for all the polygon edges may be performed sequentially or in parallel.
 According to a second example, the step of, for each polygon in the tiled set, determining whether that polygon is located at least partially inside a selected one of the smaller rectangular areas in the selected rectangular area, is performed in a plurality of serial steps, each serial step comprising identifying the smaller rectangular areas, of a subset of the smaller rectangular areas in the rectangular area, falling at least partially inside the polygon.
 Each subset may comprise a row or column of microtiles within the tile. That is, each serial step identifies which microtile in that row or column falls at least partially inside the polygon. The number of serial steps will depend on the total number of microtiles in the tile and the number of microtiles in each subset. For example, if a rectangular area (tile) of 32*32 pixels is subdivided into 64 4*4 smaller rectangular areas (microtiles), each serial step may identify which microtile in each 8 microtile row or column falls at least partially inside the polygon, and 8 serial steps will be required for the total 64 evaluations.
 In this example, if an edge equation is provided to define each polygon edge, the edge equation may be compared with the sample points in the subset of the smaller rectangular areas in parallel, then the edge equation may be compared with the sample points in the next subset of the smaller rectangular areas in parallel, and so on until all the sample points are evaluated. If each edge equation is of the form E(x,y)=Ax+By+C, −Ax may be compared with By+C for all sample points in a subset in parallel, then −Ax may be compared with By+C for all sample points in the next subset, and so on.
 The comparisons for all the polygon edges may be performed sequentially or in parallel.
 In one example, each rectangular area is subdivided into a plurality of intermediate rectangular areas, each intermediate rectangular area comprising a plurality of the smaller rectangular areas, and wherein determining for each polygon in the tiled set, whether that polygon is located at least partially inside the selected one of the smaller rectangular areas comprises: determining whether that polygon is located at least partially inside a selected one of the intermediate rectangular areas in the selected rectangular area, the selected intermediate rectangular area including the selected smaller rectangular area; and if so, determining whether that polygon is located at least partially inside the selected one of the smaller rectangular areas, or if not, determining that that polygon is not located at least partially inside the selected smaller rectangular area.
 That is, an additional level of hierarchy may be used to first divide each rectangular area (tile) into intermediate rectangular areas (“minitiles”). Each minitile in the tile may then be evaluated in turn, to identify the active microtiles within that minitile. One example uses 64*64 pixel tiles, a 16*16 pixel intermediate minitile, and a 4*4 microtile.
 In one example, the method further comprises rasterizing those pixels in the selected smaller rectangular area that are determined to be inside the polygon.
 According to a second aspect, there is provided a graphics system having a rendering space divided into a plurality of rectangular areas and having each rectangular area subdivided into a plurality of smaller rectangular areas each comprising a plurality of pixels, the graphics system comprising a processing unit configured to: receive data representing a tiled set of polygons to be rendered in a selected one of the rectangular areas; and determine, for each polygon in the tiled set, whether that polygon is located at least partially inside a selected one of the smaller rectangular areas in the selected rectangular area, wherein, if that polygon is located at least partially inside the selected smaller rectangular area, the processing unit is arranged to determine which of the plurality of pixels in the selected smaller rectangular area are inside the polygon, and if that polygon is not located at least partially inside the selected smaller rectangular area, the processing unit is arranged to perform no further processing of the polygon at one or more of the plurality of pixels in the smaller rectangular area.
 Thus, the graphics system is arranged to identify which smaller rectangular areas (microtiles) are intersected by the polygon (i.e. fall at least partially inside the polygon), and to then only process those identified smaller rectangular areas. Thus, the identified smaller rectangular areas are the active microtiles. By performing the initial identification at microtile scale, which is a relatively coarse grain evaluation, subsequent processing costs can be reduced.
 In an example, the processing unit is further configured to: receive a plurality of image polygons to be rendered in the rendering space; and tile the image polygons to generate the tiled set of polygons by determining at least those image polygons that are located within the selected rectangular area.
 In an example, a plurality of sample points is provided for each rectangular area, the number of sample points in a rectangular area being equal to the number of smaller rectangular areas in the rectangular area and each sample point being located in a respective smaller rectangular area; and the processing unit is configured to determine, for each polygon in the tiled set, whether that polygon is located at least partially inside a selected one of the smaller rectangular areas in the selected rectangular area by identifying the sample points falling inside the polygon. The sample points provide a low resolution grid which may be used for the coarse grain evaluation to identify the active microtiles.
 The processing unit may be configured to determine whether the polygon is located at least partially inside the selected smaller rectangular area by: deriving a plurality of edges from the polygon; and comparing each of the plurality of edges with a sample point associated with the selected smaller rectangular area to determine whether the selected smaller rectangular area is located wholly outside any of the edges; wherein if the selected smaller rectangular area is not located wholly outside any of the edges then the polygon is determined to be located at least partially inside the selected smaller rectangular area.
 The processing unit may be configured to compare each of the plurality of edges by: processing each of the plurality of edges to derive a plurality of processed edges, wherein the processing comprises, for each edge, determining an orientation of the respective edge and applying a translation to the respective edge in accordance with the orientation; comparing each of the plurality of processed edges with the sample point.
 The processing unit may be configured to apply the translation to the respective edge in accordance with the orientation by: applying a translation to the respective edge in one dimension, applying a translation to the respective edge in two dimensions, or applying no translation to the respective edge.
 Each processed edge may be represented by a respective edge equation and the processing unit is configured to compare each of the plurality of processed edges with the sample point by evaluating the respective edge equation at the sample point and determining whether the evaluation exceeds a predetermined threshold.
 The processing unit may be configured to use the determination of whether the evaluation exceeds a predetermined threshold to determine whether the sample point is located inside or outside the processed edge.
 In one example, if the processed edge equation evaluated at the sample point is positive, the smaller rectangular area with which that sample point is associated is identified as falling inside the edge from which the processed edge was derived and, if the processed edge equation evaluated at the sample point is negative, the smaller rectangular area with which that sample point is associated is identified as falling outside the edge from which the processed edge was derived.
 In one example, if the sample point is located inside the processed edge, then the smaller rectangular area, with which the sample point is associated, is located at least partially inside the edge from which the processed edge was derived, and if the sample point is located outside the processed edge, then the smaller rectangular area, with which the sample point is associated, is located wholly outside the edge from which the processed edge was derived.
 Each edge equation may be of the form E(x,y)=Ax+By+C, where A, B and C are constants specific to the processed edge, and the processing unit may be configured to determine whether the evaluation exceeds a predetermined threshold by comparing −Ax with By+C. The processing unit may be configured to output a first value if By+C>−Ax and output a second value if By+C<−Ax, one of the first value and the second value indicating that the sample point is located inside the processed edge and the other of the first value and the second value indicating that the sample point is located outside the processed edge.
 The graphics system may comprise a plurality of comparators for comparing −Ax with By+C for each processed edge for all sample points in a rectangular area, each comparator associated with one sample point and one smaller rectangular area in the rectangular area.
 Comparing −Ax with By+C for the processed edge may comprise reducing the precision of “By+C” and comparing “−Ax” with the reduced precision “By+C”. This reduces the cost of the comparison.
 In a first example, the processing unit is configured to determine, for each polygon in the tiled set, whether that polygon is located at least partially inside a selected one of the smaller rectangular areas in the selected rectangular area, for all smaller rectangular areas in the rectangular area in parallel for each edge of the polygon. The comparisons for all the polygon edges may be performed sequentially or in parallel.
 In a second example, the processing unit is configured to determine, for each polygon in the tiled set, whether that polygon is located at least partially inside a selected one of the smaller rectangular areas in the selected rectangular area, in a plurality of serial steps, each serial step comprising identifying the smaller rectangular areas, of a subset of the smaller rectangular areas in the rectangular area, falling at least partially inside the polygon. The comparisons for all the polygon edges may be performed sequentially or in parallel.
 In one example, each rectangular area is subdivided into a plurality of intermediate rectangular areas, each intermediate rectangular area comprising a plurality of the smaller rectangular areas, and the processing unit is configured to determine, for each polygon in the tiled set, whether that polygon is located at least partially inside the selected one of the smaller rectangular areas by: determining whether that polygon is located at least partially inside a selected one of the intermediate rectangular areas in the selected rectangular area, the selected intermediate rectangular area including the selected smaller rectangular area; and if so, determining whether that polygon is located at least partially inside the selected one of the smaller rectangular areas, or if not, determining that that polygon is not located at least partially inside the selected smaller rectangular area.
 That is, an additional level of hierarchy may be used to first divide each rectangular area (tile) into intermediate rectangular areas (“minitiles”). Separate hardware units may be provided for each hierarchical level or the evaluation at the different hierarchical levels may make use of the same hardware unit.
 In one example, the graphics system further comprises a rasterizing unit for rasterizing those pixels in the selected smaller rectangular area that are determined to be inside the polygon.
 According to a third aspect, there is provided a graphics processing unit configured to render to a rendering space divided into a plurality of rectangular areas, each rectangular area being subdivided into a plurality of smaller rectangular areas each comprising a plurality of pixels, the graphics processing unit comprising: an interface to a memory device; a microtiling unit arranged to receive via the interface data representing a tiled set of polygons to be rendered in a selected one of the rectangular areas, determine for each smaller rectangular area in the selected rectangular area whether that smaller rectangular area contains at least a portion of a selected polygon, and output a corresponding indication; and a scan converter configured to receive the indications, and if a selected one of the smaller rectangular areas contains at least a portion of the selected polygon, determine which of the plurality of pixels in the respective smaller rectangular area are inside the selected polygon, and if a selected one of the smaller rectangular areas does not contain at least a portion of the selected polygon, perform no further processing of the selected polygon at one or more of the plurality of pixels in the respective smaller rectangular area.
 The graphics processing unit may further comprise: a tiling unit configured to receive a plurality of image polygons to be rendered in the rendering space, tile the image polygons to generate the tiled set of polygons by determining at least those image polygons that are located at least partially within the selected rectangular area, and output the tiled set of polygons to the memory device.
 The microtiling unit may comprise edge calculation logic configured to receive the selected polygon and derive a plurality of edge equation parameters for each edge of the selected polygon.
 The microtiling unit may further comprise edge processing logic coupled to the edge calculation logic and configured to: receive the plurality of edge equation parameters for a selected edge of the selected polygon; determine an orientation of the selected edge and apply a translation to the edge equation parameters in accordance with the orientation to generate processed edge equation parameters, wherein the translation corresponds to a shift of the selected edge in one dimension, two dimensions, or no shift of the selected edge; and output the processed edge equation parameters.
 The edge processing logic may comprise a quadrant determination unit arranged to determine the orientation of the selected edge of the polygon by evaluating the signs of one or more of the edge equation parameters.
 The microtiling unit may comprise: a comparison unit configured to receive the processed edge equation parameters and evaluate the processed edge equation parameters for each smaller rectangular area to determine which of the smaller rectangular areas are located wholly outside the selected edge of the polygon, and which are located at least partially inside the selected edge of the polygon.
 The comparison unit may be further configured to: perform the determination of which of the smaller rectangular areas are located wholly outside the selected edge of the polygon, and which are located at least partially inside the selected edge of the polygon for each edge of the selected polygon; and generate the indication such that any of the smaller rectangular areas that are not located wholly outside at least one edge of the selected polygon are indicated as containing at least a portion of a selected polygon.
 The comparison unit may comprise: one or more evaluation units configured to receive the processed edge equation parameters and generate a first value from the processed edge equation parameters for each of the smaller rectangular areas in dependence on its position in the rectangular area, and a second value from the processed edge equation parameters for each of the smaller rectangular areas in dependence on its position in the rectangular area.
 The comparison unit may further comprise: a clamping unit configured to receive the first value and generate a reduced first value by reducing the precision of the first value in dependence on the number of bits used to represent the second value.
 The comparison unit may further comprise: a comparator array comprising a plurality of comparators each associated with at least one of the smaller rectangular areas and configured to operate in parallel, each comparator configured to compare the first value or the reduced first value with the second value for its respective smaller rectangular area to determine whether that smaller rectangular area is located wholly outside the selected edge of the polygon or located at least partially inside the selected edge of the polygon.
 According to a fourth aspect, there is provided an apparatus for rendering in a graphics system having a rendering space divided into a plurality of rectangular areas and having each rectangular area subdivided into a plurality of smaller rectangular areas each comprising a plurality of pixels, the apparatus comprising: means for receiving data representing a tiled set of polygons to be rendered in a selected one of the rectangular areas; and means for determining, for each polygon in the tiled set, whether that polygon is located at least partially inside a selected one of the smaller rectangular areas in the selected rectangular area; wherein the apparatus is arranged, if that polygon is located at least partially inside the selected smaller rectangular area, to determine which of the plurality of pixels in the selected smaller rectangular area are inside the polygon, and if that polygon is not located at least partially inside the selected smaller rectangular area, to perform no further processing of the polygon at one or more of the plurality of pixels in the smaller rectangular area.
 According to another aspect, there is further provided a computer readable storage medium having encoded thereon computer readable program code for generating the graphics processing unit of the third aspect.
 According to another aspect, there is further provided a computer readable storage medium having encoded thereon computer readable program code for generating a processing unit configured to perform the method of the first aspect.
 Features described herein in relation to the method may also be applicable to the system or apparatus, and features described in relation to the system or apparatus may also be applicable to the method.
 Examples will now be described in detail with reference to the accompanying drawings in which:

FIG. 1 shows a prior art arrangement of a parallel row sampling approach with a small triangle; 
FIG. 2 shows a prior art system that is performing 4× antialiasing of image data; 
FIG. 3 shows the triangle ofFIG. 1 against the microtiles of an example; 
FIG. 4 shows a larger triangle against the microtiles of an example; 
FIG. 5 shows classifications of edge orientation versus edge translation for coarse grain evaluation; 
FIG. 6 shows a first example for determining which microtiles are inside a given edge, using an array of compare units; 
FIG. 7 shows a prior art example of a renderable image region surrounded by a guardband region used to reduce clipping costs; 
FIG. 8 shows an example of a clamping unit used to reduce each high precision By+C′ expression to a smaller number of bits, in order to reduce the cost of subsequent comparators; 
FIG. 9 shows a second example for determining which microtiles are inside a given edge, using an array of compare units and incorporating a clamping unit like that inFIG. 8 ; 
FIG. 10 shows full and iterative evaluation of intersected microtiles within a tile; 
FIGS. 11 a), b), c), d) and e) show an example which adds an additional level of hierarchy to the coarse grain evaluation; 
FIG. 12 shows how the microtiling calculations should be adjusted to include the application of multi sample antialiasing (MSAA) to the microtiling system; 
FIG. 13 shows how all sample positions may be calculated from the top left microtile when there is no multi sample antialiasing (nonMSAA); 
FIG. 14 shows how all sample positions may be calculated from the top left microtile when there is 4× multi sample antialiasing (4× MSAA); 
FIG. 15 shows how all sample positions may be calculated from the top left microtile when there is 2× multi sample antialiasing (2× MSAA); 
FIG. 16 shows a flowchart of a method for reducing processing using microtiles; 
FIG. 17 shows a flowchart of a method for determining whether a polygon is located at least partially inside a microtile; and 
FIG. 18 shows a block diagram of an example graphics processing system for implementing the method.  In recent years, as computer graphics models have become more complex, there has generally been a reduction in the average size of triangles.
FIG. 1 shows an example of a prior art sampling approach used with a small triangle 101. Referring toFIG. 1 , assume that a typical, on screen triangle is of the order of 18 pixels in area, so the width and height are each approximately 6 pixels. If an example renderer is working in parallel on row sets 103 of 16 pixels, (even if it is restricted to only considering those row sets that intersect the triangle, of which there are seven (shown shaded, 105) inFIG. 1 ), then only approximately 16% of the pixels in each row set 105 will be found to be inside the triangle. This low level of utilisation (the proportion of processed pixels that a triangle intersects) is undesirable.  Aliasing is a wellknown problem in computer graphics which stems from sampling a signal at below the Nyquist limit. This is often apparent when only one sample point is taken per pixel. Pragmatic solutions, such as supersampling or multisampling, which involve taking several samples per pixel, and subsequently filtering, are often used in the art. This may be considered equivalent to initially rendering at a higher pixel resolution. It should be noted, therefore, that in this specification, the term “sample” and the term “pixel” may be used interchangeably.
FIG. 2 shows a prior art system that is performing 4× antialiasing of image data, in which a 3*4 subset 201 of the image pixels is shown. “Within” each pixel are defined four sampling locations 203: the same pattern of locations is used in each pixel. This means that there are sets of “related” sample locations 205 separated, in the x and ydirections by regular 1 pixel widths/heights. This can further exacerbate the low level of utilisation.  One way to counteract the low utilisation is to reduce the tile size. However, there is a tradeoff associated with the tiling/binning process and the chosen tile size. Smaller tiles (or at least smaller granularity in the binning process), typically result in more efficient rendering due to a higher ratio of pixels being covered by each tested primitive. However, for a given image dimension, smaller tiles imply a larger number of tiles and hence a greater number of object lists that need to be stored and managed.
 The method and apparatus described herein provides a technique for increasing the utilisation without incurring the storage and management costs of reducing the tile size. As described below, this technique divides each rectangular area (tile) into smaller rectangular areas (microtiles). The technique first identifies which smaller rectangular areas (microtiles) are intersected by a polygon (i.e. fall at least partially inside the polygon), and then only processes those identified smaller rectangular areas. Thus, the identified smaller rectangular areas are the active microtiles. By performing the initial identification at microtile scale, which is a relatively coarse grain evaluation, subsequent processing costs can be reduced. Throughout this specification, the term “rectangular area” is used interchangeably with the term “tile”, the term “smaller rectangular area” is used interchangeably with the term “microtile” and the term “primitive” is used interchangeably with the term “polygon”. Note that the term “rectangular” is intended to encompass square.

FIG. 3 shows the triangle 101 ofFIG. 1 against 20 4*4 pixel microtiles 303. The microtiles which are intersected by triangle 101 (the active microtiles 305) are shown shaded inFIG. 3 . The utilisation level for theFIG. 1 example rendering method, was only approximately 16%, as noted above. However, using the method described herein, the utilisation level (the proportion of pixels within active microtiles 305 which triangle 101 intersects) would, typically, nearly double, to approximately 30%. 
FIG. 4 shows a larger triangle 401 in a 32*32 pixel tile 403 including 64 4*4 microtiles 405. The intersected microtiles 407 are shaded inFIG. 4 . In this example, sample points 409 are provided at the top left hand corner of each microtile. Only those microtiles which are active are processed for the triangle shown inFIG. 4 , and no further processing is required for the other microtiles. Thus, microtiles that intersect the triangular polygon are first identified and then those which are intersected are processed. As a result of this, the following can be achieved: 
 Relatively inexpensive low precision calculations can be used to initially identify active microtiles (microtiles that fall at least partially within a polygon).
 Small polygons can be dealt with efficiently within a proportionately large tile. In a tilebased renderer, being able to use larger tiles reduces the cost of the tiling/binning process.
 Polygons with extreme aspect ratios, such as line polygons, can be dealt with efficiently.
 It is possible to extend the method and system to handle multi sample antialiasing on all edges.
 There is a reduction in the number of wasted calculations relative to nonsquare processing footprints.
 Microtiles can be processed in any order thereby allowing implementation of load balancing schemes in subsequent processing.
 Flexibility is provided in being able to process microtiles independently of an associated polygon.
 The method and apparatus, which leads to the above features, will now be described.

FIG. 16 illustrates a flowchart of an overall method for reducing processing and increasing the utilisation level using microtiles. In step 1602 a set of polygons are received in connection with a selected one of the tiles (rectangular area). This set of polygons represents those polygons of an image that have been determined to be present in the selected tile. Therefore, the set of polygons corresponds to the object list for the tile, as generated by the tiling/binning process, and is referred to as a tiled set of polygons. The tiled set of polygons may be in the form of a list of references to parameters of the polygons, or may contain the polygon parameters.  Each polygon in the tiled set is then evaluated in connection with each microtile (smaller rectangular area) as shown in step 1604. For example, a polygon is selected from the tiled set, and then evaluated in connection with a selected microtile. This can be repeated for each microtile, and then another polygon selected and the overall process repeated. In alternative examples, this can be reversed, such that a microtile is selected, and then each polygon evaluated for that microtile before selecting another microtile.
 For a selected polygon and a selected microtile, in step 1604 it is determined whether the selected polygon is located at least partially inside (i.e. not wholly outside) the selected microtile. If, in step 1606, the selected polygon is found to be located at least partially inside the selected microtile, then in step 1608 an indication is generated that further processing of that polygon should be performed in the microtile. In other words, because it has been determined that the polygon is present in that microtile, then additional rendering operations should continue to be performed for that polygon in that microtile. This includes scan conversion operations to determine which of the pixels in that microtile are inside the polygon, and may further include, for example, depth testing, or any other rasterisation functions.
 Conversely, if in step 1606 the selected polygon is found to be located wholly outside the selected microtile, then in step 1610 it is indicated that further processing of the polygon can be skipped in that microtile. In other words, because the polygon is not present within the microtile, then the pixels within that microtile will not be covered by the polygon. This means that additional rendering operations in connection with the polygon can be avoided for the pixels in that microtile, as that polygon will have no influence upon them.
 Reference is now made to
FIG. 17 , which illustrates a more detailed flowchart of an example process for determining whether a polygon is located at least partially inside a microtile (i.e. a more detailed flowchart of operations performed by step 1604). In step 1702, edge equation parameters are derived for each edge of the selected polygon. Example edge equations are discussed in more detail below. Then, for each edge, a determination is made in step 1704 whether a sample point associated with the microtile is inside or outside the edge. Once an inside/outside result is known for all edges of the polygon, then these can be combined in step 1706 to determine whether the overall polygon is either partially inside or wholly outside the microtile. 
FIG. 17 also shows an example process for determining whether a sample point associated with the microtile is inside or outside the edge in step 1704. An orientation for the edge is determined in step 1708, as described in detail below, and a corresponding translation applied to the edge equation parameters in dependence on the orientation. This translation enables the result obtained for the sample point of the microtile to apply to the microtile as a whole. First and second values are then generated in step 1710 using the translated edge equation parameters and the location of the sample point of the microtile within the tile. The first and second values are compared in step 1712 to provide the determination of whether the sample point is inside or outside the edge. Details on the generation of the first and second values and their comparison are provided below. 
FIG. 18 illustrates a block diagram of an example graphics processing system for implementing the abovedescribed method. The graphics processing system receives polygons 1802 for an image, and a tiling unit 1804 processes these polygons to perform tiling/binning, and determine which polygons are within which tiles. The outputs of the tiling unit 1804 are tiled polygon sets (object lists) for each tile. These are output to a memory device 1806.  A microtiling unit 1808 is arranged to perform the operations described in
FIGS. 16 and 17 above. The microtiling unit 1808 receives the tiled polygon set for a given tile from the memory device 1806 via an interface 1810. A selected polygon from the tiled polygon set is provided to edge calculation logic 1812, which derives the edge equation parameters for each edge. Edge processing logic 1814 is coupled to the edge calculation logic 1812 and receives the edge equation parameters. The edge processing logic 1814 determines the orientation of each edge and applies the appropriate translation. The edge processing logic 1814 may comprise quadrant determination logic 1816 for determining the edge orientation. The processed edge equation parameters for the polygon are provided to a comparison unit 1818 coupled to the edge processing logic 1814. The comparison unit 1818 determines whether the selected polygon is either partially inside or wholly outside each microtile in the given tile. The comparison unit 1818 comprises one or more evaluation units 1820 that receive the processed edge equation parameters and calculate the first and second values based on the processed edge equation parameters and the location of each sample point in each the microtile. One or more comparator arrays 1822 are arranged to receive the first and second values, and compare them to determine whether the selected polygon is either partially inside or wholly outside each microtile. This result can be output from the comparison unit 1818 in the form of an indication of which microtiles should be subject to further processing in connection with the selected polygon, and provided to a scan converter 1824, for example.  In one example, the evaluation units 1820 can be structured to perform operations in parallel, for example calculating the first and second values in parallel and/or calculating values for multiple edges in parallel (e.g. three edges if the polygon is a triangle). In alternative examples, there may be fewer evaluation units 1820, e.g. one that serially calculates the first and second values for each edge. Similarly, the comparator arrays 1822 can also be structured to operate in a parallel manner in one example. For example, there can be one comparator for each microtile in the comparator array 1822, and the comparators operate in parallel to perform the comparison for each microtile concurrently. In an alternative example, one comparator can perform the comparison for a plurality of microtiles, taking each in turn (e.g. one comparator for each row or column of microtiles). In addition or alternatively, there can be a comparator array for each edge to enable all edges of the polygon to be compared in parallel (e.g. three comparator arrays if the polygon is a triangle).
 More detail on the above elements is now provided below.
 Polygons used in graphic systems are typically triangles. When these reach the rendering stage of a graphics system they can be defined by three edge equations and a depth equation. The examples described here evaluate each edge equation at all points on a fixed grid of sample positions. In an example, the edge equations are each of the form E(x,y)=Ax+By+C, where x and y represent either a screen location, a pixel location or, in the case of supersample antialiasing, a subpixel location.
 A, B and C may be precalculated fixed point precision constant coefficients specific to the polygon edge. A, B, and C are usually generated from triangle vertex coordinates that themselves (for reasons of guaranteeing mathematical stability) are represented by fixedpoint coordinates of bounded range. Thus, the number of bits in each coefficient can be known precisely.
 To reduce the cost of evaluation within a tile, C may be preadjusted such that the scene origin is translated to the sample location of the topleft pixel in the tile. This makes processing more efficient because it reduces the range and magnitude of the x and y values which, in turn, reduces the size of the mathematical operations needed to evaluate the edge equations. Such a translation can be performed directly on the vertex coordinates, prior to computation of each edge's A, B and C coefficients, or applied to the C value after the calculations on the original coordinates.
 The primitive edges can be considered to be vectors and have a direction (e.g.
 clockwise) around the primitive. Thus, in this clockwise example, if a location is to the right of the edge, it can be considered to be inside the edge, but if a location is to the left of the edge, it can be considered to be outside the edge. Therefore, if the edge vectors are directed in a clockwise fashion around the polygon, given any x and y values within the tile being processed, if E(x,y) is positive (greater than zero), then the sample point (x,y) is inside the edge being evaluated; if E(x,y) is negative (less than zero), then the sample point (x,y) is outside the edge being evaluated; and if E(x,y) is zero, then the sample point lies precisely on the edge E. For detailed rasterization, the case where E(x,y) is zero must be handled by a tie breaking rule (for example, the OpenGL “fill rule”). The coarse grain evaluation (i.e. the initial identification of which microtiles fall at least partially inside the polygon), however, may instead opt to use a conservative, slightly cheaper alternative of assuming that the sample point is inside the edge. In order for a sample point to lie within a polygon, it must be inside all of the edges.
 The above description applies, directly, to the perpixel (or persubpixel) inside tests required for subsequent detailed rasterization. However, in one example, in order to perform the coarse grain evaluation (i.e. the initial identification of which microtiles fall at least partially inside the polygon), each edge equation, E(x,y), must be adjusted. In summary, if any sample location in the microtile is inside the edge, then the corresponding sample point must also indicate “inside” when evaluated against the adjusted edge equation. Conversely, if the sample point indicates “outside” then all sample locations in the microtile must be outside the edge. The adjustment is equivalent to translating the edge. More specifically, the C coefficient of each equation is adjusted to give C′ according to the orientation of the edge. The orientation, in turn, is specified by the edge's A and B coefficients. A summary of this process is given below.
 As discussed above, in order to perform inside tests that apply to a microtile of pixels using this coarse grain evaluation (i.e. the initial identification of which areas fall at least partially inside the polygon), each edge equation E(x,y), should be adjusted to become E′(x,y). Each primitive edge may need to be translated, depending on orientation, by the width and/or height of the microtile.

FIG. 5 shows translation operations for various polygon edge orientations for the initial identification of which microtiles fall at least partially inside the polygon, for the illustrative example of when the microtile sample point for each microtile is at the top left corner of the microtile. The chosen microtile size may be such that the translation of each edge is inexpensive. In the example illustrated inFIG. 5 , eight illustrative 4*4 sample microtiles 501 are shown each intersecting with a respective edge 503. The orientation of each edge 503 is such that it only glances the microtile 501. Actual fixed sample points (solid circles 505) are shown at the top left corner of each microtile, and ideal sample points (empty circles 507) are also shown. The ideal sample points are the points that enable a determination of whether the microtile as a whole is inside or outside the particular edge. The ideal sample point changes depending on the orientation of the edge as shown inFIG. 5 . The relative positions of the actual sample point 505 and the ideal sample point 507 determine the appropriate translation of an edge. The translated edges are shown in dotted lines at 509. In the example illustrated inFIG. 5 , where a 4*4 sample microtile is employed, the translation in the x and y directions, t_{x }and t_{y}, will each be either 0 or 4 samples. Adjustment of coefficient C to give C′ is then simply a matter of subtracting 4A or 4B or both, or leaving C unchanged.  As shown in
FIG. 5 , the decision whether to translate the edge vector, and in which direction, is dependent on its slope or orientation. This is easily determined from the signs of the A and B coefficients:  Quadrant 0: B negative, A positive.
 Quadrant 1: B positive, A positive.
 Quadrant 2: B positive, A negative.
 Quadrant 3: B negative, A negative.
 The required edge translations therefore become:
 Quadrant 0: C′=C−(A.t_{x}+B.t_{y})=translation up and left.
 Quadrant 1: C′=C−A.t_{x }=translation up.
 Quadrant 2: C′=C=no translation.
 Quadrant 3: C′=C−B.t_{y}=translation left.
 The evaluation of each sample point on the coarse microtile grid only has to return the sign bit of the processed edge equation with the appropriate translation applied E′(x,y) and not the actual value. The outcome of the evaluation is then a Boolean indicating whether any part of the microtile is inside the processed edge E′(x,y).
 The processed edge E′(x,y)=Ax+By+C′, so it can be seen that

 By+C′≧−Ax is: TRUE for E′(x,y)≧0
 and FALSE for E(x,y)<0.
 Thus, if By+C′≧−Ax is TRUE, the sample point (x,y) is inside the edge being evaluated or precisely on the edge being evaluated (which can be treated as inside the edge in this coarse grain evaluation); and if By+C′−Ax is FALSE, the sample point (x,y) is outside the edge being evaluated. In this example, such a magnitude comparison is used, since this is less costly than an extra add and a compare against zero that would be required if E′(x,y) were fully evaluated.
 By selecting a microtile size that is a power of two in sample width and height, the full coarse sample grid for the tile becomes simple to calculate. For example on a 32*32 sample tile with 4*4 sample microtiles the Ax terms are:
 0, −4A, −8A, −12A, −16A, −20A, −24A, −28A (x=0 . . . 28 in increments of 4). Calculation of these eight values and their negation is computationally inexpensive. Similarly the eight By+C′ terms are also inexpensive:
 C′, 4B+C′, 8B+C′, 12B+C′, 16B+C′, 20B+C′, 24B+C′, 28B+C′ (y=0 . . . 28 in increments of 4).
 It will be appreciated that common terms can be shared, where appropriate, amongst these evaluations.

FIG. 6 shows a first example for determining which microtiles are inside a given edge, using a comparison of By+C′ and −Ax. Given Nx*Ny microtiles in a tile, the set of Nx, −Ax terms, and the set of Ny, By+C′ terms can be computed by one or more evaluation units 1820 in 
FIG. 18 ) and compared using an Nx*Ny grid of comparators (comparator array 1822 fromFIG. 18 ).FIG. 6 illustrates this arrangement for an example with a 32*32 sample tile 601 and 4*4 sample microtiles 603. The example ofFIG. 6 therefore requires a grid of 8*8 comparators 605 to undertake the coarse grain evaluation for an edge on all microtiles in parallel. Note that virtually the same scheme can be used for the inside tests for the rasterization step.  To support triangular polygons, a one example would have three such units, one for each of the three triangle edges. An alternative example might reuse a smaller number of units over several clock cycles. An example that supports wide line segments (i.e. parallelograms) may have four of these units, and similarly for other many sided polygons.
 Although the above is relatively inexpensive, the cost of the coarse grain evaluation may be further reduced.
 As already noted, the input vertex coordinates of a polygon are generally represented by fixedpoint values. These can be considered to be expressed as a multiple of the pixel dimensions plus some number of bits of subpixel precision. Therefore, each x or y position may be represented by a Jbit number consisting of H integer bits and K fractional bits. The positions can be represented in either signed or unsigned fixed point. For illustrative purposes, signed format will be assumed, but it will be appreciated that the techniques described could easily be adapted for a system using unsigned numbers.
 In one example, J may be 16, with 12 integer and 4 fractional bits, allowing each x,y coordinate value to be anywhere in the range [−2048, 2047.9375]. Such an example would be suitable for rendering images of, say, 2k*2k pixels with a significant “offscreen” guardband region.
FIG. 7 shows an example of a renderable image region surrounded by a guardband region used to reduce clipping costs. InFIG. 7 , the renderable image region 701 is centred within the maximum range of vertex positions 703 i.e. the image pixels span coordinates [−1024, 1024]. The renderable image region 701 is surrounded by guardband region 705. Also shown inFIG. 7 is a polygon 707 having an onscreen portion 709 within the renderable image region 701 and an offscreen portion 711 in the guardband region 705.  For an edge extending between point P (X_{P}, Y_{P}) and the point Q (X_{Q}, Y_{Q}), the A, B and C coefficients, expressed in screen coordinates, may be represented as:

A _{PQ} =Y _{P} −Y _{Q } 
B _{PQ} =X _{Q} −X _{P } 
C _{PQ} ^{SCREEN} =X _{P} Y _{Q} −X _{Q}Y_{P }  The A and B coefficients can each be exactly represented in J+1 bits. Although it may at first appear that the C coefficient will require 2J+1 bits, analysis of the range of results possible from signed Jbit coordinate values shows that 2J bits are sufficient. Allowing for the mapping of C from screen coordinates to tilebased coordinates, we obtain:

C _{PQ} ^{TILE}=(X _{P} Y _{Q} −X _{Q} Y _{P})+A _{PQ} .i _{X} +B _{PQ} .T _{Y }  where T_{X }and T_{Y }identify the corner of the tile.
 This, in turn, may be shifted for the coarse grain evaluation to obtain:

C′ _{PQ}=(X _{P} Y _{Q} −X _{Q} Y _{P})+A _{PQ}.(T _{X}−{0,1}.t _{x})+B _{PQ}.(T _{Y}−{0,1}.t _{y})  Note that T_{X}, T_{Y}, t_{x }and t_{y }are expressed in the fixed point range. Note that this expression may require additional bits of precision, and this depends on the relative sizes of the maximum supported image and the guardband sizes (see
FIG. 7 ). It can be assumed that C′_{PQ }requires L bits, where L≧2J.  Now consider the coarse grain evaluation expressions of the form

By+C′≧−Ax  as discussed in relation to the example of
FIG. 6 .  Each of the Ny, “B(4j)+C′” expressions uses L bits to accurately represent them. However, each of the Nx, “−A.4i” expressions require considerably fewer bits to be accurately represented. In an example, the worst case (i.e. maximum number of required bits) is determined by −28A. This requires only M=J+1+3 bits. Note that the multiplier is a multiple of t_{x}, which in examples is of the form 2^{T}. Therefore, the T least significant integer bits and the K fractional bits will all be zero. In examples, L is therefore significantly greater than M.

FIG. 8 shows an example of a clamping unit 800 to reduce the precision of a single B(4j)+C′ value from L bits to M+1 bits, with the option of a further 1 bit flag output. The Lbit input value 801, is separated into three sets of contiguous bits: the T+K least significant bits (LSBs) 803, the next M more significant bits 805, to produce output value 807, and then the remaining most significant bits (MSBs), 809.  For cases where it is necessary to detect the special case By+C′=−Ax (e.g. for examples in which a more conservative coarse grain evaluation is used, i.e. where a sample point falling precisely on the edge cannot simply be considered as inside the edge), the least significant bits are tested at unit 811. Unit 811 tests to establish if any of the least significant bits are nonzero, and a Boolean flag 813 is then generated. Unit 811 is thus a T+K input OR gate. For examples of the coarse grain evaluation in which By+C′−Ax is used to define “inside” the edge, units 803 and 811 are not included.
 The most significant bit of output value 807 is duplicated, 815, and concatenated, 817, as the least significant bit, with the output of 809, to form an L−(M+T+K)+1bit value, 819. The bits of value 819 are tested, at unit 821, to determine if the original value is outside the range of values representable by M bits, i.e. either <−2^{M+1 }or 2^{M−1}, and to indicate this to a clamp unit, 823. The test performed by unit 821 and the actions taken by clamp unit 823 are as follows:

 a) When value 819 is not all 1's and the sign bit is set (i.e. the original fixedpoint input value is <−2 ^{M−1}), then a value in the range [−2^{M}, −2^{M−1}−1] is output.
 b) When value 819 is not all 0's and the sign bit is not set (i.e. the original fixedpoint input value is ≧2^{M−1}), then a value in the range [2^{M−1}, 2^{M}−1] is output.
 c) Otherwise (i.e. the original fixed point input value is in the range [−2^{M−1}, 2^{M−1}−1]), value 807 is sign extended to M+1 bits and output at 825.
 Thus, clamping unit 800 reduces the precision of a single B(4j)+C′ value 801 from L bits to M+1 bits output at 825, and, optionally, a Boolean flag, 813.
 In a first example, for case a) above, the value −2^{M }is output, while for case b) above, the value 2^{M−1 }is output. A second example slightly reduces the hardware costs: for case a) a (non constant) M+1 bit value is constructed with ‘10’ as the top (most significant) two bits followed by the less significant M−1 bits of value 807; for case b) a M+1 bit value is constructed with ‘01’ as the top (most significant) two bits followed, again, by the less significant M−1 bits of value 807. It will be appreciated that, for the output generated by clamp unit 823, the M−1 output bits are no longer a function of the test done by unit 821. Only the top two MSBs are ever changed according to cases a), b) and c) above.

FIG. 9 shows a second example for determining which microtiles are inside a given edge, using a comparison of By+C′ and −Ax, but incorporating clamping units 800 like that inFIG. 8 .FIG. 9 represents an improvement over the example ofFIG. 6 : by using the precision reduction logic ofFIG. 8 , the costs of a coarse grain evaluation can be reduced. As inFIG. 6 ,FIG. 9 illustrates this arrangement for an example with a 32*32 sample tile 601, 4*4 sample microtiles 603 and a grid of 8*8 comparators 605 to evaluate the inside test for an edge on all microtiles in parallel.FIG. 9 further includes clamping unit 900 containing Ny copies of the clamping unit 800 ofFIG. 8 . This clamps each of the Ny B(4j)+C′ computed values to not exceed the maximum or minimum of an M+1 signed fixedpoint number. By reducing the number of bits in the numbers to be compared, the clamping operation reduces the cost (in terms of complexity, silicon area and/or power consumption) of each of the comparators in the array 605.  As identified earlier, for cases where the expression By+C′−Ax is instead separated into By+C′>−Ax and By+C′=−Ax conditions, the Ny components of clamping unit 900 would each include units 803 and 811. The asserted 813 signal would then be tested in each of the comparators. As noted, the Ax values do not include the T+K LSBs because those bit values, in these examples, are implicitly zero. The presence of an asserted 813 signal, therefore, implies inequality.
 An alternative example is able to make further savings taking advantage of the fact that the left half of the Nx “−A.4i”s are smaller still in magnitude, and so an additional clamping operation may be performed. Diminishing returns are achieved with further applications of this procedure, however. In a further example, C′ is computed relative to the centre of the tile rather than the corner, allowing a further small reduction in the magnitudes of the various values.
 Active Microtiles within a Tile—Full or Iterative Evaluation

FIG. 10 shows full and iterative evaluation of intersected microtiles within a tile, for example using the array of comparators ofFIG. 6 orFIG. 9 .FIG. 10 is a modified version ofFIG. 4 . As inFIG. 4 ,FIG. 10 shows a triangular primitive 401 in a 32*32 sample tile 403 including 64 4*4 microtiles 405. The microtiles 407 which are intersected by primitive 401 are shaded inFIG. 10 . Sample points 409 are provided at the top left hand corner of each microtile.  In a first example (full evaluation), the example depicted in
FIGS. 4 and 10 accepts as inputs the A, B, and C coefficients for a set of edges and evaluates, for each edge, the eight “−Ax” terms against the eight “By+C′” terms. All sample locations 409 are thus evaluated for all edges in parallel. As noted earlier, for each edge, the entire 32*32 tile can be microtiled in a single clock with 8×8 comparators and 8+8 calculations (8 calculations to derive the 8 “−Ax” terms and 8 calculations to derive the 8 “By+C” terms).  In an alternative example of full evaluation, where the A, B and C edge coefficient sets arrive serially, a single design can be used to evaluate microtiles for each triangle edge in turn, in an subtractive manner. Discounting microtiles outside one current edge equation can be done for the entire tile in a single phase. At the end of the third edge, only the microtiles identified as contributing to the triangle will remain. The resulting map of up to 64 active microtiles can then be processed for detailed triangle edge and pixel depth evaluation.
 In a second example (iterative evaluation) also illustrated in
FIG. 10 , rather than evaluating all sample locations in parallel, the example iterates in the ydirection between the maximum and minimum y extent of the object at microtile granularity. For each iteration, a “By+C′” value is calculated for the microtile row and eight “−Ax” values are generated. A row of microtiles can be evaluated with 8 comparators. One such row, indicated by the black sampling locations, is shown at 1000. The previously evaluated rows are shown at 1002, and the rows yet to be evaluated are shown at 1004.  In the example of a 32*32 tile with 4*4 microtiles, a single edge equation can be tested against the whole tile in a maximum of 8 clocks with each clock using 8+1 calculations (8 calculations to derive the 8 “−Ax” terms and 1 calculation to derive the “By+C” term) and 8 comparators. This is an inexpensive implementation which lends itself to replication e.g. three replications each working on its own edge equation in parallel. The output of each of the three evaluations are then logically ANDed (+) to yield the final coverage result for the microtile row.

FIGS. 11 a), b), c), d) and e) depict a further example which adds an additional level of hierarchy to the coarse grain evaluation.FIG. 11 a) is a modified version ofFIG. 4 . As inFIG. 4 ,FIG. 11 a) shows a triangular primitive 401 in a 32*32 sample tile 403. However, each sample tile 403 is now divided into four intermediate rectangular areas (minitiles) 1101 b, 1101 c, 1101 d and 1101 e. Each minitile 1101 b, 1101 c, 1101 d, 1101 e is 16*16 pixels. Each minitile comprises 16 4*4 microtiles 405 (shown more clearly inFIGS. 11 b) to e)). Thus, as inFIG. 4 , each 32*32 sample tile 403 includes 64 4*4 microtiles 405.  An additional level of hierarchy is provided in the coarse grain evaluation. Before the active microtiles are identified, the active minitiles are identified. That is, the minitiles which are intersected by triangular primitive 401 are first identified. This is done using the same approach as already described in relation to microtiles, and sample points 1103 for each minitile 1101 b, 1101 c, 1101 d, 1101 e are provided at the top left hand corner of each minitile. In this example, the edge translations used in the calculations will be of minitile (half tile) x and ymagnitude rather than microtile magnitude for the four sample points 1103. In this example, this is done using four “−Ax” calculations, four “−By+C” calculations and 4*4 comparators in a maximum of four phases.
 In this example, three minitiles 1101 b, c, and d, are active minitiles. Primitive 401 does not intersect minitile 1101 e, which is therefore not active. Then, for each active minitile in turn, active microtiles within that minitile are identified, as already described, and this is shown in

FIGS. 11 b) to d). Sample points 409 for identification of the active microtiles (in each minitile) are provided at the top left corner of each microtile. 
FIG. 11 b) shows the triangle 401 against the first active minitile 1101 b. This is the minitile at the top left of tile 403. The microtiles 1105 b in minitile 1101 b which are intersected by the primitive 401 (the active microtiles) are shaded inFIG. 11 b). 
FIG. 11 c) shows the triangle 401 against the second active minitile 1101 c. This is the minitile at the top right of tile 403. The microtiles 1105 c in minitile 1101 c which are intersected by the primitive 401 (the active microtiles) are shaded inFIG. 11 c). 
FIG. 11 d) shows the triangle 401 against the third active minitile 1101 d. This is the minitile at the bottom right of tile 403. The microtiles 1105 d in minitile 1101 d which are intersected by the primitive 401 (the active microtiles) are shaded inFIG. 11 d). 
FIG. 11 e) shows the triangle 401 against the inactive minitile 1101 e. This is the minitile at the bottom left of tile 403. There are no active microtiles in minitile 1101 e. There is no need to perform microtile calculations for a minitile that has been identified as inactive.  By identifying the active minitiles before identifying the active microtiles (i.e. by introducing an additional level of hierarchy into the coarse grain evaluation), efficiency can be improved even further.
 In a system that supports various modes of supersampling antialiasing (SSAA) or multisample antialiasing (MSAA), the microtiling calculations can be adjusted to suit the number of pixels between each point on the coarse sampling grid.
FIG. 12 and Table 1 show the distance between microtile sample points for a system using a 4*4 sample microtile, for nonMSAA, 2× MSAA and 4× MSAA. InFIG. 12 and Table 1, 2× MSAA is horizontal subsample stacking i.e. additional resolution in the horizontal direction. 4× MSAA is additional resolution in both the horizontal and vertical directions. The principle readily extends to any size of microtile, but powers of two samples will be more efficient to implement. 
TABLE 1 NonMSAA 2xMSAA 4xMSAA Horizontal spacing 4 samples = 4 samples = 4 samples = 4 pixels = 4A 2 pixels = 2A 2 pixels = 2A Vertical spacing 4 samples = 4 samples = 4 samples = 4 pixels = 4B 4 pixels = 4B 2 pixels = 2B  Note in
FIG. 12 that microtile sample point positions are separated by x and y integers. The antialiasing mode employed only affects the distance between sample points. Any subpixel grid offsets that need to be employed in fine grain pixel evaluations, such as the offsets shown inFIG. 2 , do not need to be accounted for in the coarse grain evaluation (microtiling) phase.  Identification of active microtiles in the coarse grain evaluation still leaves the processing of microtiles at pixel or subpixel resolution to be performed. The scan conversion of each microtile and the depth processing for each active pixel may be implemented with calculations that can be optimised given the presence of microtiles. Each triangular primitive may be defined by three edge equations (already discussed in detail) and a depth equation which allows depth processing to be performed, and each pixel to be shaded according to which primitives are visible in that pixel. By calculating the depth and edge equation terms for the top left sample point within a microtile and using this as a “base value”, the remaining sample points (there are 15 remaining sample points in an exemplary 4*4 microtile) can be found with integer addition of A and B coefficients. An exemplary method is described below with reference to
FIGS. 13 , 14 and 15 for various sampling modes. The following equations incorporate subpixel grid offsets, dx and dy, which reflect the position of a sampling point within a pixel. For microtile evaluation, where the sampling point was at the top left corner of the microtile, no such offset was required. For edge processing a similar technique to that used in microtile evaluation may be employed, where “−A.(x+dx)” and “B.(y+dy)+C′” terms are compared. For the depth calculation the actual depth value of z(x,y)=A.(x+dx)+B.(y+dy)+C must be found. 
FIG. 13 shows how all sample positions may be calculated from the top left microtile 1301 when there is no multi sample antialiasing (nonMSAA, Table 1, left hand column). The top left sample position is calculated. From this value, the top left 4 pixels can be found by adding A and/or B. The remaining 12 sample positions can be found from those top left 4 pixels by addition of a further 2A and/or 2B. Note that, although they are not illustrated, the initial Ax and By terms may include any sample grid offsets, dx, and dy. 
FIG. 14 shows how all sample positions may be calculated from the top left microtile 1401 when there is 4× multi sample antialiasing (4× MSAA, Table 1, right hand column). Four samples in the top left of the microtile are calculated at their sitespecific sample grid offset dx_{n}, dy, where n=0 . . . 3. The remaining 12 samples can be found with the addition of A and/or B only. 
FIG. 15 shows how all sample positions may be calculated from the top left microtile 1501 when there is 2× multi sample antialiasing (2× MSAA, Table 1, middle column). In the example shown inFIG. 15 , and according to Table 1, there is increased resolution in the xdimension (horizontal subsample stacking) requiring only +A to be added when traversing in the xdirection. The ydimension requires a unit addition of B between any two contiguous samples vertically. It is, of course, equally valid to choose a scheme where the resolutions in the x and ydirections are transposed, such that vertical subsample stacking is achieved. This would require A to be added between any two horizontally adjacent samples and B to be added at half the rate vertically. The choice of implementation of horizontal or vertical subsample stacking does not affect the principle behind the microtiling algorithm or adversely affect the cost of implementation.
Claims (36)
1. A method of rendering in a graphics system having a rendering space divided into a plurality of rectangular areas and having each rectangular area subdivided into a plurality of smaller rectangular areas each comprising a plurality of pixels, the method comprising:
receiving data representing a tiled set of polygons to be rendered in a selected one of the rectangular areas;
for each polygon in the tiled set, determining whether that polygon is located at least partially inside a selected one of the smaller rectangular areas in the selected rectangular area; and
if that polygon is located at least partially inside the selected smaller rectangular area, determining which of the plurality of pixels in the selected smaller rectangular area are inside the polygon, or
if that polygon is not located at least partially inside the selected smaller rectangular area, performing no further processing of the polygon at one or more of the plurality of pixels in the smaller rectangular area; and
wherein the step of determining whether the polygon is located at least partially inside the selected smaller rectangular area comprises:
deriving a plurality of edges from the polygon data; and
comparing each of the plurality of edges with a sample point associated with the selected smaller rectangular area to determine whether the selected smaller rectangular area is located wholly outside any of the edges;
wherein if the selected smaller rectangular area is not located wholly outside any of the edges then the polygon is determined to be located at least partially inside the selected smaller rectangular area.
2. A method according to claim 1 , further comprising:
receiving a plurality of image polygons to be rendered in the rendering space; and
tiling the image polygons to generate the tiled set of polygons by determining at least those image polygons that are located within the selected rectangular area.
3. A method according to claim 1 , wherein comparing each of the plurality of edges comprises:
processing each of the plurality of edges to derive a plurality of processed edges, wherein the processing comprises, for each edge, determining an orientation of the respective edge and applying a translation to the respective edge in accordance with the orientation; and
comparing each of the plurality of processed edges with the sample point.
4. A method according to claim 3 , wherein applying the translation to the respective edge in accordance with the orientation comprises: applying a translation to the respective edge in one dimension, applying a translation to the respective edge in two dimensions, or applying no translation to the respective edge.
5. (canceled)
6. A method according to claim 5 , further comprising using the determination of whether the evaluation exceeds a predetermined threshold to determine whether the sample point is located inside or outside the processed edge.
7. A method according to claim 6 , wherein if the sample point is located inside the processed edge, then the smaller rectangular area, with which the sample point is associated, is located at least partially inside the edge from which the processed edge was derived, and if the sample point is located outside the processed edge, then the smaller rectangular area, with which the sample point is associated, is located wholly outside the edge from which the processed edge was derived.
8. (canceled)
9. A method according to claim 8 , further comprising outputting a first value if By+C>−Ax and outputting a second value if By+C<−Ax, one of the first value and the second value indicating that the sample point is located inside the processed edge and the other of the first value and the second value indicating that the sample point is located outside the processed edge.
10. (canceled)
11. (canceled)
12. (canceled)
13. A graphics system having a rendering space divided into a plurality of rectangular areas and having each rectangular area subdivided into a plurality of smaller rectangular areas each comprising a plurality of pixels, the graphics system comprising a processing unit configured to:
receive data representing a tiled set of polygons to be rendered in a selected one of the rectangular areas; and
determine, for each polygon in the tiled set, whether that polygon is located at least partially inside a selected one of the smaller rectangular areas in the selected rectangular area; and
wherein the processing unit is configured to determine whether the polygon is located at least partially inside the selected smaller rectangular area by:
deriving a plurality of edges from the polygon data; and
comparing each of the plurality of edges with a sample point associated with the selected smaller rectangular area to determine whether the selected smaller rectangular area is located wholly outside any of the edges;
wherein if the selected smaller rectangular area is not located wholly outside any of the edges then the polygon is determined to be located at least partially inside the selected smaller rectangular area;
wherein, if that polygon is located at least partially inside the selected smaller rectangular area, the processing unit is arranged to determine which of the plurality of pixels in the selected smaller rectangular area are inside the polygon, and if that polygon is not located at least partially inside the selected smaller rectangular area, the processing unit is arranged to perform no further processing of the polygon at one or more of the plurality of pixels in the smaller rectangular area.
14. A graphics system according to claim 13 , wherein the processing unit is further configured to:
receive a plurality of image polygons to be rendered in the rendering space; and
tile the image polygons to generate the tiled set of polygons by determining at least those image polygons that are located within the selected rectangular area.
15. A graphics system according to claim 13 , wherein the processing unit is configured to compare each of the plurality of edges by:
processing each of the plurality of edges to derive a plurality of processed edges, wherein the processing comprises, for each edge, determining an orientation of the respective edge and applying a translation to the respective edge in accordance with the orientation;
comparing each of the plurality of processed edges with the sample point.
16. A graphics system according to claim 15 , wherein the processing unit is configured to apply the translation to the respective edge in accordance with the orientation by:
applying a translation to the respective edge in one dimension, applying a translation to the respective edge in two dimensions, or applying no translation to the respective edge.
17. (canceled)
18. A graphics system according to claim 17 , wherein the processing unit is configured to use the determination of whether the evaluation exceeds a predetermined threshold to determine whether the sample point is located inside or outside the processed edge.
19. A graphics system according to claim 18 , wherein if the sample point is located inside the processed edge, then the smaller rectangular area, with which the sample point is associated, is located at least partially inside the edge from which the processed edge was derived, and if the sample point is located outside the processed edge, then the smaller rectangular area, with which the sample point is associated, is located wholly outside the edge from which the processed edge was derived.
20. (canceled)
21. A graphics system according to claim 20 , wherein the processing unit is configured to output a first value if By+C>−Ax and output a second value if By+C<−Ax, one of the first value and the second value indicating that the sample point is located inside the processed edge and the other of the first value and the second value indicating that the sample point is located outside the processed edge.
22. (canceled)
23. (canceled)
24. (canceled)
25. (canceled)
26. (canceled)
27. (canceled)
28. A graphics processing unit configured to render to a rendering space divided into a plurality of rectangular areas, each rectangular area being subdivided into a plurality of smaller rectangular areas each comprising a plurality of pixels, the graphics processing unit comprising:
an interface to a memory device;
a microtiling unit arranged to receive via the interface data representing a tiled set of polygons to be rendered in a selected one of the rectangular areas, determine for each smaller rectangular area in the selected rectangular area whether that smaller rectangular area contains at least a portion of a selected polygon, and output a corresponding indication; and
a scan converter configured to receive the indications, and if a selected one of the smaller rectangular areas contains at least a portion of the selected polygon, determine which of the plurality of pixels in the respective smaller rectangular area are inside the selected polygon, and if a selected one of the smaller rectangular areas does not contain at least a portion of the selected polygon, perform no further processing of the selected polygon at one or more of the plurality of pixels in the respective smaller rectangular area;
wherein the microtiling unit comprises edge calculation logic configured to receive the selected polygon and derive a plurality of edge equation parameters for each edge of the selected polygon and edge processing logic coupled to the edge calculation logic and configured to receive the plurality of edge equation parameters for a selected edge of the selected polygon and to determine an orientation of the selected edge and apply a translation to the edge equation parameters in accordance with the orientation to generate processed edge equation parameters, wherein the translation corresponds to a shift of the selected edge in one dimension, two dimensions, or no shift of the selected edge; and
output the processed edge equation parameters.
29. A graphics processing unit according to claim 28 , further comprising:
a tiling unit configured to receive a plurality of image polygons to be rendered in the rendering space, tile the image polygons to generate the tiled set of polygons by determining at least those image polygons that are located at least partially within the selected rectangular area, and output the tiled set of polygons to the memory device.
30. A graphics processing unit according to claim 28 , wherein the edge processing logic comprises a quadrant determination unit arranged to determine the orientation of the selected edge of the polygon by evaluating the signs of one or more of the edge equation parameters.
31. (canceled)
32. A graphics processing unit according to claim 31 , wherein the comparison unit is further configured to:
perform the determination of which of the smaller rectangular areas are located wholly outside the selected edge of the polygon, and which are located at least partially inside the selected edge of the polygon for each edge of the selected polygon; and
generate the indication such that any of the smaller rectangular areas that are not located wholly outside at least one edge of the selected polygon are indicated as containing at least a portion of a selected polygon.
33. A graphics processing unit according to claim 31 , wherein the comparison unit comprises:
one or more evaluation units configured to receive the processed edge equation parameters and generate a first value from the processed edge equation parameters for each of the smaller rectangular areas in dependence on its position in the rectangular area, and a second value from the processed edge equation parameters for each of the smaller rectangular areas in dependence on its position in the rectangular area.
34. A graphics processing unit according to claim 33 , wherein the comparison unit further comprises:
a clamping unit configured to receive the first value and generate a reduced first value by reducing the precision of the first value in dependence on the number of bits used to represent the second value.
35. A graphics processing unit according to claim 33 , wherein the comparison unit further comprises:
a comparator array comprising a plurality of comparators each associated with at least one of the smaller rectangular areas and configured to operate in parallel, each comparator configured to compare the first value or the reduced first value with the second value for its respective smaller rectangular area to determine whether that smaller rectangular area is located wholly outside the selected edge of the polygon or located at least partially inside the selected edge of the polygon.
3655. (canceled)
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US20170206706A1 (en)  20170720 
GB2544370A (en)  20170517 
GB2551460B (en)  20180502 
GB201404423D0 (en)  20140430 
GB2514232B (en)  20170913 
GB2514232A (en)  20141119 
GB201714522D0 (en)  20171025 
US10235802B2 (en)  20190319 
US20190362550A1 (en)  20191128 
GB2511817A (en)  20140917 
GB2544370B (en)  20171025 
GB2551460A (en)  20171220 
US20190156571A1 (en)  20190523 
GB201614787D0 (en)  20161019 
US10424114B2 (en)  20190924 
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