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Method For Fabricating Conductive Structures of Substrate

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Publication number
US20130313122A1
US20130313122A1 US13564673 US201213564673A US2013313122A1 US 20130313122 A1 US20130313122 A1 US 20130313122A1 US 13564673 US13564673 US 13564673 US 201213564673 A US201213564673 A US 201213564673A US 2013313122 A1 US2013313122 A1 US 2013313122A1
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US
Grant status
Application
Patent type
Prior art keywords
conductive
substrate
insulating
material
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US13564673
Inventor
Shih-Long Wei
Shen-Li Hsiao
Chien-Hung Ho
Yuan-Chiang Lin
Chen-Shen Kuo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Viking Tech Corp
Original Assignee
Viking Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09563Metal filled via

Abstract

A method for fabricating a conductive structure of a substrate includes the steps of: providing an insulating substrate having opposite first and second surfaces and forming an insulating adhesive film on the second surface of the insulating substrate; forming at least a through hole penetrating the insulating substrate and the insulating adhesive film and forming a conductive foil on the insulating adhesive film so as to cover the through hole; and forming a shielding material on the conductive foil and the second surface of the insulating substrate and performing an electrochemical deposition process through the conductive foil so as to fill the through hole with a conductive material along a direction towards the first surface of the insulating substrate, thereby preventing the formation of voids in the through hole and hence reducing the overall resistance and preventing a blister effect from occurring.

Description

    BACKGROUND OF THE INVENTION
  • [0001]
    1. Field of the Invention
  • [0002]
    The present invention relates to methods for fabricating conductive structures of substrates, and more particularly, to a method for filling a conductive material in a through hole of a substrate.
  • [0003]
    2. Description of Related Art
  • [0004]
    To form a conductive structure in a substrate, a method as disclosed by Taiwan Patent No. 540,279 can be performed. First, at least a though hole is formed in the substrate. Then, a conductive layer is formed on the entire surface of the substrate by sputtering, and a dry film is attached to the conductive layer and patterned by exposure and development. Subsequently, an electroplating process is performed by using the conductive layer as a current conductive path, thereby filling the through hole with a conductive material and forming a circuit layer on the substrate.
  • [0005]
    However, during the electroplating process, the through hole is filled with the conductive material from the sidewall towards the center. Therefore, the through hole may be not completely filled. Consequently, voids may be formed in the conductive material of the through hole, thus increasing the overall resistance and decreasing the conductivity of electrical signals. Moreover, voids may expand in a high temperature environment so as to cause a blister effect.
  • [0006]
    Further, to avoid the formation of voids in the through hole, the conductive material deposited on the surface of the substrate and around the through hole is required to have a big thickness. As such, a thick circuit layer is formed, which leads to an increased thickness of the final product and an increased thermal resistance in a direction perpendicular to the substrate.
  • [0007]
    Furthermore, the circuit layer usually has a dimple formed at or close to the position of the through hole, thus resulting in an uneven surface of the circuit layer and hence adversely affecting a subsequent die bonding process. To overcome the drawback, the die bonding process is performed at a position far from the dimple, which, however, reduces the utilization rate of the substrate surface and increases the cost.
  • [0008]
    Therefore, there is a need to provide a method for fabricating a conductive structure of a substrate so as to overcome the above-described drawbacks.
  • SUMMARY OF THE INVENTION
  • [0009]
    In view of the above-described drawbacks, the present invention provides a method for fabricating a conductive structure of a substrate, which comprises the steps of:
  • [0010]
    providing an insulating substrate having opposite first and second surfaces and forming an insulating adhesive film on the second surface of the insulating substrate; forming at least a through hole penetrating the insulating substrate and the insulating adhesive film and forming a conductive foil on the insulating adhesive film so as to cover the through hole; and forming a shielding material on the conductive foil and the second surface of the insulating substrate and performing an electrochemical deposition process through the conductive foil so as to fill the through hole with a conductive material along a direction towards the first surface of the insulating substrate.
  • [0011]
    In an embodiment, after the through hole is filled with the conductive material, the shielding material, the conductive foil and the insulating adhesive film can be sequentially removed, and the first and second surfaces of the insulating substrate can be planarized so as for the conductive material to be flush with the first and second surfaces of the insulating substrate. Then, circuit layers can be formed on the first and second surfaces of the insulating substrate, respectively, and electrically connected through the conductive material.
  • [0012]
    Therefore, by performing an electrochemical deposition process through the conductive foil formed on the insulating adhesive film and covering the through hole, the present invention can fill the through hole with the conductive material in a longitudinal direction so as to avoid the formation of voids in the through hole. Further, since the circuit layers can be formed after planarization of the surfaces of the insulating substrate, the circuit layers can have a reduced thickness and no dimples are formed in the circuit layers, thereby effectively reducing the thermal resistance and improving the area utilization.
  • BRIEF DESCRIPTION OF DRAWINGS
  • [0013]
    FIGS. 1A to 1K are schematic cross-sectional views showing a method for fabricating a conductive structure of a substrate according to the present invention.
  • DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
  • [0014]
    The following illustrative embodiments are provided to illustrate the disclosure of the present invention, these and other advantages and effects can be apparent to those in the art after reading this specification.
  • [0015]
    It should be noted that all the drawings are not intended to limit the present invention. Various modification and variations can be made without departing from the spirit of the present invention. Further, terms such as “one”, “a” etc. are merely for illustrative purpose and should not be construed to limit the scope of the present invention.
  • [0016]
    FIGS. 1A to 1K are schematic cross-sectional views showing a method for fabricating a conductive structure of a substrate according to the present invention.
  • [0017]
    Referring to FIGS. 1A and 1B, an insulating substrate 1 having a first surface 10 and a second surface 11 opposite to the first surface 10 is provided, and an insulating adhesive film 2 is formed on the second surface 11 of the insulating substrate 1. The insulating substrate 1 can be an aluminum nitride substrate or an aluminum oxide substrate.
  • [0018]
    Referring to FIGS. 1C and 1D, a single or a plurality of through holes 3 are formed to penetrate the insulating substrate 1 and the insulating adhesive film 2, and a conductive foil 4 is formed on the insulating adhesive film 2 for covering the through holes 3. The insulating adhesive film 2 can be an acid-resistant acrylic thermosetting film. The conductive foil 4 can be made of copper. Each of the through holes 3 can have a diameter greater than 300 um.
  • [0019]
    Referring to FIGS. 1E and 1F, a shielding material 5 is formed on the conductive foil 4 and the second surface 11, and by performing an electrochemical deposition through the conductive foil 4, a conductive material 6 is filled in the through holes 3 along a longitudinal direction towards the first surface 10 of the insulating substrate 1. The shielding material 5 can be an anti-plating adhesive tape or a gasket. The conductive material 6 can be made of copper. Filling the through holes 3 with the conductive material 6 comprises uniformly and isotropically depositing the conductive material 6 in the through holes 3 from the conductive foil 4 to the first surface 10.
  • [0020]
    In particular, the conductive material is uniformly and isotropically deposited from the second surface 11 to the first surface 10 such that the through holes 3 are effectively and completely filled with the conductive material to thereby obtain a compact and solid conductive structure. Therefore, the present invention prevents the formation of voids and consequently overcomes the conventional drawbacks of high resistance and blister effect.
  • [0021]
    Subsequently, the processes of FIGS. 1G to 1K can be selectively performed.
  • [0022]
    Referring to FIGS. 1G to 1J, the shielding material 5, the conductive foil 4 and the insulating adhesive film 2 are sequentially removed, and then the first surface 10 and the second surface 11 are planarized simultaneously or sequentially. As such, portions of the conductive material 6 protruding above the through holes 3 are removed so as for the conductive material 6 to be flush with the first and second surfaces 10, 11. The planarization process can be realized by grinding or sandblasting.
  • [0023]
    Referring to FIG. 1K, circuit layers 7, 8 are formed on the first surface 10 and the second surface 11, respectively, and electrically connected through the conductive material 6 in the through holes 3. The circuit layers 7, 8 can be formed by using such as lithography technologies for forming certain patterns or electrochemical technologies for forming circuit layers. Since related technologies are well known in the art, detailed description thereof is omitted herein.
  • [0024]
    According to the present invention, the circuit layers are fabricated after the through holes are filled with the conductive material. That is, the hole filling process and the circuit layer fabricating process are performed separately such that the circuit layers can have a reduced thickness so as to reduce the thermal resistance. Further, the surfaces of the substrate are planarized together with the conductive material so as to prevent the formation of dimples in the circuit layer, thereby effectively increasing the die bonding area.
  • [0025]
    Further, compared with the conventional conductive through holes that generally have a diameter not more than 150 um, the through holes of the present invention have a diameter greater than 300 um and consequently the conductive through holes formed by filling the through holes with the conductive material have a larger diameter and correspondingly larger area. According to the relationship between area and resistance, each conductive through hole of the present invention is equivalent to four conventional through holes, thus saving the laser processing time and reducing the fabrication cost.
  • [0026]
    In addition, since the conductive through holes of the present invention have a large diameter and no dimple is formed in the circuit layers, technologies for forming thermal vias in the conductive through holes are applicable in the present invention.
  • [0027]
    The above-described descriptions of the detailed embodiments are only to illustrate the preferred implementation according to the present invention, and it is not to limit the scope of the present invention. Accordingly, all modifications and variations completed by those with ordinary skill in the art should fall within the scope of present invention defined by the appended claims.

Claims (10)

What is claimed is:
1. A method for fabricating a conductive structure of a substrate, comprising the steps of:
providing an insulating substrate having opposite first and second surfaces and forming an insulating adhesive film on the second surface of the insulating substrate;
forming at least a through hole penetrating the insulating substrate and the insulating adhesive film and forming a conductive foil on the insulating adhesive film so as to cover the through hole; and
forming a shielding material on the conductive foil and the second surface of the insulating substrate and performing an electrochemical deposition process through the conductive foil so as to fill the through hole with a conductive material along a direction towards the first surface of the insulating substrate.
2. The method of claim 1, further comprising removing the shielding material, the conductive foil and the insulating adhesive film and planarizing the first and second surfaces of the insulating substrate so as for the conductive material to be flush with the first and second surfaces of the insulating substrate.
3. The method of claim 2, further comprising forming circuit layers on the first and second surfaces of the insulating substrate, respectively, the circuit layers being electrically connected through the conductive material.
4. The method of claim 1, wherein filling the through hole with the conductive material comprises isotropically and uniformly depositing the conductive material in the through hole from the conductive foil to the first surface.
5. The method of claim 1, wherein the insulating substrate is an aluminum nitride substrate or an aluminum oxide substrate.
6. The method of claim 1, wherein the insulating adhesive film is an acid-resistant acrylic thermosetting adhesive film.
7. The method of claim 1, wherein the conductive foil is made of copper.
8. The method of claim 1, wherein the shielding material is an anti-plating adhesive tape or a gasket.
9. The method of claim 1, wherein the conductive material is made of copper.
10. The method of claim 1, wherein the through hole has a diameter greater than 300 um.
US13564673 2012-05-24 2012-08-01 Method For Fabricating Conductive Structures of Substrate Abandoned US20130313122A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW101118471 2012-05-24
TW101118471 2012-05-24

Publications (1)

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US (1) US20130313122A1 (en)
CN (1) CN103429011B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016194241A1 (en) * 2015-05-31 2016-12-08 清川メッキ工業株式会社 Method for manufacturing wiring board
US9756736B2 (en) 2015-05-31 2017-09-05 Kiyokawa Plating Industry Co., Ltd Process for producing a wiring board

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104754854A (en) * 2013-12-30 2015-07-01 比亚迪股份有限公司 Flexible circuit board and preparation method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6627824B1 (en) * 2000-09-20 2003-09-30 Charles W. C. Lin Support circuit with a tapered through-hole for a semiconductor chip assembly
US20040173909A1 (en) * 2003-03-05 2004-09-09 Micron Technology, Inc. Conductive through wafer vias
US20120224335A1 (en) * 2011-03-02 2012-09-06 Qiu Yuan Printed circuit board and semiconductor package using the same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5340947A (en) * 1992-06-22 1994-08-23 Cirqon Technologies Corporation Ceramic substrates with highly conductive metal vias
WO2001039267A1 (en) * 1999-11-26 2001-05-31 Ibiden Co., Ltd. Multilayer circuit board and semiconductor device
US6686827B2 (en) * 2001-03-28 2004-02-03 Protectronics Technology Corporation Surface mountable laminated circuit protection device and method of making the same
US7839650B2 (en) * 2006-10-25 2010-11-23 Unimicron Technology Corp. Circuit board structure having embedded capacitor and fabrication method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6627824B1 (en) * 2000-09-20 2003-09-30 Charles W. C. Lin Support circuit with a tapered through-hole for a semiconductor chip assembly
US20040173909A1 (en) * 2003-03-05 2004-09-09 Micron Technology, Inc. Conductive through wafer vias
US20120224335A1 (en) * 2011-03-02 2012-09-06 Qiu Yuan Printed circuit board and semiconductor package using the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016194241A1 (en) * 2015-05-31 2016-12-08 清川メッキ工業株式会社 Method for manufacturing wiring board
US9756736B2 (en) 2015-05-31 2017-09-05 Kiyokawa Plating Industry Co., Ltd Process for producing a wiring board

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Publication number Publication date Type
CN103429011A (en) 2013-12-04 application
CN103429011B (en) 2016-06-01 grant

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Date Code Title Description
AS Assignment

Owner name: VIKING TECH CORPORATION, TAIWAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:WEI, SHIH-LONG;HSIAO, SHEN-LI;HO, CHIEN-HUNG;AND OTHERS;REEL/FRAME:028704/0409

Effective date: 20120621