US20100127267A1 - Alternative thin film transistors for liquid crystal displays - Google Patents
Alternative thin film transistors for liquid crystal displays Download PDFInfo
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- US20100127267A1 US20100127267A1 US12/694,241 US69424110A US2010127267A1 US 20100127267 A1 US20100127267 A1 US 20100127267A1 US 69424110 A US69424110 A US 69424110A US 2010127267 A1 US2010127267 A1 US 2010127267A1
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- thin film
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- film transistor
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- 239000010409 thin film Substances 0.000 title claims abstract description 14
- 239000004973 liquid crystal related substance Substances 0.000 title abstract description 6
- 239000002184 metal Substances 0.000 claims description 2
- 230000003071 parasitic effect Effects 0.000 abstract description 21
- 238000010276 construction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
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Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
Definitions
- FIG. 1A depicts the “double TFT” arrangement 100 of the ‘451 patent.
- Source line 104 connects to the TFT via source electrode 106 .
- Two gate electrodes 108 are connected to gate line 102 .
- Two drain electrodes 110 connect to the pixel and are formed such that the two gate electrodes 108 affect conduction from the source electrode to the drain electrodes when activated.
- FIG. 4 depicts a TFT 400 made in the manner taught in the ‘297 patent.
- gate line 402 delivers the gate signal to gate electrode 408 .
- Source line 404 sends image data to source electrodes 406 .
- the gate electrode is activated, the image data is transferred to the pixel via the drain electrode 410 .
- this TFT embodiment contains only one gate crossover 412 which aids in reducing parasitic capacitance.
- prior LCDs use the same orientation to align transistor in the pixel area of the display.
- transistors may need to be located in unconventional locations of a pixel area, while addressing misalignment and parasitic capacitance.
- FIG. 1 shows a prior art TFT having a double source/drain structure.
- FIGS. 2 and 3 show alternative TFTs having a double source/drain structure.
- FIG. 4 shows a prior art TFT with a double gate structure.
- FIG. 5 show TFT structures in a reverse orientation and normal orientation, respectively.
- FIG. 6 show TFT structures in a reverse orientation and normal orientation with an added gate crossover in the normal orientation to balance any parasitic capacitance found in the reverse orientation.
- FIGS. 7 show TFT structures in a reverse orientation and normal orientation with one fewer gate crossover in the reverse orientation to match any parasitic capacitance in the normal orientation.
- FIG. 8 shows one novel pixel element design having a corner removed from the pixel to balance parasitic capacitances.
- FIG. 9 shows yet another novel pixel element design having multiple corners removed to balance parasitic capacitances.
- FIG. 10 shows yet another novel pixel structure in which at least one extra line is added to shield the pixel element from parasitic effects.
- the following implementations and embodiments disclose alternative thin film transistors for liquid crystal displays are disclosed.
- the alternative transistors can be used for panels of displays such as liquid crystal displays (LCDs), especially those having alternative pixel arrangements. These transistors can be oriented on a panel of an LCD using different, non-traditional configurations, while addressing misalignment and parasitic capacitance.
- LCDs liquid crystal displays
- FIGS. 2 and 3 provide different alternative embodiments to the prior art double TFT structure shown in FIG. 1 . These structures can provide reduced source to gate capacitance, which can cause crosstalk in certain images. However, the gate to drain crossover can lessen the damage to image quality.
- One advantage of the embodiment of FIG. 3 is that there is only one crossover 132 that may reduce parasitic capacitance.
- FIGS. 5 through 10 Another set of TFT redesigns are shown in FIGS. 5 through 10 to handle the unevenness of parasitic capacitance that might be introduced by the above described TFT remapping.
- TFTs are remapped on the panel, it is possible for some TFTs on the panel to be implemented in different corners or quadrants of a pixel area. For example, some TFTs may be constructed in the upper left hand corner of the pixel area, some in the upper right hand corner of the pixel area and so on. If all such TFTs were constructed the same way, then it would be likely that the source-drain orientation would be reversed for left hand corner and right hand corner implementation. Such non-uniformity of construction might introduce uneven parasitic capacitance in the case of a given TFT misalignment.
- FIG. 5 is one embodiment of a TFT built with a reverse orientation 502 as compared with a TFT built with a typical orientation 1904 .
- TFT 504 is constructed within the upper left hand corner of its associated pixel in the usual manner—i.e. without any crossovers to avoid any introduced parasitic capacitance. It is noted that the source (S) and drain (D) electrodes are placed in a left-to-right fashion.
- TFT 502 is shown constructed in the upper right hand corner of a pixel area in a reverse orientation—i.e. a crossover 514 from source line 1906 is constructed so that the source electrode 1910 and drain electrode 512 are also in left-to-right fashion.
- TFTs 502 and 504 will receive the same amount of added parasitic capacitance—thus, keeping the panel's defects uniform. It will be appreciated that although TFT 502 and TFT 504 are depicted side-by-side and connected to the same column, this is primarily for explanatory purposes. It is unlikely that two adjoining subpixels would share the same column/data line—thus, TFT 504 and its associated pixel is provided to show the distinction between a normal TFT orientation and TFT 502 in a reverse orientation.
- FIG. 6 shows another embodiment of TFTs 602 and 604 .
- a new crossover 606 is added to TFT 604 so as to balance the added parasitic capacitance via crossover 604 .
- FIG. 7 is yet another embodiment of TFTs 702 and 704 .
- the gate electrode crossover 606 in FIG. 6 has been removed in favor of a gate line crossover 706 which may have a lesser impact on individual pixel elements.
- FIGS. 8 and 9 are embodiments of pixel elements with corners 810 and 910 removed to match the one corner removed containing the TFT structure. These pixel elements as designed here may balance the parasitic capacitances than a normal pixel structure.
- FIG. 10 is another embodiment of a pixel structure that employs at least one extra metal line 1010 that may help to shield the pixel element from the parasitic capacitances between the gate lines and the pixel element. Additionally, if a dot inversion scheme is employed, then the opposing polarities on both lines 1010 will also help to balance any parasitic capacitance between the source lines and the pixel elements.
- the column, gate, and electrode lines can be formed of transparent material such as transparent conductive oxide so as not to degrade the optical qualities of the LCD.
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Ceramic Engineering (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
Alternative thin film transistors for liquid crystal displays are disclosed. The alternative transistors can be used for panels of displays such as liquid crystal displays (LCDs), especially those having alternative pixel arrangements. These transistors can be oriented on a panel of an LCD using different, non-traditional configurations, while addressing misalignment and parasitic capacitance.
Description
- This application is a divisional of U.S. patent application Ser. No. 10/456,794 filed on Jun. 6, 2003. This application is also related to co-owned U.S. Pat. No. 6,903,754, issued on Jun. 7, 2005, U.S. Pat. No. 7,187,353, issued on Mar. 6, 2007, U.S. Pat. No. 7,268,758, issued on Sept. 11, 2007, U.S. Pat. No. 7,397,655, issued on Jul. 8, 2008, the contents of which are herein incorporated by reference in their entirety.
- Thin-film transistor (TFT) misalignment and parasitic capacitance can degrade the quality and performance of electronic devices such as liquid crystal displays (LCDs). One known attempt to correct for TFT misalignments and any associated increase in parasitic capacitance is found in U.S. Pat. No. 5,191,451 to Katayama et at (“the ‘451 patent”).
FIG. 1A depicts the “double TFT”arrangement 100 of the ‘451 patent.Source line 104 connects to the TFT viasource electrode 106. Twogate electrodes 108 are connected togate line 102. Twodrain electrodes 110 connect to the pixel and are formed such that the twogate electrodes 108 affect conduction from the source electrode to the drain electrodes when activated. It is noted that there are twocrossover regions 112 that are connected to TFT may produce additional parasitic capacitance between the gate and the source. As discussed in the ‘451 patent, any vertical misalignment of the TFT placement is somewhat corrected by this double TFT arrangement as is discussed therein. - Another manner of reducing the ill effects of TFT misalignment is shown in U.S. Pat. No. 5,097,297 to Nakazawa (“the ‘297 patent”).
FIG. 4 depicts a TFT 400 made in the manner taught in the ‘297 patent. As may be seen inFIG. 2 ,gate line 402 delivers the gate signal togate electrode 408.Source line 404 sends image data tosource electrodes 406. When the gate electrode is activated, the image data is transferred to the pixel via thedrain electrode 410. It is noted that this TFT embodiment contains only onegate crossover 412 which aids in reducing parasitic capacitance. - Furthermore, prior LCDs use the same orientation to align transistor in the pixel area of the display. However, for alternative pixel arrangements, transistors may need to be located in unconventional locations of a pixel area, while addressing misalignment and parasitic capacitance.
- The accompanying drawings, which are incorporated in, and constitute a part of this specification illustrate exemplary implementations and embodiments of the invention and, together with the description, serve to explain principles of the invention.
-
FIG. 1 shows a prior art TFT having a double source/drain structure. -
FIGS. 2 and 3 show alternative TFTs having a double source/drain structure. -
FIG. 4 shows a prior art TFT with a double gate structure. -
FIG. 5 show TFT structures in a reverse orientation and normal orientation, respectively. -
FIG. 6 show TFT structures in a reverse orientation and normal orientation with an added gate crossover in the normal orientation to balance any parasitic capacitance found in the reverse orientation. -
FIGS. 7 show TFT structures in a reverse orientation and normal orientation with one fewer gate crossover in the reverse orientation to match any parasitic capacitance in the normal orientation. -
FIG. 8 shows one novel pixel element design having a corner removed from the pixel to balance parasitic capacitances. -
FIG. 9 shows yet another novel pixel element design having multiple corners removed to balance parasitic capacitances. -
FIG. 10 shows yet another novel pixel structure in which at least one extra line is added to shield the pixel element from parasitic effects. - Reference will now be made in detail to implementations and embodiments, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.
- The following implementations and embodiments disclose alternative thin film transistors for liquid crystal displays are disclosed. The alternative transistors can be used for panels of displays such as liquid crystal displays (LCDs), especially those having alternative pixel arrangements. These transistors can be oriented on a panel of an LCD using different, non-traditional configurations, while addressing misalignment and parasitic capacitance.
-
FIGS. 2 and 3 provide different alternative embodiments to the prior art double TFT structure shown inFIG. 1 . These structures can provide reduced source to gate capacitance, which can cause crosstalk in certain images. However, the gate to drain crossover can lessen the damage to image quality. One advantage of the embodiment ofFIG. 3 is that there is only one crossover 132 that may reduce parasitic capacitance. - Another set of TFT redesigns are shown in
FIGS. 5 through 10 to handle the unevenness of parasitic capacitance that might be introduced by the above described TFT remapping. As TFTs are remapped on the panel, it is possible for some TFTs on the panel to be implemented in different corners or quadrants of a pixel area. For example, some TFTs may be constructed in the upper left hand corner of the pixel area, some in the upper right hand corner of the pixel area and so on. If all such TFTs were constructed the same way, then it would be likely that the source-drain orientation would be reversed for left hand corner and right hand corner implementation. Such non-uniformity of construction might introduce uneven parasitic capacitance in the case of a given TFT misalignment. -
FIG. 5 is one embodiment of a TFT built with areverse orientation 502 as compared with a TFT built with a typical orientation 1904. For exemplary purposes, TFT 504 is constructed within the upper left hand corner of its associated pixel in the usual manner—i.e. without any crossovers to avoid any introduced parasitic capacitance. It is noted that the source (S) and drain (D) electrodes are placed in a left-to-right fashion. TFT 502 is shown constructed in the upper right hand corner of a pixel area in a reverse orientation—i.e. acrossover 514 from source line 1906 is constructed so that the source electrode 1910 anddrain electrode 512 are also in left-to-right fashion. Thus, if there is a TFT misalignment in the horizontal direction, then TFTs 502 and 504 will receive the same amount of added parasitic capacitance—thus, keeping the panel's defects uniform. It will be appreciated that although TFT 502 and TFT 504 are depicted side-by-side and connected to the same column, this is primarily for explanatory purposes. It is unlikely that two adjoining subpixels would share the same column/data line—thus,TFT 504 and its associated pixel is provided to show the distinction between a normal TFT orientation andTFT 502 in a reverse orientation. -
FIG. 6 shows another embodiment ofTFTs new crossover 606 is added to TFT 604 so as to balance the added parasitic capacitance viacrossover 604.FIG. 7 is yet another embodiment of TFTs 702 and 704. As may be seen here, thegate electrode crossover 606 inFIG. 6 has been removed in favor of agate line crossover 706 which may have a lesser impact on individual pixel elements. -
FIGS. 8 and 9 are embodiments of pixel elements withcorners -
FIG. 10 is another embodiment of a pixel structure that employs at least oneextra metal line 1010 that may help to shield the pixel element from the parasitic capacitances between the gate lines and the pixel element. Additionally, if a dot inversion scheme is employed, then the opposing polarities on bothlines 1010 will also help to balance any parasitic capacitance between the source lines and the pixel elements. - Regarding the alternative TFT structures and pixel elements disclosed herein, standard LCD fabrication techniques can be implemented to form such structures. Moreover, the column, gate, and electrode lines can be formed of transparent material such as transparent conductive oxide so as not to degrade the optical qualities of the LCD.
Claims (5)
1. A device having a double thin film transistor, the device comprising:
at least one drain electrode for the double thin film transistor;
a gate line having at least two gate electrodes for the double thin film transistor; and
a source line having at least one source electrode for the double thin film transistor, wherein a crossover is formed by the drain electrode and a gate line.
2. A thin film transistor comprising:
a source comprising a source electrode connected to a source line;
a gate comprising at least a first gate electrode and a second gate electrode, said first and second gate electrodes connected to a gate line;
a drain connected to said source electrode, said drain comprising at least a first drain electrode and a second drain electrode;
wherein there is at most a single crossover between said gate and said source.
3. The thin film transistor of claim 2 wherein there are at least two crossovers between said gate and said drain.
4. A device comprising a plurality of thin film transistors as recited in claim 2 .
5. A pixel comprising:
a thin film transistor, said thin film transistor connected to a gate line and a source line;
a pixel element connected to said thin film transistor; and
at least one extra metal line interposed between said gate line and said pixel element.
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US12/694,241 US20100127267A1 (en) | 2003-06-06 | 2010-01-26 | Alternative thin film transistors for liquid crystal displays |
Applications Claiming Priority (2)
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US10/456,794 US7791679B2 (en) | 2003-06-06 | 2003-06-06 | Alternative thin film transistors for liquid crystal displays |
US12/694,241 US20100127267A1 (en) | 2003-06-06 | 2010-01-26 | Alternative thin film transistors for liquid crystal displays |
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US10/456,794 Division US7791679B2 (en) | 2003-06-06 | 2003-06-06 | Alternative thin film transistors for liquid crystal displays |
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US20100127267A1 true US20100127267A1 (en) | 2010-05-27 |
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US10/456,794 Expired - Lifetime US7791679B2 (en) | 2003-06-06 | 2003-06-06 | Alternative thin film transistors for liquid crystal displays |
US12/694,241 Abandoned US20100127267A1 (en) | 2003-06-06 | 2010-01-26 | Alternative thin film transistors for liquid crystal displays |
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US (2) | US7791679B2 (en) |
KR (1) | KR101041089B1 (en) |
CN (2) | CN101488527B (en) |
TW (1) | TWI310861B (en) |
WO (1) | WO2005001800A2 (en) |
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US7268758B2 (en) | 2004-03-23 | 2007-09-11 | Clairvoyante, Inc | Transistor backplanes for liquid crystal displays comprising different sized subpixels |
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Also Published As
Publication number | Publication date |
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KR20060015736A (en) | 2006-02-20 |
CN101488527A (en) | 2009-07-22 |
US20040246393A1 (en) | 2004-12-09 |
WO2005001800A2 (en) | 2005-01-06 |
TW200528897A (en) | 2005-09-01 |
CN100472302C (en) | 2009-03-25 |
TWI310861B (en) | 2009-06-11 |
US7791679B2 (en) | 2010-09-07 |
WO2005001800A3 (en) | 2005-04-28 |
KR101041089B1 (en) | 2011-06-13 |
CN101488527B (en) | 2012-04-25 |
CN1798999A (en) | 2006-07-05 |
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STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |
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Owner name: SAMSUNG DISPLAY CO., LTD., KOREA, REPUBLIC OF Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SAMSUNG ELECTRONICS CO., LTD.;REEL/FRAME:029015/0685 Effective date: 20120904 |