US20080246857A1 - Electronic still camera - Google Patents
Electronic still camera Download PDFInfo
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- US20080246857A1 US20080246857A1 US12/153,042 US15304208A US2008246857A1 US 20080246857 A1 US20080246857 A1 US 20080246857A1 US 15304208 A US15304208 A US 15304208A US 2008246857 A1 US2008246857 A1 US 2008246857A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/21—Intermediate information storage
- H04N1/2104—Intermediate information storage for one or a few pictures
- H04N1/2112—Intermediate information storage for one or a few pictures using still video cameras
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/21—Intermediate information storage
- H04N1/2104—Intermediate information storage for one or a few pictures
- H04N1/2112—Intermediate information storage for one or a few pictures using still video cameras
- H04N1/2129—Recording in, or reproducing from, a specific memory area or areas, or recording or reproducing at a specific moment
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/21—Intermediate information storage
- H04N1/2104—Intermediate information storage for one or a few pictures
- H04N1/2112—Intermediate information storage for one or a few pictures using still video cameras
- H04N1/2137—Intermediate information storage for one or a few pictures using still video cameras with temporary storage before final recording, e.g. in a frame buffer
- H04N1/2141—Intermediate information storage for one or a few pictures using still video cameras with temporary storage before final recording, e.g. in a frame buffer in a multi-frame buffer
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/418—External card to be used in combination with the client device, e.g. for conditional access
- H04N21/4184—External card to be used in combination with the client device, e.g. for conditional access providing storage capabilities, e.g. memory stick
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- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/422—Input-only peripherals, i.e. input devices connected to specially adapted client devices, e.g. global positioning system [GPS]
- H04N21/4223—Cameras
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/433—Content storage operation, e.g. storage operation in response to a pause request, caching operations
- H04N21/4334—Recording operations
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/44—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs
- H04N21/44004—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs involving video buffer management, e.g. video decoder buffer or video display buffer
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- H04N21/80—Generation or processing of content or additional data by content creator independently of the distribution process; Content per se
- H04N21/81—Monomedia components thereof
- H04N21/8146—Monomedia components thereof involving graphical data, e.g. 3D object, 2D graphics
- H04N21/8153—Monomedia components thereof involving graphical data, e.g. 3D object, 2D graphics comprising still images, e.g. texture, background image
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- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/60—Control of cameras or camera modules
- H04N23/667—Camera operation mode switching, e.g. between still and video, sport and normal or high- and low-resolution modes
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- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
- H04N5/77—Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television camera
- H04N5/772—Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television camera the recording apparatus and the television camera being placed in the same enclosure
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/907—Television signal recording using static stores, e.g. storage tubes or semiconductor memories
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/79—Processing of colour television signals in connection with recording
- H04N9/80—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
- H04N9/804—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving pulse code modulation of the colour picture signal components
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
Definitions
- the present invention relates to an electronic still camera having a cache control function for controlling a cache in a detachable recording medium.
- Japanese Laid Open Patent Application No. H09-97199 and Japanese Laid Open Patent Application No. 2003-101969 each disclose a technology for efficiently executing data record processing and data reproduction processing by utilizing a volatile memory in a recording medium installed in a personal computer or the like.
- An electronic still camera comprise: a detection unit that detects whether or not a detachable recording medium has a cache function; and a validating unit that validates the cache function when the detection unit detects that the recording medium has the cache function.
- the electronic still camera according to the first aspect further comprises: a comparison unit that compares a first processing time length required to execute processing when the cache function is validated with a second processing time length required to execute the processing when the cache function is not validated, and in this electronic camera the validating unit validates the cache function if the first processing time length is smaller than the second processing time length.
- the electronic still camera according to the second embodiment further comprises: an arithmetic operation unit that determines through arithmetic operation the first processing time length and the second processing time length.
- the electronic still camera according to the first embodiment further comprises: an instruction unit that issues an instruction for a cache flush to the recording medium at a photographing operation completion.
- the electronic still camera according to the first embodiment further comprises: an instruction unit that issues a cache flush instruction each time a photographing operation in a single shot photographing mode completes and issues the cache flush instruction when a continuous shooting operation in a continuous shooting mode completes.
- the electronic still camera according to the first embodiment further comprises: an instruction unit that issues a cache flush instruction in synchronization with a completion of image recording processing executed to record image into the recording medium.
- the instruction unit issues the cache flush instruction after photographic information transmitted to the recording medium in immediate succession to image data, is completely recorded.
- the electronic still camera according to the first embodiment further comprises: an instruction unit that issues a cache flush instruction each time a predetermined time interval elapses.
- the electronic still camera according to the fourth embodiment further comprises: a power supply control unit that ends power supply from a camera body to the recording medium after cache flush processing executed in response to the cache flush instruction completes.
- the electronic still camera according to the first embodiment further comprises: a connection detection unit that detects a connection with an external device; and an invalidating unit that invalidates the cache function having been validated by the validating unit when the connection detection unit detects the connection with the external device.
- the electronic still camera according to the tenth embodiment further comprises: a data volume instruction unit that issues an instruction to adjust a volume of data to be transmitted to a camera body from the external device to a volume smaller than a capacity of the cache when the connection detection unit detects the connection with the external device.
- the electronic still camera according to the second embodiment further comprises: a connection detection unit that detects a connection with an external device; and an invalidating unit that invalidates the cache function having been validated by the validating unit when the connection detection unit detects the connection with the external device.
- the electronic still camera according to the twelfth embodiment further comprises: a data volume instruction unit that issues an instruction to adjust a volume of data to be transmitted to a camera body from the external device to a volume smaller than a capacity of the cache when the connection detection unit detects the connection with the external device.
- An electronic still camera comprises: a detection unit that detects whether or not a detachable recording medium has a cache function; a validating unit that validates the cache function when the detection unit detects that the recording medium has the cache function; a connection detection unit that detects a connection with an external device; and an invalidating unit that invalidates the cache function having been validated by the validating unit when the connection detection unit detects the connection with the external device.
- the processing includes transmitting data to the recoding medium and recording the transmitted data in the recording medium.
- FIG. 1 illustrates the basic structure adopted in the electronic still camera achieved in an embodiment of the present invention
- FIG. 2 is a block diagram of the electronic still camera achieved in the embodiment
- FIG. 3 presents a flowchart of the initialization processing executed to initialize the recording medium in the electronic still camera in the embodiment
- FIG. 4 presents a flowchart of the data write processing executed in the electronic still camera in the embodiment
- FIG. 5 presents a detailed flowchart of the data record processing executed in the electronic still camera in the embodiment
- FIG. 6 presents a flowchart of the processing executed in the electronic still camera when it is connected to an external device in the embodiment
- FIG. 7 is a conceptual diagram illustrating a method that may be adopted when recording data transferred from the external device into the recording medium
- FIGS. 8A and 8B are conceptual diagrams each illustrating a method that may be adopted when recording data into the recording medium, with FIG. 8A illustrating a method that does not utilize the cache memory and FIG. 8B illustrating a method that does utilize the cache memory;
- FIG. 9 shows the length of processing time required to write data transferred from the external device, the data size of which is greater than the cache memory capacity and the length of processing time required to write data from the external device, the data size of which is smaller than the cache memory capacity, in comparison to each other;
- FIGS. 10A and 10B show the lengths of processing time required when image data are transferred from the electronic still camera to the recording medium, with FIG. 10A showing the lengths of processing time required when the data are transferred in units corresponding to the sector size and FIG. 10B showing the lengths of processing time required when the data are transferred in units corresponding to the cluster size.
- FIG. 1 illustrates the basic structure adopted in an electronic still camera 100 achieved in the embodiment.
- a photographic control unit 101 captures a subject image via a CCD or the like, executes A/D conversion on the imaging data constituting the captured image and then executes image processing on the digital data.
- a recording medium control unit 102 executes recording control under which image data obtained by photographing an image or data transferred from a communication control unit 103 to be detailed later are recorded into a recording medium 110 , operational control on the recording medium 10 , power supply control and recorded image reproduction control.
- the communication control unit 103 controls communication with an external device such as a personal computer.
- a display control unit 104 controls the operating state display or image reproduction in the electronic still camera 100 .
- a power supply control unit 105 supplies power to the various units by monitoring the state of the power source.
- a system control unit 106 which includes a microcomputer and the like, executes specific arithmetic operations by using signals input thereto from the various units and outputs control signals generated based upon the arithmetic operation results to the individual units.
- the system control unit 106 is connected to the various units mentioned above.
- the recording medium 110 is a memory device such as a memory card that can be loaded into/unloaded from the electronic still camera 100 .
- the recording medium 110 includes a volatile memory 111 , a nonvolatile memory 112 and a memory system control unit 113 .
- the electronic still camera 100 supplies power to the recording medium 110 via the recording medium control unit 102 .
- the volatile memory 111 is a cache memory constituted with an SRAM, which is a high-speed memory used to hold data temporarily. While a large volume of data can be stored into the nonvolatile memory 112 constituted with a flash memory, a magnetic disk or the like, its processing speed is not as high as that of the volatile memory 111 .
- the memory system control unit 113 controls the volatile memory 111 and the nonvolatile memory 112 and writes data temporarily stored (cached) in the volatile memory 111 into the nonvolatile memory 112 as necessary.
- the cache memory 111 enters a cache ON state or a cache OFF state in response to an instruction provided by a CPU 211 (see FIG. 2 ) to be detailed later.
- the cache ON state it is allowed to function as a cache memory to enable high-speed data transfer/write operations. Namely, data transmitted from a memory 207 (see FIG. 2 ) to be described later are stored in the cache memory 111 and excess data overflowing from the cache memory 111 are recorded into the nonvolatile memory 112 .
- a cache flush is executed for the cache memory 111 in response to an instruction from the CPU 211 so as to transfer and record the data having been saved in the cache memory on a temporary basis into the nonvolatile memory 112 .
- the data are recorded into the nonvolatile memory 112 via the cache memory 111 in the cache OFF state.
- FIG. 2 is a detailed block diagram of the electronic still camera 100 assuming the basic structure shown in FIG. 1 .
- the individual units constituting the electronic still camera in FIG. 1 are described in more specific terms.
- the photographic control unit 101 includes an interchangeable lens 201 , an image sensor 202 constituted with a CCD image sensor or the like, a CCD driver 203 that controls data storage and data read at the CCD, a pre-process circuit 204 that executes signal amplification, black level adjustment and the like, an A/D converter 205 that converts analog data to digital data, an image processing unit 206 constituted with an ASIC or the like that executes image processing such as ⁇ correction and white balance adjustment and the memory 207 constituted with a buffer where image data are recorded as compressed files in the JPEG format or a DRAM which functions as a CPU program memory.
- the recording medium control unit 102 includes a card I/F 208 which functions as an interface with the detachable storage medium 110 .
- the communication control unit 103 includes a PC I/F 209 which functions as an interface with an externally connected device such as a personal computer in compliance with USB standards.
- the display control unit 104 includes a color monitor 210 constituted with an LED, an LCD or a TFT, whereas the power control unit 105 includes a power source 213 .
- the system control unit 106 includes the CPU 211 , an operation button 212 by which either a single shot mode or a continuous shooting mode is selected and the like.
- step S 11 a decision is made based upon a signal from the card I/F 208 as to whether or not the recording medium 110 is loaded. If a negative decision is made, i.e. if the recording medium 110 is judged not to be loaded, the operation waits in standby. If an affirmative decision is made, i.e., if the recording medium 110 is judged to be loaded, the operation proceeds to step S 12 .
- step S 12 power is supplied to the recording medium 110 via the card I/F 208 , and then the operation proceeds to step S 13 .
- step S 13 card information indicating the recording capacity of the recording medium 110 , the processing speed of the recording medium, whether or not the recording medium 110 is equipped with the cache memory 111 and the like is obtained via the card I/F 208 , before the operation proceeds to step S 14 .
- step S 14 a decision is made based upon the card information obtained in step S 13 as to whether or not the recording medium 110 includes the cache memory 111 . If an affirmative decision is made, i.e., if the recording medium 110 is judged to include the cache memory 111 , the operation proceeds to step S 15 .
- step S 15 a cache ON instruction signal is output to the memory system control unit 113 via the card I/F 208 , and then the operation proceeds to step S 16 .
- step S 16 an Ack signal generated in response to the cache ON instruction signal is received from the recording medium 110 via the card I/F 208 .
- An image obtained through a photographing operation is compressed into the JPEG format or the like via the CPU 211 and then the compressed image is stored into the memory 207 as image data in the electronic camera. Subsequently, the CPU 211 creates an image file by adding information indicating the photographing conditions and the like to the image data and the image file thus created is written into the recording medium 110 .
- the following is an explanation given in reference to the flowchart presented in FIG. 4 on the processing executed to write an image file recorded in the memory 207 into the recording medium 110 .
- the various processing phases in this flowchart are controlled based upon a program executed by the CPU 211 .
- the program based upon which the various processing phases in FIG. 4 are executed is stored in the memory (not shown) in the CPU 211 , and is started up as a photographing operation starts. It is assumed that the recording medium 110 has been set in the cache ON state through the initialization explained in reference to FIG. 3 .
- step S 21 the CPU 211 issues a file open instruction to the memory system control unit 113 . Consequently, a file name under which the data to be transferred are to be written is registered in the cache memory 111 . Subsequently, the operation proceeds to step S 22 .
- step S 22 an Ack signal generated by the memory system control unit 113 in response to the file open instruction is received from the memory system control unit 113 and then the operation proceeds to step S 23 .
- the Ack signal is output as soon as the file name is written in the cache memory 111 .
- step S 23 a specific image file in the memory 207 , divided into, for instance, 512-byte data units, is output to the memory system control unit 113 and the data are sequentially recorded into the recording medium 110 . Once all the data are recorded, the operation proceeds to step S 24 .
- the data record processing executed in step S 23 is to be described in detail later.
- the following explanation is provided by referring to the individual sets of data in the single image file, each constituted with 512-byte data resulting from the image file division, as data 1 , data 2 , . . . data n in the order matching the sequence through which the individual sets of data are output to the recording medium 110 .
- the CPU 211 Upon ending the image data record processing in step S 23 , the CPU 211 issues a file close instruction to the memory system control unit 113 in step S 24 and then the operation proceeds to step S 25 .
- the file close instruction equates to a photographing operation end. It is to be noted that as the file close instruction, photographing operation-related information (photographic information) such as DPOF (digital print order format) constituted with image size information, device information, recording time point information and the like, and protect information is transmitted to the memory system control unit 113 .
- photographing operation-related information photographic information
- DPOF digital print order format
- step S 25 an Ack signal output from the memory system control unit 113 is received before the operation proceeds to step S 26 . It is to be noted that this Ack signal is output as soon as the photographic information is written into the cache memory 111 .
- step S 26 a decision is made via the card I/F 208 as to whether or not the recording medium 110 is in the cache ON state. If an affirmative decision is made, i.e., if the recording medium is judged to be in the cache ON state, the operation proceeds to step S 27 . If, on the other hand, a negative decision is made, i.e., if the recording medium is judged to be in the cache OFF state, the operation proceeds to step S 23 .
- step S 27 a decision is made as to whether or not the photographic control unit 101 is engaged in a continuous shooting operation. If an affirmative decision is made, i.e., if a continuous shooting operation is judged to be in progress, the operation proceeds to step S 23 . If a negative decision is made, i.e., if it is decided that a continuous shooting operation is not underway, the operation proceeds to step S 28 .
- step S 28 a cache flush instruction signal is output to the memory system control unit 113 before the operation proceeds to step S 29 .
- the term “cache flush” is used to refer to processing executed to write all the data written in the cache memory 111 into the nonvolatile memory 112 .
- the cache flush is executed in synchronization with the photographing operation end, i.e., the image record processing end. As a result, the data having been recorded in the cache memory 111 in the overflow-cleared state are written into the nonvolatile memory 112 .
- step S 29 an Ack signal output from the memory system control unit 113 in response to the cache flush instruction signal is received and then the operation proceeds to step S 30 .
- step S 30 a decision is made as to whether or not a cache flush end signal has been input from the memory system control unit 113 . If an affirmative decision is made, i.e., if a cache flush end signal is judged to have been input, the operation proceeds to step S 31 . If a negative decision is made, on the other hand, the operation waits in standby for an input of a cache flush end signal.
- step S 31 a decision is made as to whether or not a write operation or a read operation is in progress at the recording medium 110 . If an affirmative decision is made, i.e., if it is decided that the write operation or the read operation has not ended, the operation proceeds to step S 23 . If a negative decision is made, i.e., if it is decided that the write operation or the read operation has ended, the operation proceeds to step S 32 .
- step S 32 a power supply end signal indicating that the power supply to the recording medium 110 is to end is output to the card I/F 208 .
- the card I/F 208 turns off the power supply to the recording medium 110 .
- step S 23 in FIG. 4 The data record processing executed in step S 23 in FIG. 4 is now explained in reference to FIG. 5 . It is to be noted that while an explanation is given in reference to the embodiment by assuming that the cache memory 111 has a capacity of 1536 bytes, the present invention is not limited to this example.
- step S 22 Upon receiving in step S 22 the Ack signal output from the memory system control unit 113 in response to the file open signal, the CPU 211 outputs the data 1 constituted with 512-byte data to the memory system control unit 113 in step S 231 .
- step S 331 the data 1 are input to the memory system control unit 113 , which then records the data 1 input thereto into the cache memory 111 . Once the data are recorded, the operation proceeds to step S 332 in which the memory system control unit 113 outputs an Ack signal to the CPU 211 .
- step S 233 the CPU 211 outputs the data 2 constituted with 512-byte data to the memory system control unit 113 .
- step S 333 the data 2 are input to the memory system control unit 113 , which then records the data 2 input thereto into the cache memory 111 . Once the data are recorded, the operation proceeds to step S 334 in which the memory system control unit 113 outputs an Ack signal to the CPU 211 .
- step S 234 After the CPU 211 receives the Ack signal from the memory system control unit 113 in step S 234 , the operation proceeds to step S 235 .
- step S 235 the CPU 211 outputs the data 3 constituted with 512-byte data to the memory system control unit 113 .
- step S 335 the data 3 are input to the memory system control unit 113 , which then records the data 3 input thereto into the cache memory 111 .
- the file name, the data 1 and the data 2 are already written in the cache memory 111 and if the cache memory does not have any available capacity, the memory system control unit 113 records the data 3 into the cache memory 113 as it concurrently transfers the file name to the nonvolatile memory 112 .
- the operation proceeds to step S 336 in which the memory system control unit 113 outputs an Ack signal to the CPU 211 .
- step S 24 the processing described above is repeatedly executed until the last set of data n is recorded in the cache memory 111 , the data n ⁇ 3 are written into the nonvolatile memory 112 and the memory system control unit 113 outputs an Ack signal to the CPU 211 , and the operation then proceeds to step S 24 .
- step S 41 a decision is made as to whether or not a plug IN signal output from the PC I/F 209 has been input. If a negative decision is made, i.e., if no plug IN signal has been input and thus the electronic still camera is judged not to be connected with an external device, the operation proceeds to step S 42 . If an affirmative decision is made, i.e., if a plug IN signal has been input and thus the electronic still camera is judged to be connected with an external device, the operation proceeds to step S 43 .
- step S 42 a cache ON instruction signal is output to the memory system control unit 113 via the card I/F 208 , so as to validate the cache memory 111 . Namely, the cache function is engaged.
- step S 43 a cache OFF instruction signal is output to the memory system control unit 113 via the card I/F 208 , so as to invalidate the cache memory 111 . In other words, the cache function is disengaged. It is to be noted that if the cache function is invalidated, data are temporarily stored in the cache memory 111 and the data stored in the cache memory are transferred and recorded into the nonvolatile memory 112 in response to a write command.
- Sets of data A through E in FIG. 7 are data to be transferred from the externally connected device to the recording medium 110 .
- the sizes of the individual sets of data A, B, C D and E are each smaller than a capacity of the cache memory 111 .
- the CPU 211 issues an instruction for the externally connected device via the PC I/F 209 to ensure that each set of data transferred to the recording medium 110 is smaller than the capacity of the cache memory 111 .
- the data A with a small data volume are transferred to the cache memory 111 where they are temporarily stored.
- the data A are then written into the nonvolatile memory 112 even if the cache memory 111 does not overflow.
- the externally connected device transfers the next set of data B and subsequently, the processing described above is repeatedly executed until the transfer of all the data is completed.
- the cache function of the cache memory 111 included in the detachable recording medium 110 is validated in response to an instruction issued by the CPU 211 .
- the cache function is not validated and instead, each time to data are input, the input data are written into the nonvolatile memory 112 as shown in FIG. 8A .
- the cache function is validated in the embodiment so as to write data overflowing from the cache memory 111 into the nonvolatile memory 112 while inputting data into the cache memory 111 , as shown in FIG. 8B , thereby assuring improved processing efficiency.
- a cache flush is executed for any data recorded in the cache memory 111 at the photographing operation end. Namely, while the photographing operation is in progress, a cache flush is disallowed and the data transfer to the recording medium 110 alone is executed. The cache flush is then executed only after the last set of data is transferred to the recording medium 110 . This means that the cache flush can be executed with a lighter processing load compared to the load of cache flush processing executed each time data are transferred. As a result, data can be recorded into the recording medium 110 with a high level of efficiency. (3) Any data stored in the cache memory 111 constituted with a volatile memory are lost as soon as the power supply to the recording medium 110 is turned off.
- the CPU 211 outputs the power supply end signal to end the power supply to the recording medium 110 only after a cache flush processing end signal originating from the memory system control unit 113 is input thereto.
- a cache flush processing end signal originating from the memory system control unit 113 is input thereto.
- all the photographic data can be saved reliably by ensuring that no data are lost before being recorded.
- the processing load of the cache flush processing is bound to be significant if the cache flush is executed each time a file is recorded. In particular, if the cache flush is executed in correspondence to each image file while the photographing operation in the continuous shooting mode is in progress, the continuous shooting operation is bound to be adversely affected to result in a lowered frame speed.
- the cache flush processing is executed in correspondence to each image as long as the photographing operation is executed in the single shot mode but the cache flush processing is executed only after the entire photographing operation is completed if the photographing operation is executed in the continuous shooting mode in the embodiment.
- the processing load of the cache flush processing is reduced and also, execution of the cache flush processing is not allowed to adversely affect the photographing operation.
- the cache flush processing is executed only after the file close instruction data including the photographic information such as DPOF are recorded into the cache memory 111 .
- the information needed when printing the image can be reliably recorded into the recording medium 110 .
- An externally connected device such as a personal computer transfers data by dividing the data into smaller data units and thus, the data sizes of the individual sets of data transferred from the personal computer are bound to be small. For this reason, the overhead of the cache flush processing is bound to be significant if the cache memory stays in the cache ON state. Accordingly, the cache is turned off when an external device such as a personal computer is connected to the electronic still camera, so as to completely eliminate the overhead related to the cache flush processing.
- the cache memory 111 is set in the cache OFF state when an external device such as a personal computer is connected to the electronic still camera and transfer data are divided into data units with data volumes smaller than the capacity of the cache memory 110 for the data transfer under these circumstances.
- sets of data resulting from the division and transferred to the recording medium are temporarily stored into the cache memory 111 .
- only a single write processing session needs to be executed for each set of data among sets of data a, b and c assuming data sizes smaller than the capacity of the cache memory 111 and thus, a total of only three write processing sessions needs to be executed for the entire data, as shown in FIG. 9 .
- sets of data A and B with matching data sizes, resulting from data division and transferred to the recording medium each require two write processing sessions, as illustrated in FIG. 9 .
- the data A need to be written through two write processing sessions, one for data A 1 and the other for data A 2 and likewise, the data B need to be written through two write processing sessions, one for data B 1 and the other for data B 2 .
- a total of four write processing sessions must be executed for the entire data.
- the length of time required to process the entire transfer data to be transferred may be shortened to improve the processing speed by transferring the data in the divided smaller data units with a data volumes smaller than the capacity of the cache memory 111 .
- the electronic still camera achieved in the embodiment described above allows for the following variations (1) through (6).
- the length of time required for the processing may be reduced by invalidating the cache function rather than by validating the cache function. Accordingly, if it is decided during the initialization processing executed for the recording medium 110 that the write processing at the nonvolatile memory 112 can be executed at higher speed than the write processing at the cache memory 111 in the recording medium 110 , the CPU 211 may turn off the cache function. The processing executed under these circumstances is now explained.
- Image data with a data size L recorded in the memory 207 of the electronic still camera 100 are divided into data units matching specific write units S with which data are written in the recording medium 110 and the image data are thus transferred in the data units to the recording medium 110 by the CPU 211 .
- the write units S may correspond to, for instance, the write sector size assumed at the recording medium 110 .
- the CPU 211 transfers n sets of data with the sector size S in succession through a single transfer processing session.
- the n sets of data with the sector size S transferred through this transfer processing session may be regarded as a single group of data, and the data size of such a group of data may be referred to as a cluster size.
- M representing the cluster size may be expressed as follows.
- the data size L of the image data can be expressed as follows.
- n is determined to be 256.
- the lengths of processing time required when the CPU 211 transfers and records data with the sector size S into the specific recording medium 110 are explained in reference to FIG. 10A .
- the length of time required to write the data with the sector size S into the nonvolatile memory 111 in the recording medium 110 is a in the cache OFF state.
- the length of processing time d required to write the data with the sector size S into the cache memory 112 in the recording medium 110 and execute the cache flush for the cache memory 112 in the cache ON state is expressed as in (3) below.
- time b is the length of time required when writing the data into the cache memory 111 and the time c is the length of time required to execute the cache flush, i.e., the length of time required when writing the data present in the cache memory 111 into the nonvolatile memory 112 .
- the length of time b required when writing the data into the cache memory 111 in the cache ON state is smaller than the length of time “a” required to write the data into the nonvolatile memory 112 in the cache OFF state.
- the overall processing time in the cache ON state includes the length of time c required to flush the cache memory 111 . Accordingly, the total length of time required to process a single set of data assuming the sector size S increases by a time length x when the data are transferred in the cache ON state. This is by no means a universal phenomenon that occurs in all recording media 110 , but a phenomenon that occurs only in some specific recording media 110 . In other words, the camera is able to ascertain whether or not the recording medium 110 loaded therein is prone to the phenomenon described above by recognizing the type of recording medium 110 .
- the lengths of processing time required when the CPU 211 transfers and records in succession data assuming the cluster size M i.e., when the CPU 211 transfers and records 256 sets of data with a sector size S are explained.
- the length of time T 1 required to write data with the cluster size M into the nonvolatile memory 112 in the cache OFF state is expressed as follows.
- the length of time T 2 required to write data with a cluster size M into the cache memory 111 in the cache ON state is expressed as follows.
- the length of processing time required to write a single set of data with the sector size S is smaller in the cache ON state than in the cache OFF state.
- a single set of data with the cluster size M can be written over a smaller length of time in the cache ON state, as shown in FIG. 10B .
- the cache ON state or the cache OFF state can be determined to be the state in which the data can be written over a smaller length of time.
- the length of time a required when writing data into the nonvolatile memory 112 in the cache OFF state, the length of time b required when writing data into the cache memory 111 in the cache ON state and the length of time c required for the cache flush processing mentioned above each assume a value determined in correspondence to the characteristics of the cache memory 111 and the nonvolatile memory 112 .
- the data write time lengths a and b and the flush time length c are all recorded into a ROM, a NAND memory or the like (not shown) when the recording medium 110 is manufactured.
- the CPU 211 reads out the data write time lengths a and b and the flush time length c from the system control unit 113 .
- the CPU 211 compares the time length T 1 with the time length T 2 calculated as expressed in (4) and (5). If the comparison results indicate that the time length T 1 is greater than the time length T 2 , i.e., if it is decided that the data write processing can be executed faster in the cache ON state than in the cache OFF state, the CPU 211 validates the cache memory 111 in the recording medium 110 .
- the time length T 1 is judged to be equal to or less than the time length T 2 , the length of time required for the data write processing will be greater in the cache ON state than in the cache OFF state. Accordingly, the CPU 211 does not validate the cache memory 111 in the recording medium 110 .
- the time lengths T 1 and T 2 required when processing image data assuming the cluster size M may be recorded.
- the CPU 211 is able to determine whether the write processing can be executed faster in the cache ON state or in the cache OFF state without having to calculate the time lengths T 1 and T 2 .
- the image data may be divided into data portions each corresponding to the minimum transfer unit P by the electronic still camera 100 for purposes of data transfer irrespective of the sector size S assumed in the recording medium 110 . In such a case, during the initialization processing executed for the recording medium 110 , the CPU 211 transfers image data with a data volume matching the minimum transfer unit P from the memory 207 to the recording medium 110 to measure the length of time required for the write processing.
- the write processing time measurement mentioned above is now described in further detail.
- the CPU 211 sets the recording medium 110 in the cache OFF state and transfers image data with a data volume matching the minimum transfer unit P to the cache memory 111 .
- the CPU 211 measures the length of time required to write the transferred image data into the nonvolatile memory 112 .
- the length of time thus measured is the data write time length a.
- the CPU 211 sets the recording medium 110 in the cache ON state, transfers a single set of image data corresponding to the minimum transfer unit P to the cache memory 111 , flushes the cache memory 111 and measures the length of time d required to write the data into the nonvolatile memory 112 .
- the CPU 211 transfers n sets of image data each corresponding to the minimum transfer unit P to the cache memory 111 , flushes the cache memory 111 and measures the length of time e required to write the n sets of data into the nonvolatile memory 112 . Subsequently, the CPU 211 calculates the flush time length c as expressed below.
- the CPU 211 calculates the data write time length b required to write data into the cache memory 111 , as expressed below.
- the CPU 211 records the data write time length a measured as described above and the data write time length b and the flush time length c calculated based upon the measurement results into a specific recording area within the CPU 211 or into a specific recording area in the recording medium 110 . Subsequently, the CPU 211 references these time lengths a, b and c whenever it needs to determine whether to set the recording medium 110 in the cache ON state or in the cache OFF state.
- the CPU 211 may measure the time lengths T 1 and T 2 required to write image data assuming the cluster size M as it records the image data into the recording medium 110 . In such a case, the CPU 211 transfers a first set of image data to the recording medium 110 in the cache OFF state and measures the length of time T 1 required to write the image data assuming the cluster size M. The CPU 211 then transfers a second set of image data to the recording medium 110 in the cache ON state and measures the length of time T 2 required to write image data assuming the cluster size M. The CPU 211 compares the time length T 1 with the time length T 2 both obtained through the measurement and selects either the cache ON state or the cache OFF state.
- the CPU 211 sets the recording medium 110 in the cache OFF state, whereas if the time length T 2 indicates a smaller value, the CPU 211 selects the cache ON state for the recording medium 110 .
- a third set of image data and subsequent sets of image data are then transferred to the recording medium in the selected state.
- the CPU 211 may record state information indicating the setting state selected for the recording medium 110 into a specific recording area in the CPU 211 or the recording medium 110 . Once the state information is recorded as described above, the CPU 211 only needs to read out the state information having been recorded and indicate either the cache ON state or the cache OFF state to the recording medium 110 whenever the same recording medium 110 is subsequently loaded into the electronic still camera 100 . In other words, the CPU 211 does not need to re-execute the time measurement or the time length comparison multiple times.
- the time lengths T 1 and T 2 may be measured as described below by switching from the cache OFF state to the cache ON state while the CPU 211 transfers image data to the recording medium 110 . Namely, the CPU 211 transfers a first set of image data assuming the cluster size M to the recording medium 110 in the cache OFF state, writes the image data into the nonvolatile memory 112 and measures the time length T 1 . The CPU 211 then switches the recording medium 110 to the cache ON state, transfers a second set of image data assuming the cluster size M to the recording medium and measures the time length T 2 representing the total sum of the data write time length required to write data into the cache memory 111 and the cache flush time length.
- the CPU 211 compares the time length T 1 with the time length T 2 both obtained through the measurement and determines whether to transfer a third set of image data and subsequent sets of image data each assuming the cluster size M in the cache OFF state or in the cache ON state. Namely, if the time length T 1 indicates a smaller value, the CPU 211 sets the recording medium 110 in the cache OFF state, whereas if the time length T 2 indicates a smaller value, the CPU 211 selects the cache ON state for the recording medium 110 . The third set of image data and subsequent sets of image data each assuming the cluster size M are then transferred to the recording medium 110 in the selected state.
- the CPU 211 may constantly output the cache flush instruction signal over predetermined regular intervals while the photographing sequence is not in progress. It is to be noted that the CPU 211 should output the cache flush instruction signal without allowing the regular interval to elapse if disengagement of the recording medium 110 is detected. These measures ensure that all the photographic data are reliably saved by preventing any data from remaining unrecorded due to a disconnection of the recording medium 110 from the electronic camera by the user before the CPU 211 issues the cache flush instruction following a photographing end.
- the extraction of the recording medium 110 may be detected by a detection mechanism such as a switch provided to detect an opening operation of, for instance, the card insertion slot cover (card lid) (not shown).
- the CPU 211 may output the cache flush instruction signal if transfer processing for transferring image data to the recording medium 110 is not executed for a predetermined length time following the image data transfer processing.
- the CPU 211 may output the cache flush instruction signal upon detecting disengagement of the recording medium 110 . It is to be noted that if the electronic still camera 100 is in the power off state, the CPU 211 should turn on the power to the electronic still camera 100 upon detecting disengagement of the recording medium 110 , i.e., upon detecting an opening operation of the card lid. The CPU 211 should then output the cache flush instruction signal to the recording medium 110 .
- the present convention is not limited to the embodiment described above and allows for any other mode of implementation within the scope of the technical teachings of the present convention.
- the electronic camera does not need to have all the functions described above.
- An electronic camera capable of executing the initialization shown in FIG. 3 alone, the processing shown in FIGS. 3 , 4 and 5 alone, or the processing shown in FIG. 6 alone, too, may embody the present convention.
Abstract
An electronic still camera includes: a detection unit that detects whether or not a detachable recording medium has a cache function; and a validating unit that validates the cache function when the detection unit detects that the recording medium has the cache function.
Description
- This application is a continuation of International Application No. PCT/JP 2006/322848 filed Nov. 16, 2006
- The disclosures of the following applications are herein incorporated by reference:
- Japanese Patent Application No. 2005-331687 filed Nov. 16, 2005
- International Application No. PCT/JP 2006/322848 filed Nov. 16, 2006
- 1. Field of the Invention
- The present invention relates to an electronic still camera having a cache control function for controlling a cache in a detachable recording medium.
- 2. Description of Related Art
- There are recording media known in the related art having a cache function engaged in conjunction with a volatile memory installed therein so as to assure efficient data record processing. Japanese Laid Open Patent Application No. H09-97199 and Japanese Laid Open Patent Application No. 2003-101969 each disclose a technology for efficiently executing data record processing and data reproduction processing by utilizing a volatile memory in a recording medium installed in a personal computer or the like.
- However, the function of the volatile memory in a detachable recording medium (portable recording medium) loaded in an electronic still camera is not utilized to the maximum advantage.
- An electronic still camera according to the first embodiment of the invention comprise: a detection unit that detects whether or not a detachable recording medium has a cache function; and a validating unit that validates the cache function when the detection unit detects that the recording medium has the cache function.
- According to the second aspect of the invention, it is preferred that the electronic still camera according to the first aspect further comprises: a comparison unit that compares a first processing time length required to execute processing when the cache function is validated with a second processing time length required to execute the processing when the cache function is not validated, and in this electronic camera the validating unit validates the cache function if the first processing time length is smaller than the second processing time length.
- According to the third embodiment of the invention, it is preferred that the electronic still camera according to the second embodiment further comprises: an arithmetic operation unit that determines through arithmetic operation the first processing time length and the second processing time length.
- According to the fourth embodiment of the invention, it is preferred that the electronic still camera according to the first embodiment further comprises: an instruction unit that issues an instruction for a cache flush to the recording medium at a photographing operation completion.
- According to the fifth embodiment of the invention, it is preferred that the electronic still camera according to the first embodiment further comprises: an instruction unit that issues a cache flush instruction each time a photographing operation in a single shot photographing mode completes and issues the cache flush instruction when a continuous shooting operation in a continuous shooting mode completes.
- According to the sixth embodiment of the invention, it is preferred that the electronic still camera according to the first embodiment further comprises: an instruction unit that issues a cache flush instruction in synchronization with a completion of image recording processing executed to record image into the recording medium.
- According to the seventh embodiment of the invention, it is preferred that in the electronic still camera according to the sixth embodiment, the instruction unit issues the cache flush instruction after photographic information transmitted to the recording medium in immediate succession to image data, is completely recorded.
- According to the eighth embodiment of the invention, it is preferred that the electronic still camera according to the first embodiment further comprises: an instruction unit that issues a cache flush instruction each time a predetermined time interval elapses.
- According to the ninth embodiment of the invention, it is preferred that the electronic still camera according to the fourth embodiment further comprises: a power supply control unit that ends power supply from a camera body to the recording medium after cache flush processing executed in response to the cache flush instruction completes.
- According to the tenth embodiment of the invention, it is preferred that the electronic still camera according to the first embodiment further comprises: a connection detection unit that detects a connection with an external device; and an invalidating unit that invalidates the cache function having been validated by the validating unit when the connection detection unit detects the connection with the external device.
- According to the eleventh embodiment of the invention, it is preferred that the electronic still camera according to the tenth embodiment further comprises: a data volume instruction unit that issues an instruction to adjust a volume of data to be transmitted to a camera body from the external device to a volume smaller than a capacity of the cache when the connection detection unit detects the connection with the external device.
- According to the twelfth embodiment of the invention, it is preferred that the electronic still camera according to the second embodiment further comprises: a connection detection unit that detects a connection with an external device; and an invalidating unit that invalidates the cache function having been validated by the validating unit when the connection detection unit detects the connection with the external device.
- According to the thirteenth embodiment of the invention, it is preferred that the electronic still camera according to the twelfth embodiment further comprises: a data volume instruction unit that issues an instruction to adjust a volume of data to be transmitted to a camera body from the external device to a volume smaller than a capacity of the cache when the connection detection unit detects the connection with the external device.
- An electronic still camera according to the fourteenth embodiment of the invention comprises: a detection unit that detects whether or not a detachable recording medium has a cache function; a validating unit that validates the cache function when the detection unit detects that the recording medium has the cache function; a connection detection unit that detects a connection with an external device; and an invalidating unit that invalidates the cache function having been validated by the validating unit when the connection detection unit detects the connection with the external device.
- According to the fifteenth embodiment of the present invention, it is preferred that in the electronic still camera according to the second invention, the processing includes transmitting data to the recoding medium and recording the transmitted data in the recording medium.
-
FIG. 1 illustrates the basic structure adopted in the electronic still camera achieved in an embodiment of the present invention; -
FIG. 2 is a block diagram of the electronic still camera achieved in the embodiment; -
FIG. 3 presents a flowchart of the initialization processing executed to initialize the recording medium in the electronic still camera in the embodiment; -
FIG. 4 presents a flowchart of the data write processing executed in the electronic still camera in the embodiment; -
FIG. 5 presents a detailed flowchart of the data record processing executed in the electronic still camera in the embodiment; -
FIG. 6 presents a flowchart of the processing executed in the electronic still camera when it is connected to an external device in the embodiment; -
FIG. 7 is a conceptual diagram illustrating a method that may be adopted when recording data transferred from the external device into the recording medium; -
FIGS. 8A and 8B are conceptual diagrams each illustrating a method that may be adopted when recording data into the recording medium, withFIG. 8A illustrating a method that does not utilize the cache memory andFIG. 8B illustrating a method that does utilize the cache memory; -
FIG. 9 shows the length of processing time required to write data transferred from the external device, the data size of which is greater than the cache memory capacity and the length of processing time required to write data from the external device, the data size of which is smaller than the cache memory capacity, in comparison to each other; and -
FIGS. 10A and 10B show the lengths of processing time required when image data are transferred from the electronic still camera to the recording medium, withFIG. 10A showing the lengths of processing time required when the data are transferred in units corresponding to the sector size andFIG. 10B showing the lengths of processing time required when the data are transferred in units corresponding to the cluster size. - In reference to
FIGS. 1 through 5 , an embodiment achieved by adopting the present invention in a camera is described.FIG. 1 illustrates the basic structure adopted in an electronicstill camera 100 achieved in the embodiment. Aphotographic control unit 101 captures a subject image via a CCD or the like, executes A/D conversion on the imaging data constituting the captured image and then executes image processing on the digital data. A recordingmedium control unit 102 executes recording control under which image data obtained by photographing an image or data transferred from acommunication control unit 103 to be detailed later are recorded into arecording medium 110, operational control on the recording medium 10, power supply control and recorded image reproduction control. Thecommunication control unit 103 controls communication with an external device such as a personal computer. Adisplay control unit 104 controls the operating state display or image reproduction in the electronicstill camera 100. A powersupply control unit 105 supplies power to the various units by monitoring the state of the power source. Asystem control unit 106, which includes a microcomputer and the like, executes specific arithmetic operations by using signals input thereto from the various units and outputs control signals generated based upon the arithmetic operation results to the individual units. Thesystem control unit 106 is connected to the various units mentioned above. - The
recording medium 110 is a memory device such as a memory card that can be loaded into/unloaded from the electronicstill camera 100. Therecording medium 110 includes avolatile memory 111, anonvolatile memory 112 and a memorysystem control unit 113. The electronicstill camera 100 supplies power to therecording medium 110 via the recordingmedium control unit 102. Thevolatile memory 111 is a cache memory constituted with an SRAM, which is a high-speed memory used to hold data temporarily. While a large volume of data can be stored into thenonvolatile memory 112 constituted with a flash memory, a magnetic disk or the like, its processing speed is not as high as that of thevolatile memory 111. The memorysystem control unit 113 controls thevolatile memory 111 and thenonvolatile memory 112 and writes data temporarily stored (cached) in thevolatile memory 111 into thenonvolatile memory 112 as necessary. - The
cache memory 111 enters a cache ON state or a cache OFF state in response to an instruction provided by a CPU 211 (seeFIG. 2 ) to be detailed later. In the cache ON state, it is allowed to function as a cache memory to enable high-speed data transfer/write operations. Namely, data transmitted from a memory 207 (seeFIG. 2 ) to be described later are stored in thecache memory 111 and excess data overflowing from thecache memory 111 are recorded into thenonvolatile memory 112. Once there is no more data overflow at thecache memory 111, a cache flush is executed for thecache memory 111 in response to an instruction from theCPU 211 so as to transfer and record the data having been saved in the cache memory on a temporary basis into thenonvolatile memory 112. Each time data originating from thememory 207 are received, the data are recorded into thenonvolatile memory 112 via thecache memory 111 in the cache OFF state. -
FIG. 2 is a detailed block diagram of theelectronic still camera 100 assuming the basic structure shown inFIG. 1 . In reference toFIG. 2 , the individual units constituting the electronic still camera inFIG. 1 are described in more specific terms. - The
photographic control unit 101 includes aninterchangeable lens 201, animage sensor 202 constituted with a CCD image sensor or the like, aCCD driver 203 that controls data storage and data read at the CCD, apre-process circuit 204 that executes signal amplification, black level adjustment and the like, an A/D converter 205 that converts analog data to digital data, animage processing unit 206 constituted with an ASIC or the like that executes image processing such as γ correction and white balance adjustment and thememory 207 constituted with a buffer where image data are recorded as compressed files in the JPEG format or a DRAM which functions as a CPU program memory. - The recording
medium control unit 102 includes a card I/F 208 which functions as an interface with thedetachable storage medium 110. Thecommunication control unit 103 includes a PC I/F 209 which functions as an interface with an externally connected device such as a personal computer in compliance with USB standards. Thedisplay control unit 104 includes acolor monitor 210 constituted with an LED, an LCD or a TFT, whereas thepower control unit 105 includes apower source 213. In addition, thesystem control unit 106 includes theCPU 211, anoperation button 212 by which either a single shot mode or a continuous shooting mode is selected and the like. - —Initialization Processing—
- In reference to the flowchart presented in
FIG. 3 , the initialization processing executed by theCPU 211 to initialize therecording medium 110 is explained. A program based upon which the individual phases of the processing inFIG. 3 are executed is stored in a memory (not shown) within theCPU 211 and the program is started up as a power ON signal is input. - In step S11, a decision is made based upon a signal from the card I/
F 208 as to whether or not therecording medium 110 is loaded. If a negative decision is made, i.e. if therecording medium 110 is judged not to be loaded, the operation waits in standby. If an affirmative decision is made, i.e., if therecording medium 110 is judged to be loaded, the operation proceeds to step S12. - In step S12, power is supplied to the
recording medium 110 via the card I/F 208, and then the operation proceeds to step S13. In step S13, card information indicating the recording capacity of therecording medium 110, the processing speed of the recording medium, whether or not therecording medium 110 is equipped with thecache memory 111 and the like is obtained via the card I/F 208, before the operation proceeds to step S14. - In step S14, a decision is made based upon the card information obtained in step S13 as to whether or not the
recording medium 110 includes thecache memory 111. If an affirmative decision is made, i.e., if therecording medium 110 is judged to include thecache memory 111, the operation proceeds to step S15. - In step S15, a cache ON instruction signal is output to the memory
system control unit 113 via the card I/F 208, and then the operation proceeds to step S16. In step S16, an Ack signal generated in response to the cache ON instruction signal is received from therecording medium 110 via the card I/F 208. Once the processing in step S16 is completed, the initialization processing for therecording medium 110 ends. It is to be noted that if a negative decision is made in step S14, i.e., if therecording medium 110 is judged not to include thecache memory 111, the initialization processing for therecording medium 110 ends without executing steps S15 and S16. - —Image File Record Processing—
- An image obtained through a photographing operation is compressed into the JPEG format or the like via the
CPU 211 and then the compressed image is stored into thememory 207 as image data in the electronic camera. Subsequently, theCPU 211 creates an image file by adding information indicating the photographing conditions and the like to the image data and the image file thus created is written into therecording medium 110. - The following is an explanation given in reference to the flowchart presented in
FIG. 4 on the processing executed to write an image file recorded in thememory 207 into therecording medium 110. The various processing phases in this flowchart, too, are controlled based upon a program executed by theCPU 211. The program based upon which the various processing phases inFIG. 4 are executed is stored in the memory (not shown) in theCPU 211, and is started up as a photographing operation starts. It is assumed that therecording medium 110 has been set in the cache ON state through the initialization explained in reference toFIG. 3 . - In step S21, the
CPU 211 issues a file open instruction to the memorysystem control unit 113. Consequently, a file name under which the data to be transferred are to be written is registered in thecache memory 111. Subsequently, the operation proceeds to step S22. - In step S22, an Ack signal generated by the memory
system control unit 113 in response to the file open instruction is received from the memorysystem control unit 113 and then the operation proceeds to step S23. The Ack signal is output as soon as the file name is written in thecache memory 111. - In step S23, a specific image file in the
memory 207, divided into, for instance, 512-byte data units, is output to the memorysystem control unit 113 and the data are sequentially recorded into therecording medium 110. Once all the data are recorded, the operation proceeds to step S24. It is to be noted that the data record processing executed in step S23 is to be described in detail later. In addition, the following explanation is provided by referring to the individual sets of data in the single image file, each constituted with 512-byte data resulting from the image file division, asdata 1,data 2, . . . data n in the order matching the sequence through which the individual sets of data are output to therecording medium 110. - Upon ending the image data record processing in step S23, the
CPU 211 issues a file close instruction to the memorysystem control unit 113 in step S24 and then the operation proceeds to step S25. The file close instruction equates to a photographing operation end. It is to be noted that as the file close instruction, photographing operation-related information (photographic information) such as DPOF (digital print order format) constituted with image size information, device information, recording time point information and the like, and protect information is transmitted to the memorysystem control unit 113. - In step S25, an Ack signal output from the memory
system control unit 113 is received before the operation proceeds to step S26. It is to be noted that this Ack signal is output as soon as the photographic information is written into thecache memory 111. - In step S26, a decision is made via the card I/
F 208 as to whether or not therecording medium 110 is in the cache ON state. If an affirmative decision is made, i.e., if the recording medium is judged to be in the cache ON state, the operation proceeds to step S27. If, on the other hand, a negative decision is made, i.e., if the recording medium is judged to be in the cache OFF state, the operation proceeds to step S23. - In step S27, a decision is made as to whether or not the
photographic control unit 101 is engaged in a continuous shooting operation. If an affirmative decision is made, i.e., if a continuous shooting operation is judged to be in progress, the operation proceeds to step S23. If a negative decision is made, i.e., if it is decided that a continuous shooting operation is not underway, the operation proceeds to step S28. - In step S28, a cache flush instruction signal is output to the memory
system control unit 113 before the operation proceeds to step S29. The term “cache flush” is used to refer to processing executed to write all the data written in thecache memory 111 into thenonvolatile memory 112. The cache flush is executed in synchronization with the photographing operation end, i.e., the image record processing end. As a result, the data having been recorded in thecache memory 111 in the overflow-cleared state are written into thenonvolatile memory 112. - In step S29, an Ack signal output from the memory
system control unit 113 in response to the cache flush instruction signal is received and then the operation proceeds to step S30. - In step S30, a decision is made as to whether or not a cache flush end signal has been input from the memory
system control unit 113. If an affirmative decision is made, i.e., if a cache flush end signal is judged to have been input, the operation proceeds to step S31. If a negative decision is made, on the other hand, the operation waits in standby for an input of a cache flush end signal. - In step S31, a decision is made as to whether or not a write operation or a read operation is in progress at the
recording medium 110. If an affirmative decision is made, i.e., if it is decided that the write operation or the read operation has not ended, the operation proceeds to step S23. If a negative decision is made, i.e., if it is decided that the write operation or the read operation has ended, the operation proceeds to step S32. - In step S32, a power supply end signal indicating that the power supply to the
recording medium 110 is to end is output to the card I/F 208. As a result, the card I/F 208 turns off the power supply to therecording medium 110. - The data record processing executed in step S23 in
FIG. 4 is now explained in reference toFIG. 5 . It is to be noted that while an explanation is given in reference to the embodiment by assuming that thecache memory 111 has a capacity of 1536 bytes, the present invention is not limited to this example. - Upon receiving in step S22 the Ack signal output from the memory
system control unit 113 in response to the file open signal, theCPU 211 outputs thedata 1 constituted with 512-byte data to the memorysystem control unit 113 in step S231. - In step S331, the
data 1 are input to the memorysystem control unit 113, which then records thedata 1 input thereto into thecache memory 111. Once the data are recorded, the operation proceeds to step S332 in which the memorysystem control unit 113 outputs an Ack signal to theCPU 211. - After the
CPU 211 receives the Ack signal from the memorysystem control unit 113 in step S232, the operation proceeds to step S233. In step S233, theCPU 211 outputs thedata 2 constituted with 512-byte data to the memorysystem control unit 113. - In step S333, the
data 2 are input to the memorysystem control unit 113, which then records thedata 2 input thereto into thecache memory 111. Once the data are recorded, the operation proceeds to step S334 in which the memorysystem control unit 113 outputs an Ack signal to theCPU 211. - After the
CPU 211 receives the Ack signal from the memorysystem control unit 113 in step S234, the operation proceeds to step S235. In step S235, theCPU 211 outputs thedata 3 constituted with 512-byte data to the memorysystem control unit 113. - In step S335, the
data 3 are input to the memorysystem control unit 113, which then records thedata 3 input thereto into thecache memory 111. By this time, the file name, thedata 1 and thedata 2 are already written in thecache memory 111 and if the cache memory does not have any available capacity, the memorysystem control unit 113 records thedata 3 into thecache memory 113 as it concurrently transfers the file name to thenonvolatile memory 112. Namely, as a data overflow occurs at thecache memory 111, data are written into thenonvolatile memory 112. Once thedata 1 are written into thenonvolatile memory 112, the operation proceeds to step S336 in which the memorysystem control unit 113 outputs an Ack signal to theCPU 211. - Subsequently, the processing described above is repeatedly executed until the last set of data n is recorded in the
cache memory 111, the data n−3 are written into thenonvolatile memory 112 and the memorysystem control unit 113 outputs an Ack signal to theCPU 211, and the operation then proceeds to step S24. - —External Device Connection—
- Next, the processing executed when the electronic still camera is connected to an external device such as a personal computer or a wireless LAN via the PC I/
F 209 is explained in reference to the flowchart presented inFIG. 6 . It is to be noted that the processing shown in this flowchart, too, is controlled based upon a program executed by theCPU 211. The program based upon which the individual processing phases inFIG. 6 are executed is stored in the memory (not shown) in theCPU 211 and is started up as a power ON signal is input. - In step S41, a decision is made as to whether or not a plug IN signal output from the PC I/
F 209 has been input. If a negative decision is made, i.e., if no plug IN signal has been input and thus the electronic still camera is judged not to be connected with an external device, the operation proceeds to step S42. If an affirmative decision is made, i.e., if a plug IN signal has been input and thus the electronic still camera is judged to be connected with an external device, the operation proceeds to step S43. - In step S42, a cache ON instruction signal is output to the memory
system control unit 113 via the card I/F 208, so as to validate thecache memory 111. Namely, the cache function is engaged. In step S43, a cache OFF instruction signal is output to the memorysystem control unit 113 via the card I/F 208, so as to invalidate thecache memory 111. In other words, the cache function is disengaged. It is to be noted that if the cache function is invalidated, data are temporarily stored in thecache memory 111 and the data stored in the cache memory are transferred and recorded into thenonvolatile memory 112 in response to a write command. - The procedure through which an image file originating from an externally connected device is recorded into the
recording medium 110 in the cache OFF state is now explained in reference toFIG. 7 . - Sets of data A through E in
FIG. 7 are data to be transferred from the externally connected device to therecording medium 110. The sizes of the individual sets of data A, B, C D and E are each smaller than a capacity of thecache memory 111. Namely, theCPU 211 issues an instruction for the externally connected device via the PC I/F 209 to ensure that each set of data transferred to therecording medium 110 is smaller than the capacity of thecache memory 111. The data A with a small data volume, are transferred to thecache memory 111 where they are temporarily stored. The data A are then written into thenonvolatile memory 112 even if thecache memory 111 does not overflow. As theCPU 211 reports to the externally connected device via the PC I/F 209 that the write of the data A into thenonvolatile memory 112 has been completed, the externally connected device transfers the next set of data B and subsequently, the processing described above is repeatedly executed until the transfer of all the data is completed. - The following advantages are achieved in the electronic still camera in the embodiment described above.
- (1) The cache function of the
cache memory 111 included in thedetachable recording medium 110 is validated in response to an instruction issued by theCPU 211. In the related art, even if therecording medium 110 loaded into a camera or the like includes acache memory 111, the cache function is not validated and instead, each time to data are input, the input data are written into thenonvolatile memory 112 as shown inFIG. 8A . In contrast, the cache function is validated in the embodiment so as to write data overflowing from thecache memory 111 into thenonvolatile memory 112 while inputting data into thecache memory 111, as shown inFIG. 8B , thereby assuring improved processing efficiency.
(2) A cache flush is executed for any data recorded in thecache memory 111 at the photographing operation end. Namely, while the photographing operation is in progress, a cache flush is disallowed and the data transfer to therecording medium 110 alone is executed. The cache flush is then executed only after the last set of data is transferred to therecording medium 110. This means that the cache flush can be executed with a lighter processing load compared to the load of cache flush processing executed each time data are transferred. As a result, data can be recorded into therecording medium 110 with a high level of efficiency.
(3) Any data stored in thecache memory 111 constituted with a volatile memory are lost as soon as the power supply to therecording medium 110 is turned off. In the embodiment, theCPU 211 outputs the power supply end signal to end the power supply to therecording medium 110 only after a cache flush processing end signal originating from the memorysystem control unit 113 is input thereto. As a result, all the photographic data can be saved reliably by ensuring that no data are lost before being recorded.
(4) While image data for a single image are recorded as a file into therecording medium 110 in theelectronic still camera 100, the processing load of the cache flush processing is bound to be significant if the cache flush is executed each time a file is recorded. In particular, if the cache flush is executed in correspondence to each image file while the photographing operation in the continuous shooting mode is in progress, the continuous shooting operation is bound to be adversely affected to result in a lowered frame speed. Accordingly, the cache flush processing is executed in correspondence to each image as long as the photographing operation is executed in the single shot mode but the cache flush processing is executed only after the entire photographing operation is completed if the photographing operation is executed in the continuous shooting mode in the embodiment. Thus, the processing load of the cache flush processing is reduced and also, execution of the cache flush processing is not allowed to adversely affect the photographing operation.
(5) The cache flush processing is executed only after the file close instruction data including the photographic information such as DPOF are recorded into thecache memory 111. Thus, the information needed when printing the image can be reliably recorded into therecording medium 110.
(6) An externally connected device such as a personal computer transfers data by dividing the data into smaller data units and thus, the data sizes of the individual sets of data transferred from the personal computer are bound to be small. For this reason, the overhead of the cache flush processing is bound to be significant if the cache memory stays in the cache ON state. Accordingly, the cache is turned off when an external device such as a personal computer is connected to the electronic still camera, so as to completely eliminate the overhead related to the cache flush processing.
(7) Thecache memory 111 is set in the cache OFF state when an external device such as a personal computer is connected to the electronic still camera and transfer data are divided into data units with data volumes smaller than the capacity of thecache memory 110 for the data transfer under these circumstances. In the cache OFF state, sets of data resulting from the division and transferred to the recording medium are temporarily stored into thecache memory 111. This means that as a set of data with a data volume smaller than the capacity of thecache memory 110 is transferred, the particular set of data can be stored into thecache memory 111 and then recorded into thenonvolatile memory 112 through a single processing session. As a result, only a single write processing session needs to be executed for each set of data among sets of data a, b and c assuming data sizes smaller than the capacity of thecache memory 111 and thus, a total of only three write processing sessions needs to be executed for the entire data, as shown inFIG. 9 . - However, if data with a data size greater than the capacity of
cache memory 111 are transferred, only a portion of the data, the volume of which matches the capacity of thecache memory 111, is stored into thecache memory 111. The data thus stored are then written into thenonvolatile memory 112. Subsequently, the excess portion of the data beyond the capacity ofcache memory 111, which has not been stored into thecache memory 111 earlier, is stored in thecache memory 111 and is recorded into thenonvolatile memory 112. In other words, a set of data resulting from the data division and transferred to the recording medium needs to be stored into thecache memory 111 and written into thenonvolatile memory 112 through multiple write processing sessions. For instance, sets of data A and B with matching data sizes, resulting from data division and transferred to the recording medium each require two write processing sessions, as illustrated inFIG. 9 . Namely, the data A need to be written through two write processing sessions, one for data A1 and the other for data A2 and likewise, the data B need to be written through two write processing sessions, one for data B1 and the other for data B2. Thus, a total of four write processing sessions must be executed for the entire data. In other words, the length of time required to process the entire transfer data to be transferred may be shortened to improve the processing speed by transferring the data in the divided smaller data units with a data volumes smaller than the capacity of thecache memory 111. - The electronic still camera achieved in the embodiment described above allows for the following variations (1) through (6).
- (1) Depending upon the volume of image data to be transferred, the length of time required for the processing may be reduced by invalidating the cache function rather than by validating the cache function. Accordingly, if it is decided during the initialization processing executed for the
recording medium 110 that the write processing at thenonvolatile memory 112 can be executed at higher speed than the write processing at thecache memory 111 in therecording medium 110, theCPU 211 may turn off the cache function. The processing executed under these circumstances is now explained. - Decision-making executed with regard to the write processing speed in the cache ON state and the write processing speed in the cache OFF state when transferring image data from the
electronic still camera 100 to therecording medium 110 is now described. - Image data with a data size L recorded in the
memory 207 of theelectronic still camera 100 are divided into data units matching specific write units S with which data are written in therecording medium 110 and the image data are thus transferred in the data units to therecording medium 110 by theCPU 211. The write units S may correspond to, for instance, the write sector size assumed at therecording medium 110. TheCPU 211 transfers n sets of data with the sector size S in succession through a single transfer processing session. The n sets of data with the sector size S transferred through this transfer processing session may be regarded as a single group of data, and the data size of such a group of data may be referred to as a cluster size. M representing the cluster size may be expressed as follows. -
M=S×n (1) - Assuming that the image data are constituted with m groups of data with the cluster size M, the data size L of the image data can be expressed as follows.
-
L=M×m=S×n×m (2) - Next, in reference to
FIGS. 10A and 10B , varying lengths of processing time required when transferring image data from theelectronic still camera 100 to aspecific recording medium 110 are explained. In the following explanation, it is assumed that the write units S represented by the sector size each correspond to 512-byte data and that the cluster size M matches 128 KB data. Accordingly, based upon expression (1); n is determined to be 256. - The lengths of processing time required when the
CPU 211 transfers and records data with the sector size S into thespecific recording medium 110 are explained in reference toFIG. 10A . As shown inFIG. 10A , the length of time required to write the data with the sector size S into thenonvolatile memory 111 in therecording medium 110 is a in the cache OFF state. The length of processing time d required to write the data with the sector size S into thecache memory 112 in therecording medium 110 and execute the cache flush for thecache memory 112 in the cache ON state is expressed as in (3) below. -
d=b+c (3) - It is to be noted that the time b is the length of time required when writing the data into the
cache memory 111 and the time c is the length of time required to execute the cache flush, i.e., the length of time required when writing the data present in thecache memory 111 into thenonvolatile memory 112. - As shown in
FIG. 10A , the length of time b required when writing the data into thecache memory 111 in the cache ON state is smaller than the length of time “a” required to write the data into thenonvolatile memory 112 in the cache OFF state. However, the overall processing time in the cache ON state includes the length of time c required to flush thecache memory 111. Accordingly, the total length of time required to process a single set of data assuming the sector size S increases by a time length x when the data are transferred in the cache ON state. This is by no means a universal phenomenon that occurs in allrecording media 110, but a phenomenon that occurs only in somespecific recording media 110. In other words, the camera is able to ascertain whether or not therecording medium 110 loaded therein is prone to the phenomenon described above by recognizing the type ofrecording medium 110. - In reference to
FIG. 10B , the lengths of processing time required when theCPU 211 transfers and records in succession data assuming the cluster size M, i.e., when theCPU 211 transfers andrecords 256 sets of data with a sector size S are explained. The length of time T1 required to write data with the cluster size M into thenonvolatile memory 112 in the cache OFF state is expressed as follows. -
T1=n×a (4) - The length of time T2 required to write data with a cluster size M into the
cache memory 111 in the cache ON state is expressed as follows. -
T2=n+b+c (5) - As explained earlier, the length of processing time required to write a single set of data with the sector size S is smaller in the cache ON state than in the cache OFF state. A single set of data with the cluster size M can be written over a smaller length of time in the cache ON state, as shown in
FIG. 10B . Namely, depending upon the volume of the individual sets of data to be transferred in succession, e.g., the actual volume of data in the cluster size M, either the cache ON state or the cache OFF state can be determined to be the state in which the data can be written over a smaller length of time. - The length of time a required when writing data into the
nonvolatile memory 112 in the cache OFF state, the length of time b required when writing data into thecache memory 111 in the cache ON state and the length of time c required for the cache flush processing mentioned above each assume a value determined in correspondence to the characteristics of thecache memory 111 and thenonvolatile memory 112. The data write time lengths a and b and the flush time length c are all recorded into a ROM, a NAND memory or the like (not shown) when therecording medium 110 is manufactured. - During the initialization processing for the
recording medium 110, theCPU 211 reads out the data write time lengths a and b and the flush time length c from thesystem control unit 113. TheCPU 211 then compares the time length T1 with the time length T2 calculated as expressed in (4) and (5). If the comparison results indicate that the time length T1 is greater than the time length T2, i.e., if it is decided that the data write processing can be executed faster in the cache ON state than in the cache OFF state, theCPU 211 validates thecache memory 111 in therecording medium 110. If, on the other hand, the time length T1 is judged to be equal to or less than the time length T2, the length of time required for the data write processing will be greater in the cache ON state than in the cache OFF state. Accordingly, theCPU 211 does not validate thecache memory 111 in therecording medium 110. - (2) Instead of recording the data write time lengths a and b required to write image data into the
recording medium 110 and the flush time length c into therecording medium 110, the time lengths T1 and T2 required when processing image data assuming the cluster size M may be recorded. In such case, theCPU 211 is able to determine whether the write processing can be executed faster in the cache ON state or in the cache OFF state without having to calculate the time lengths T1 and T2.
(3) Instead of transferring image data divided into data portions each matching the write unit S determined in correspondence to the sector size of therecording medium 110, the image data may be divided into data portions each corresponding to the minimum transfer unit P by theelectronic still camera 100 for purposes of data transfer irrespective of the sector size S assumed in therecording medium 110. In such a case, during the initialization processing executed for therecording medium 110, theCPU 211 transfers image data with a data volume matching the minimum transfer unit P from thememory 207 to therecording medium 110 to measure the length of time required for the write processing. - The write processing time measurement mentioned above is now described in further detail. The
CPU 211 sets therecording medium 110 in the cache OFF state and transfers image data with a data volume matching the minimum transfer unit P to thecache memory 111. TheCPU 211 then measures the length of time required to write the transferred image data into thenonvolatile memory 112. The length of time thus measured is the data write time length a. In addition, theCPU 211 sets therecording medium 110 in the cache ON state, transfers a single set of image data corresponding to the minimum transfer unit P to thecache memory 111, flushes thecache memory 111 and measures the length of time d required to write the data into thenonvolatile memory 112. Also, theCPU 211 transfers n sets of image data each corresponding to the minimum transfer unit P to thecache memory 111, flushes thecache memory 111 and measures the length of time e required to write the n sets of data into thenonvolatile memory 112. Subsequently, theCPU 211 calculates the flush time length c as expressed below. -
c=((d×n)−e)/(n−1) (6) - Based upon the processing time length d having been measured and the flush time length c calculated as expressed in (6) above, the
CPU 211 calculates the data write time length b required to write data into thecache memory 111, as expressed below. -
b=d−c (7) - The
CPU 211 records the data write time length a measured as described above and the data write time length b and the flush time length c calculated based upon the measurement results into a specific recording area within theCPU 211 or into a specific recording area in therecording medium 110. Subsequently, theCPU 211 references these time lengths a, b and c whenever it needs to determine whether to set therecording medium 110 in the cache ON state or in the cache OFF state. - (4) The
CPU 211 may measure the time lengths T1 and T2 required to write image data assuming the cluster size M as it records the image data into therecording medium 110. In such a case, theCPU 211 transfers a first set of image data to therecording medium 110 in the cache OFF state and measures the length of time T1 required to write the image data assuming the cluster sizeM. The CPU 211 then transfers a second set of image data to therecording medium 110 in the cache ON state and measures the length of time T2 required to write image data assuming the cluster sizeM. The CPU 211 compares the time length T1 with the time length T2 both obtained through the measurement and selects either the cache ON state or the cache OFF state. Namely, if the time length T1 indicates a smaller value, theCPU 211 sets therecording medium 110 in the cache OFF state, whereas if the time length T2 indicates a smaller value, theCPU 211 selects the cache ON state for therecording medium 110. A third set of image data and subsequent sets of image data are then transferred to the recording medium in the selected state. - After selecting the cache ON state or the cache OFF state based upon the time lengths T1 and T2 ascertained through the measurement, as described above, the
CPU 211 may record state information indicating the setting state selected for therecording medium 110 into a specific recording area in theCPU 211 or therecording medium 110. Once the state information is recorded as described above, theCPU 211 only needs to read out the state information having been recorded and indicate either the cache ON state or the cache OFF state to therecording medium 110 whenever thesame recording medium 110 is subsequently loaded into theelectronic still camera 100. In other words, theCPU 211 does not need to re-execute the time measurement or the time length comparison multiple times. - (5) The time lengths T1 and T2 may be measured as described below by switching from the cache OFF state to the cache ON state while the
CPU 211 transfers image data to therecording medium 110. Namely, theCPU 211 transfers a first set of image data assuming the cluster size M to therecording medium 110 in the cache OFF state, writes the image data into thenonvolatile memory 112 and measures the time length T1. TheCPU 211 then switches therecording medium 110 to the cache ON state, transfers a second set of image data assuming the cluster size M to the recording medium and measures the time length T2 representing the total sum of the data write time length required to write data into thecache memory 111 and the cache flush time length. TheCPU 211 compares the time length T1 with the time length T2 both obtained through the measurement and determines whether to transfer a third set of image data and subsequent sets of image data each assuming the cluster size M in the cache OFF state or in the cache ON state. Namely, if the time length T1 indicates a smaller value, theCPU 211 sets therecording medium 110 in the cache OFF state, whereas if the time length T2 indicates a smaller value, theCPU 211 selects the cache ON state for therecording medium 110. The third set of image data and subsequent sets of image data each assuming the cluster size M are then transferred to therecording medium 110 in the selected state.
(6) Instead of outputting the cache flush instruction signal to therecording medium 110 immediately after transferring the entire image data, theCPU 211 may constantly output the cache flush instruction signal over predetermined regular intervals while the photographing sequence is not in progress. It is to be noted that theCPU 211 should output the cache flush instruction signal without allowing the regular interval to elapse if disengagement of therecording medium 110 is detected. These measures ensure that all the photographic data are reliably saved by preventing any data from remaining unrecorded due to a disconnection of therecording medium 110 from the electronic camera by the user before theCPU 211 issues the cache flush instruction following a photographing end. It is to be noted that the extraction of therecording medium 110 may be detected by a detection mechanism such as a switch provided to detect an opening operation of, for instance, the card insertion slot cover (card lid) (not shown).
(7) TheCPU 211 may output the cache flush instruction signal if transfer processing for transferring image data to therecording medium 110 is not executed for a predetermined length time following the image data transfer processing.
(8) TheCPU 211 may output the cache flush instruction signal upon detecting disengagement of therecording medium 110. It is to be noted that if theelectronic still camera 100 is in the power off state, theCPU 211 should turn on the power to theelectronic still camera 100 upon detecting disengagement of therecording medium 110, i.e., upon detecting an opening operation of the card lid. TheCPU 211 should then output the cache flush instruction signal to therecording medium 110. - In addition, as long as the features characterizing the present convention are not compromised, the present convention is not limited to the embodiment described above and allows for any other mode of implementation within the scope of the technical teachings of the present convention. For instance, the electronic camera does not need to have all the functions described above. An electronic camera capable of executing the initialization shown in
FIG. 3 alone, the processing shown inFIGS. 3 , 4 and 5 alone, or the processing shown inFIG. 6 alone, too, may embody the present convention.
Claims (15)
1. An electronic still camera, comprising:
a detection unit that detects whether or not a detachable recording medium has a cache function; and
a validating unit that validates the cache function when the detection unit detects that the recording medium has the cache function.
2. An electronic still camera according to claim 1 , further comprising:
a comparison unit that compares a first processing time length required to execute processing when the cache function is validated with a second processing time length required to execute the processing when the cache function is not validated, wherein:
the validating unit validates the cache function if the first processing time length is smaller than the second processing time length.
3. An electronic still camera according to claim 2 , further comprising:
an arithmetic operation unit that determines through arithmetic operation the first processing time length and the second processing time length.
4. An electronic still camera according to claim 1 , further comprising:
an instruction unit that issues an instruction for a cache flush to the recording medium at a photographing operation completion.
5. An electronic still camera according to claim 1 , further comprising:
an instruction unit that issues a cache flush instruction each time a photographing operation in a single shot photographing mode completes and issues the cache flush instruction when a continuous shooting operation in a continuous shooting mode completes.
6. An electronic still camera according to claim 1 , further comprising:
an instruction unit that issues a cache flush instruction in synchronization with a completion of image recording processing executed to record image into the recording medium.
7. An electronic still camera according to claim 6 , wherein:
the instruction unit issues the cache flush instruction after photographic information transmitted to the recording medium in immediate succession to image data, is completely recorded.
8. An electronic still camera according to claim 1 , further comprising:
an instruction unit that issues a cache flush instruction each time a predetermined time interval elapses.
9. An electronic still camera according to claim 4 , further comprising:
a power supply control unit that ends power supply from a camera body to the recording medium after cache flush processing executed in response to the cache flush instruction completes.
10. An electronic still camera according to claim 1 , further comprising:
a connection detection unit that detects a connection with an external device; and
an invalidating unit that invalidates the cache function having been validated by the validating unit when the connection detection unit detects the connection with the external device.
11. An electronic still camera according to claim 10 , further comprising:
a data volume instruction unit that issues an instruction to adjust a volume of data to be transmitted to a camera body from the external device to a volume smaller than a capacity of the cache when the connection detection unit detects the connection with the external device.
12. An electronic still camera according to claim 2 , further comprising:
a connection detection unit that detects a connection with an external device; and
an invalidating unit that invalidates the cache function having been validated by the validating unit when the connection detection unit detects the connection with the external device.
13. An electronic still camera according to claim 12 , further comprising:
a data volume instruction unit that issues an instruction to adjust a volume of data to be transmitted to a camera body from the external device to a volume smaller than a capacity of the cache when the connection detection unit detects the connection with the external device.
14. An electronic still camera, comprising:
a detection unit that detects whether or not a detachable recording medium has a cache function;
a validating unit that validates the cache function when the detection unit detects that the recording medium has the cache function;
a connection detection unit that detects a connection with an external device; and
an invalidating unit that invalidates the cache function having been validated by the validating unit when the connection detection unit detects the connection with the external device.
15. An electronic still camera according to claim 2 , wherein:
the processing includes transmitting data to the recoding medium and recording the transmitted data in the recording medium.
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Also Published As
Publication number | Publication date |
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US8558916B2 (en) | 2013-10-15 |
US20110149113A1 (en) | 2011-06-23 |
JPWO2007058253A1 (en) | 2009-05-07 |
JP5136062B2 (en) | 2013-02-06 |
WO2007058253A1 (en) | 2007-05-24 |
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