US20080160658A1 - Mold structure for packaging led chips and method thereof - Google Patents

Mold structure for packaging led chips and method thereof Download PDF

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Publication number
US20080160658A1
US20080160658A1 US11/854,066 US85406607A US2008160658A1 US 20080160658 A1 US20080160658 A1 US 20080160658A1 US 85406607 A US85406607 A US 85406607A US 2008160658 A1 US2008160658 A1 US 2008160658A1
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Prior art keywords
mold
receiving spaces
bottom mold
flow channels
led chips
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US11/854,066
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US7803641B2 (en
Inventor
Bily Wang
Jonnie Chuang
Hui-Yen Huang
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Harvatek Corp
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Harvatek Corp
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Assigned to HARVATEK CORPORATION reassignment HARVATEK CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHUANG, JONNIE, HUANG, HUI-YEN, WANG, BILY
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561Batch processing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

Definitions

  • the present invention relates to a mold structure for packaging LED chips and a method thereof, and particularly relates to a mold structure and a method for preventing package resins from overflowing on a rear face of a substrate of the LED chips.
  • a known mold structure m includes a top mold 1 a and a bottom mold 2 a mated with the top mold 1 a .
  • the bottom mold 2 a has a plurality of receiving spaces 20 a of a larger size.
  • a substrate 3 a is etched to form a plurality of chip carrying areas 30 a and a plurality of positive contact pins 300 a and negative contact pins 301 a that correspond to the chip carrying areas 30 a.
  • each LED chip 4 a is arranged on the corresponding chip carrying areas 30 a , respectively.
  • a positive pole and a negative pole (not shown) of each LED chip 4 a are electrically connected with the corresponding positive contact pin 300 a and negative contact pin 301 a via leading wires 40 a by a wire-bounding method.
  • the LED chips 4 a are divided into a plurality of LED chip areas.
  • Each LED chip area has a plurality of LED chips 4 a arranged in a matrix shape. For example, in the FIG. 3 each LED chip area has a 5*5 LED chip matrix.
  • a self-adhesive tape 5 a is attached on a rear face of the substrate 3 a.
  • the substrate 3 a is deformed easily and the package resins 6 a overflow easily on the rear face (as shown by the arrows in FIG. 5 ) of the substrate 3 a due to thermal expansion and pressure concentration (because the size of the receiving space 20 a is larger).
  • the know mold structure not only wastes package resins but it is difficult to clean the package resins that overflow on the substrate.
  • the cost of the self-adhesive tape 5 a is high, and the prior art needs to use a precision adhesion instrument to adhere the self-adhesive tape 5 a on the rear face of the substrate 3 a.
  • the LED chips 4 a are too close to each other, so that the structural strength of the LED chip package is inadequate.
  • One particular aspect of the present invention is to provide a mold structure for packaging LED chips and a method thereof.
  • the present invention prevents package resins from overflowing on a rear face of a substrate of the LED chips.
  • the present invention provides a mold structure for packaging LED chips, comprising a top mold and a bottom mold.
  • the bottom mold is mated with the top mold.
  • the bottom mold has a main flow channel, a plurality of receiving spaces formed beside the main flow channel, a plurality of secondary flow channels for respectively and transversely communicating the receiving spaces with each other, and a plurality of ejection pins penetrating through the bottom mold.
  • the present invention provides a method of packaging LED chips, comprising: providing a top mold and a bottom mold that are mated with each other, wherein the bottom mold has a main flow channel, a plurality of receiving spaces formed beside the main flow channel, a plurality of secondary flow channels for respectively and transversely communicating the receiving spaces with each other, and a plurality of ejection pins penetrating through the bottom mold; and then pressing a plurality of wire-bonded LED chips that have finished a wire-bonding process into the corresponding receiving spaces via the top mold mating with the bottom mold.
  • the method further comprises pouring package resins from the main flow channel to each receiving space through the secondary flow channels and filling each receiving space with package resins for packaging each wire-bonded LED chip, and then removing upward the top mold so that the top mold is separated from the packaged LED chips that have been packaged; and then pushing the packaged LED chips out of the bottom mold via the ejection pins.
  • the mold structure and the method for packaging LED chips have some advantages, as follows:
  • the present invention prevents the package resins from overflowing on a rear face of the substrate.
  • FIG. 1 is a lateral, exploded, schematic view of a mold structure for packaging LED chips according to the prior art
  • FIG. 2 is a top view of a bottom mold of the prior art
  • FIG. 3 is a top view of LED chips disposed on a substrate (sheet) according to the prior art
  • FIG. 4 is a schematic view (before a top mold and a bottom mold are mated together) according to the prior art
  • FIG. 5 is a schematic view (when package resin overflows on a rear face of an adhesive tape) according to the prior art
  • FIG. 6 is a lateral, exploded, schematic view of a mold structure for packaging LED chips according to the present invention.
  • FIG. 7 is a top view of a bottom mold of a mold structure for packaging LED chips according to the first embodiment of the present invention.
  • FIG. 8 is a top view of a bottom mold of a mold structure for packaging LED chips according to the second embodiment of the present invention.
  • FIG. 9 is a top view of LED chips disposed on a substrate (sheet) according to the present invention.
  • FIG. 10 is a flowchart of a method of packaging LED chips according to the present invention.
  • FIGS. 11A to 11E are packaging schematic views of a method of packaging LED chips according to the present invention.
  • FIG. 12 is a schematic view of packaged LED chips separated from a bottom mold via ejection pins according to the present invention.
  • FIG. 13 is a schematic view of liquid package resin pouring into receiving spaces according to the first embodiment of the present invention.
  • FIG. 14 is a schematic view of liquid package resin pouring into receiving spaces according to the second embodiment of the present invention.
  • the present invention provides a mold structure M for packaging LED chips, including: a top mold 1 and a bottom mold 2 mated with the top mold 1 .
  • the top mold 1 has a plane 10 facing the bottom mold 2 for mating with the bottom mold 2 .
  • the bottom mold 2 has a main flow channel 20 , a plurality of receiving spaces 21 , a plurality of secondary flow channels 22 , and a plurality of ejection pins 23 .
  • the receiving spaces 21 are arranged in a matrix shape.
  • the receiving spaces 21 are respectively formed beside two opposite sides of the main flow channel 20 .
  • the secondary flow channels 22 are alternately disposed on one lateral side between each two receiving spaces 21 for respectively and transversely communicating the receiving spaces 21 with each other.
  • the transverse receiving spaces 21 are communicated with each other via the corresponding secondary flow channels 22 .
  • the ejection pins 23 penetrate through the bottom mold 2 , and each ejection pin 23 is expansibly projected into the corresponding receiving space 21 .
  • a bottom mold 2 ′ has a main flow channel 20 ′, a plurality of receiving spaces 21 ′, a plurality of secondary flow channels 22 ′, and a plurality of ejection pins 23 ′.
  • the receiving spaces 21 ′ are arranged in a matrix shape.
  • the receiving spaces 21 ′ are respectively formed beside two opposite sides of the main flow channel 20 ′.
  • each two secondary flow channels 22 ′ are formed on two opposite lateral sides between each two receiving spaces 21 ′ for respectively and transversely communicating the receiving spaces 21 with each other's .
  • the transverse receiving spaces 21 ′ are communicated with each other via the corresponding secondary flow channels 22 ′.
  • the ejection pins 23 ′ penetrate through the bottom mold 2 ′, and each ejection pin 23 ′ is expansibly projected outside a support 24 ′ of the bottom mold 2 ′ and among a part of the receiving spaces 21 ′.
  • the structure of the bottom molds 2 , 2 ′ should not be used to limit the present invention.
  • the receiving spaces 21 , 21 ′ can be formed beside the same side of the main flow channel 20 , 20 ′.
  • a substrate 3 is etched to form a plurality of chip carrying areas 30 and a plurality of positive contact pins 300 and negative contact pins 301 that correspond to the chip carrying areas 30 .
  • a plurality of LED chips 4 is arranged on the corresponding chip carrying areas 30 , respectively.
  • a positive pole and a negative pole (not shown) of each LED chip 4 are electrically connected with the corresponding positive contact pin 300 and negative contact pin 301 via leading wires 40 by a wire-bounding method.
  • the present invention provides a method of packaging LED chips.
  • the method includes the following steps: firstly, referring to FIG. 11A , providing a top mold 1 and a bottom mold 2 that are mated with each other, and the bottom mold 2 having a main flow channel 20 (as shown in FIG. 6 ), a plurality of receiving spaces 21 formed beside the main flow channel 20 , a plurality of secondary flow channels 22 for respectively and transversely communicating the receiving spaces 21 with each other, and a plurality of ejection pins 23 penetrating through the bottom mold 2 (S 100 ).
  • the method includes pressing a plurality of wire-bonded LED chips 4 that have finished a wire-bonding process into the corresponding receiving spaces 21 via the top mold 1 mating with the bottom mold 2 (S 102 ).
  • the method includes pouring package resins 5 from the main flow channel 20 to each receiving space 21 through the secondary flow channels 22 and filling each receiving space 21 with package resins 5 for packaging each wire-bonded LED chip 4 (S 104 ).
  • the method includes removing upward the top mold 1 (the top mold 1 is separated from the bottom mold 2 at the same time) for the top mold 1 separating from the packaged LED chips 4 that have been packaged (S 106 ).
  • the method includes pushing the packaged LED chips 4 out of the bottom mold 2 via the ejection pins 23 (S 108 ).
  • each ejection pin 23 is expansibly projected into the corresponding receiving space 21 .
  • the method includes pushing the packaged LED chips 4 out of the bottom mold 2 via the ejection pins 23 ′ (S 108 ).
  • each ejection pin 23 ′ is expansibly projected outside the support 24 ′ of the bottom mold 2 ′ and among a part of the receiving spaces 21 ′.
  • the secondary flow channels 22 are alternately disposed on one lateral side between each two receiving spaces 21 for making the receiving spaces 21 and the secondary flow channels 22 mate with each other to form a plurality of continuous S-shaped flow channels (as shown by the arrows in FIG. 13 ).
  • the design ensures that the corners C in the receiving spaces 21 are filled with the package resin 5 , thus ensuring that packaging defects are avoided.
  • each two secondary flow channels 22 ′ are formed on two opposite lateral sides between each two receiving spaces 21 ′.
  • the design ensures that the corners C′ in the receiving spaces 21 ′ are filled with the package resin 5 , thus ensuring that packaging defects are avoided.
  • the mold structure and the method for packaging LED chips have some advantages, as follows:
  • the present invention prevents the package resins from overflowing on a rear face of the substrate 3 .
  • the packaged LED chips 4 are separated easily from the bottom mold ( 2 or 2 ′) by matching the receiving spaces ( 21 or 21 ′) and the support 24 ′. Therefore, the yield rate of the pattern draw is increased.

Abstract

A mold structure for packaging LED chips includes a top mold and a bottom mold. The bottom mold is mated with the top mold. The bottom mold has a main flow channel, a plurality of receiving spaces formed beside the main flow channel, a plurality of secondary flow channels for respectively and transversely communicating the receiving spaces with each other, and a plurality of ejection pins penetrating through the bottom mold.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The present invention relates to a mold structure for packaging LED chips and a method thereof, and particularly relates to a mold structure and a method for preventing package resins from overflowing on a rear face of a substrate of the LED chips.
  • 2. Description of the Related Art
  • Referring to FIGS. 1 and 2, a known mold structure m includes a top mold 1 a and a bottom mold 2 a mated with the top mold 1 a. The bottom mold 2 a has a plurality of receiving spaces 20 a of a larger size.
  • Referring to FIG. 3, a substrate 3 a is etched to form a plurality of chip carrying areas 30 a and a plurality of positive contact pins 300 a and negative contact pins 301 a that correspond to the chip carrying areas 30 a.
  • Moreover, a plurality of LED chips 4 a is arranged on the corresponding chip carrying areas 30 a, respectively. In addition, a positive pole and a negative pole (not shown) of each LED chip 4 a are electrically connected with the corresponding positive contact pin 300 a and negative contact pin 301 a via leading wires 40 a by a wire-bounding method. Furthermore, the LED chips 4 a are divided into a plurality of LED chip areas. Each LED chip area has a plurality of LED chips 4 a arranged in a matrix shape. For example, in the FIG. 3 each LED chip area has a 5*5 LED chip matrix.
  • Referring to FIG. 4, before the substrate 3 a is arranged under the top mold 1 a, a self-adhesive tape 5 a is attached on a rear face of the substrate 3 a.
  • Referring to FIG. 5, after the top mold 1 a and the bottom mold 2 a are mated together and package resins 6 a are poured into the receiving spaces 20 a, the substrate 3 a is deformed easily and the package resins 6 a overflow easily on the rear face (as shown by the arrows in FIG. 5) of the substrate 3 a due to thermal expansion and pressure concentration (because the size of the receiving space 20 a is larger). Hence, the know mold structure not only wastes package resins but it is difficult to clean the package resins that overflow on the substrate.
  • Moreover, the prior art still some other defects, as follows:
  • 1. The cost of the self-adhesive tape 5 a is high, and the prior art needs to use a precision adhesion instrument to adhere the self-adhesive tape 5 a on the rear face of the substrate 3 a.
  • 2. The LED chips 4 a are too close to each other, so that the structural strength of the LED chip package is inadequate.
  • 3. Because the size of the receiving spaces is larger, the packaged LED chips 4 a are difficult to separate from the bottom mold 2 a. Therefore, the yield rate of the pattern draw is decreased.
  • SUMMARY OF THE INVENTION
  • One particular aspect of the present invention is to provide a mold structure for packaging LED chips and a method thereof. The present invention prevents package resins from overflowing on a rear face of a substrate of the LED chips.
  • In order to achieve the above-mentioned aspects, the present invention provides a mold structure for packaging LED chips, comprising a top mold and a bottom mold. The bottom mold is mated with the top mold. The bottom mold has a main flow channel, a plurality of receiving spaces formed beside the main flow channel, a plurality of secondary flow channels for respectively and transversely communicating the receiving spaces with each other, and a plurality of ejection pins penetrating through the bottom mold.
  • In order to achieve the above-mentioned aspects, the present invention provides a method of packaging LED chips, comprising: providing a top mold and a bottom mold that are mated with each other, wherein the bottom mold has a main flow channel, a plurality of receiving spaces formed beside the main flow channel, a plurality of secondary flow channels for respectively and transversely communicating the receiving spaces with each other, and a plurality of ejection pins penetrating through the bottom mold; and then pressing a plurality of wire-bonded LED chips that have finished a wire-bonding process into the corresponding receiving spaces via the top mold mating with the bottom mold.
  • The method further comprises pouring package resins from the main flow channel to each receiving space through the secondary flow channels and filling each receiving space with package resins for packaging each wire-bonded LED chip, and then removing upward the top mold so that the top mold is separated from the packaged LED chips that have been packaged; and then pushing the packaged LED chips out of the bottom mold via the ejection pins.
  • Hence, the mold structure and the method for packaging LED chips have some advantages, as follows:
  • 1. Because the size of the receiving spaces is small, the structural strength of the substrate is increased by matching the receiving spaces and a support. Therefore, the present invention prevents the package resins from overflowing on a rear face of the substrate.
  • 2. Because the present invention does not need to use adhesive tape, costs are reduced.
  • 3. Because the size of the receiving spaces is small, the packaged LED chips are separated easily from the bottom mold by matching the receiving spaces and the support. Therefore, the yield rate of the pattern draw is increased.
  • It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed. Other advantages and features of the invention will be apparent from the following description, drawings and claims.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The various objects and advantages of the present invention will be more readily understood from the following detailed description when read in conjunction with the appended drawings, in which:
  • FIG. 1 is a lateral, exploded, schematic view of a mold structure for packaging LED chips according to the prior art;
  • FIG. 2 is a top view of a bottom mold of the prior art;
  • FIG. 3 is a top view of LED chips disposed on a substrate (sheet) according to the prior art;
  • FIG. 4 is a schematic view (before a top mold and a bottom mold are mated together) according to the prior art;
  • FIG. 5 is a schematic view (when package resin overflows on a rear face of an adhesive tape) according to the prior art;
  • FIG. 6 is a lateral, exploded, schematic view of a mold structure for packaging LED chips according to the present invention;
  • FIG. 7 is a top view of a bottom mold of a mold structure for packaging LED chips according to the first embodiment of the present invention;
  • FIG. 8 is a top view of a bottom mold of a mold structure for packaging LED chips according to the second embodiment of the present invention;
  • FIG. 9 is a top view of LED chips disposed on a substrate (sheet) according to the present invention;
  • FIG. 10 is a flowchart of a method of packaging LED chips according to the present invention;
  • FIGS. 11A to 11E are packaging schematic views of a method of packaging LED chips according to the present invention;
  • FIG. 12 is a schematic view of packaged LED chips separated from a bottom mold via ejection pins according to the present invention;
  • FIG. 13 is a schematic view of liquid package resin pouring into receiving spaces according to the first embodiment of the present invention; and
  • FIG. 14 is a schematic view of liquid package resin pouring into receiving spaces according to the second embodiment of the present invention.
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • Referring to FIG. 6, the present invention provides a mold structure M for packaging LED chips, including: a top mold 1 and a bottom mold 2 mated with the top mold 1. The top mold 1 has a plane 10 facing the bottom mold 2 for mating with the bottom mold 2.
  • Referring to FIGS. 6 and 7, with regard to the first embodiment of the present invention, the bottom mold 2 has a main flow channel 20, a plurality of receiving spaces 21, a plurality of secondary flow channels 22, and a plurality of ejection pins 23.
  • Moreover, the receiving spaces 21 are arranged in a matrix shape. The receiving spaces 21 are respectively formed beside two opposite sides of the main flow channel 20. In addition, the secondary flow channels 22 are alternately disposed on one lateral side between each two receiving spaces 21 for respectively and transversely communicating the receiving spaces 21 with each other. In other words, the transverse receiving spaces 21 are communicated with each other via the corresponding secondary flow channels 22. Furthermore, the ejection pins 23 penetrate through the bottom mold 2, and each ejection pin 23 is expansibly projected into the corresponding receiving space 21.
  • Referring to FIG. 8, with regard to the second embodiment of the present invention, a bottom mold 2′ has a main flow channel 20′, a plurality of receiving spaces 21′, a plurality of secondary flow channels 22′, and a plurality of ejection pins 23′.
  • The receiving spaces 21′ are arranged in a matrix shape. The receiving spaces 21′ are respectively formed beside two opposite sides of the main flow channel 20′. In addition, each two secondary flow channels 22′ are formed on two opposite lateral sides between each two receiving spaces 21′ for respectively and transversely communicating the receiving spaces 21 with each other's . In other words, the transverse receiving spaces 21′ are communicated with each other via the corresponding secondary flow channels 22′. Furthermore, the ejection pins 23′ penetrate through the bottom mold 2′, and each ejection pin 23′ is expansibly projected outside a support 24′ of the bottom mold 2′ and among a part of the receiving spaces 21′.
  • However, the structure of the bottom molds 2, 2′ should not be used to limit the present invention. For example, the receiving spaces 21, 21′ can be formed beside the same side of the main flow channel 20, 20′.
  • Referring to FIG. 9, a substrate 3 is etched to form a plurality of chip carrying areas 30 and a plurality of positive contact pins 300 and negative contact pins 301 that correspond to the chip carrying areas 30. A plurality of LED chips 4 is arranged on the corresponding chip carrying areas 30, respectively. In addition, a positive pole and a negative pole (not shown) of each LED chip 4 are electrically connected with the corresponding positive contact pin 300 and negative contact pin 301 via leading wires 40 by a wire-bounding method.
  • Referring to FIGS. 10 and 11A-11E, the present invention provides a method of packaging LED chips. The method includes the following steps: firstly, referring to FIG. 11A, providing a top mold 1 and a bottom mold 2 that are mated with each other, and the bottom mold 2 having a main flow channel 20 (as shown in FIG. 6), a plurality of receiving spaces 21 formed beside the main flow channel 20, a plurality of secondary flow channels 22 for respectively and transversely communicating the receiving spaces 21 with each other, and a plurality of ejection pins 23 penetrating through the bottom mold 2 (S100).
  • Next, referring to FIG. 11B, the method includes pressing a plurality of wire-bonded LED chips 4 that have finished a wire-bonding process into the corresponding receiving spaces 21 via the top mold 1 mating with the bottom mold 2 (S102).
  • Thirdly, referring to FIG. 11C, the method includes pouring package resins 5 from the main flow channel 20 to each receiving space 21 through the secondary flow channels 22 and filling each receiving space 21 with package resins 5 for packaging each wire-bonded LED chip 4 (S104).
  • Fourthly, referring to FIG. 11D, the method includes removing upward the top mold 1 (the top mold 1 is separated from the bottom mold 2 at the same time) for the top mold 1 separating from the packaged LED chips 4 that have been packaged (S106).
  • According to the first embodiment, and referring to FIG. 11E, the method includes pushing the packaged LED chips 4 out of the bottom mold 2 via the ejection pins 23 (S108). In addition, each ejection pin 23 is expansibly projected into the corresponding receiving space 21.
  • According to the second embodiment, and referring to FIG. 12, the method includes pushing the packaged LED chips 4 out of the bottom mold 2 via the ejection pins 23′ (S108). In addition, each ejection pin 23′ is expansibly projected outside the support 24′ of the bottom mold 2′ and among a part of the receiving spaces 21′.
  • Referring to FIG. 13, in the first embodiment, the secondary flow channels 22 are alternately disposed on one lateral side between each two receiving spaces 21 for making the receiving spaces 21 and the secondary flow channels 22 mate with each other to form a plurality of continuous S-shaped flow channels (as shown by the arrows in FIG. 13). Hence, it is easy for the package resins 5 to fill in the receiving spaces 21 to the full. In addition, the design ensures that the corners C in the receiving spaces 21 are filled with the package resin 5, thus ensuring that packaging defects are avoided.
  • Referring to FIG. 14, in the second embodiment, each two secondary flow channels 22′ are formed on two opposite lateral sides between each two receiving spaces 21′. Hence, it is easy for the package resins 5 to fill in the receiving spaces 21′ to the full. In addition, following the same principle described above, the design ensures that the corners C′ in the receiving spaces 21′ are filled with the package resin 5, thus ensuring that packaging defects are avoided.
  • In conclusion, the mold structure and the method for packaging LED chips have some advantages, as follows:
  • 1. Because the size of the receiving spaces (21 or 21′) is small, the structural strength of the substrate 3 is increased by matching the receiving spaces (21 or 21′) and the support 24′. Therefore, the present invention prevents the package resins from overflowing on a rear face of the substrate 3.
  • 2. Because the present invention does not need to use adhesive tapes, costs are reduced.
  • 3. Because the size of the receiving spaces (21 or 21′) is small, the packaged LED chips 4 are separated easily from the bottom mold (2 or 2′) by matching the receiving spaces (21 or 21′) and the support 24′. Therefore, the yield rate of the pattern draw is increased.
  • Although the present invention has been described with reference to the preferred best molds thereof, it will be understood that the invention is not limited to the details thereof. Various substitutions and modifications have been suggested in the foregoing description, and others will occur to those of ordinary skill in the art. Therefore, all such substitutions and modifications are intended to be embraced within the scope of the invention as defined in the appended claims.

Claims (19)

1. A mold structure for packaging LED chips, comprising:
a top mold; and
a bottom mold mated with the top mold, wherein the bottom mold has a main flow channel, a plurality of receiving spaces formed beside the main flow channel, a plurality of secondary flow channels for respectively and transversely communicating the receiving spaces with each other, and a plurality of ejection pins penetrating through the bottom mold.
2. The mold structure as claimed in claim 1, wherein the top mold has a plane facing the bottom mold for mating with the bottom mold.
3. The mold structure as claimed in claim 1, wherein the receiving spaces are arranged in a matrix shape.
4. The mold structure as claimed in claim 1, wherein the secondary flow channels are alternately disposed on one lateral side between each two receiving spaces for making the receiving spaces and the secondary flow channels mate with each other to form a plurality of continuous S-shaped flow channels.
5. The mold structure as claimed in claim 1, wherein each two secondary flow channels are formed on two opposite lateral sides between each two receiving spaces.
6. The mold structure as claimed in claim 1, wherein the receiving spaces are formed beside the same side of the main flow channel.
7. The mold structure as claimed in claim 1, wherein the receiving spaces are respectively formed beside two opposite sides of the main flow channel.
8. The mold structure as claimed in claim 1, wherein each ejection pin is expansibly projected into the corresponding receiving space.
9. The mold structure as claimed in claim 1, wherein each ejection pin is expansibly projected outside a support of the bottom mold and among a part of the receiving spaces.
10. A method of packaging LED chips, comprising:
providing a top mold and a bottom mold that are mated with each other, wherein the bottom mold has a main flow channel, a plurality of receiving spaces formed beside the main flow channel, a plurality of secondary flow channels for respectively and transversely communicating the receiving spaces with each other, and a plurality of ejection pins penetrating through the bottom mold;
pressing a plurality of wire-bonded LED chips that have finished wire-bonding process into the corresponding receiving spaces via the top mold mating with the bottom mold;
pouring package resins from the main flow channel to each receiving space through the secondary flow channels and filling each receiving space with package resins for packaging each wire-bonded LED chip;
removing upward the top mold so that the top mold separates from the packaged LED chips that have been packaged; and
pushing the packaged LED chips out of the bottom mold via the ejection pins.
11. The method as claimed in claim 10, wherein the top mold has a plane facing the bottom mold for mating with the bottom mold.
12. The method as claimed in claim 10, wherein the receiving spaces are arranged in a matrix shape.
13. The method as claimed in claim 10, wherein the secondary flow channels are alternately disposed on one lateral side between each two receiving spaces for making the receiving spaces and the secondary flow channels mate with each other to form a plurality of continuous S-shaped flow channels.
14. The method as claimed in claim 10, wherein each two secondary flow channels are formed on two opposite lateral sides between each two receiving spaces.
15. The method as claimed in claim 10, wherein the receiving spaces are formed beside the same side of the main flow channel.
16. The method as claimed in claim 10, wherein the receiving spaces are respectively formed beside two opposite sides of the main flow channel.
17. The method as claimed in claim 10, wherein each ejection pin is expansibly projected into the corresponding receiving space.
18. The method as claimed in claim 10, wherein each ejection pin is expansibly projected outside a support of the bottom mold and among a part of the receiving spaces.
19. The method as claimed in claim 10, wherein before the step of providing the top mold and the bottom mold, the method further comprising:
etching a substrate to form a plurality of chip carrying areas and a plurality of positive contact pins and negative contact pins that correspond to the chip carrying areas;
arranging the LED chips on the corresponding chip carrying areas, respectively; and
electrically connecting a positive pole and a negative pole of each LED chip with the corresponding positive contact pin and negative contact pin by a wire-bounding method.
US11/854,066 2007-01-03 2007-09-12 Mold structure for packaging LED chips and method thereof Expired - Fee Related US7803641B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
TW096100234A TW200830573A (en) 2007-01-03 2007-01-03 Mold structure for packaging light-emitting diode chip and method for packaging light-emitting diode chip
TW96100234A 2007-01-03
TW96100234 2007-01-03

Publications (2)

Publication Number Publication Date
US20080160658A1 true US20080160658A1 (en) 2008-07-03
US7803641B2 US7803641B2 (en) 2010-09-28

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110128004A1 (en) * 2009-12-01 2011-06-02 Lim Ssang Gun Apparatus for inspecting light emitting diode package and inspecting method using the same
US20120107975A1 (en) * 2010-10-29 2012-05-03 Advanced Optoelectronic Technology, Inc. Method for packaging light emitting diode
US20170040299A1 (en) * 2015-08-05 2017-02-09 Harvatek Corporation Display device and light-emitting array module thereof
WO2020019940A1 (en) * 2018-07-26 2020-01-30 宁波舜宇光电信息有限公司 Photosensitive component, photosensitive component panel, molding component panel and manufacturing method
US11552219B2 (en) * 2020-04-15 2023-01-10 Harvatek Corporation LED display screen module

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI455252B (en) * 2008-08-28 2014-10-01 玉晶光電股份有限公司 A mold release mechanism for a light emitting diode package process
CN102447035B (en) * 2010-10-06 2015-03-25 赛恩倍吉科技顾问(深圳)有限公司 LED (light emitting diode) as well as mold and method for manufacturing LED
TWI414089B (en) * 2010-12-06 2013-11-01 Advanced Optoelectronic Tech Method of packaging light emitting diode
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CN104465938A (en) * 2013-09-22 2015-03-25 展晶科技(深圳)有限公司 Mold and method for manufacturing light emitting diode by using same

Citations (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4368168A (en) * 1978-07-17 1983-01-11 Dusan Slepcevic Method for encapsulating electrical components
US5672549A (en) * 1996-01-31 1997-09-30 Sumitomo Bakelite Company Limited Method of producing epoxy resin-encapsulated semiconductor device
US5846477A (en) * 1994-12-08 1998-12-08 Nitto Denko Corporation Production method for encapsulating a semiconductor device
US6013947A (en) * 1997-06-27 2000-01-11 Trimecs Co., Ltd. Substrate having gate recesses or slots and molding device and molding method thereof
US6081978A (en) * 1999-03-31 2000-07-04 Matsushita Electronics Corporation Resin-encapsulated semiconductor device producing apparatus and method
US6309916B1 (en) * 1999-11-17 2001-10-30 Amkor Technology, Inc Method of molding plastic semiconductor packages
US6344162B1 (en) * 1998-07-10 2002-02-05 Apic Yamada Corporation Method of manufacturing semiconductor devices and resin molding machine
US20020024127A1 (en) * 2000-08-31 2002-02-28 Hitachi, Ltd. Semiconductor device and manufacture method of that
US6580620B1 (en) * 1999-04-14 2003-06-17 Amkor Technology, Inc. Matrix type printed circuit board for semiconductor packages
US20030131428A1 (en) * 2000-08-04 2003-07-17 Kiyoshi Tsuchida Mold cleaning sheet and method for producing semiconductor devices using the same
US6630374B2 (en) * 2000-01-19 2003-10-07 Towa Corporation Resin sealing method and resin sealing apparatus
US6773247B1 (en) * 1999-11-09 2004-08-10 Towa Corporation Die used for resin-sealing and molding an electronic component
US20050037178A1 (en) * 2001-08-15 2005-02-17 Chou Kuang Chun Method for cleaning and regenerating a mold
US20050242452A1 (en) * 2004-04-26 2005-11-03 Towa Corporation Method of resin-sealing and molding an optical device
US20060216867A1 (en) * 2005-03-22 2006-09-28 Youichi Kawata Method of manufacturing a semiconductor device
US20070007612A1 (en) * 1998-03-10 2007-01-11 Mills Michael A Method of providing an optoelectronic element with a non-protruding lens
US7501086B2 (en) * 2002-03-28 2009-03-10 Vishay-Siliconix Encapsulation method for leadless semiconductor packages

Patent Citations (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4368168A (en) * 1978-07-17 1983-01-11 Dusan Slepcevic Method for encapsulating electrical components
US5846477A (en) * 1994-12-08 1998-12-08 Nitto Denko Corporation Production method for encapsulating a semiconductor device
US5672549A (en) * 1996-01-31 1997-09-30 Sumitomo Bakelite Company Limited Method of producing epoxy resin-encapsulated semiconductor device
US6013947A (en) * 1997-06-27 2000-01-11 Trimecs Co., Ltd. Substrate having gate recesses or slots and molding device and molding method thereof
US20070007612A1 (en) * 1998-03-10 2007-01-11 Mills Michael A Method of providing an optoelectronic element with a non-protruding lens
US6344162B1 (en) * 1998-07-10 2002-02-05 Apic Yamada Corporation Method of manufacturing semiconductor devices and resin molding machine
US6081978A (en) * 1999-03-31 2000-07-04 Matsushita Electronics Corporation Resin-encapsulated semiconductor device producing apparatus and method
US6580620B1 (en) * 1999-04-14 2003-06-17 Amkor Technology, Inc. Matrix type printed circuit board for semiconductor packages
US6773247B1 (en) * 1999-11-09 2004-08-10 Towa Corporation Die used for resin-sealing and molding an electronic component
US6309916B1 (en) * 1999-11-17 2001-10-30 Amkor Technology, Inc Method of molding plastic semiconductor packages
US6630374B2 (en) * 2000-01-19 2003-10-07 Towa Corporation Resin sealing method and resin sealing apparatus
US20030131428A1 (en) * 2000-08-04 2003-07-17 Kiyoshi Tsuchida Mold cleaning sheet and method for producing semiconductor devices using the same
US20020024127A1 (en) * 2000-08-31 2002-02-28 Hitachi, Ltd. Semiconductor device and manufacture method of that
US6670220B2 (en) * 2000-08-31 2003-12-30 Hitachi, Ltd. Semiconductor device and manufacture method of that
US20050037178A1 (en) * 2001-08-15 2005-02-17 Chou Kuang Chun Method for cleaning and regenerating a mold
US7501086B2 (en) * 2002-03-28 2009-03-10 Vishay-Siliconix Encapsulation method for leadless semiconductor packages
US20050242452A1 (en) * 2004-04-26 2005-11-03 Towa Corporation Method of resin-sealing and molding an optical device
US20060216867A1 (en) * 2005-03-22 2006-09-28 Youichi Kawata Method of manufacturing a semiconductor device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110128004A1 (en) * 2009-12-01 2011-06-02 Lim Ssang Gun Apparatus for inspecting light emitting diode package and inspecting method using the same
US8890533B2 (en) * 2009-12-01 2014-11-18 Samsung Electronics Co., Ltd. Apparatus for inspecting light emitting diode package and inspecting method using the same
US20120107975A1 (en) * 2010-10-29 2012-05-03 Advanced Optoelectronic Technology, Inc. Method for packaging light emitting diode
CN102456780A (en) * 2010-10-29 2012-05-16 展晶科技(深圳)有限公司 Packaging method of light emitting diode (LED)
US8409885B2 (en) * 2010-10-29 2013-04-02 Advanced Optoelectronic Technology, Inc. Method for packaging light emitting diode
US20170040299A1 (en) * 2015-08-05 2017-02-09 Harvatek Corporation Display device and light-emitting array module thereof
US9685428B2 (en) * 2015-08-05 2017-06-20 Harvatek Corporation Display device and light-emitting array module thereof
WO2020019940A1 (en) * 2018-07-26 2020-01-30 宁波舜宇光电信息有限公司 Photosensitive component, photosensitive component panel, molding component panel and manufacturing method
US11552219B2 (en) * 2020-04-15 2023-01-10 Harvatek Corporation LED display screen module

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