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Interconnection element for BGA housings and method for producing the same

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US20070123066A1
US20070123066A1 US11657164 US65716407A US2007123066A1 US 20070123066 A1 US20070123066 A1 US 20070123066A1 US 11657164 US11657164 US 11657164 US 65716407 A US65716407 A US 65716407A US 2007123066 A1 US2007123066 A1 US 2007123066A1
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Prior art keywords
substrate
interposer
connection
elements
element
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Abandoned
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US11657164
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Andre Hanke
Stephan Dobritz
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Andre Hanke
Stephan Dobritz
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0102Calcium [Ca]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0364Conductor shape
    • H05K2201/0367Metallic bump or raised conductor not used as solder bump
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0041Etching of the substrate by chemical or physical means by plasma etching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • Y02P70/60Greenhouse gas [GHG] capture, heat recovery or other energy efficient measures relating to production or assembly of electric or electronic components or products, e.g. motor control
    • Y02P70/613Greenhouse gas [GHG] capture, heat recovery or other energy efficient measures relating to production or assembly of electric or electronic components or products, e.g. motor control involving the assembly of several electronic elements

Abstract

An electronic component includes an interposer substrate and at least one semiconductor chip mounted on the interposer substrate. A plurality of electrical connections electrically couple a rewiring of the interposer substrate to contact regions of the at least one semiconductor chip. A plurality of connection elements are positioned for electrical contact-connection with a printed circuit board. The interconnection elements comprise hollow-cylindrical or rod-shaped elements that penetrate through and are fixedly connected to the interposer substrate.

Description

  • [0001]
    This application is a divisional of patent application serial number 10/944,684, entitled “Interconnection Element for BGA Housings and Method for Producing the Same,” filed on Sep. 17, 2004, which claims priority to German Patent Application 103 43 255.8, which was filed Sep. 17, 2003, both of which are incorporated herein by reference.
  • TECHNICAL FIELD
  • [0002]
    The invention relates to an interconnection element for BGA housings and comparable housings having an interposer substrate.
  • BACKGROUND
  • [0003]
    In accordance with the customary prior art for FPBGA housings (FPBGA: Fine Pitch Ball Grid Array), caBGA housings (caBGA: Chip Array Ball Grid Array) or TFBGA housings (TFBGA: Thin Fine Pitch Ball Grid Array Package), the packages are provided with an interposer substrate, for example made of a bismaleimide triazine resin. The BGA housings are characterized by the fact that component terminals are applied on their underside area in the form of solder balls.
  • [0004]
    The solder balls are applied by means of a so-called ball placement. During this method, the solder balls are introduced into a flux in the envisaged contact locations in the form of a ball grid array situated on the interposer. In its conventional form, this ball placement is very complicated and very demanding in terms of process engineering.
  • [0005]
    The conventional ball placement for an FPBGA package construction is characterized by the fact that firstly a water-soluble, rosin-containing flux is applied to the interposer substrate. This flux has the task of breaking up the oxide layers on the conductive tracks on the interposer substrate and on the solder balls and of making the surfaces wettable. The solder balls placed into the flux are subsequently held at the introduction location by adhesion forces.
  • [0006]
    In the subsequent reflow soldering process in a soldering furnace, the solder balls are then fused onto the interposer substrate in a multizone cycle at temperatures of 110° C. to 225° C. In this case, the soldering temperature is dependent on the solder materials used.
  • [0007]
    In order that the flux residues are removed again after the fusing operation, the interposer is subsequently cleaned, preferably by means of spray washing.
  • [0008]
    The solder balls mounted on the interposer in this way then have to take up in part considerable shear forces after the mounting of the BGA assembly on a printed circuit board, which arise as a result of the thermally governed different coefficients of expansion of the materials involved.
  • [0009]
    DE 198 33 131 A1 describes a method for the contact-connection of electronic components on flexible substrates, in which semiconductor chips provided with FBGA contact terminals are pressed in a force-locking or positively-locking manner onto the flexible substrate provided with a corresponding contact structure. Utilizing the elasticity of the flexible substrate for contact production ensures that a reliable contact-connection is affected even when the microballs have small size deviations.
  • [0010]
    What is disadvantageous in this case is that, on the one hand, the placement of the semiconductor chips has to be effected with high accuracy for lack of floating effects and that, on the other hand, quite large-area contacts with elevated contact resistance arise.
  • [0011]
    Finally, WO 97/00598 (U.S. Pat. No. 6,321,443) describes a connection substrate comprising a dielectric, in the case of which a real connection structures are provided on both sides. Metallized vias as the connection elements are connected to one another. However, this connection element is not suitable for the contact-connection of BGA housings.
  • SUMMARY OF THE INVENTION
  • [0012]
    In one aspect, the invention provides an interconnect element for BGA housings that can be produced cost-effectively and can take up thermally governed forces (shear forces) without any problems, and also of specifying a method for producing the same.
  • [0013]
    In the preferred embodiment, the interconnection element comprises the interposer substrate and a multiplicity of connection elements which are formed in hollow-cylindrical or rod-shaped fashion and are fixedly connected to the interposer substrate, in a manner penetrating through the latter, and also the rewiring.
  • [0014]
    The interconnection element according to embodiments of the invention can be produced simply, on the one hand, and, on the other hand, enables a substantially simplified mounting technology compared with the solder balls used heretofore. Thus, the interposer substrate not only functions for receiving the rewiring and as a chip-carrying element, but also serves for forming and receiving the new hollow-cylindrical or pin-shaped connection elements that completely replace the solder balls used heretofore.
  • [0015]
    A further advantage of embodiments of the invention is to be seen in the fact that it is possible to completely prefabricate the interposer substrate with the rewiring and the connection elements embedded in it.
  • [0016]
    In order that the FBGA package completed by means of chip mounting, wire bonding and molding can be mounted on a printed circuit board, a development of the invention provides for the connection elements to at least partly project from the surface of the interposer substrate. The connection elements may comprise copper or gold and have a diameter of approximately 25 μm.
  • [0017]
    For the case where the connection elements comprise copper, it is advantageous if they have a surface refinement, e.g., made of nickel and/or gold.
  • [0018]
    In another aspect, the invention provides a method, which is characterized by the fact that firstly microvias formed in the pitch of ball grid array contact terminals are introduced into an interposer substrate. An electrically conductive material is subsequently introduced into the microvias in a manner forming the connection elements. At the same time, an electrical connection to rewiring of the interposer substrate being produced. A part of the material of the interposer substrate is then removed areally, so that the connection elements protrude from the surface of the interposer substrate.
  • [0019]
    A further advantage of embodiments of the invention is to be seen in the fact that the electrical connection between the rewiring and the connection elements can be produced in a manner completely free of solder, in contrast to the conventional FBGA technology. At the same time, this also results in a gain in reliability.
  • [0020]
    In this case, the areal removal (thinning) of the material of the interposer substrate may be effected before or after the chip mounting/molding. It is particularly advantageous if the thinning of the interposer substrate is performed after the chip bonding or before the mounting of the FBGA package on a printed circuit board, because damage to the connection elements during the handling of the package is then virtually precluded.
  • [0021]
    A development of the invention provides for the microvias to be completely filled with an electrically conductive material, in a manner forming the connection elements.
  • [0022]
    In a variant of the invention, only the walls of the microvias are coated with an electrically conductive material, in a manner forming hollow-cylindrical connection elements.
  • [0023]
    This variant of the invention results in a significantly higher thermal/mechanical than in the case of conventional solder ball connections.
  • [0024]
    The coating of the walls of the vias may be performed by means of electrolytic direct metalization.
  • [0025]
    In a further method step the connection elements may be provided with a surface refinement by means of nickel and/or gold application.
  • [0026]
    Finally, the microvias may be produced in a simple manner by means of plasma through a mask situated on the interposer substrate.
  • [0027]
    A further possibility for producing the microvias consists in the fact that the latter are ed into the interposer substrate by mechanical processing, e.g., by stamping.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • [0028]
    The invention is explained in more detail below using an exemplary embodiment. In the associated drawings:
  • [0029]
    Figure 1 shows an interposer substrate provided with microvias;
  • [0030]
    Figure 2 shows the interconnection element according to the invention, comprising the interposer substrate according to FIG. 1, in the case of which the microvias are filled with a conductive material;
  • [0031]
    Figure 3 shows an FBGA package equipped with the interconnection element according to the invention;
  • [0032]
    Figure 4 shows the FBGA package according to FIG. 3, in the case of which the interposer substrate is areally thinned, so that the interconnection elements project from the surface of the interposer substrate; and
  • [0033]
    Figure 5 shows the FBGA package after mounting on a printed circuit board.
  • [0034]
    List of reference symbols 1 Rewiring 8 Wire bridge 2 Interposer substrate 9 Potting composition 3 Microvia 10 Molding cap 4 Interconnection element 11 FBGA module 5 Connection element 12 Printed circuit board 6 Chip 13 Soldering connection 7 Tape 14 Bond channel
  • DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
  • [0035]
    FIG. 1 firstly shows an interposer substrate 2 provided with a rewiring 1. In FIG. 1, the rewiring 1 is shown as extending across the entire bottom surface of the substrate 2. This view is schematic in nature and it is understood that rewiring 1 can be patterned on the bottom surface, top surface or within the substrate 2. The substrate 2 has been provided with microvias 3 (holes) with the aid of plasma etching through an etching mask (not illustrated) applied beforehand by means of known photolithography. The microvias 3, as well as bond channel 14, are shown as clear rectangles to indicate that these are recesses formed in the substrate 2.
  • [0036]
    In order to configure the interposer substrate 2 to form an interconnection element 4 according to embodiments of the invention, during the production of the interposer substrate 2, the microvias 3, which have been introduced in a manner formed in the pitch of a ball grid array of a BGA housing by means of plasma etching or mechanical processing, are filled with an electrically conductive material, as shown in FIG. 2. In one embodiment, the diameter of the microvias 3 is approximately 25 μm. The filling with the electrically conductive material results in connection elements 5 that are electrically and mechanically connected to the rewiring 1.
  • [0037]
    Referring now to FIG. 3, a chip 6 can now be mounted onto the now completed interconnection element 4 by means of chip bonding, for example with the interposition of a tape 7. The chip 6 is electrically connected to the rewiring 1 of the interposer substrate 2 by means of wire bridges 8 using the customary wire bonding technology. For the sake of simplicity, the actual connections are not shown. Finally, the FBGA component can then be completed by closing off the bonding channel with a potting composition 9 and subsequently molding with a molding cap 10. The potting composition 9 can be situated to cover the wire bridges 8 regardless of which surface of the substrate 2 they are bonded to. The rewiring 1 is not shown in FIG. 3, but it is understood that it will remain as necessary to form the proper electrical connections.
  • [0038]
    In a further etching operation, preferably a plasma etching operation, which may be effected before or after the chip mounting/contact connection, a part of the material of the interposer substrate 2 is areally removed, so that the connection elements 5 project from the surface of the interposer substrate 2 in a matrix-type terminal grid, as shown in FIG. 4. Preferably, a uniform thickness of substrate material is removed from the surface of substrate 2. In one embodiment, the potting composition 9 protects the portions of substrate 2 adjacent the wire bridges 8.
  • [0039]
    In order to achieve a high contact stability of the connection elements 5, it is expedient to perform a surface refinement thereof. This may be affected, for example, by means of a nickel/gold coating.
  • [0040]
    In a particular refinement of the invention, the filling of the microvias 3 is dispensed with and the latter are metalized only on the hole walls. This may be affected by means of an electrolytic direct metalization.
  • [0041]
    In this way, the connection elements 5 can be configured as hollow cylinders, which leads to a significantly higher thermal/mechanical stability than when using solder balls.
  • [0042]
    FIG. 5 shows an FBGA module 11 equipped with an interconnection element 5 according to the invention after the module has been mounted on a conventional printed circuit board 12 by means of soldering. In this case, the connection elements 5 of the interconnection element 4 are electrically and mechanically connected to the contact islands of the conductive tracks of the printed circuit board 12 by means of soldering connections 13.
  • [0043]
    The invention revolutionizes the mounting technology of BGA modules because the solder balls (microballs) used heretofore have thus become completely superfluous and have been replaced by connection elements 4 in the form of contact pins or hollow cylinders, which can be produced particularly simply.
  • [0044]
    In particular, the hollow-cylindrical connection elements 4 guarantee a substantially better electrical connection and durability compared with the solder balls used heretofore. Moreover, the complicated step of ball placement, i.e., the fixing of the solder balls on the interposer substrate 2, is obviated.
  • [0045]
    The term FBGA module or the like used hitherto in the description correspond to the previous practice for the designation of modules in which solder balls (microballs) are used for the electrical contact-connection. The invention renders the solder balls superfluous and replaces them by pins or hollow cylinders, so that the designations used hitherto for such modules are no longer completely accurate.

Claims (7)

1. An electronic component comprising:
an interposer substrate;
at least one semiconductor chip mounted on the interposer substrate;
a plurality of electrical connections electrically coupling a rewiring of the interposer substrate to contact regions of the at least one semiconductor chip; and
a plurality of connection elements positioned for electrical contact-connection with a printed circuit board, wherein the interconnection elements comprise hollow-cylindrical or rod-shaped elements that penetrate through and are fixedly connected to the interposer substrate.
2. The interconnection element as claimed in claim 1, wherein the electrical connections comprise wire bridges.
3. The interconnection element as claimed in claim 1, wherein the connection elements at least partly project from the surface of the interposer substrate.
4. The interconnection element as claimed in claim 1, wherein the connection elements have a diameter of approximately 25 μm.
5. The interconnection element as claimed in claim 1, wherein the connection elements have a surface refinement.
6. The interconnection element as claimed in claim 5, wherein the surface refinement comprises nickel and/or gold.
7. An interconnection element for a BGA housing having an interposer substrate, on which at least one semiconductor chip is mounted by means of chip bonding, the chip being electrically connected to a rewiring of the interposer substrate by means of wire bridges, and the rewiring of the interposer substrate being electrically connected to a printed circuit board by means of an interconnection element for electrical contact-connection, wherein the interconnection element comprises the interposer substrate and a multiplicity of connection elements that are formed in hollow-cylindrical or rod-shaped fashion and are fixedly connected to the interposer substrate, in a manner penetrating through the interposer substrate and through the rewiring.
US11657164 2003-09-17 2007-01-24 Interconnection element for BGA housings and method for producing the same Abandoned US20070123066A1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DE10343255.8 2003-09-17
DE2003143255 DE10343255B4 (en) 2003-09-17 2003-09-17 A method of making electrical connections between a semiconductor chip in a BGA package and a printed circuit board
US10944684 US7220666B2 (en) 2003-09-17 2004-09-17 Interconnection element for BGA housings and method for producing the same
US11657164 US20070123066A1 (en) 2003-09-17 2007-01-24 Interconnection element for BGA housings and method for producing the same

Applications Claiming Priority (1)

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US8988895B2 (en) * 2011-08-23 2015-03-24 Tessera, Inc. Interconnection elements with encased interconnects

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US7220666B2 (en) 2007-05-22 grant
DE10343255A1 (en) 2005-05-04 application

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