US20050247927A1 - Assemblies displaying differential negative resistance - Google Patents

Assemblies displaying differential negative resistance Download PDF

Info

Publication number
US20050247927A1
US20050247927A1 US11180692 US18069205A US2005247927A1 US 20050247927 A1 US20050247927 A1 US 20050247927A1 US 11180692 US11180692 US 11180692 US 18069205 A US18069205 A US 18069205A US 2005247927 A1 US2005247927 A1 US 2005247927A1
Authority
US
Grant status
Application
Patent type
Prior art keywords
layer
se
negative resistance
material
comprise
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US11180692
Inventor
Kristy Campbell
Original Assignee
Campbell Kristy A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Images

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L47/00Bulk negative resistance effect devices, e.g. Gunn-effect devices; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof
    • H01L47/005Processes or apparatus peculiar to the manufacture or treatment of these devices or of parts thereof
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/26Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
    • H01L29/267Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/88Tunnel-effect diodes
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L47/00Bulk negative resistance effect devices, e.g. Gunn-effect devices; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof

Abstract

The invention includes a device displaying differential negative resistance characterized by a current-versus-voltage profile having a peak-to-valley ratio of at least about 9. The invention also includes a semiconductor construction comprising a substrate, and a first layer over the substrate. The first layer comprises Ge and one or more of S, Te and Se. A second layer is over the first layer. The second layer comprises M and A, where M is a transition metal and A is one or more of O, S, Te and Se. A third layer is over the second layer, and comprises Ge and one or more of S, Te and Se. The first, second and third layers are together incorporated into an assembly displaying differential negative resistance. Additionally, the invention includes methodology for forming assemblies displaying differential negative resistance, such as tunnel diode assemblies.

Description

    TECHNICAL FIELD
  • The invention pertains to semiconductor constructions, such as, for example, assemblies displaying differential negative resistance. The invention also pertains to methods of forming assemblies displaying differential negative resistance. In particular aspects, the assemblies displaying differential negative resistance are tunnel diode assemblies.
  • BACKGROUND OF THE INVENTION
  • Assemblies displaying differential negative resistance, such as tunnel diode assemblies, can be used as components in various types of circuits, including, for example, logic circuits, and microwave oscillators. It can therefore be desired to incorporate assemblies displaying differential negative resistance into integrated circuit structures.
  • Various devices can be characterized in terms of the current passing through the devices relative to the amount of voltage applied to the devices. Some devices, such as, for example, tunnel diodes, will have an operating region in which an ohmic relationship of current as a function of voltage breaks down, and where a tunneling effect begins. A plot of current-versus-voltage for the devices will have a region referred to as the differential negative resistance (DNR) region, characterized by a non-ohmic relationship of current to voltage, and comprising a maximum in current value (typically referred to as a peak current value), and a minimum in current value (typically referred to as a valley current value).
  • The ratio of the current at the peak to the current at the valley can be utilized as a figure-of-merit for a device displaying differential negative resistance. Higher peak-to-valley ratios are considered to indicate better-quality devices. Presently, the highest peak-to-valley ratios obtained for integrated circuit tunnel diode devices are less than 8. It would be desirable to develop better devices displaying differential negative resistance which can be incorporated into integrated circuits.
  • It would also be desirable to develop methodology for incorporating such devices into integrated circuit constructions.
  • SUMMARY OF THE INVENTION
  • In one aspect, the invention pertains to a device displaying differential negative resistance characterized by a current-versus-voltage profile having a peak-to-valley ratio of at least about 9.
  • In one aspect, the invention pertains to a semiconductor construction comprising a substrate, and a first layer over the substrate. The first layer comprises Ge and one or more of S, Te and Se. A second layer is over the first layer. The second layer comprises M and A, where M is a transition metal and A is one or more of O, S, Te and Se. A third layer is over the second layer, and comprises Ge and one or more of S, Te and Se. The first, second and third layers are together incorporated into an assembly displaying differential negative resistance.
  • In one aspect, the invention encompasses a semiconductor construction which includes a substrate and an assembly displaying differential negative resistance supported by the substrate. The assembly comprises a material which includes Ge, a transition metal, and one or more of S, Te and Se.
  • The invention also encompasses methodology for forming the constructions and structures described above.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • Preferred embodiments of the invention are described below with reference to the following accompanying drawings.
  • FIG. 1 is a diagrammatic, cross-sectional view of a semiconductor wafer fragment at a preliminary processing stage in accordance with an aspect of the present invention.
  • FIG. 2 is a view of the FIG. 1 fragment shown at a processing stage subsequent to that of FIG. 1.
  • FIG. 3 is a view of the FIG. 1 fragment shown at a processing stage subsequent to that of FIG. 2.
  • FIG. 4 is a view of a semiconductor wafer fragment shown at a processing stage subsequent to that of FIG. 1, and in accordance with a second aspect of the invention.
  • FIG. 5 is a view of the FIG. 4 fragment shown at a processing stage subsequent to that of FIG. 4.
  • FIG. 6 is a view of the FIG. 4 fragment shown at a processing stage subsequent to that of FIG. 5.
  • FIG. 7 is a view of the FIG. 4 fragment shown at a processing stage subsequent to that of FIG. 6.
  • FIG. 8 is a graph of current-versus-voltage for an exemplary device displaying differential negative resistance formed in accordance with an aspect of the present invention.
  • FIG. 9 is a graph of current-versus-voltage for the so-called first tunnel region of an exemplary device displaying differential negative resistance formed in accordance with an aspect of the present invention.
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • A first aspect of the invention is described with reference to FIGS. 1-3. Referring initially to FIG. 1, a semiconductor fragment 10 is illustrated at a preliminary processing stage. Fragment 10 comprises a substrate 12. Substrate 12 can comprise, for example, monocrystalline silicon. To aid in interpretation of the claims that follow, the terms “semiconductive substrate” and “semiconductor substrate” are defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductive substrates described above.
  • A layer 14 is formed over substrate 12. Layer 14 is an optional insulative material, and can comprise, for example, silicon dioxide, silicon nitride, borophosphosilicate glass (BPSG), and/or other insulative materials. Additionally, various conductive structures (not shown) can extend into or through insulative material 14. Such conductive structures can comprise part of an integrated circuit supported by semiconductor substrate 12.
  • A conductive material 16 is formed over insulative material 14. Conductive material 16 can comprise, for example, various metals, such as, for example, one or more of silver, tungsten, titanium and platinum. In particular aspects, conductive material 16 can comprise titanium nitride, either alone, or in conjunction with one or more metals and/or metal alloys. Accordingly, conductive 16 can comprise, consist essentially of, or consist of one or more of Ag, W, Ti, TiN and Pt. Additionally, layer 16 can comprise a conductively-doped semiconductive material. Layer 16 can be referred to as a bottom electrode in the discussion that follows.
  • Referring to FIG. 2, a layer 18 is formed over bottom electrode 16. Layer 18 can be referred to as a first layer of an assembly displaying differential negative resistance (such as a tunnel diode assembly), and can comprise Ge and one or more of S, Te and Se.
  • In particular applications, layer 18 will comprise, consist essentially of, or consist of Ge and Se. For instance, layer 18 can comprise, consist essentially of, or consist of GexSe(1−x), such as, for example, Ge0.4Se0.6 (also referred to as Ge40Se60).
  • Layer 18 can be formed by, for example, either sputter deposition or evaporative deposition. If layer 18 is formed by sputter deposition, it can be formed from a target comprising both Ge and Se, and comprising the Ge and Se in a ratio which is identical to, or approximately, the desired ratio of the elements in layer 18. Accordingly, if the desired ratio of Ge40Se60 is to be formed in layer 18, the layer can be sputter-deposited from a target comprising approximately 60 parts Se for every 40 parts Ge. The target can be a mosaic target.
  • If layer 18 is formed by evaporative deposition, the layer can be formed by providing a source of Ge and a source of Se within a reaction chamber, and subsequently evaporating Ge and Se from the sources at appropriate rates to form the layer 18 having the desired stoichiometry of Ge and Se.
  • In the shown embodiment, layer 18 is physically against bottom electrode 16. It is to be understood, however, that optional intervening materials (not shown) can be provided between layers 16 and 18.
  • A layer 20 is formed over layer 18. Layer 20 can be referred to as a second layer of a construction displaying differential negative resistance. Layer 20 comprises M and A, where M is a transition metal and A is one or more of O, S, Te and Se. The M and A are typically present in a stoichiometry of M(2+Δ)A, where Δ is greater than 0. The transition metal (M) can be, for example, a metal selected from Group IB of the periodic table (also referred to as Group 11 under the so-called new notation), and accordingly can be copper or silver, for example. In particular embodiments, second layer 20 will comprise, consist essentially of, or consist of Ag(2+Δ)A, or Cu(2+Δ)A, where A is O, S, Te, and/or Se.
  • Layer 20 can be formed by, for example, either sputter deposition or evaporative deposition. In the shown aspect of the invention, layer 20 is physically against an upper surface of layer 18. Layer 20 can be formed by directly depositing a layer comprising M(2+Δ)A, or by depositing a layer which is subsequently converted to M(2+Δ)A. For instance, layer 20 can be formed by initially depositing a layer of Ag2Se, and subsequently diffusing additional Ag into the layer from regions proximate the layer to convert the layer to Ag(2+Δ)Se.
  • A layer 22 is formed over layer 20. Layer 22 can be referred to as a third layer of an assembly displaying differential negative resistance, and can comprise the same materials described previously for first layer 18. Accordingly, layer 22 can comprise, consist essentially of, or consist of Ge and one or more of S, Te and Se. Layer 22 can be formed by, for example, either sputter deposition or evaporative deposition. In the shown aspect of the invention, layer 22 is physically against an upper surface of second layer 20.
  • An electrically conductive layer 24 is formed over layer 22. Layer 24 can comprise the same metal (M) as is utilized in layer 20. Alternatively, layer 24 can comprise a different metal than is utilized in layer 20. In particular applications, layer 24 will comprise, consist essentially of, or consist of one or more transition elements. In an exemplary application, layer 24 will comprise, consist essentially of, or consist of silver. Layer 24 is typically very thin, and can comprise, for example, a thickness less than 300 angstroms, and in particular applications a thickness less than 50 angstroms. Conductive material 24 is physically against an upper surface of material 22 in the shown aspect of the invention.
  • A conductive material 26 is formed over layer 24. Conductive material 26 can be referred to as a top electrode of an assembly displaying differential negative resistance. Conductive material 26 can comprise identical materials as described above for incorporation into conductive material 16. Accordingly, bottom electrode 16 and top electrode 26 can comprise identical compositions as one another. Alternatively, top electrode 26 can comprise a different chemical composition than does bottom electrode 16. In particular applications, top electrode 26 will comprise, consist essentially of, or consist of one or both of tungsten and silver.
  • In the shown application, top electrode 26 is physically against conductive material 24. If material 26 and conductive layer 24 both comprise silver, the top electrode 26 can be formed in a separate processing step from silver-containing layer 24. Further, top electrode 26 can comprise a different silver composition than does layer 24. Specifically, layer 24 can consist of very pure silver, whereas layer 26 can comprise a sliver alloy, such, for example, a copper/silver alloy. If top electrode 26 comprises silver, it can be advantageous to omit thin layer 24 from the construction 10 of FIG. 2.
  • In the construction 10 of FIG. 2, layers 18 and 22 can be electrically insulative, and can be referred to as glass layers. Further, layers 18 and 22 can be significantly thinner than the layer 20 provided between layers 18 and 22. For instance, layers 18 and 22 can each be thinner than layer 20 by at least about 300 angstroms. In an exemplary application, layers 18 and 20 can each have thicknesses of at least about 150 angstroms, and the layer 20 can have a thickness of at least about 450 angstroms. In a specific application, layers 18 and 22 can each have thicknesses of about 150 angstroms, and layer 20 can have a thickness of about 470 angstroms.
  • Referring to FIG. 3, layers 16, 18, 20, 22, 24 and 26 are patterned into a construction 30. Such patterning can be accomplished by, for example, photolithographic processing utilized in conjunction with an appropriate etch, or series of etches, for extending a desired pattern through layers 16, 18, 20, 22, 24 and 26. In particular aspects, construction 30 can correspond to a tunnel diode construction.
  • Construction 30 is shown electrically connected with potentials 32 and 34 through top and bottom electrodes 16 and 26, respectively. Potential 32 is positive relative to potential 34, as indicated by the “+” and “−” symbols shown in FIG. 3. Potentials 32 and 34 can be utilized to drive current through construction 30, and accordingly operate construction 30 as part of an integrated circuit assembly. Construction 30 can be incorporated into the assembly as, for example, either a part of logic circuitry, or as part of a microwave oscillator construction. Potentials 32 and 34 can be generated by other circuitry (not shown) associated with substrate 12 and incorporated within an integrated circuit comprising construction 30.
  • Another aspect of the invention is described with reference to FIGS. 4-7. In referring to FIGS. 4-7, similar numbering will be utilized as was used above in describing the aspect of FIGS. 1-3, where appropriate.
  • Referring initially to FIG. 4, a construction 50 is illustrated at a preliminary stage of the second aspect of the invention. Construction 50 comprises substrate 12, insulative material 14, and bottom electrode 16 of the FIG. 1 construction. The construction 50 can be formed in processing subsequent to that described above with reference to FIG. 1, and accordingly can correspond to a processing stage subsequent to the stage of FIG. 1.
  • A material 52 is formed over bottom electrode 16. In the shown embodiment, material 52 is formed physically against bottom electrode 16. Material 52 comprises Ge and one or more of S, Te and Se. Material 52 can comprise, for example, GexSey, where “x” is from about 20 to about 30, and where “y” is from about 70 to about 80. The sum of x and y can be 100. Alternatively, GexSey, can be expressed as comprising “x” from about 0.2 to about 0.3, “y” from about 0.7 to about 0.8, and “x”+“y” equal to 1.
  • In particular applications, layer 52 will comprise Ge25Se75. In the shown application, layer 52 is formed physically against bottom electrode 16.
  • A conductive material 54 is formed in a layer over material 52. In the shown application, layer 54 is formed physically against material 52. Layer 54 can comprise, consist essentially of, or consist of a transition metal. In particular applications, layer 54 can comprise, consist essentially of, or consist of one or more transition metals selected from Group IB of the periodic table of the elements. For instance, layer 54 can comprise, consist essentially of, or consist of copper or silver. In an exemplary application, material 52 comprises GexSey, where “x” is from about 20 to about 30, and where “y” is from about 70 to about 80; and layer 54 comprises, consists essentially of, or consists of silver. Layer 54 can be formed to a thickness of, for example, about 100 Å and layer 52 can be formed to a thickness of, for example, about 500 Å.
  • Referring to FIG. 5, layer 54 is exposed to light 56 having an appropriate energy to cause at least some of the metal from layer 54 to disperse within material 52 (with the dispersed metal being indicated by stippling throughout material 52). Light 56 can comprise ultraviolet light. In an exemplary application a suitable wavelength of light 56 can be from about 200 nanometers to about 600 nanometers, which can disperse silver from layer 54 into material 52.
  • The amount of transition metal dispersed from layer 54 into material 52 is preferably equal to or greater than an amount which saturates material 52, but less than the amount which will crystallize separate phases of germanium-comprising constituents from within material 52. For instance, if material 52 comprises Ge25Se75, and layer comprises silver, the amount of silver dispersed into material 52 will preferably be sufficient to form phase-separated silver within the Ge/Se/Ag material 52 formed by dispersion of the silver into material 52. However, the amount of silver dispersed into material 52 will preferably be a low enough concentration to avoid crystallization of Ge/Se materials from within material 52. If such crystallization occurs, such can break a potential within the material and impede or destroy operation of a tunnel diode (or other device displaying differential negative resistance) comprising the material.
  • Material 52 and layer 54 can be formed by either sputter deposition or evaporative deposition. It is noted that even though only some of the metal of layer 54 is shown dispersed into material 52 in the shown application, the invention can encompass other applications wherein an entirety of layer 54, or substantially an entirety of the layer 54, is dispersed into material 52.
  • Referring to FIG. 6, a conductive material 26 is formed over layer 54. Conductive material 26 can be referred to as a top electrode, and can comprise identical components as described with reference to FIG. 2 for the material 26 of construction 10. Accordingly, material 26 can comprise, consist essentially of, or consist of Ag, W, Ti, TiN, TaN and/or Pt; and in particular embodiments can comprise, consist essentially of, or consist of one or both of Ag and W. In the shown application, material 26 is formed physically against the layer 54.
  • Referring to FIG. 7, layers 16, 52, 54 and 26 are patterned into an assembly 60. Such patterning can be accomplished utilizing photolithographic processing and one or more suitable etches. The assembly 60 can correspond to a tunnel diode assembly.
  • The bottom electrode 16 is electrically connected with a potential 32, and the top electrode 26 is electrically connected with a potential 34. The potential 32 is positive relative to the potential 34. Potentials 32 and 34 can, as described above with reference to FIG. 3, be part of an integrated circuit structure comprising assembly 60.
  • The construction 60 can function comparably to the construction 30 of FIG. 3. However, it may be more difficult to specifically tailor construction 60 for a particular desired operation than to tailor construction 30. However, it can, in particular applications, be easier to accomplish the fabrication of construction 60 than that of construction 30. Accordingly, both construction 60 and construction 30 can have advantages and disadvantages relative to one another.
  • The devices displaying differential negative resistance displaying differential negative resistance formed in accordance with aspects of the present invention can have exceptional operating characteristics. Such characteristics are described with reference to FIGS. 8 and 9. FIG. 8 illustrates a graph of current (measured in microAmps) versus voltage (measured in Volts) for a device of the type described with reference to FIG. 3, in which layers 18 and 22 comprise Ge40Se60, and in which layer 20 comprises Ag(2+Δ)Se, with Δ being greater than 0. The curve of FIG. 8 demonstrates that the device has a first tunnel region (or DNR) 100 at a voltage slightly above −0.5 Volts. FIG. 8 also shows that discreet quantum sets (illustrated generally by arrows 102 and 104) occur at about −2.0 Volts and at about −3.0 Volts. The discrete quantum sets indicate that the Ag(2+Δ)Se of the device comprises at least about 20 quantized energy levels (the number of peaks in sets 102 and 104, and which can also include the peak 100) when the layer is exposed to voltages having an absolute value of from 0 volts to 3.5 volts. In particular aspects, the material having the quantized energy levels can be considered to comprise, consist essentially of, or consist of Ag and Se. Further, the number of quantized energy levels can be considered to be, for example, at least 4, at least 6, at least 10, at least 15 and at least 20. The quantized energy levels can, in particular aspects, be considered resonances (possibly discrete or separate relative to one another) induced when the material is exposed to appropriate voltages between 0 volts and −3.5 volts (or, more generally, to appropriate voltages having an absolute value of from greater than 0 volts to 3.5 volts).
  • Referring to FIG. 9, the first tunnel region of a device formed in accordance with an aspect of the present invention is shown on an expanded scale relative to the scale of FIG. 8, in a graph 150 of current-versus-voltage. In accordance with convention, the device is described as having a peak (200) at about −0.3 volts and a valley (202) at about −0.6 volts. It is noted that the peak and valley are shown inverted in the graph of FIG. 9, but convention would be to flip the graph so that the peak-to-valley ratio is greater than 1. The shown device has a peak-to-valley ratio of about −50 microAmps/−0.4 microAmps, or in other words, about 130. The shown device is an exemplary device, and various other devices displaying differential negative resistance have been formed utilizing methodology of the present invention. Such devices have been found to have peak-to-valley ratios greater than 8, and specifically to have peak-to-valley ratios of at least 9, at least about 10, at least about 20, at least about 30, at least about 40, at least about 50, at least about 75, at least about 100, and greater than at least about 100 as demonstrated by FIG. 9. It is found that the peak-to-valley ratios of devices of the present invention typically do not vary significantly with temperature, and specifically that the ratios stay relatively constant across a temperature range of from about −30° C. to about 100° C.
  • The device of FIG. 9 has both the peak in current value (200) and the valley in current value (202) occurring within a voltage range of from less than 0 volts to greater than −1 volt, or in other words, occurring within a voltage range having an absolute value of from greater than 0 volt to less than 1 volt.
  • The assemblies of the present invention can have numerous applications, including, for example, applications in logic devices, and applications in microwave oscillator devices.
  • In compliance with the statute, the invention has been described in language more or less specific as to structural and methodical features. It is to be understood, however, that the invention is not limited to the specific features shown and described, since the means herein disclosed comprise preferred forms of putting the invention into effect. The invention is, therefore, claimed in any of its forms or modifications within the proper scope of the appended claims appropriately interpreted in accordance with the doctrine of equivalents.

Claims (9)

  1. 1-18. (canceled)
  2. 19. A composition containing Ag and Se, and comprising at least 4 quantized energy levels which are accessed when the composition is exposed to voltages having an absolute value of from 0 to 3.5 volts.
  3. 20. The composition of claim 19 comprising at least 6 quantized energy levels which are accessed when the composition is exposed to the voltages having an absolute value of from 0 to 3.5 volts.
  4. 21. The composition of claim 19 comprising at least 10 quantized energy levels which are accessed when the composition is composition to the voltages having an absolute value of from 0 to 3.5 volts.
  5. 22. The composition of claim 19 comprising at least 15 quantized energy levels which are accessed when the composition is exposed to the voltages having an absolute value of from 0 to 3.5 volts.
  6. 23. The composition of claim 19 comprising at least 20 quantized energy levels which are accessed when the composition is exposed to the voltages having an absolute value of from 0 to 3.5 volts.
  7. 24. The composition of claim 19 consisting essentially of Ag and Se.
  8. 25. The composition of claim 19 consisting essentially of Ag(2+Δ)Se, where Δ is greater than 0.
  9. 26-125. (canceled)
US11180692 2002-07-10 2005-07-14 Assemblies displaying differential negative resistance Abandoned US20050247927A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US10193529 US7015494B2 (en) 2002-07-10 2002-07-10 Assemblies displaying differential negative resistance
US11180692 US20050247927A1 (en) 2002-07-10 2005-07-14 Assemblies displaying differential negative resistance

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11180692 US20050247927A1 (en) 2002-07-10 2005-07-14 Assemblies displaying differential negative resistance

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US10193529 Division US7015494B2 (en) 2002-07-10 2002-07-10 Assemblies displaying differential negative resistance

Publications (1)

Publication Number Publication Date
US20050247927A1 true true US20050247927A1 (en) 2005-11-10

Family

ID=30114545

Family Applications (4)

Application Number Title Priority Date Filing Date
US10193529 Expired - Fee Related US7015494B2 (en) 2002-07-10 2002-07-10 Assemblies displaying differential negative resistance
US11180692 Abandoned US20050247927A1 (en) 2002-07-10 2005-07-14 Assemblies displaying differential negative resistance
US11181879 Active 2022-10-04 US7387909B2 (en) 2002-07-10 2005-07-15 Methods of forming assemblies displaying differential negative resistance
US12068020 Active 2022-07-21 US7879646B2 (en) 2002-07-10 2008-01-31 Assemblies displaying differential negative resistance, semiconductor constructions, and methods of forming assemblies displaying differential negative resistance

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US10193529 Expired - Fee Related US7015494B2 (en) 2002-07-10 2002-07-10 Assemblies displaying differential negative resistance

Family Applications After (2)

Application Number Title Priority Date Filing Date
US11181879 Active 2022-10-04 US7387909B2 (en) 2002-07-10 2005-07-15 Methods of forming assemblies displaying differential negative resistance
US12068020 Active 2022-07-21 US7879646B2 (en) 2002-07-10 2008-01-31 Assemblies displaying differential negative resistance, semiconductor constructions, and methods of forming assemblies displaying differential negative resistance

Country Status (1)

Country Link
US (4) US7015494B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070080345A1 (en) * 2005-09-16 2007-04-12 Joo Won J Volatile negative differential resistance device using metal nanoparticles
US20080121859A1 (en) * 2006-10-19 2008-05-29 Boise State University Forced ion migration for chalcogenide phase change memory device
US20100027324A1 (en) * 2008-08-01 2010-02-04 Boise State University Variable integrated analog resistor
US20110079709A1 (en) * 2009-10-07 2011-04-07 Campbell Kristy A Wide band sensor
US8284590B2 (en) 2010-05-06 2012-10-09 Boise State University Integratable programmable capacitive device
US8467236B2 (en) 2008-08-01 2013-06-18 Boise State University Continuously variable resistor

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7364644B2 (en) * 2002-08-29 2008-04-29 Micron Technology, Inc. Silver selenide film stoichiometry and morphology control in sputter deposition
US7190048B2 (en) * 2004-07-19 2007-03-13 Micron Technology, Inc. Resistance variable memory device and method of fabrication
JP4830275B2 (en) * 2004-07-22 2011-12-07 ソニー株式会社 Memory element
US7505309B2 (en) * 2005-04-20 2009-03-17 Micron Technology, Inc. Static RAM memory cell with DNR chalcogenide devices and method of forming
US7166520B1 (en) * 2005-08-08 2007-01-23 Silicon Genesis Corporation Thin handle substrate method and structure for fabricating devices using one or more films provided by a layer transfer process
US8154003B2 (en) * 2007-08-09 2012-04-10 Taiwan Semiconductor Manufacturing Company, Ltd. Resistive non-volatile memory device
JP4466738B2 (en) * 2008-01-09 2010-05-26 ソニー株式会社 Memory element and memory device
US8419176B2 (en) 2009-05-29 2013-04-16 Eastman Kodak Company Aqueous compositions with improved silicon corrosion characteristics
US20130237661A1 (en) 2011-12-22 2013-09-12 Thomas B. Brust Inkjet ink composition
US9583703B2 (en) 2015-06-01 2017-02-28 Boise State University Tunable variable resistance memory device
US9583699B2 (en) 2015-06-01 2017-02-28 Boise State University Tunable variable resistance memory device

Citations (88)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3271591A (en) * 1963-09-20 1966-09-06 Energy Conversion Devices Inc Symmetrical current controlling device
US3961314A (en) * 1974-03-05 1976-06-01 Energy Conversion Devices, Inc. Structure and method for producing an image
US3966317A (en) * 1974-04-08 1976-06-29 Energy Conversion Devices, Inc. Dry process production of archival microform records from hard copy
US3983542A (en) * 1970-08-13 1976-09-28 Energy Conversion Devices, Inc. Method and apparatus for recording information
US4029520A (en) * 1972-10-02 1977-06-14 Minnesota Mining And Manufacturing Company Thermoelectric generators that incorporate self-segmenting thermoelectric legs
US4267261A (en) * 1971-07-15 1981-05-12 Energy Conversion Devices, Inc. Method for full format imaging
US4597162A (en) * 1983-01-18 1986-07-01 Energy Conversion Devices, Inc. Method for making, parallel preprogramming or field programming of electronic matrix arrays
US4608296A (en) * 1983-12-06 1986-08-26 Energy Conversion Devices, Inc. Superconducting films and devices exhibiting AC to DC conversion
US4637895A (en) * 1985-04-01 1987-01-20 Energy Conversion Devices, Inc. Gas mixtures for the vapor deposition of semiconductor material
US4646266A (en) * 1984-09-28 1987-02-24 Energy Conversion Devices, Inc. Programmable semiconductor structures and methods for using the same
US4664939A (en) * 1985-04-01 1987-05-12 Energy Conversion Devices, Inc. Vertical semiconductor processor
US4668968A (en) * 1984-05-14 1987-05-26 Energy Conversion Devices, Inc. Integrated circuit compatible thin film field effect transistor and method of making same
US4670763A (en) * 1984-05-14 1987-06-02 Energy Conversion Devices, Inc. Thin film field effect transistor
US4673957A (en) * 1984-05-14 1987-06-16 Energy Conversion Devices, Inc. Integrated circuit compatible thin film field effect transistor and method of making same
US4678679A (en) * 1984-06-25 1987-07-07 Energy Conversion Devices, Inc. Continuous deposition of activated process gases
US4728406A (en) * 1986-08-18 1988-03-01 Energy Conversion Devices, Inc. Method for plasma - coating a semiconductor body
US4737379A (en) * 1982-09-24 1988-04-12 Energy Conversion Devices, Inc. Plasma deposited coatings, and low temperature plasma method of making same
US4766471A (en) * 1986-01-23 1988-08-23 Energy Conversion Devices, Inc. Thin film electro-optical devices
US4769338A (en) * 1984-05-14 1988-09-06 Energy Conversion Devices, Inc. Thin film field effect transistor and method of making same
US4775425A (en) * 1987-07-27 1988-10-04 Energy Conversion Devices, Inc. P and n-type microcrystalline semiconductor alloy material including band gap widening elements, devices utilizing same
US4788594A (en) * 1986-10-15 1988-11-29 Energy Conversion Devices, Inc. Solid state electronic camera including thin film matrix of photosensors
US4809044A (en) * 1986-08-22 1989-02-28 Energy Conversion Devices, Inc. Thin film overvoltage protection devices
US4818717A (en) * 1986-06-27 1989-04-04 Energy Conversion Devices, Inc. Method for making electronic matrix arrays
US4843443A (en) * 1984-05-14 1989-06-27 Energy Conversion Devices, Inc. Thin film field effect transistor and method of making same
US4845533A (en) * 1986-08-22 1989-07-04 Energy Conversion Devices, Inc. Thin film electrical devices with amorphous carbon electrodes and method of making same
US4853785A (en) * 1986-10-15 1989-08-01 Energy Conversion Devices, Inc. Electronic camera including electronic signal storage cartridge
US4891330A (en) * 1987-07-27 1990-01-02 Energy Conversion Devices, Inc. Method of fabricating n-type and p-type microcrystalline semiconductor alloy material including band gap widening elements
US5128099A (en) * 1991-02-15 1992-07-07 Energy Conversion Devices, Inc. Congruent state changeable optical memory material and device
US5159661A (en) * 1990-10-05 1992-10-27 Energy Conversion Devices, Inc. Vertically interconnected parallel distributed processor
US5177567A (en) * 1991-07-19 1993-01-05 Energy Conversion Devices, Inc. Thin-film structure for chalcogenide electrical switching devices and process therefor
US5296716A (en) * 1991-01-18 1994-03-22 Energy Conversion Devices, Inc. Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom
US5335219A (en) * 1991-01-18 1994-08-02 Ovshinsky Stanford R Homogeneous composition of microcrystalline semiconductor material, semiconductor devices and directly overwritable memory elements fabricated therefrom, and arrays fabricated from the memory elements
US5341328A (en) * 1991-01-18 1994-08-23 Energy Conversion Devices, Inc. Electrically erasable memory elements having reduced switching current requirements and increased write/erase cycle life
US5359205A (en) * 1991-11-07 1994-10-25 Energy Conversion Devices, Inc. Electrically erasable memory elements characterized by reduced current and improved thermal stability
US5406509A (en) * 1991-01-18 1995-04-11 Energy Conversion Devices, Inc. Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom
US5414271A (en) * 1991-01-18 1995-05-09 Energy Conversion Devices, Inc. Electrically erasable memory elements having improved set resistance stability
US5500532A (en) * 1994-08-18 1996-03-19 Arizona Board Of Regents Personal electronic dosimeter
US5534712A (en) * 1991-01-18 1996-07-09 Energy Conversion Devices, Inc. Electrically erasable memory elements characterized by reduced current and improved thermal stability
US5534711A (en) * 1991-01-18 1996-07-09 Energy Conversion Devices, Inc. Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom
US5536947A (en) * 1991-01-18 1996-07-16 Energy Conversion Devices, Inc. Electrically erasable, directly overwritable, multibit single cell memory element and arrays fabricated therefrom
US5543737A (en) * 1995-02-10 1996-08-06 Energy Conversion Devices, Inc. Logical operation circuit employing two-terminal chalcogenide switches
US5591501A (en) * 1995-12-20 1997-01-07 Energy Conversion Devices, Inc. Optical recording medium having a plurality of discrete phase change data recording points
US5596522A (en) * 1991-01-18 1997-01-21 Energy Conversion Devices, Inc. Homogeneous compositions of microcrystalline semiconductor material, semiconductor devices and directly overwritable memory elements fabricated therefrom, and arrays fabricated from the memory elements
US5714768A (en) * 1995-10-24 1998-02-03 Energy Conversion Devices, Inc. Second-layer phase change memory array on top of a logic device
US5825046A (en) * 1996-10-28 1998-10-20 Energy Conversion Devices, Inc. Composite memory material comprising a mixture of phase-change memory material and dielectric material
US5912839A (en) * 1998-06-23 1999-06-15 Energy Conversion Devices, Inc. Universal memory element and method of programming same
US5933365A (en) * 1997-06-19 1999-08-03 Energy Conversion Devices, Inc. Memory element with energy control mechanism
US6011757A (en) * 1998-01-27 2000-01-04 Ovshinsky; Stanford R. Optical recording media having increased erasability
US6087674A (en) * 1996-10-28 2000-07-11 Energy Conversion Devices, Inc. Memory element with memory material comprising phase-change material and dielectric material
US6141241A (en) * 1998-06-23 2000-10-31 Energy Conversion Devices, Inc. Universal memory element with systems employing same and apparatus and method for reading, writing and programming same
USRE37259E1 (en) * 1996-04-19 2001-07-03 Energy Conversion Devices, Inc. Multibit single cell memory element having tapered contact
US20020000666A1 (en) * 1998-08-31 2002-01-03 Michael N. Kozicki Self-repairing interconnections for electrical circuits
US6339544B1 (en) * 2000-09-29 2002-01-15 Intel Corporation Method to enhance performance of thermal resistor device
US6404665B1 (en) * 2000-09-29 2002-06-11 Intel Corporation Compositionally modified resistive electrode
US6429064B1 (en) * 2000-09-29 2002-08-06 Intel Corporation Reduced contact area of sidewall conductor
US6437383B1 (en) * 2000-12-21 2002-08-20 Intel Corporation Dual trench isolation for a phase-change memory cell and method of making same
US6462984B1 (en) * 2001-06-29 2002-10-08 Intel Corporation Biasing scheme of floating unselected wordlines and bitlines of a diode-based memory array
US6507061B1 (en) * 2001-08-31 2003-01-14 Intel Corporation Multiple layer phase-change memory
US6512241B1 (en) * 2001-12-31 2003-01-28 Intel Corporation Phase change material memory device
US6511862B2 (en) * 2001-06-30 2003-01-28 Ovonyx, Inc. Modified contact for programmable devices
US6511867B2 (en) * 2001-06-30 2003-01-28 Ovonyx, Inc. Utilizing atomic layer deposition for programmable device
US6514805B2 (en) * 2001-06-30 2003-02-04 Intel Corporation Trench sidewall profile for device isolation
US6531373B2 (en) * 2000-12-27 2003-03-11 Ovonyx, Inc. Method of forming a phase-change memory cell using silicon on insulator low electrode in charcogenide elements
US20030048744A1 (en) * 2001-09-01 2003-03-13 Ovshinsky Stanford R. Increased data storage in optical data storage and retrieval systems using blue lasers and/or plasmon lenses
US6534781B2 (en) * 2000-12-26 2003-03-18 Ovonyx, Inc. Phase-change memory bipolar array utilizing a single shallow trench isolation for creating an individual active area region for two memory array elements and one bipolar base contact
US6545287B2 (en) * 2001-09-07 2003-04-08 Intel Corporation Using selective deposition to form phase-change memory cells
US6545907B1 (en) * 2001-10-30 2003-04-08 Ovonyx, Inc. Technique and apparatus for performing write operations to a phase change material memory device
US6555860B2 (en) * 2000-09-29 2003-04-29 Intel Corporation Compositionally modified resistive electrode
US6563164B2 (en) * 2000-09-29 2003-05-13 Ovonyx, Inc. Compositionally modified resistive electrode
US6567293B1 (en) * 2000-09-29 2003-05-20 Ovonyx, Inc. Single level metal memory cell using chalcogenide cladding
US6566700B2 (en) * 2001-10-11 2003-05-20 Ovonyx, Inc. Carbon-containing interfacial layer for phase-change memory
US6569705B2 (en) * 2000-12-21 2003-05-27 Intel Corporation Metal structure for a phase-change memory device
US6570784B2 (en) * 2001-06-29 2003-05-27 Ovonyx, Inc. Programming a phase-change material memory
US6576921B2 (en) * 2001-11-08 2003-06-10 Intel Corporation Isolating phase change material memory cells
US6586761B2 (en) * 2001-09-07 2003-07-01 Intel Corporation Phase change material memory device
US6590807B2 (en) * 2001-08-02 2003-07-08 Intel Corporation Method for reading a structural phase-change memory
US6589714B2 (en) * 2001-06-26 2003-07-08 Ovonyx, Inc. Method for making programmable resistance memory element using silylated photoresist
US6605527B2 (en) * 2001-06-30 2003-08-12 Intel Corporation Reduced area intersection between electrode and programming element
US20030155589A1 (en) * 2002-02-20 2003-08-21 Campbell Kristy A. Silver-selenide/chalcogenide glass stack for resistance variable memory
US6613604B2 (en) * 2001-08-02 2003-09-02 Ovonyx, Inc. Method for making small pore for use in programmable resistance memory element
US20030173558A1 (en) * 2002-03-14 2003-09-18 Campbell Kristy A. Methods and apparatus for resistance variable material cells
US6625054B2 (en) * 2001-12-28 2003-09-23 Intel Corporation Method and apparatus to program a phase change memory
US6673700B2 (en) * 2001-06-30 2004-01-06 Ovonyx, Inc. Reduced area intersection between electrode and programming element
US6687427B2 (en) * 2000-12-29 2004-02-03 Intel Corporation Optic switch
US6690026B2 (en) * 2001-09-28 2004-02-10 Intel Corporation Method of fabricating a three-dimensional array of active media
US6696355B2 (en) * 2000-12-14 2004-02-24 Ovonyx, Inc. Method to selectively increase the top resistance of the lower programming electrode in a phase-change memory
US20040035401A1 (en) * 2002-08-26 2004-02-26 Subramanian Ramachandran Hydrogen powered scooter
US6714954B2 (en) * 2002-05-10 2004-03-30 Energy Conversion Devices, Inc. Methods of factoring and modular arithmetic

Family Cites Families (66)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3622319A (en) 1966-10-20 1971-11-23 Western Electric Co Nonreflecting photomasks and methods of making same
US3626257A (en) 1969-04-01 1971-12-07 Ibm Semiconductor device with superlattice region
US3743847A (en) 1971-06-01 1973-07-03 Motorola Inc Amorphous silicon film as a uv filter
US4177474A (en) 1977-05-18 1979-12-04 Energy Conversion Devices, Inc. High temperature amorphous semiconductor member and method of making the same
JPS5620695B2 (en) 1978-11-07 1981-05-15
DE2901303C2 (en) 1979-01-15 1984-04-19 Max Planck Gesellschaft Zur Foerderung Der Wissenschaften E.V., 3400 Goettingen, De
US4312938A (en) 1979-07-06 1982-01-26 Drexler Technology Corporation Method for making a broadband reflective laser recording and data storage medium with absorptive underlayer
US4269935A (en) 1979-07-13 1981-05-26 Ionomet Company, Inc. Process of doping silver image in chalcogenide layer
JPS6024580B2 (en) 1980-03-10 1985-06-13 Nippon Telegraph & Telephone
US4499557A (en) 1980-10-28 1985-02-12 Energy Conversion Devices, Inc. Programmable cell for use in programmable electronic arrays
US4405710A (en) 1981-06-22 1983-09-20 Cornell Research Foundation, Inc. Ion beam exposure of (g-Gex -Se1-x) inorganic resists
US4795657A (en) 1984-04-13 1989-01-03 Energy Conversion Devices, Inc. Method of fabricating a programmable array
FR2580273B1 (en) * 1985-03-25 1990-01-05 Rhone Poulenc Spec Chim Process for separation of cerium and rare earths
US4710899A (en) 1985-06-10 1987-12-01 Energy Conversion Devices, Inc. Data storage medium incorporating a transition metal for increased switching speed
FR2600323B1 (en) * 1986-06-18 1991-02-15 Omnium Traitement Valorisa gas transfer device and flotation in the water treatment to be purified
US4847674A (en) 1987-03-10 1989-07-11 Advanced Micro Devices, Inc. High speed interconnect system with refractory non-dogbone contacts and an active electromigration suppression mechanism
GB8910854D0 (en) 1989-05-11 1989-06-28 British Petroleum Co Plc Semiconductor device
GB8928992D0 (en) * 1989-12-22 1990-02-28 Univ Southampton Improved optical fibre laser
JPH0770731B2 (en) 1990-11-22 1995-07-31 松下電器産業株式会社 Electrical plastic element
US5166758A (en) 1991-01-18 1992-11-24 Energy Conversion Devices, Inc. Electrically erasable phase change memory
US5219788A (en) 1991-02-25 1993-06-15 Ibm Corporation Bilayer metallization cap for photolithography
US5238862A (en) 1992-03-18 1993-08-24 Micron Technology, Inc. Method of forming a stacked capacitor with striated electrode
US5512328A (en) 1992-08-07 1996-04-30 Hitachi, Ltd. Method for forming a pattern and forming a thin film used in pattern formation
US5350484A (en) 1992-09-08 1994-09-27 Intel Corporation Method for the anisotropic etching of metal films in the fabrication of interconnects
US5709978A (en) * 1993-06-18 1998-01-20 Hitachi, Ltd. Supperresolution readout thin film and information recording medium
BE1007902A3 (en) 1993-12-23 1995-11-14 Philips Electronics Nv Switching element with memory with schottky barrier tunnel.
US5415271A (en) * 1994-09-12 1995-05-16 Foster; Raymond K. Reciprocating floor conveyor with overlay, protective plate
JP2643870B2 (en) 1994-11-29 1997-08-20 日本電気株式会社 The method of manufacturing a semiconductor memory device
US6420725B1 (en) 1995-06-07 2002-07-16 Micron Technology, Inc. Method and apparatus for forming an integrated circuit electrode having a reduced contact area
JP3363154B2 (en) 1995-06-07 2003-01-08 ミクロン テクノロジー、インコーポレイテッド Stack / trench diode for use with multi-state material in the non-volatile memory cell
US5751012A (en) 1995-06-07 1998-05-12 Micron Technology, Inc. Polysilicon pillar diode for use in a non-volatile memory cell
US5869843A (en) 1995-06-07 1999-02-09 Micron Technology, Inc. Memory array having a multi-state element and method for forming such array or cells thereof
US5879955A (en) 1995-06-07 1999-03-09 Micron Technology, Inc. Method for fabricating an array of ultra-small pores for chalcogenide memory cells
US5789758A (en) 1995-06-07 1998-08-04 Micron Technology, Inc. Chalcogenide memory cell with a plurality of chalcogenide electrodes
US5694054A (en) 1995-11-28 1997-12-02 Energy Conversion Devices, Inc. Integrated drivers for flat panel displays employing chalcogenide logic elements
US6653733B1 (en) 1996-02-23 2003-11-25 Micron Technology, Inc. Conductors in semiconductor devices
US5852870A (en) 1996-04-24 1998-12-29 Amkor Technology, Inc. Method of making grid array assembly
US5761115A (en) 1996-05-30 1998-06-02 Axon Technologies Corporation Programmable metallization cell structure and method of making same
US5789277A (en) 1996-07-22 1998-08-04 Micron Technology, Inc. Method of making chalogenide memory device
US5998244A (en) 1996-08-22 1999-12-07 Micron Technology, Inc. Memory cell incorporating a chalcogenide element and method of making same
US5846889A (en) 1997-03-14 1998-12-08 The United States Of America As Represented By The Secretary Of The Navy Infrared transparent selenide glasses
US5998066A (en) 1997-05-16 1999-12-07 Aerial Imaging Corporation Gray scale mask and depth pattern transfer technique using inorganic chalcogenide glass
US6051511A (en) 1997-07-31 2000-04-18 Micron Technology, Inc. Method and apparatus for reducing isolation stress in integrated circuits
CA2312841C (en) 1997-12-04 2007-05-22 Axon Technologies Corporation Programmable sub-surface aggregating metallization structure and method of making same
US6297170B1 (en) 1998-06-23 2001-10-02 Vlsi Technology, Inc. Sacrificial multilayer anti-reflective coating for mos gate formation
US6469364B1 (en) 1998-08-31 2002-10-22 Arizona Board Of Regents Programmable interconnection system for electrical circuits
US6177338B1 (en) 1999-02-08 2001-01-23 Taiwan Semiconductor Manufacturing Company Two step barrier process
CA2362283A1 (en) 1999-02-11 2000-08-17 Arizona Board Of Regents Programmable microelectronic devices and methods of forming and programming same
US6143604A (en) 1999-06-04 2000-11-07 Taiwan Semiconductor Manufacturing Company Method for fabricating small-size two-step contacts for word-line strapping on dynamic random access memory (DRAM)
US6350679B1 (en) 1999-08-03 2002-02-26 Micron Technology, Inc. Methods of providing an interlevel dielectric layer intermediate different elevation conductive metal layers in the fabrication of integrated circuitry
US6423628B1 (en) 1999-10-22 2002-07-23 Lsi Logic Corporation Method of forming integrated circuit structure having low dielectric constant material and having silicon oxynitride caps over closely spaced apart metal lines
US6501111B1 (en) 2000-06-30 2002-12-31 Intel Corporation Three-dimensional (3D) programmable device
US7153468B2 (en) * 2000-08-18 2006-12-26 Honeywell International Inc. Physical vapor deposition targets and methods of formation
WO2002021542A1 (en) 2000-09-08 2002-03-14 Axon Technologies Corporation Microelectronic programmable device and methods of forming and programming the same
US6635914B2 (en) 2000-09-08 2003-10-21 Axon Technologies Corp. Microelectronic programmable device and methods of forming and programming the same
US6409064B1 (en) * 2000-09-13 2002-06-25 Jason S. Bayley Locking tool box
US6649928B2 (en) 2000-12-13 2003-11-18 Intel Corporation Method to selectively remove one side of a conductive bottom electrode of a phase-change memory cell and structure obtained thereby
US6646297B2 (en) 2000-12-26 2003-11-11 Ovonyx, Inc. Lower electrode isolation in a double-wide trench
US6348365B1 (en) 2001-03-02 2002-02-19 Micron Technology, Inc. PCRAM cell manufacturing
US6480438B1 (en) 2001-06-12 2002-11-12 Ovonyx, Inc. Providing equal cell programming conditions across a large and high density array of phase-change memory cells
US6617283B2 (en) * 2001-06-22 2003-09-09 Ut-Battelle, Llc Method of depositing an electrically conductive oxide buffer layer on a textured substrate and articles formed therefrom
US6487113B1 (en) 2001-06-29 2002-11-26 Ovonyx, Inc. Programming a phase-change memory with slow quench time
US6642102B2 (en) 2001-06-30 2003-11-04 Intel Corporation Barrier material encapsulation of programmable material
US6667900B2 (en) 2001-12-28 2003-12-23 Ovonyx, Inc. Method and apparatus to operate a memory cell
US6707172B2 (en) * 2002-04-15 2004-03-16 James Tronolone Self-normalling jack with electronically controlled normal circuit or relay
US6867996B2 (en) * 2002-08-29 2005-03-15 Micron Technology, Inc. Single-polarity programmable resistance-variable memory element

Patent Citations (99)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3271591A (en) * 1963-09-20 1966-09-06 Energy Conversion Devices Inc Symmetrical current controlling device
US3983542A (en) * 1970-08-13 1976-09-28 Energy Conversion Devices, Inc. Method and apparatus for recording information
US3988720A (en) * 1970-08-13 1976-10-26 Energy Conversion Devices, Inc. Recording and retrieving information in an amorphous memory material using a catalytic material
US4267261A (en) * 1971-07-15 1981-05-12 Energy Conversion Devices, Inc. Method for full format imaging
US4029520A (en) * 1972-10-02 1977-06-14 Minnesota Mining And Manufacturing Company Thermoelectric generators that incorporate self-segmenting thermoelectric legs
US3961314A (en) * 1974-03-05 1976-06-01 Energy Conversion Devices, Inc. Structure and method for producing an image
US3966317A (en) * 1974-04-08 1976-06-29 Energy Conversion Devices, Inc. Dry process production of archival microform records from hard copy
US4737379A (en) * 1982-09-24 1988-04-12 Energy Conversion Devices, Inc. Plasma deposited coatings, and low temperature plasma method of making same
US4597162A (en) * 1983-01-18 1986-07-01 Energy Conversion Devices, Inc. Method for making, parallel preprogramming or field programming of electronic matrix arrays
US4608296A (en) * 1983-12-06 1986-08-26 Energy Conversion Devices, Inc. Superconducting films and devices exhibiting AC to DC conversion
US4673957A (en) * 1984-05-14 1987-06-16 Energy Conversion Devices, Inc. Integrated circuit compatible thin film field effect transistor and method of making same
US4843443A (en) * 1984-05-14 1989-06-27 Energy Conversion Devices, Inc. Thin film field effect transistor and method of making same
US4668968A (en) * 1984-05-14 1987-05-26 Energy Conversion Devices, Inc. Integrated circuit compatible thin film field effect transistor and method of making same
US4670763A (en) * 1984-05-14 1987-06-02 Energy Conversion Devices, Inc. Thin film field effect transistor
US4769338A (en) * 1984-05-14 1988-09-06 Energy Conversion Devices, Inc. Thin film field effect transistor and method of making same
US4678679A (en) * 1984-06-25 1987-07-07 Energy Conversion Devices, Inc. Continuous deposition of activated process gases
US4646266A (en) * 1984-09-28 1987-02-24 Energy Conversion Devices, Inc. Programmable semiconductor structures and methods for using the same
US4696758A (en) * 1985-04-01 1987-09-29 Energy Conversion Devices, Inc. Gas mixtures for the vapor deposition of semiconductor material
US4698234A (en) * 1985-04-01 1987-10-06 Energy Conversion Devices, Inc. Vapor deposition of semiconductor material
US4637895A (en) * 1985-04-01 1987-01-20 Energy Conversion Devices, Inc. Gas mixtures for the vapor deposition of semiconductor material
US4664939A (en) * 1985-04-01 1987-05-12 Energy Conversion Devices, Inc. Vertical semiconductor processor
US4766471A (en) * 1986-01-23 1988-08-23 Energy Conversion Devices, Inc. Thin film electro-optical devices
US4818717A (en) * 1986-06-27 1989-04-04 Energy Conversion Devices, Inc. Method for making electronic matrix arrays
US4728406A (en) * 1986-08-18 1988-03-01 Energy Conversion Devices, Inc. Method for plasma - coating a semiconductor body
US4809044A (en) * 1986-08-22 1989-02-28 Energy Conversion Devices, Inc. Thin film overvoltage protection devices
US4845533A (en) * 1986-08-22 1989-07-04 Energy Conversion Devices, Inc. Thin film electrical devices with amorphous carbon electrodes and method of making same
US4853785A (en) * 1986-10-15 1989-08-01 Energy Conversion Devices, Inc. Electronic camera including electronic signal storage cartridge
US4788594A (en) * 1986-10-15 1988-11-29 Energy Conversion Devices, Inc. Solid state electronic camera including thin film matrix of photosensors
US4891330A (en) * 1987-07-27 1990-01-02 Energy Conversion Devices, Inc. Method of fabricating n-type and p-type microcrystalline semiconductor alloy material including band gap widening elements
US4775425A (en) * 1987-07-27 1988-10-04 Energy Conversion Devices, Inc. P and n-type microcrystalline semiconductor alloy material including band gap widening elements, devices utilizing same
US5159661A (en) * 1990-10-05 1992-10-27 Energy Conversion Devices, Inc. Vertically interconnected parallel distributed processor
US5534712A (en) * 1991-01-18 1996-07-09 Energy Conversion Devices, Inc. Electrically erasable memory elements characterized by reduced current and improved thermal stability
US5536947A (en) * 1991-01-18 1996-07-16 Energy Conversion Devices, Inc. Electrically erasable, directly overwritable, multibit single cell memory element and arrays fabricated therefrom
US5296716A (en) * 1991-01-18 1994-03-22 Energy Conversion Devices, Inc. Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom
US5335219A (en) * 1991-01-18 1994-08-02 Ovshinsky Stanford R Homogeneous composition of microcrystalline semiconductor material, semiconductor devices and directly overwritable memory elements fabricated therefrom, and arrays fabricated from the memory elements
US5341328A (en) * 1991-01-18 1994-08-23 Energy Conversion Devices, Inc. Electrically erasable memory elements having reduced switching current requirements and increased write/erase cycle life
US5596522A (en) * 1991-01-18 1997-01-21 Energy Conversion Devices, Inc. Homogeneous compositions of microcrystalline semiconductor material, semiconductor devices and directly overwritable memory elements fabricated therefrom, and arrays fabricated from the memory elements
US5534711A (en) * 1991-01-18 1996-07-09 Energy Conversion Devices, Inc. Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom
US5414271A (en) * 1991-01-18 1995-05-09 Energy Conversion Devices, Inc. Electrically erasable memory elements having improved set resistance stability
US5406509A (en) * 1991-01-18 1995-04-11 Energy Conversion Devices, Inc. Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom
US5128099A (en) * 1991-02-15 1992-07-07 Energy Conversion Devices, Inc. Congruent state changeable optical memory material and device
US5177567A (en) * 1991-07-19 1993-01-05 Energy Conversion Devices, Inc. Thin-film structure for chalcogenide electrical switching devices and process therefor
US5359205A (en) * 1991-11-07 1994-10-25 Energy Conversion Devices, Inc. Electrically erasable memory elements characterized by reduced current and improved thermal stability
US5500532A (en) * 1994-08-18 1996-03-19 Arizona Board Of Regents Personal electronic dosimeter
US5543737A (en) * 1995-02-10 1996-08-06 Energy Conversion Devices, Inc. Logical operation circuit employing two-terminal chalcogenide switches
US5714768A (en) * 1995-10-24 1998-02-03 Energy Conversion Devices, Inc. Second-layer phase change memory array on top of a logic device
US5591501A (en) * 1995-12-20 1997-01-07 Energy Conversion Devices, Inc. Optical recording medium having a plurality of discrete phase change data recording points
USRE37259E1 (en) * 1996-04-19 2001-07-03 Energy Conversion Devices, Inc. Multibit single cell memory element having tapered contact
US5825046A (en) * 1996-10-28 1998-10-20 Energy Conversion Devices, Inc. Composite memory material comprising a mixture of phase-change memory material and dielectric material
US6087674A (en) * 1996-10-28 2000-07-11 Energy Conversion Devices, Inc. Memory element with memory material comprising phase-change material and dielectric material
US5933365A (en) * 1997-06-19 1999-08-03 Energy Conversion Devices, Inc. Memory element with energy control mechanism
US6011757A (en) * 1998-01-27 2000-01-04 Ovshinsky; Stanford R. Optical recording media having increased erasability
US6141241A (en) * 1998-06-23 2000-10-31 Energy Conversion Devices, Inc. Universal memory element with systems employing same and apparatus and method for reading, writing and programming same
US5912839A (en) * 1998-06-23 1999-06-15 Energy Conversion Devices, Inc. Universal memory element and method of programming same
US6388324B2 (en) * 1998-08-31 2002-05-14 Arizona Board Of Regents Self-repairing interconnections for electrical circuits
US20020000666A1 (en) * 1998-08-31 2002-01-03 Michael N. Kozicki Self-repairing interconnections for electrical circuits
US6563164B2 (en) * 2000-09-29 2003-05-13 Ovonyx, Inc. Compositionally modified resistive electrode
US6339544B1 (en) * 2000-09-29 2002-01-15 Intel Corporation Method to enhance performance of thermal resistor device
US6429064B1 (en) * 2000-09-29 2002-08-06 Intel Corporation Reduced contact area of sidewall conductor
US6555860B2 (en) * 2000-09-29 2003-04-29 Intel Corporation Compositionally modified resistive electrode
US6404665B1 (en) * 2000-09-29 2002-06-11 Intel Corporation Compositionally modified resistive electrode
US6621095B2 (en) * 2000-09-29 2003-09-16 Ovonyx, Inc. Method to enhance performance of thermal resistor device
US6597009B2 (en) * 2000-09-29 2003-07-22 Intel Corporation Reduced contact area of sidewall conductor
US6567293B1 (en) * 2000-09-29 2003-05-20 Ovonyx, Inc. Single level metal memory cell using chalcogenide cladding
US6696355B2 (en) * 2000-12-14 2004-02-24 Ovonyx, Inc. Method to selectively increase the top resistance of the lower programming electrode in a phase-change memory
US6569705B2 (en) * 2000-12-21 2003-05-27 Intel Corporation Metal structure for a phase-change memory device
US6437383B1 (en) * 2000-12-21 2002-08-20 Intel Corporation Dual trench isolation for a phase-change memory cell and method of making same
US6534781B2 (en) * 2000-12-26 2003-03-18 Ovonyx, Inc. Phase-change memory bipolar array utilizing a single shallow trench isolation for creating an individual active area region for two memory array elements and one bipolar base contact
US6593176B2 (en) * 2000-12-26 2003-07-15 Ovonyx, Inc. Method for forming phase-change memory bipolar array utilizing a single shallow trench isolation for creating an individual active area region for two memory array elements and one bipolar base contact
US6531373B2 (en) * 2000-12-27 2003-03-11 Ovonyx, Inc. Method of forming a phase-change memory cell using silicon on insulator low electrode in charcogenide elements
US6687427B2 (en) * 2000-12-29 2004-02-03 Intel Corporation Optic switch
US6589714B2 (en) * 2001-06-26 2003-07-08 Ovonyx, Inc. Method for making programmable resistance memory element using silylated photoresist
US6462984B1 (en) * 2001-06-29 2002-10-08 Intel Corporation Biasing scheme of floating unselected wordlines and bitlines of a diode-based memory array
US6570784B2 (en) * 2001-06-29 2003-05-27 Ovonyx, Inc. Programming a phase-change material memory
US6687153B2 (en) * 2001-06-29 2004-02-03 Ovonyx, Inc. Programming a phase-change material memory
US6511862B2 (en) * 2001-06-30 2003-01-28 Ovonyx, Inc. Modified contact for programmable devices
US6511867B2 (en) * 2001-06-30 2003-01-28 Ovonyx, Inc. Utilizing atomic layer deposition for programmable device
US6514805B2 (en) * 2001-06-30 2003-02-04 Intel Corporation Trench sidewall profile for device isolation
US6673700B2 (en) * 2001-06-30 2004-01-06 Ovonyx, Inc. Reduced area intersection between electrode and programming element
US6605527B2 (en) * 2001-06-30 2003-08-12 Intel Corporation Reduced area intersection between electrode and programming element
US6613604B2 (en) * 2001-08-02 2003-09-02 Ovonyx, Inc. Method for making small pore for use in programmable resistance memory element
US6590807B2 (en) * 2001-08-02 2003-07-08 Intel Corporation Method for reading a structural phase-change memory
US6707712B2 (en) * 2001-08-02 2004-03-16 Intel Corporation Method for reading a structural phase-change memory
US6674115B2 (en) * 2001-08-31 2004-01-06 Intel Corporation Multiple layer phrase-change memory
US6507061B1 (en) * 2001-08-31 2003-01-14 Intel Corporation Multiple layer phase-change memory
US20030048744A1 (en) * 2001-09-01 2003-03-13 Ovshinsky Stanford R. Increased data storage in optical data storage and retrieval systems using blue lasers and/or plasmon lenses
US6545287B2 (en) * 2001-09-07 2003-04-08 Intel Corporation Using selective deposition to form phase-change memory cells
US6586761B2 (en) * 2001-09-07 2003-07-01 Intel Corporation Phase change material memory device
US6690026B2 (en) * 2001-09-28 2004-02-10 Intel Corporation Method of fabricating a three-dimensional array of active media
US6566700B2 (en) * 2001-10-11 2003-05-20 Ovonyx, Inc. Carbon-containing interfacial layer for phase-change memory
US6545907B1 (en) * 2001-10-30 2003-04-08 Ovonyx, Inc. Technique and apparatus for performing write operations to a phase change material memory device
US6576921B2 (en) * 2001-11-08 2003-06-10 Intel Corporation Isolating phase change material memory cells
US6673648B2 (en) * 2001-11-08 2004-01-06 Intel Corporation Isolating phase change material memory cells
US6625054B2 (en) * 2001-12-28 2003-09-23 Intel Corporation Method and apparatus to program a phase change memory
US6512241B1 (en) * 2001-12-31 2003-01-28 Intel Corporation Phase change material memory device
US20030155589A1 (en) * 2002-02-20 2003-08-21 Campbell Kristy A. Silver-selenide/chalcogenide glass stack for resistance variable memory
US20030173558A1 (en) * 2002-03-14 2003-09-18 Campbell Kristy A. Methods and apparatus for resistance variable material cells
US6714954B2 (en) * 2002-05-10 2004-03-30 Energy Conversion Devices, Inc. Methods of factoring and modular arithmetic
US20040035401A1 (en) * 2002-08-26 2004-02-26 Subramanian Ramachandran Hydrogen powered scooter

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070080345A1 (en) * 2005-09-16 2007-04-12 Joo Won J Volatile negative differential resistance device using metal nanoparticles
US8546789B2 (en) * 2005-09-16 2013-10-01 Samsung Electronics Co., Ltd. Volatile negative differential resistance device using metal nanoparticles
US20080121859A1 (en) * 2006-10-19 2008-05-29 Boise State University Forced ion migration for chalcogenide phase change memory device
US7924608B2 (en) 2006-10-19 2011-04-12 Boise State University Forced ion migration for chalcogenide phase change memory device
US8295081B2 (en) 2006-10-19 2012-10-23 Boise State University Forced ion migration for chalcogenide phase change memory device
US8611146B2 (en) 2006-10-19 2013-12-17 Boise State University Forced ion migration for chalcogenide phase change memory device
US20100027324A1 (en) * 2008-08-01 2010-02-04 Boise State University Variable integrated analog resistor
US8238146B2 (en) 2008-08-01 2012-08-07 Boise State University Variable integrated analog resistor
US8467236B2 (en) 2008-08-01 2013-06-18 Boise State University Continuously variable resistor
US20110079709A1 (en) * 2009-10-07 2011-04-07 Campbell Kristy A Wide band sensor
US8284590B2 (en) 2010-05-06 2012-10-09 Boise State University Integratable programmable capacitive device

Also Published As

Publication number Publication date Type
US20040007749A1 (en) 2004-01-15 application
US20080188034A1 (en) 2008-08-07 application
US20050247925A1 (en) 2005-11-10 application
US7015494B2 (en) 2006-03-21 grant
US7387909B2 (en) 2008-06-17 grant
US7879646B2 (en) 2011-02-01 grant

Similar Documents

Publication Publication Date Title
US6326294B1 (en) Method of fabricating an ohmic metal electrode for use in nitride compound semiconductor devices
US5696018A (en) Method of forming conductive noble-metal-insulator-alloy barrier layer for high-dielectric-constant material electrodes
US6265258B1 (en) Method for making a complementary metal gate electrode technology
US6423568B1 (en) Method of fabricating a silicon solar cell
US5668411A (en) Diffusion barrier trilayer for minimizing reaction between metallization layers of integrated circuits
US6130446A (en) Electrode of n-type nitridide semiconductor, semiconductor device having the electrode, and method of fabricating the same
US6337283B1 (en) Method of fabricating a silicon solar cell
US6387726B1 (en) Method of fabricating a silicon solar cell
US4816424A (en) Method of producing semiconductor device having multilayer conductive lines
US7033856B2 (en) Spacer chalcogenide memory method
US7030430B2 (en) Transition metal alloys for use as a gate electrode and devices incorporating these alloys
US5566045A (en) High-dielectric-constant material electrodes comprising thin platinum layers
US20030001229A1 (en) Chalcogenide comprising device
US20070158645A1 (en) Self-align planerized bottom electrode phase change memory and manufacturing method
US6436825B1 (en) Method of copper barrier layer formation
US4845533A (en) Thin film electrical devices with amorphous carbon electrodes and method of making same
US20030047765A1 (en) Stoichiometry for chalcogenide glasses useful for memory devices and method of formation
US20070173063A1 (en) Self-aligned manufacturing method, and manufacturing method for thin film fuse phase change ram
US20030049912A1 (en) Method of forming chalcogenide comprsing devices and method of forming a programmable memory cell of memory circuitry
US20070121374A1 (en) Phase Change Memory Device and Manufacturing Method
US4942441A (en) Thin film semiconductor device and method of manufacturing the same
US3877049A (en) Electrodes for amorphous semiconductor switch devices and method of making the same
US6813178B2 (en) Chalcogenide glass constant current device, and its method of fabrication and operation
US6881623B2 (en) Method of forming chalcogenide comprising devices, method of forming a programmable memory cell of memory circuitry, and a chalcogenide comprising device
US6955940B2 (en) Method of forming chalcogenide comprising devices