US20050020192A1 - Method and apparatus for chemically, mechanically, and/or electrolytically removing material from microelectronic substrates - Google Patents

Method and apparatus for chemically, mechanically, and/or electrolytically removing material from microelectronic substrates Download PDF

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Publication number
US20050020192A1
US20050020192A1 US10923127 US92312704A US2005020192A1 US 20050020192 A1 US20050020192 A1 US 20050020192A1 US 10923127 US10923127 US 10923127 US 92312704 A US92312704 A US 92312704A US 2005020192 A1 US2005020192 A1 US 2005020192A1
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Prior art keywords
polishing
substrate
material
microelectronic
liquid
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Abandoned
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US10923127
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Whonchee Lee
Scott Meikle
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Micron Technology Inc
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Micron Technology Inc
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    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; MISCELLANEOUS COMPOSITIONS; MISCELLANEOUS APPLICATIONS OF MATERIALS
    • C09GPOLISHING COMPOSITIONS OTHER THAN FRENCH POLISH; SKI WAXES
    • C09G1/00Polishing compositions
    • C09G1/02Polishing compositions containing abrasives or grinding agents
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/04Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • B24B37/044Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor characterised by the composition of the lapping agent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/04Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/046Lapping machines or devices; Accessories designed for working plane surfaces using electric current
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; MISCELLANEOUS COMPOSITIONS; MISCELLANEOUS APPLICATIONS OF MATERIALS
    • C09KMATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K3/00Materials not provided for elsewhere
    • C09K3/14Anti-slip materials; Abrasives
    • C09K3/1454Abrasive powders, suspensions and pastes for polishing
    • C09K3/1463Aqueous liquid suspensions
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • H01L21/3212Planarisation by chemical mechanical polishing [CMP]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • H01L21/3212Planarisation by chemical mechanical polishing [CMP]
    • H01L21/32125Planarisation by chemical mechanical polishing [CMP] by simultaneously passing an electrical current, i.e. electrochemical mechanical polishing, e.g. ECMP

Abstract

Method and apparatus for chemically, mechanically and/or electrolytically removing material from microelectronic substrates. A polishing medium for removing material can include a liquid carrier, an electrolyte disposed in the liquid carrier, and abrasives disposed in the liquid carrier, with the abrasives forming up to about 1% of the polishing liquid by weight. The polishing medium can further include a chelating agent. An electrical current can be selectively applied to the microelectronic substrate via the polishing liquid, and a downforce applied to the microelectronic substrate can be selected based on the level of current applied electrolytically to the microelectronic substrate. The microelectronic substrate can undergo an electrolytic and nonelectrolytic processing on the same polishing pad, or can be moved from one polishing pad to another while being supported by a single substrate carrier.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • [0001]
    This application is related to the following pending U.S. patent applications, all of which are incorporated herein by reference: Ser. No. 09/651,779 (Attorney Docket 10829.8515US), filed Aug. 30, 2000; Ser. No. 09/888,084 (Attorney Docket 10829.8515US01), filed Jun. 21, 2001; Ser. No. 09/887,767 (Attorney Docket 10829.8515US02), filed Jun. 21, 2001; and Ser. No. 09/888,002 (Attorney Docket 10829.8515US03), filed Jun. 21, 2001. This application is also related to the following U.S. patent applications, filed simultaneously herewith and incorporated herein by reference: U.S. Pat. No. ______ (Attorney Docket 10829.8515US06); U.S. Pat. No. ______ (Attorney Docket 10829.8515US07); U.S. Pat. No. ______ (Attorney Docket 10829.8515US08) and U.S. Pat. No. ______ (Attorney Docket 10829.8673US).
  • TECHNICAL FIELD
  • [0002]
    The present invention relates generally to methods and apparatuses for chemically, mechanically, and/or electrolytically removing materials from microelectronic substrates.
  • BACKGROUND
  • [0003]
    Microelectronic substrates and substrate assemblies typically include a semiconductor material having features, such as memory cells, that are linked with conductive lines. The conductive lines can be formed by first forming trenches or other recesses in the semiconductor material and then overlaying a conductive material (such as a metal) in the trenches. The conductive material is then selectively removed to leave conductive lines extending from one feature in the semiconductor material to another.
  • [0004]
    One technique for forming microelectronic features, such as capacitors, is to dispose the features in isolated containers within the microelectronic substrate. One typical process includes forming an aperture in a substrate material (such as borophosphosilicate glass or BPSG), coating the microelectronic substrate (including the walls of the aperture) first with a barrier layer and then with a conductive layer, and then overfilling the aperture with a generally nonconductive material, such as a photoresist material. The excess photoresist material, conductive layer material, and barrier layer material located external to the aperture are then removed using chemical-mechanical planarization or polishing (CMP). The capacitor is then disposed within the photoresist material in the aperture and coupled to other features of the microelectronic substrate with an overlying network of vias and lines.
  • [0005]
    One drawback with the foregoing container technique for forming capacitors is that during the CMP process, small particles of the conductive material removed from the conductive layer can become embedded in the photoresist material within the aperture. The embedded conductive material can cause short circuits and/or other defects in the capacitor that is subsequently formed in the aperture, causing the capacitor to fail. A further drawback is that high downforces are typically required during CMP processing to remove the conductive material external to the apertures. The high downforce can cause the conductive material adjacent to one aperture to smear into the conductive material of the adjacent aperture, which can in turn cause the adjacent containers to be short circuited to each other.
  • SUMMARY
  • [0006]
    The present invention is directed toward methods and apparatuses for chemically, mechanically, and/or electrolytically removing material from microelectronic substrates. A polishing medium in accordance with one aspect of the invention includes a polishing liquid having a liquid carrier and an electrolyte disposed in the liquid carrier. The electrolyte can transmit an electrical current between an electrode and the microelectronic substrate to electrolytically remove conductive material from the microelectronic substrate. The polishing liquid can further include abrasives (such as colloidal abrasives) disposed in the liquid carrier, with the abrasives forming up to about 1% of the polishing liquid by weight. The presence of the electrolyte in the polishing liquid can provide for electrolytic material removal at reduced downforce levels.
  • [0007]
    In a further aspect of the invention, the abrasives can form up to about 0.5% of the polishing liquid, by weight, and can include colloidal silica and/or colloidal alumina. The polishing liquid can further include a chelating agent, such as ammonium hydroxide and/or ammonium chloride.
  • [0008]
    A method in accordance with one aspect of the invention includes engaging a microelectronic substrate with a polishing surface of a polishing pad and disposing a polishing liquid adjacent to the polishing surface and the microelectronic substrate, with the polishing liquid including an electrolyte and up to about 1% abrasive particles by weight. The method can further include passing a variable electrical current through the polishing liquid to the microelectronic substrate from at least one electrode spaced apart from the microelectronic substrate, and moving at least one of the polishing pad and the microelectronic substrate relative to the other to remove material from the microelectronic substrate.
  • [0009]
    A method in accordance with another aspect of the invention includes contacting the microelectronic substrate with a polishing surface of a polishing pad, disposing an electrolytic liquid between the microelectronic substrate and the polishing surface of the polishing pad, and applying a force to at least one of microelectronic substrate and the polishing pad. The method can further include passing an electrical current through the electrolytic liquid between at least one electrode spaced apart from the microelectronic substrate and a conductive material of the microelectronic substrate, and selecting a level for one of the force and the electrical current based at least in part on a level for the other. At least part of the conductive material can then be removed from the microelectronic substrate by moving at least one of the microelectronic substrate and the polishing pad relative to the other.
  • [0010]
    In still a further aspect of the invention, a first portion of material can be removed from the microelectronic substrate by passing an electrical current between at least one electrode the microelectronic substrate, and a second portion of material can be removed from the microelectronic substrate without passing an electrical current through the conductive material. In a particular aspect of this method, the microelectronic substrate can be carried by the same carrier for electrolytic and nonelectrolytic processing. In another particular aspect of this method, the microelectronic substrate can be in contact with one polishing pad for electrolytic processing and another polishing pad for nonelectrolytic processing.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • [0011]
    FIGS. 1A-1E schematically illustrate a process for forming features in a microelectronic substrate in accordance with an embodiment of the invention.
  • [0012]
    FIGS. 2A-2B schematically illustrate a process for forming conductive features in a microelectronic substrate in accordance with another embodiment of the invention.
  • [0013]
    FIG. 3 is a partially schematic illustration of an apparatus for carrying out processes in accordance with embodiments of the invention.
  • [0014]
    FIG. 4 is a partially schematic, isometric view of a portion of the apparatus shown in FIG. 3 in accordance with an embodiment of the invention.
  • [0015]
    FIG. 5 is a partially schematic, side elevation view of an apparatus for processing a microelectronic substrate in accordance with another embodiment of the invention.
  • [0016]
    FIG. 6 schematically illustrates a waveform for electrolytically processing a microelectronic substrate in accordance with another embodiment of the invention.
  • DETAILED DESCRIPTION
  • [0017]
    One approach (developed by the assignee of the present application) for addressing some of the foregoing drawbacks associated with container processes is to replace the conventional soft materials used to fill the containers with a harder material. For example, conventional photoresist materials can be replaced with phosphosilicate glass (PSG) or spin-on glass (SOG), and can be disposed in platinum-lined containers. Further details of materials and processes in accordance with this approach are disclosed in U.S. patent application Ser. No. ______ (Attorney Docket 10829.8673US), previously incorporated herein by reference.
  • [0018]
    One challenge presented by the use of platinum-lined, PSG filled containers is that relatively high CMP downforces are required to remove the platinum external to the containers, which can cause the platinum to smear into the regions between adjacent containers, even if the platinum does not become embedded in the PSG. Another challenge is that existing polishing liquids tend not to remove platinum and PSG uniformly. Such polishing liquids include tetramethyl ammonium hydroxide (TMAH) in combination with colloidal slurry particles, such as Klebasol products available from Rodell, Inc. of Phoenix, Ariz. In some cases, these polishing liquids can leave high spots of PSG, causing an uneven topography that may not be suitable for supporting microelectronic devices in the containers, and may not provide a suitable, planar foundation for subsequent structures.
  • [0019]
    The following disclosure describes methods and apparatuses for overcoming the foregoing potential drawbacks. Many specific details of certain embodiments of the invention are set forth in the following description and in FIGS. 1A-6 to provide a thorough understanding of these embodiments. One skilled in the art, however, will understand that the present invention may have additional embodiments and that the invention may be practiced without several of the details described below.
  • [0020]
    FIG. 1A is a partially schematic illustration of a microelectronic substrate 110 positioned for processing in accordance with an embodiment of the invention. In one aspect of this embodiment, the microelectronic substrate 110 includes a substrate material 111. This substrate material 111 can include borophososilicate glass (BPSG), tetraethyl orthosilicate (TEOS), undoped silicon dioxide or other suitable materials. In any of these embodiments, one or more apertures 112 (two of which are shown in FIG. 1A) can be formed in a substrate material plane 113 of the substrate material 111, using conventional techniques such as patterned etching. In one embodiment, the apertures 112 can be used to form container devices (such as capacitors) and in other embodiments, the apertures 112 can include trenches or holes for forming lines or vias. In one embodiment, the apertures 112 have a relatively high aspect ratio (i.e., depth-to-width ratio). For example, in one particular embodiment, the apertures 112 can have an aspect ratio of about 4:1 or more, and in other embodiments, the apertures 112 can have other aspect ratios. In any of these embodiments, an underlayer 114 (such as a tantalum or tantalum oxide layer) is disposed on the substrate material plane 113 and adjacent to the wails of the apertures 112. The underlayer 114 can be disposed on the microelectronic substrate 110 using conventional techniques, such as physical vapor deposition (PVD) or chemical vapor deposition (CVD). In one aspect of this embodiment, the underlayer 114 can form a barrier layer and in other embodiments, the underlayer 114 can perform other functions, such as promoting adhesion of subsequently deposited materials onto the walls of the apertures 112.
  • [0021]
    A layer of conductive material 115 can then be disposed on the underlayer 114. In one embodiment, the conductive material 115 can include platinum, and in other embodiments, the conductive material 115 can include other electrically conductive constituents, such as copper, or refractory metals, such as tantalum, tungsten and/or their nitrides. Platinum may be particularly suitable for apertures 112 having high aspect ratios, such as aspect ratios of approximately 4:1.
  • [0022]
    A fill material 117 can then be disposed on the conductive material 115. The fill material 117 can include subplane portions 118 (positioned beneath the substrate plane 113 in the apertures 112) and a first external portion 119 that extends outwardly away from the substrate material plane 113, external to the apertures 112. The first external portion 119 can be disposed on a second external portion 120 defined by the part of the conductive material 115 located external to the apertures 112 and beyond the substrate material plane 113. In one embodiment, the fill material 117 can include a relatively hard, generally nonconductive substance, such as PSG. In a specific aspect of this embodiment, the fill material 117 can include PSG having 6% phosphorous. In other embodiments, the fill material 117 can include other relatively hard PSG or non-PSG materials, such as SOG. In any of these embodiments, the fill material can have a hardness greater than that of a typical photoresist material. Accordingly, in one particular embodiment, the fill material 117 can have a hardness of about 0.04 GPa or higher. In a particular embodiment in which the fill material 117 includes 6% phosphorous PSG, the fill material 117 can have a hardness of about 6.5 GPa or higher.
  • [0023]
    The first external portion 119 of the fill material 117 can be removed (as shown in FIG. 1B) so that the remaining fill material 117 is flush with the conductive material 115. In one aspect of this embodiment, conventional CMP techniques and slurries can be used to remove the first projection 119. Accordingly, the fill material 117 can be removed with a polishing pad 183 and a polishing liquid 189 disposed adjacent to the polishing pad 183 and the microelectronic substrate 110. Further details of apparatuses for removing the first projection 119 are described below with reference to FIGS. 3-6.
  • [0024]
    FIG. 1C is a schematic illustration of the microelectronic substrate 110 after the second external portion 120 (FIG. 1B) of the conductive material 115 has been removed, along with an adjacent portion of the fill material 117. Accordingly, both the fill material 117 and the conductive material 115 can be flush with the underlayer 114 at the conclusion of this process portion. The fill material 117 and conductive material 115 removed during this portion of the process can be removed using electrochemical-mechanical polishing (ECMP) techniques and an apparatus generally similar to that described in greater detail below with reference to FIGS. 3-6.
  • [0025]
    In one aspect of this embodiment, a polishing liquid 189 a is positioned in contact with the microelectronic substrate 110 and is selected to include constituents that simultaneously remove both the fill material 117 and the conductive material 115. For example, the polishing liquid can include an electrolyte to conduct electrical current to the conductive material 115 for electrolytically removing the conductive material 115. The polishing liquid 189 a can also include metal chelating agents that bind with metal ions removed from the microelectronic substrate 110 and accordingly aid in the removal of these ions. The polishing liquid 189 a can still further include abrasive particles which can effectively increase the mechanical contact between the microelectronic workpiece 110 and the polishing pad 183.
  • [0026]
    One example of a polishing liquid 189 a having the characteristics described above is a solution that has a pH of about 10 and includes 1.0 molar ammonium phosphate ((NH4)2HPO4) and 0.75 molar ammonium hydroxide (NH4OH). The ammonium phosphate can provide the polishing liquid with electrolytic characteristics and can provide for a relatively high pH. The ammonium hydroxide can also provide for a relatively high pH and can provide NH3 molecules that chelate metal ions from the microelectronic substrate 110. The solution can further include abrasive elements, such as diluted colloidal silica (silicon dioxide) particles that constitute from about 0.1% to about 1.0% of the polishing liquid, by weight. In one particular aspect of this embodiment, the colloidal silica particles can constitute about 0.5% of the polishing liquid 189 a by weight, and in another embodiment, the colloidal silica particles can constitute about 0.2% of the polishing liquid 189 a by weight. In any of these embodiments, the colloidal particles can be diluted significantly more than are conventional colloidal slurries, which typically have from about 2% to about 20% colloidal particles by weight. In any of these embodiments, the polishing liquid 189 a can have a pH of about 10 to reduce and/or eliminate the likelihood for the colloidal silica particles to agglomerate while in solution.
  • [0027]
    In other embodiments, the polishing liquid 189 a can have other compositions that also electrolytically conduct electrical currents to the microelectronic substrate 110, chelate metal ions removed from the microelectronic substrate 110, and include slurry particles for increased mechanical contact with the microelectronic substrate 110. One example of such a polishing liquid has a pH of about 4 with 1.0 molar ammonium sulfate (NH2SO4), 0.5 molar ammonium chloride (NH4Cl), and 0.5% colloidal alumina (aluminum oxide) particles. In one aspect of this embodiment, the ammonium sulfate provides for conductivity and a relatively low pH, which is supported by the ammonium chloride. The ammonium chloride can also provide NH3 molecules and Cl ions for chelating metal ions from the microelectronic substrate 110. A low pH (such as a pH of 4) is suitable for preventing aluminum oxide particles from agglomerating in solution.
  • [0028]
    As shown in FIG. 1D, the underlayer 114 (FIG. 1C) can be removed in a subsequent step, resulting in the formation of containers 130 having the upper edges of the underlayer 114, the conductive material 115, and the fill material 117 all flush with the substrate material plane 113. At this point, each container 130 is electrically isolated and shielded from the surrounding structures in the microelectronic substrate 110. In one aspect of this embodiment, conventional alumina and/or silica based slurries are used to simultaneously remove the fill material 117, the conductive material 115, the under material 114, and a small amount of the substrate material 111 to form the containers 130. In other embodiments, other polishing liquids can be used to remove these materials.
  • [0029]
    As shown in FIG. 1F, further features (such as electrodes) can next be disposed in the containers 130 to form structures 121 such as capacitors. The features can be disposed in the containers 130 using conventional techniques (such as selective etching and deposition) and are electrically coupled to each other and/or to external contacts with a network of vias and/or lines, also formed with conventional techniques, such as damascene techniques. For example, in one embodiment, the remaining fill material 117 within the apertures 112 is removed. A film 118, formed from a material such as tantalum pentoxide, is then disposed in the apertures 112, and a conductive electrode 119 is disposed adjacent to the film 118 to form the capacitor. In other embodiments, the foregoing techniques can be used to form other features in the microelectronic substrate 110, such as trenches and/or conductive lines. In any of these embodiments, portions of the microelectronic substrate 110 can then be diced from the larger wafer of which they are a part for encapsulation and incorporation in electronic devices.
  • [0030]
    In other embodiments, the foregoing techniques can be used to process microelectronic substrates 110 having features other than the containers 130 described above. For example, as shown in FIGS. 2A-2B, the foregoing techniques can be used to process a microelectronic substrate 110 having conductive structures such as lines or vias formed directly in a substrate material. Beginning with FIG. 2A, the microelectronic substrate 110 can include a substrate material 111, such as a low-K dielectric material. An underlayer 114 (including materials such as a tantalum, tantalum oxide, tantalum nitride, tungsten, tungsten nitride or other refractory materials and/or their nitrides) is disposed in the apertures 112, and a conductive material 115 (such as copper) is disposed on the underlayer 114.
  • [0031]
    As shown in FIG. 2B, the portions of the conductive material 115 and the underlayer 114 external to the apertures 112 (which can include, for example, trenches or holes) can be removed to form conductive structures 221, such as lines or vias. In one aspect of this embodiment, a polishing liquid generally similar to the polishing liquids 189 a described above with reference to FIG. 1C, but buffered to a pH of from about 6 to about 7, can be used to remove the conductive material 115. A conventional alumina or silica based slurry can be used to remove the underlayer 114 and conductive material is external to the apertures 112. In other embodiments, other polishing liquids can be used to remove these materials.
  • [0032]
    FIGS. 3-6 schematically illustrate apparatuses for processing the microelectronic substrate 110 in a manner generally similar to that described above with reference to FIGS. 1A-2B. For example, FIG. 3 schematically illustrates an apparatus 360 for chemically-mechanically and/or electrochemically-mechanically polishing the microelectronic substrate 110 in accordance with an embodiment of the invention. In one aspect of this embodiment, the apparatus 360 has a support table 380 with a top-panel 381 at a workstation where an operative portion “W” of a polishing pad 383 is positioned. The top-panel 381 is generally a rigid plate to provide a flat, solid surface to which a particular section of the polishing pad 383 may be secured during polishing.
  • [0033]
    The apparatus 360 can also have a plurality of rollers to guide, position and hold the polishing pad 383 over the top-panel 381. The rollers can include a supply roller 387, first and second idler rollers 384 a and 384 b, first and second guide rollers 385 a and 385 b, and a take-up roller 386. The supply roller 387 carries an unused or preoperative portion of the polishing pad 383, and the take-up roller 386 carries a used or postoperative portion of the polishing pad 383. Additionally, the first idler roller 384 a and the first guide roller 385 a can stretch the polishing pad 383 over the top-panel 381 to hold the polishing pad 383 stationary during operation. A motor (not shown) drives at least one of the supply roller 387 and the take-up roller 386 to sequentially advance the polishing pad 383 across the top-panel 381. Accordingly, clean preoperative sections of the polishing pad 383 may be quickly substituted for used sections to provide a consistent surface for polishing and/or cleaning the microelectronic substrate 110.
  • [0034]
    The apparatus 360 can also have a carrier assembly 390 that controls and protects the microelectronic substrate 110 during polishing. The carrier assembly 390 can include a substrate holder 392 to pick up, hold and release the substrate 110 at appropriate stages of the polishing process. The carrier assembly 390 can also have a support gantry 394 carrying a drive assembly 395 that can translate along the gantry 394. The drive assembly 395 can have an actuator 396, a drive shaft 397 coupled to the actuator 396, and an arm 398 projecting from the drive shaft 397. The arm 398 carries the substrate holder 392 via a terminal shaft 399 such that the drive assembly 395 orbits the substrate holder 392 about an axis E-E (as indicated by arrow “R1”). The terminal shaft 399 may also rotate the substrate holder 392 about its central axis F-F (as indicated by arrow “R2”).
  • [0035]
    The polishing pad 383 and a polishing liquid 389 define a polishing medium 382 that mechanically, chemically-mechanically, and/or electro-chemically-mechanically removes material from the surface of the microelectronic substrate 110. In some embodiments, such as those described above with reference to FIGS. 1A-2B, the polishing pad 383 may be a nonabrasive pad without abrasive particles, and the polishing liquid 389 can be a slurry with abrasive particles and chemicals to remove material from the microelectronic substrate 110. In other embodiments, the polishing pad 383 can be a fixed-abrasive polishing pad in which abrasive particles are fixedly bonded to a suspension medium. To polish the microelectronic substrate 110 with the apparatus 360, the carrier assembly 390 presses the microelectronic substrate 110 against the polishing surface 388 of the polishing pad 383 in the presence of the polishing liquid 389. The drive assembly 395 then orbits the substrate holder 392 about the axis E-E and optionally rotates the substrate holder 392 about the axis F-F to translate the substrate 110 across the polishing surface 388. As a result, the abrasive particles and/or the chemicals in the polishing medium 382 remove material from the surface of the microelectronic substrate 110 in a chemical and/or chemical-mechanical polishing process.
  • [0036]
    In a further aspect of this embodiment, the polishing liquid 389 can include an electrolyte for ECMP processing. In another embodiment, the apparatus 360 can include an electrolyte supply vessel 330 that delivers an electrolyte separately to a polishing surface 388 of the polishing pad 383 with a conduit 337, as described in greater detail below with reference to FIG. 4. In either embodiment, the apparatus 360 can further include a current supply 321 coupled to electrodes positioned proximate to the polishing pad 383. Accordingly, the apparatus 360 can electrolytically remove material from the microelectronic substrate 110.
  • [0037]
    FIG. 4 is a partially exploded, partially schematic isometric view of a portion of the apparatus 360 described above with reference to FIG. 3. In one aspect of the embodiment shown in FIG. 4, the top-panel 381 houses a plurality of electrode pairs 470, each of which includes a first electrode 440 a and a second electrode 440 b. The first electrodes 440 a are coupled to a first lead 448 a and the second electrodes 440 b are coupled to a second lead 448 b. The first and second leads 448 a and 448 b are coupled to the current supply 321 (FIG. 3). In one aspect of this embodiment, the first electrodes 440 a can be separated from the second electrodes 440 b by an electrode dielectric layer 449 a that includes Teflon™ or another suitable dielectric material. The electrode dielectric layer 449 a can accordingly control the volume and dielectric constant of the region between the first and second electrodes 440 a and 440 b to control the electrical coupling between the electrodes.
  • [0038]
    The electrodes 440 a and 440 b can be electrically coupled to the microelectronic substrate 110 (FIG. 3) by the polishing pad 383. In one aspect of this embodiment, the polishing pad 383 is saturated with an electrolyte 431 supplied by the supply conduits 337 through apertures 438 in the top-panel 381 just beneath the polishing pad 383. Accordingly, the electrodes 420 a and 420 b are selected to be compatible with the electrolyte 431. In an another arrangement, the electrolyte 431 can be supplied to the polishing pad 383 from above (for example, by disposing the electrolyte 431 in the polishing liquid 389, rather than by directing the electrolyte upwardly through the polishing pad 383). Accordingly, the apparatus 360 can include a pad dielectric layer 449 b positioned between the polishing pad 383 and the electrodes 440 a and 440 b. When the pad dielectric layer 449 b is in place, the electrodes 440 a and 440 b are isolated from physical contact with the electrolyte 431 and can accordingly be selected from materials that are not necessarily compatible with the electrolyte 431.
  • [0039]
    In one aspect of this embodiment, both electrodes 440 a, 440 b can be spaced apart from the microelectronic substrate 110. In another embodiment, one electrode can be spaced apart from the microelectronic substrate 110 and the other electrode can contact a conductive portion of the microelectronic substrate 110 (such as a back side of the substrate 110) that is electrically coupled via internal conductive lines to the front surface of the substrate 110 in contact with the polishing pad 383. In either embodiment, the electrodes 440 a, 440 b can transmit an electrical current to the front surface of the substrate 110 without directly contacting the front surface.
  • [0040]
    FIG. 5 is an isometric view of a portion of an apparatus 560 having electrodes 540 (shown as a first electrode 540 a and a second electrode 540 b), and a polishing medium 582 arranged in accordance with another embodiment of the invention. In one aspect of this embodiment, the polishing medium 582 includes polishing pad portions 583 that project beyond the electrodes 540 a and 540 b. Each polishing pad portion 583 can include a polishing surface 588 and a plurality of flow passages 584 coupled to a fluid source (not shown in FIG. 5) with a conduit 537. Each flow passage 584 can have an aperture 585 proximate to the polishing surface 588 to provide an electrolyte 531 proximate to an interface between the microelectronic substrate 110 and the polishing surface 588. In one aspect of this embodiment, the pad portions 583 can include recesses 587 surrounding each aperture 585. Accordingly, the electrolyte 531 can proceed outwardly from the flow passages 584 while the microelectronic substrate 110 is positioned directly overhead and remains spaced apart from the electrodes 540.
  • [0041]
    Any of the foregoing apparatuses described above with reference to FIGS. 3-5 can be used to chemically-mechanically process the microelectronic substrate 110, and/or electrochemically-mechanically process the microelectronic substrate 110. When the apparatuses are used to electrochemically-mechanically process the microelectronic substrate 110, they can provide a varying electrical current that passes from the electrodes, through the conductive material of the microelectronic substrate 110 via the electrolytic fluid without contacting the electrodes with the microelectronic substrate 110. For example, as shown in FIG. 6, the apparatus can generate a high-frequency wave 604 and can superimpose a low-frequency wave 602 on the high-frequency wave 604. In one aspect of this embodiment, the high-frequency wave 604 can include a series of positive or negative voltage spikes contained within a square wave envelope defined by the low-frequency wave 602. Each spike of the high-frequency wave 604 can have a relatively steep rise-time slope to transfer charge through the dielectric material to the electrolyte and a more gradual fall-time slope. The fall-time slope can define a straight line, as indicated by high-frequency wave 604, or a curved line, as indicated by high-frequency wave 604 a. In other embodiments, the high-frequency wave 604 and the low frequency wave 602 can have other shapes depending, for example, on the particular characteristics of the dielectric material and the electrolyte, the characteristics of the microelectronic substrate 110, and/or the target rate at which conductive material is to be removed from the microelectronic substrate 110.
  • [0042]
    The methods described above with reference to FIGS. 1A-6 may be performed with the apparatuses described above with reference to FIGS. 3-6 in a variety of manners in accordance with several embodiments of the invention. For example, in one embodiment, a separate apparatus can be used to perform each of the three processes described above with reference to FIGS. 1B, 1C, and 1D, respectively. In a particular aspect of this embodiment, the microelectronic substrate 110 can be placed on a first apparatus (such as the apparatus 360) while a polishing liquid particularly suited for removing the fill material 117 is disposed between the polishing medium 382 and the microelectronic substrate 110. When the fill material 117 has been removed down to the level of the conductive material 115, the microelectronic substrate 110 can be moved to another apparatus (also generally similar to the apparatus 360) and a new polishing liquid can be disposed between the microelectronic substrate and the polishing medium. In a further aspect of this embodiment, the new polishing liquid can include an electrolyte for removing the conductive material 115. Once the conductive material 115 is removed down to the level of the underlayer 114, the microelectronic substrate 110 can be moved to a third apparatus (which can also be generally similar to the apparatus 360) and a third polishing liquid can be disposed between the microelectronic substrate and the polishing medium to remove the underlayer 114.
  • [0043]
    In one aspect of the foregoing embodiment, the microelectronic substrate 110 can remain with a single carrier 392 as it is moved from one apparatus to another. One characteristic that makes this feature possible is that, in one embodiment, the electrodes used for electrolytically processing the microelectronic substrate 110 are not in direct physical contact with either the microelectronic substrate 110 or the carrier 392 during processing in accordance with an embodiment of the invention. Accordingly, the same carrier 392 can be used for non-electrolytic processing (for example, when the fill material 117 and the underlayer 114 are removed) and electrolytic processing (for example, when the conductive material 115 is removed). An advantage of this arrangement is that the number of times the microelectronic substrate 110 must be moved from one carrier to another can be reduced and/or eliminated during this processing sequence, reducing the likelihood for damaging the microelectronic substrate 110.
  • [0044]
    In another embodiment, the same apparatus 360 can be used for some or all of the processes described above. For example, in one embodiment, the same polishing liquid can be used to remove the fill material 117 (as described above with reference to FIG. 1B) and the conductive material 115 (as described above with reference to FIG. 1C). In one aspect of this embodiment, an electrical current can be passed through the polishing liquid and the conductive material of the microelectronic substrate 110 when appropriate, for example, when removing material that is largely comprised of electrically conductive constituents. The electrical current can be reduced and/or halted when appropriate, for example, when removing material that is largely comprised of nonconductive constituents.
  • [0045]
    In other embodiments, other combinations of processes can be completed with the same polishing liquid. In any of the foregoing embodiments, the downforce applied to the microelectronic substrate 110 can be selected based on the electrical current applied to the microelectronic substrate, and/or vice versa. The particular values chosen for the downforce and the electrical current can be selected based upon the desired result to be achieved by the process. For example, to avoid smearing the conducive material 115, the downforce can be selected to be relatively low and the current applied to the microelectronic substrate can be selected to be relatively high. Conversely, when smearing is not as great a concern (for example, when removing the underlayer 114), the downforce can be increased and the electrical current reduced.
  • [0046]
    In other embodiments, other characteristics of the material removal process can be adjusted. For example, when it is desirable to remove the nonconductive fill material 117 (by chemical-mechanical action) and the conductive material 115 (by electrochemical-mechanical action) simultaneously and at approximately the same rate, the concentration of slurry particles can be increased (relative to the concentration when only the fill material 117 is removed) so that the removal of the fill material 117 keeps pace with the removal of the conductive material 115. In another aspect of this embodiment, the concentration of the chelating agent can be adjusted to adjust the rate with which the conductive material 115 is removed.
  • [0047]
    From the foregoing, it will be appreciated that specific embodiments of the invention have been described herein for purposes of illustration, but that various modifications may be made without deviating from the spirit and scope of the invention. Accordingly, the invention is not limited except as by the appended claims.

Claims (23)

  1. 1. A polishing medium for removing material from a microelectronic substrate, comprising a polishing liquid that includes:
    a liquid carrier;
    an electrolyte disposed in the liquid carrier and configured to transmit an electrical current between an electrode and the microelectronic substrate to electrolytically remove conductive material from the microelectronic substrate; and
    abrasive elements disposed in the liquid carrier, wherein the abrasive elements form up to about 1% of the polishing liquid, by weight.
  2. 2. The polishing medium of claim 1 wherein the abrasive elements include colloidal abrasives that form up to about 0.5% of the polishing liquid, by weight.
  3. 3. The polishing medium of claim 1 wherein the abrasive elements include at least one of colloidal silica abrasives and colloidal alumina abrasives.
  4. 4. The polishing medium of claim 1, further comprising a polishing pad having a polishing surface, and wherein the liquid carrier, the electrolyte and the abrasive elements are disposed adjacent to the polishing surface.
  5. 5. The polishing medium of claim 1, further comprising a chelating agent disposed in the liquid carrier.
  6. 6. The polishing medium of claim 1, further comprising a chelating agent disposed in the liquid carrier, and wherein the chelating agent includes at least one of ammonia and chloride.
  7. 7. The polishing medium of claim 1 wherein the liquid carrier includes de-ionized water.
  8. 8. The polishing medium of claim 1 wherein the polishing liquid is acidic.
  9. 9. The polishing medium of claim 1 wherein the polishing liquid is alkaline.
  10. 10. The polishing medium of claim 1 wherein the electrolyte includes ammonium phosphate.
  11. 11. The polishing medium of claim 1 wherein the electrolyte includes ammonium sulfate.
  12. 12. The polishing medium of claim 1, further comprising a chelating agent disposed in the liquid carrier, and wherein the chelating agent includes ammonium hydroxide.
  13. 13. The polishing medium of claim 1, further comprising a chelating agent disposed in the liquid carrier, and wherein the chelating agent includes ammonium chloride.
  14. 14. The polishing medium of claim 1, further comprising a chelating agent disposed in the liquid carrier, and wherein the chelating agent is selected to bind with platinum ions.
  15. 15. The polishing medium of claim 1, further comprising a chelating agent disposed in the liquid carrier, and wherein the chelating agent is selected to bind with copper ions.
  16. 16. A polishing medium for removing material from a microelectronic substrate, comprising a polishing liquid that includes:
    a liquid carrier;
    an electrolyte disposed in the liquid carrier and configured to transmit an electrical current between an electrode and the microelectronic substrate to electrolytically remove a conductive material from the microelectronic substrate;
    a chelating agent disposed in the liquid carrier and configured to bind with ions of the conductive material; and
    abrasive elements disposed in the liquid carrier, wherein the abrasive elements form up to about 1% by weight of the polishing liquid.
  17. 17. The polishing medium of claim 16, further comprising a polishing pad having a polishing surface, and wherein the liquid carrier, the electrolyte, the chelating agent and the abrasive elements are disposed adjacent to the polishing surface.
  18. 18. The polishing medium of claim 16 wherein the abrasive elements form up to about 0.5% of the polishing liquid, by weight.
  19. 19. The polishing medium of claim 16 wherein the abrasive elements include at least one of colloidal silica abrasives and colloidal alumina abrasives.
  20. 20. The polishing medium of claim 16 wherein the chelating agent includes at least one of ammonia and chloride.
  21. 21. The polishing medium of claim 16 wherein the chelating agent is selected to bind with platinum ions.
  22. 22. The polishing medium of claim 16 wherein the chelating agent is selected to bind with copper ions.
  23. 23-83. (Cancelled)
US10923127 2002-08-29 2004-08-20 Method and apparatus for chemically, mechanically, and/or electrolytically removing material from microelectronic substrates Abandoned US20050020192A1 (en)

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