US20040217461A1 - Microelectronic adaptors, assemblies and methods - Google Patents
Microelectronic adaptors, assemblies and methods Download PDFInfo
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- US20040217461A1 US20040217461A1 US10/862,735 US86273504A US2004217461A1 US 20040217461 A1 US20040217461 A1 US 20040217461A1 US 86273504 A US86273504 A US 86273504A US 2004217461 A1 US2004217461 A1 US 2004217461A1
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- adaptor
- microelectronic element
- elements
- circuit board
- microelectronic
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/361—Assembling flexible printed circuits with other printed circuits
- H05K3/363—Assembling flexible printed circuits with other printed circuits by soldering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5385—Assembly of a plurality of insulating substrates
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5387—Flexible insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
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- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06579—TAB carriers; beam leads
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0397—Tab
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/049—PCB for one component, e.g. for mounting onto mother PCB
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
- H05K3/326—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor the printed circuit having integral resilient or deformable parts, e.g. tabs or parts of flexible circuits
Definitions
- the present invention relates to microelectronic assemblies and to components and methods used for making the same.
- Microelectronic elements such as semiconductor chips ordinarily are mounted on circuit panels such as circuit boards.
- a packaged semiconductor chip may have an array of bonding contacts on a bottom surface of the package.
- Such a package can be mounted to a corresponding array of bonding contacts exposed at a top surface of a circuit board by placing the package on the circuit board with the bottom surface of the package facing downwardly and confronting the top surface of the circuit board, so that each bonding contact on the package is aligned with a corresponding bonding contact on the circuit board.
- Masses of a conductive bonding material typically in the form of solder balls, are provided between the bonding contacts of the package and the bonding contacts of the circuit board. In typical surface-mounting techniques, solder balls are placed on the bonding contacts of the package before the package is applied to the circuit board.
- circuit board Ordinarily, numerous microelectronic elements are mounted side-by-side on the circuit board and interconnected to one another by electrically conductive traces connecting the various bonding contacts.
- the circuit board must have an area at least equal to the aggregate area of all of the microelectronic elements.
- the circuit board must have all of the traces needed to make all of the interconnections between microelectronic elements.
- the circuit board must include many layers of traces to accommodate the required interconnections. This materially increases the cost of the circuit board. Typically, each layer extends throughout the entire area of the circuit board.
- the number of layers in the entire circuit board is determined by the number of layers required in the area of the circuit board having the most complex, densely packed interconnections. For example, if a particular circuit requires six layers of traces in one small region but only requires four layers in the remainder of the circuit board, the entire circuit board must be fabricated as a six-layer structure.
- the additional circuit panel and the additional layer of interconnections between this circuit panel and the main circuit board consume additional space.
- the additional circuit panel and additional layer of interconnections between the additional circuit panel and the main circuit panel add to the height of the module, i.e., the distance by which the module projects above the top surface of the main circuit board. This is particularly significant where the module is provided in a stacked configuration and where low height is essential, as, for example, in assemblies intended for use in miniaturized cellular telephones and other devices to be worn or carried by the user.
- Such a module may also require a complicated socket or connector between the module circuit panel and the circuit board.
- the additional space consumed by mounting prepackaged semiconductor chips on a separate module circuit panel can be saved by integrating the circuit panel of the module with a part of the package itself, commonly referred to as a package substrate.
- a package substrate For example, several bare or unpackaged semiconductor chips can be connected to a common substrate during the chip packaging operation.
- Packages of this nature can also be made in a stacked arrangement.
- Such multi-chip packages can include some or all of the interconnections among the various chips in the package and can provide a very compact assembly.
- the main circuit board can be simpler than that which would be required to mount individual packaged chips in the same circuit.
- this approach requires unique packages for each combination of chips to be included in the package.
- FPGA field programmable gate array
- ASIC application specific integrated circuit
- SRAM static random access memory
- flash memory flash memory
- One aspect of the invention provides a circuit panel assembly which includes a circuit panel such as a printed circuit board having a top surface and a first microelectronic element disposed on the circuit panel, the first microelectronic element having a bottom surface overlying the top surface of said circuit panel and defining a gap therebetween.
- the assembly according to this aspect of the invention also includes an adaptor having a substrate including a first region. The substrate has oppositely-directed inner and outer surfaces in said first region. The first region of the substrate first extends at least partially in the gap between said bottom surface of said first microelectronic element and said top surface of said circuit panel with said inner surface facing upwardly toward the bottom surface of the first microelectronic element.
- the adaptor also includes a functional element as, for example, an array of terminals for connection to a further element disposed on the substrate outside of the first region.
- a functional element as, for example, an array of terminals for connection to a further element disposed on the substrate outside of the first region.
- the functional element of the adaptor may be disposed in an additional region which may be folded over the top of the first microelectronic element.
- the functional element includes terminals
- one or more further microelectronic elements can be disposed above the first microelectronic element and connected to the terminals, to provide a stacked arrangement.
- the additional region may project laterally away from the first microelectronic element.
- the adaptor may have apertures in the first region, and socket contacts aligned with at least some of these apertures.
- Connection elements such as solder balls or surface-mountable leads on the first microelectronic element may extend through the apertures, and at least some of the connection elements may contact the socket contacts of the adaptor.
- the assembly can be made using the techniques normally used to handle and secure packaged chips as, for example, placement, soldering and reflow; there is no need to prepare special stacked chip subassemblies in a chip packaging plant. Nonetheless, the preferred embodiments of the assembly can provide the benefits normally achieved by prepackaged stacked chip assemblies, such as compactness and simplified wiring layouts in the circuit board.
- the functional element of the adaptor is connected to the first microelectronic element, to the contact pads of the circuit board, or both, by the socket contacts of the adaptor.
- the connection elements extend through the adaptor to the circuit board, the presence of the adaptor need not substantially increase the height of the first microelectronic element above the circuit board.
- the adaptor has conductive attachments in the first region as, for example, pads overlying apertures in the adaptor substrate rather than the socket contacts discussed above.
- the functional element is electrically connected to at least some of these conductive attachments.
- the first microelectronic element is connected to the conductive attachments by internal connection elements such as thin solder lands, whereas mounting elements as, for example, solder balls, extend between said first conductive attachments and said contact pads.
- the mounting and connection elements most preferably are arranged to minimize the height of the first microelectronic element above the circuit board.
- the bottom surface of the first microelectronic element is disposed at a height above the top surface of said circuit panel less than the sum of the height of the internal connection elements, the height of the mounting elements and the thickness of first connection region of the adaptor.
- the mounting elements may extend at least partially within apertures within the adaptor, so that the height of the mounting elements is at least partially concealed within the thickness of the adaptor substrate.
- the assembly can be made using techniques similar to those used in mounting packaged chips to a circuit board as, for example, surface mounting techniques, so that there is no need for special prepackaged stacked chip assemblies.
- FIG. 1 is a diagrammatic bottom plan view of a component in accordance with one embodiment of the invention.
- FIG. 2 is a diagrammatic sectional view taken along line 2 - 2 showing the component of FIG. 1 in conjunction with a microelectronic element during one stage of manufacture.
- FIG. 3 is a view similar to FIG. 2 showing the component and element of FIG. 2 during a later stage of manufacture.
- FIG. 4 is a further diagrammatic sectional elevational view showing the component and element of FIGS. 1-3 in an assembly with additional elements.
- FIG. 5 is a detailed view on an enlarged scale of the area indicated in FIG. 4.
- FIG. 6 is a view similar to FIG. 5 but depicting a component according to a further embodiment of the invention.
- FIG. 7 is a diagrammatic, partially sectional view depicting an assembly in accordance with a further embodiment of the invention.
- FIG. 8 is a view similar to FIG. 7 but depicting an assembly according to yet another embodiment of the invention.
- FIG. 9 is a diagrammatic top plan view of a component in accordance with yet another embodiment of the invention.
- FIG. 10 is a diagrammatic, partially sectional elevational view of a subassembly made using the component of FIG. 9.
- FIG. 11 is a partially sectional, elevational view of an assembly in accordance with yet another embodiment of the invention.
- FIG. 12 is a view similar to FIG. 11 but depicting an assembly according to a further embodiment of the invention.
- FIG. 13 is a diagrammatic sectional view on an enlarged scale of the area indicated in FIG. 12.
- FIGS. 14 and 15 are further diagrammatic sectional elevational views depicting assemblies in accordance with further embodiments of the invention.
- An adaptor in accordance with one embodiment of the invention includes a sheetlike, flexible substrate 20 having an inner surface 22 and an oppositely-directed, outer surface 24 .
- sheetlike refers to an element which has thickness substantially less than its length and width.
- Substrate 20 may be formed from essentially any material used in formation of flexible circuits as, for example, unreinforced or reinforced polyimides or BT resin. Most typically, the substrate is about 25-75 microns thick. Other materials and thicknesses may be employed. As discussed below, during fabrication of an assembly incorporating the adaptor in accordance with this embodiment, the substrate will be flexed in only one region, and, accordingly, only that region needs to be flexible in this embodiment. Thus, other regions of the substrate may be substantially rigid.
- Substrate 20 is generally in the form of an elongated strip and has a first socket region 26 adjacent the end of the strip towards the left as seen in FIG. 1, and has an additional or attachment region 28 adjacent the opposite end of the strip.
- the substrate has an array of apertures 30 extending through it, from the inner surface 22 to the outer surface 24 in the first socket region 26 .
- the adaptor further includes a set of first socket contacts 34 formed from one or more electrically conductive materials, typically metals. Each first socket contact 32 is aligned with one of the apertures 30 . Each first socket contact is adapted to engage a solder ball advanced through the corresponding aperture 30 and is also adapted to allow the solder ball to project through the aperture and through the contact itself.
- These contacts may be generally similar to the contacts disclosed in U.S. Pat. Nos. 5,632,631; 5,980,270; 5,802,699; 5,615,824; and 6,200,143 the disclosures of which are hereby incorporated by reference herein.
- each socket contact 32 is generally in accordance with certain preferred embodiments shown in the aforementioned '631, '824 and '270 patents; each socket contact includes a main structure 34 having a hole corresponding to the aperture 30 and four tabs 36 which project inwardly, partially across the hole and partially across the aperture 30 .
- the socket contacts may incorporate features such as asperities and hard metal elements to facilitate engagement with the solder balls and may have areas that are not wettable by the solder or other joining material, that is to be used with the socket contacts.
- Socket contacts 34 in the embodiment of FIGS. 1 and 2 are disposed on the outer or bottom surface 24 of substrate 20 .
- the adaptor further includes a layer of an adhesive 38 overlying the inner surface 22 of substrate 20 in attachment area 28 .
- Adhesive 38 may be, for example, an epoxy or a so-called “dry pad” adhesive arranged to remain solid until raised to an elevated temperature and then promptly form a bond to a mating surface.
- the adaptor also includes an additional functional element in the form of an array of terminals 40 disposed on the outer surface 24 of the substrate in the attachment region 28 .
- the term “functional element” refers to an element which itself can perform an electrical function as, for example, a passive component such as a resistor, capacitor or inductor, a unit incorporating several passive devices, commonly referred to as a “passive chip”, or an active semiconductor component such as a semiconductor chip including numerous active devices with or without passive devices, and also refers to an element which can be used to make connections to an additional electronic device or element as, for example, an array of terminals.
- terminals 40 are connected to at least some of the first socket contacts 32 by traces 42 extending along the substrate 20 . Some of the traces are omitted for clarity of illustration in FIG. 1. Traces 42 and terminals 40 may be formed from conventional materials used in flexible circuits, as, for example, copper and copper-based alloys, with a thin layer of gold or other non-reactive, readily-solderable metal on the exposed surfaces of terminals 40 .
- a solder mask layer (not shown) desirably overlies the outer surface 24 of the adaptor and also covers traces 24 . The solder mask layer has openings aligned with terminals 40 so that the terminals remain exposed at the outer surface 24 of the substrate.
- a terminal or other conductive feature is regarded as “exposed at” a surface of a dielectric element where the terminal is arranged so that all or part of the conductive feature can be seen by looking at such surface.
- terminals 40 project slightly from outer surface 24 , but this is not essential; the terminals 40 may be recessed within apertures extending to the outer surface, or even provided on the inner surface and aligned with apertures extending through the dielectric to the outer surface.
- the adaptor is assembled with a first microelectronic element 44 .
- Microelectronic element 44 may be a “bare” semiconductor chip or, preferably, a packaged semiconductor chip incorporating the active semiconductor elements or die 46 in a protective package 48 .
- the first microelectronic element as a whole has a bottom surface 50 , a top surface 52 and edges 54 and 56 extending between the top and bottom surfaces.
- the microelectronic element further includes an array of bonding contacts 58 exposed at the bottom surface 50 of the element.
- the bottom surface 50 may be defined by a package substrate 60 and bonding contacts 58 may be provided as conductive elements on this substrate.
- the bonding contacts are electrically connected to the active semiconductor chip 46 by internal leads (not shown).
- the edges and top surface of the microelectronic element may be defined by an encapsulant covering the active semiconductor or die 46 .
- Such packages can be made with numerous different internal configurations.
- the active element or die 46 may be mounted “face-up” so that the contacts of the active semiconductor element or die 46 face upwardly, away from the package substrate 60 or, alternatively, “face-down” so that the active die contacts face toward the package substrate.
- microelectronic element 44 may have bonding contacts 58 which are moveable with respect to the active semiconductor element or die 46 .
- the microelectronic element is provided with an array of connecting elements in the form of solder balls 62 .
- the solder balls are attached to bonding pads 58 and project downwardly from the bottom surface 50 of the microelectronic element.
- the solder balls may be applied by conventional processes used in surface-mounting technology. For example, the solder balls may be bonded to the bonding contacts 58 by reflowing or melting the solder balls when the balls are applied.
- the microelectronic element 44 with connecting elements or solder balls 62 , is arranged over the inner surface 22 of the adaptor substrate in the first socket region 26 , so that the bonding contacts 58 and connecting elements or solder balls 62 are aligned with the apertures 30 in the adaptor substrate and, hence, with the socket contacts 32 .
- the microelectronic element and adaptor are then urged toward one another, as depicted in FIG. 3.
- the outer surface 24 of the adaptor substrate may be supported by a resilient element or by a temporary fixture 64 having openings 66 larger than the solder balls 62 arranged in an array corresponding to the array of apertures 30 and socket contacts 32 .
- the top or rear surface 52 of the microelectronic element 44 may be engaged by another fixture 68 .
- the microelectronic element is advanced toward the adaptor substrate so that the bottom surface 50 of the microelectronic element approaches or engages the top surface 22 of the adaptor substrate.
- the connecting elements or solder balls pass through the apertures 30 in the substrate and engage the socket contacts 32 .
- the tabs 34 of the socket contacts desirably bend downwardly as the solder balls 62 pass through the socket contacts.
- substrate 20 is folded to the configuration depicted in FIG. 4.
- the substrate extends outwardly beyond one edge 54 of microelectronic element 44 and upwardly along that edge.
- the attachment area 28 of the substrate overlies the top or rear surface 52 of the first microelectronic element 44 .
- the inner surface 22 in the attachment region faces downwardly and confronts the top surface of the microelectronic element, whereas the outer surface 24 in the attachment region faces upwardly.
- terminals 40 which are exposed at the outer surface 24 , are accessible from the top of the first microelectronic element.
- the inner surface 22 is secured to the top surface 52 of the microelectronic element by adhesive 38 .
- the substrate may be folded to this configuration simply by bending the substrate around the edge of the microelectronic element or by bending the substrate around a temporary tool or fixture (not shown).
- the microelectronic element and adaptor may be handled and placed onto a circuit board 70 or other circuit panel having a top surface 72 using standard surface-mounting techniques.
- the connecting elements or solder balls 62 are aligned with bonding contacts 76 exposed at the top surface of the circuit board, and the solder balls are reflowed so as to bond the solder balls to bonding contacts 76 and thus bond contacts 76 to the corresponding bonding contacts 58 on the bottom surface of the microelectronic element 44 .
- a flux is applied to aid the solder reflow process.
- the solder in balls 62 forms a metallurgical bond with socket contacts 32 .
- the prongs 34 of the socket contacts may penetrate into the individual solder balls, as schematically depicted at 34 ′.
- the socket contacts may thus provide additional reinforcement within the solder balls in the finished assembly.
- first microelectronic element 44 sits on the circuit panel in substantially the same position as if the adaptor were not present.
- the first socket region 26 of adaptor substrate lies in the gap between the bottom surface 50 of the first microelectronic element and the top surface 72 of the circuit board.
- the height of the microelectronic element above the top surface 72 of the circuit panel may be nearly or exactly the same as if the adaptor were not present.
- the exposed terminals 40 of the adaptor provide an auxiliary mounting surface on top of element 44 .
- a second microelectronic element 78 and a third microelectronic element 80 may be mounted on the terminals 40 , again using standard surface-mounting techniques.
- All of the operations involved in assembling the adaptor to the first microelectronic element mounting the adaptor to the circuit board and assembling the further microelectronic elements to the terminals can be performed as part of a “board stuffing” operation used to mount microelectronic elements on a circuit board.
- microelectronic elements 82 may be mounted on the top surface of the circuit board in the normal manner.
- First microelectronic element 44 is connected to these additional elements by traces 74 within and on the circuit board 70 .
- the second and third microelectronic elements 78 and 80 are connected to the first microelectronic element 44 through the terminals 40 , traces 42 and socket contacts 32 of the adaptor.
- the second and third microelectronic elements are also connected to appropriate contact pads 76 of the circuit board, and, hence, to other elements to other elements of the circuit, by the terminals 40 , traces 42 and socket contacts 34 in conjunction with the connecting elements or solder balls which serve to connect the first microelectronic element to the circuit board.
- the assembly operation can be repeated numerous times to produce numerous circuit assemblies.
- the operation can be varied by varying the second and third microelectronic elements 78 and 80 used with the same type of first microelectronic element 44 .
- different types of static random access memory or SRAM and different types or sizes of flash memory may be provided as the second and third microelectronic elements in different units, all of which employ the same baseband ASIC or FPGA.
- the cellular telephone manufacturer may purchase standard chips in standard packages.
- the configuration of the adaptor may be varied to accommodate different second and third microelectronic elements.
- the entire assembly is compact, in that the second and third microelectronic elements 78 and 80 do not occupy any additional area on the board top surface. Further, the assembly has a relatively low height.
- the second and third microelectronic elements are depicted in FIG. 4 as mounted to the terminals by a ball grid array, other types of mountings may be employed.
- the mountings for these elements may include relatively thin layer of solder in a so-called “land grid array” to further minimize the overall height of the assembly above the board top surface.
- Other types of interconnections may be employed, as, for example, wire-bonded or leaded interconnections.
- the joints between the second and third microelectronic elements 78 and 80 and the adaptor are subjected to relatively low stress because the underlying first microelectronic element 44 typically has a coefficient of thermal expansion close to those of the second and third microelectronic elements.
- a typical copper and epoxy circuit board 70 may have a coefficient of thermal expansion on the order of 16-18 ppm/° C.
- the coefficient of expansion of the first microelectronic element 44 which is an aggregate of the coefficients of thermal expansion of the die (about 2-3 ppm/° C.) and the epoxy over-molding, and hence would be somewhat less than that of the circuit board, as, for example, about 8 ppm/° C.
- the first microelectronic element may include provisions to allow the bonding contacts 58 to move relative to the die 46 and thus relieve differences in expansion between the circuit board 70 and the die. Where this arrangement is employed, the adaptor does not substantially restrict movement of the bonding contacts. Some or all of the difference in thermal expansion between the die in first element 44 and circuit board 70 may be accommodated by deformation of the connecting elements or solder balls 62 . Because the adaptor extends around these elements and does not add height to these elements, relatively large solder balls can be used to enhance reliability of this connection without unduly increasing the overall height of the assembly.
- the socket contacts 32 can be designed to enhance the structure of the solder balls 62 so that they can better resist strain due to CTE mismatch between the die 44 and the circuit board 70 .
- the main circuit board 70 need not include layers of traces to make these interconnections. This simplifies the layout of the main circuit board and, in some cases, can reduce the number of layers required in the board as a whole.
- the second and third microelectronic elements 78 and 80 may be assembled to the adaptor and bonded to terminals 40 before the first microelectronic element and adaptor are assembled to the main circuit board. Indeed, the second and third microelectronic elements may be bonded to the adaptor before the adaptor is folded or may be supplied as part of the adaptor.
- the adaptor discussed above with reference to FIGS. 1-4 has socket contacts on the outer surface 24 of the dielectric substrate 20 and has the terminals and traces also disposed on the outer surface.
- the socket contacts 132 , traces 142 and terminals 140 may be disposed on the inner surface 122 of the dielectric substrate 120 .
- the socket contacts are aligned with apertures 130 in the dielectric substrate.
- the terminals 140 are exposed to the outer surface 124 of the substrate through holes 125 in the substrate aligned with the terminals.
- the adhesive 138 may be provided as a “dry pad” or solid adhesive layer overlying the terminals on the inner surface 122 of the substrate. Also, the adhesive 138 may extend into the socket region and may overlie the entire inner surface of the substrate.
- the dry pad may have apertures 139 aligned with the apertures 130 and socket contacts 132 . In this embodiment, the dry pad acts as masking or anti-shorting layer to protect the traces from accidental contact with the edges of the chip or with one another when the substrate is folded.
- FIG. 7 An assembly according to yet another embodiment of the invention (FIG. 7) includes an adaptor having a similar flexible substrate 220 and first socket contacts 232 in a socket region 226 .
- the socket region extends into the gap between the bottom surface 250 of the first microelectronic element and the top surface 272 of the circuit board.
- the adaptor includes a functional element in the form of terminals 240 in an attachment region 224 of the substrate, remote from the socket region 226 .
- the attachment region projects outwardly beyond an edge 254 of the first microelectronic element 244 .
- the attachment region is not folded back over the top of the first microelectronic element.
- attachment region is extended over a neighboring element 201 on the circuit board.
- the second microelectronic element 278 may be mounted on the attachment region of the adaptor.
- attachment regions can be provided so as to overlie more than one additional element on the circuit board and can project outwardly from more than one edge of the first microelectronic element.
- An assembly according to yet another embodiment of the invention shown in FIG. 8 includes an adaptor having a substrate 320 with a first socket region 326 and first socket contacts 332 similar to the first socket contacts discussed above.
- the attachment region 324 of the substrate has terminals in the form of a second set of socket contacts 333 similar to the first socket contacts and has apertures 331 extending through the substrate in this region, in alignment with the second socket contacts.
- the second socket contacts 333 are connected via traces 340 on the substrate of the adaptor to the first socket contacts.
- the connecting elements 362 of the first microelectronic element 344 extend through the first socket contacts 332 .
- the second microelectronic element 378 is mounted to the adaptor in substantially the same way as the first microelectronic element, so that second connecting elements 363 such as solder balls associated with the second microelectronic element extend through the holes 331 in the attachment region of the substrate and engage the second socket contacts.
- Both of these microelectronic elements 344 and 378 may be assembled to the adaptor in the manner discussed above with reference to FIG. 3, and the entire assembly then may be mounted on a circuit panel 370 so as to engage the connecting elements 362 and 363 of both microelectronic elements with the circuit panel.
- the circuit panel need not incorporate the traces required for such interconnection and, hence, can be simpler and, in some cases, may incorporate fewer layers than would otherwise be required.
- presence of the adaptor does not add to the height of the assembly.
- the component depicted in FIG. 9 incorporates a substrate 420 having a first socket region 426 formed as a central panel of a generally cruciform shape and having additional or attachment regions 424 formed as arms of the cruciform shape projecting outwardly from the central panel.
- the adaptor is prefabricated with functional elements in the form of additional semiconductor chips 478 , 479 , 480 and 481 pre-connected to traces 440 extending to the first socket contacts 432 in the socket region 426 .
- the particular embodiment shown has the first socket contacts 432 , traces 440 and additional microelectronic elements 478 - 481 , all mounted on the inner surface of the substrate.
- a microelectronic element such as element 440 is assembled to the adaptor so that connecting elements 462 on the microelectronic element project through the first socket contacts.
- each arm of the adaptor is folded so as to bring the various additional regions 424 over the first microelectronic element 444 and stack the various additional microelectronic elements over the first microelectronic element.
- Such a sub-assembly may be mounted onto a circuit board.
- the traces connecting the first microelectronic element and socket contacts 432 to each of the microelectronic elements are of equal or nearly equal length, so that propagation times of signals to the various additional microelectronic elements 478 - 481 are substantially equal.
- the first microelectronic element 444 may be provided in a standard package.
- the arrangement of FIGS. 9 and 10 may be made with less than four or more than four additional regions. For example, if only two additional regions are provided, these may be provided on opposite sides of the central or first socket region 426 . Regardless of the number of such additional regions, the additional regions may be folded on top of each other as shown in FIG. 10, or may extend outwardly from the central panel as shown and described in reference to FIGS. 7 and 8.
- the connecting elements which link the first microelectronic element to the circuit board need not be solder balls or other masses of bonding material.
- the first microelectronic element 544 incorporates a semiconductor die 546 mounted in a lead frame-type package which incorporates an epoxy over-molding 545 encapsulating the active die and metallic leads 562 projecting out of edges of the over-molding and extending downwardly beyond the bottom surface 550 of the over-molding.
- the adaptor substrate 520 has apertures 530 extending through it from its inner surface 522 to its outer surface 524 . Socket contacts in the form of metallic via liners 532 are provided in these apertures.
- the apertures 530 and socket contacts are provided in a socket region 526 of the substrate.
- the socket region 526 of the substrate lies at least in part beneath the first microelectronic element 544 , in the gap between the bottom surface 550 of the microelectronic element and the top surface 572 of a circuit board 570 when the first microelectronic element is mounted on the circuit board.
- the leads 562 of the lead frame package extend through the apertures in the socket region of the substrate and engage the socket contacts 532 .
- the leads may be soldered to the socket contacts or vias 532 of the adaptor.
- an additional region 528 of the substrate extends outside of the gap between the microelectronic 544 and the circuit board, so that an additional microelectronic element 578 can be engaged with terminals 540 on the additional or attachment region 528 .
- the adaptor substrate 520 is folded (about an axis parallel to the plane of the drawing) to place the additional region 528 over the top surface 552 of the first microelectronic element 544 .
- the additional microelectronic element may be sub-assembled to the adaptor before or after mounting the first microelectronic element and adaptor to the circuit board.
- the circuit board has contact elements arranged to make connection with the leads 562 of the first microelectronic element, as, for example, pads 574 arranged for surface mounting of the leads or via holes 575 extending through the circuit board with appropriate via liners for through-board solder mounting the lead frame package. Although both pads 574 and via holes 575 are depicted in FIG. 11, in practice the board typically would include one or the other, and not both. In a further variant, the same solder which connects leads 562 to contact elements 574 or 575 may connect the leads to the socket contacts 532 of the adaptor.
- FIG. 12 An assembly according to a further embodiment of the invention (FIG. 12) includes an adaptor having a dielectric body 620 generally similar to the adaptor discussed above with reference to FIGS. 1-4.
- the adaptor of FIG. 12 includes a first or bottom connection region 626 and an additional region 628 remote from region 626 .
- the adaptor body 620 has an inner surface 622 and an outer surface 624 .
- the first connection region 626 extends in a gap between the first microelectronic element 644 and the circuit board 670 , and thus extends beneath the bottom surface 650 of the first microelectronic element 644 .
- the inner surface 622 of the dielectric body faces upwardly, toward the first microelectronic element, whereas the outer surface 624 faces downward, toward the circuit board 670 .
- the additional region extends outside of the gap, and overlies the top surface 652 of the first microelectronic element.
- first conductive attachments 634 which include conductive pads disposed at or near the inner surface 622 of the body in the first connection region 626 , and holes 630 extending through the body in alignment with these pads.
- Pads 634 desirably are relatively thin as, for example, about 10-20 micron in thickness.
- Pads or first conductive attachments 634 are connected by traces 642 to terminals 640 on the additional region 628 .
- the first microelectronic element 644 has bonding pads 658 exposed at its bottom surface. These bonding pads are connected by internal connecting elements 602 to the pads or conductive attachments 634 of the adaptor, which in turn are connected by mounting elements 662 to the contact pads 676 of the circuit board.
- the internal conducting elements are thin layers of a conductive bonding material such as solder lands.
- the height h 1 of each internal conducting element, (FIG. 13) measured from the bottom surface 650 of the first microelectronic element to the bottom of the internal conducting element, is about 50 microns or less, and most preferably about 40 microns or less.
- the mounting elements 662 most preferably are masses of a conductive bonding material such as solder balls or solid core solder balls.
- the mounting elements may have height h 2 or vertical extent from the upper surface 672 of the circuit board considerably greater than the height h 1 of the internal connecting elements 602 .
- the height h2 of the mounting elements may be on the order of 100 to 300 microns.
- the assembly still provides a relatively low overall height or distance H between the top surface 672 of the circuit board and the bottom surface 650 of the first microelectronic element. Because the mounting elements 662 extend through holes 630 in body 620 , a significant portion, typically about 25% or more, of the height h 2 of the mounting elements is concealed within the thickness t of body 620 .
- the overall height or distance H from the board surface 672 to the bottom surface of the first microelectronic element is less than the aggregate or sum of heights h1, h2 and the thickness t of the body.
- the assembly according to this embodiment of the invention can provide a low overall height while allowing significant solder ball height. Such relatively large solder balls can provide enhanced resistance to strains due to differential thermal expansion of the elements.
- the conductive attachments 634 are disposed at or near the outer surface 624 , and the internal connecting elements 602 extend from the first microelectronic element 644 partially or entirely through the thickness of the body to the conductive attachments.
- the internal conductive elements may be elements such as solder balls or solid core solder balls having a relatively great height.
- the conductive attachments or pads 634 are connected to the contact pads of the circuit board by relatively thin mounting elements such as solder lands.
- the roles of the internal connecting elements and mounting elements are reversed relative to the arrangement shown in FIGS. 12 and 13.
- the conductive attachments may include conductive elements at both surfaces of the body defining sockets adapted to receive the mounting elements, the internal connecting elements, or both so that either or both of these are partially or entirely concealed within the thickness of the body.
- sockets as depicted in certain preferred embodiments of U.S. Pat. No. 6,200,143, the disclosure of which is incorporated by reference, may be used in this manner.
- FIG. 14 An assembly according to yet another embodiment of the invention (FIG. 14) is generally similar to the assembly of FIGS. 12 and 13. However, in the assembly of FIG. 14, the conductive attachments 734 are arranged so that the internal connecting elements 702 which connect the first microelectronic element 744 to the attachments are offset from the mounting elements 762 which connect the attachments to the contact pads of the circuit board.
- the height h 1 of the connecting elements overlaps a part of the height h2 of the mounting elements, a part of the thickness t of the body of the adaptor, or both.
- the overall distance or height H from the top surface of the circuit board to the bottom surface of the first microelectronic element is less than the sum of h1, h2 and t.
- the connecting region 726 may have a structure generally similar to the sockets shown in U.S. Pat. No. 5,951,305, the disclosure of which is also incorporated by reference herein.
- the internal connecting elements are again offset in horizontal directions from the mounting elements 862 .
- the internal connecting elements 802 make connections to conductive attachments 834 on the bottom or first connection region 826 of the adaptor body.
- This region of the body is deformed into a non-planar shape, so that once again the height h1 of the internal connecting elements overlaps the height h2 of the mounting elements, the thickness t of the body, or both.
- the configuration of this region may be similar to the configuration of the sockets shown in certain embodiments of U.S. Pat. No. 6,086,386, the disclosure of which is also incorporated by reference herein.
- FIGS. 14 and 15 can also provide a low overall height H of the first microelectronic element above the circuit board, and hence a low height for the entire assembly, while using internal conductive elements and/or mounting elements having substantial height.
- the mounting arrangements discussed above with reference to FIGS. 12-15 also can be used with any of the adaptor configurations discussed herein, including those discussed above with reference to FIGS. 7-11.
- the embodiments of FIGS. 12-15 have been discussed above with reference to the completed assembly, the present invention also includes the adaptors and assembly methods used to form these assemblies.
- the adaptors are similar to the adaptors discussed above, except that the socket contacts and socket regions are replaced by the conductive attachment elements and connection region.
- the assembly methods are similar to those discussed above with reference to FIGS.
- the bonding contacts of the first microelectronic element are connected to the conductive attachments of the adaptor, rather than directly to the circuit board contact pads, and the method includes the further step of connecting the conductive attachments of the adaptor to the circuit board contact pads.
- the additional functional elements provided in the adaptor are either terminals (such as terminals 40 in FIG. 1) or additional semiconductor chips 478 - 481 (FIGS. 9 and 10).
- the adaptor may extend beyond the circuit board.
- the adaptor can extend around an edge of the circuit board to provide mounting terminals on the bottom or rear surface of the circuit board.
- the adaptor can be in the form of a ribbon cable which has functional elements in the form of contacts adapted to engage a socket on another circuit board or another electronic device.
- the substrate may be thin or flexible throughout its entire extent. In those embodiments where bending or folding is required, the substrate may be flexible in only the regions to be deformed during bending or folding and may be rigid in other regions. In embodiments where the substrate will not be bent or folded, as, for example, in the arrangement of FIG. 8, the substrate may be entirely or partially rigid.
- the adaptors discussed above incorporate only a single layer of traces, additional metallic elements may be provided as desired.
- the adaptor may include electrically conductive plane for carrying a ground or other substantially constant potential spaced apart from the traces.
- more than one layer of traces may be incorporated in the adaptor to accommodate more complex wiring requirements. Connecting elements other than the solder balls and leads discussed above may be employed, as, for example, solid core solder balls and pins.
- top”, bottom, upwardly and downwardly refer to the frame of reference of the microelectronic element or circuit board. These terms do not refer to the normal gravitational frame of reference.
Abstract
A first microelectronic element such as a semiconductor chip is mounted to a circuit board using an adaptor which has a region extending beneath the first microelectronic element and an additional region which may be folded over the first microelectronic element or which may project laterally from the first microelectronic element. The adaptor includes a functional element in the additional region, such as a further microelectronic element or an array of terminals for mounting another element. The assembly provides the benefits of a stacked chip assembly or other mustachio module, but can be made without the need for a special prepackaged stacked chip assembly. The adaptor can be configured so that it does not materially increase the height of the first microelectronic element above the circuit board.
Description
- The present application is a continuation of U.S. patent application Ser. No. 10/236,442, filed Sep. 6, 2002, which application claims benefit of U.S. Provisional Patent Application Ser. No. 60/401,391, filed Aug. 5, 2002, the disclosures of which are hereby incorporated by reference herein.
- The present invention relates to microelectronic assemblies and to components and methods used for making the same.
- Microelectronic elements such as semiconductor chips ordinarily are mounted on circuit panels such as circuit boards. For example, a packaged semiconductor chip may have an array of bonding contacts on a bottom surface of the package. Such a package can be mounted to a corresponding array of bonding contacts exposed at a top surface of a circuit board by placing the package on the circuit board with the bottom surface of the package facing downwardly and confronting the top surface of the circuit board, so that each bonding contact on the package is aligned with a corresponding bonding contact on the circuit board. Masses of a conductive bonding material, typically in the form of solder balls, are provided between the bonding contacts of the package and the bonding contacts of the circuit board. In typical surface-mounting techniques, solder balls are placed on the bonding contacts of the package before the package is applied to the circuit board.
- Ordinarily, numerous microelectronic elements are mounted side-by-side on the circuit board and interconnected to one another by electrically conductive traces connecting the various bonding contacts. Using this conventional approach, however, the circuit board must have an area at least equal to the aggregate area of all of the microelectronic elements. Moreover, the circuit board must have all of the traces needed to make all of the interconnections between microelectronic elements. In some cases, the circuit board must include many layers of traces to accommodate the required interconnections. This materially increases the cost of the circuit board. Typically, each layer extends throughout the entire area of the circuit board. Stated another way, the number of layers in the entire circuit board is determined by the number of layers required in the area of the circuit board having the most complex, densely packed interconnections. For example, if a particular circuit requires six layers of traces in one small region but only requires four layers in the remainder of the circuit board, the entire circuit board must be fabricated as a six-layer structure.
- These difficulties can be alleviated to some degree by connecting related microelectronic elements to one another using an additional circuit panel so as to form a sub-circuit or module which, in turn, is mounted to the main circuit board. The main circuit board need not include the interconnections made by the circuit panel of the module. It is possible to make such a module in a “stacked” configuration, so that some of the chips or other microelectronic elements in the module are disposed on top of other chips or microelectronic elements in the same module. Thus, the module as a whole can be mounted in an area of the main circuit board less than the aggregate area of the individual microelectronic elements in the module. However, the additional circuit panel and the additional layer of interconnections between this circuit panel and the main circuit board consume additional space. In particular, the additional circuit panel and additional layer of interconnections between the additional circuit panel and the main circuit panel add to the height of the module, i.e., the distance by which the module projects above the top surface of the main circuit board. This is particularly significant where the module is provided in a stacked configuration and where low height is essential, as, for example, in assemblies intended for use in miniaturized cellular telephones and other devices to be worn or carried by the user. Such a module may also require a complicated socket or connector between the module circuit panel and the circuit board.
- The additional space consumed by mounting prepackaged semiconductor chips on a separate module circuit panel can be saved by integrating the circuit panel of the module with a part of the package itself, commonly referred to as a package substrate. For example, several bare or unpackaged semiconductor chips can be connected to a common substrate during the chip packaging operation. Packages of this nature can also be made in a stacked arrangement. Such multi-chip packages can include some or all of the interconnections among the various chips in the package and can provide a very compact assembly. The main circuit board can be simpler than that which would be required to mount individual packaged chips in the same circuit. However, this approach requires unique packages for each combination of chips to be included in the package. For example, in the cellular telephone industry, it is a common practice to use the same field programmable gate array (“FPGA”) or application specific integrated circuit (“ASIC”) with different combinations of static random access memory (“SRAM”) and flash memory so as to provide different features in different cellular telephones. This increases the costs associated with producing, handling and stocking the various packages.
- One aspect of the invention provides a circuit panel assembly which includes a circuit panel such as a printed circuit board having a top surface and a first microelectronic element disposed on the circuit panel, the first microelectronic element having a bottom surface overlying the top surface of said circuit panel and defining a gap therebetween. The assembly according to this aspect of the invention also includes an adaptor having a substrate including a first region. The substrate has oppositely-directed inner and outer surfaces in said first region. The first region of the substrate first extends at least partially in the gap between said bottom surface of said first microelectronic element and said top surface of said circuit panel with said inner surface facing upwardly toward the bottom surface of the first microelectronic element. The adaptor also includes a functional element as, for example, an array of terminals for connection to a further element disposed on the substrate outside of the first region. For example, the functional element of the adaptor may be disposed in an additional region which may be folded over the top of the first microelectronic element. Where the functional element includes terminals, one or more further microelectronic elements can be disposed above the first microelectronic element and connected to the terminals, to provide a stacked arrangement. In other variants, the additional region may project laterally away from the first microelectronic element.
- The adaptor may have apertures in the first region, and socket contacts aligned with at least some of these apertures. Connection elements such as solder balls or surface-mountable leads on the first microelectronic element may extend through the apertures, and at least some of the connection elements may contact the socket contacts of the adaptor.
- The assembly can be made using the techniques normally used to handle and secure packaged chips as, for example, placement, soldering and reflow; there is no need to prepare special stacked chip subassemblies in a chip packaging plant. Nonetheless, the preferred embodiments of the assembly can provide the benefits normally achieved by prepackaged stacked chip assemblies, such as compactness and simplified wiring layouts in the circuit board. In this arrangement, the functional element of the adaptor is connected to the first microelectronic element, to the contact pads of the circuit board, or both, by the socket contacts of the adaptor. However, because the connection elements extend through the adaptor to the circuit board, the presence of the adaptor need not substantially increase the height of the first microelectronic element above the circuit board.
- In another arrangement, the adaptor has conductive attachments in the first region as, for example, pads overlying apertures in the adaptor substrate rather than the socket contacts discussed above. The functional element is electrically connected to at least some of these conductive attachments. The first microelectronic element is connected to the conductive attachments by internal connection elements such as thin solder lands, whereas mounting elements as, for example, solder balls, extend between said first conductive attachments and said contact pads. In this arrangement as well, the mounting and connection elements most preferably are arranged to minimize the height of the first microelectronic element above the circuit board. Most preferably, the bottom surface of the first microelectronic element is disposed at a height above the top surface of said circuit panel less than the sum of the height of the internal connection elements, the height of the mounting elements and the thickness of first connection region of the adaptor. For example, the mounting elements may extend at least partially within apertures within the adaptor, so that the height of the mounting elements is at least partially concealed within the thickness of the adaptor substrate. Here again, the assembly can be made using techniques similar to those used in mounting packaged chips to a circuit board as, for example, surface mounting techniques, so that there is no need for special prepackaged stacked chip assemblies.
- Further aspects of the invention provide adaptors suitable for use in the aforementioned assemblies and assembly methods.
- FIG. 1 is a diagrammatic bottom plan view of a component in accordance with one embodiment of the invention.
- FIG. 2 is a diagrammatic sectional view taken along line2-2 showing the component of FIG. 1 in conjunction with a microelectronic element during one stage of manufacture.
- FIG. 3 is a view similar to FIG. 2 showing the component and element of FIG. 2 during a later stage of manufacture.
- FIG. 4 is a further diagrammatic sectional elevational view showing the component and element of FIGS. 1-3 in an assembly with additional elements.
- FIG. 5 is a detailed view on an enlarged scale of the area indicated in FIG. 4.
- FIG. 6 is a view similar to FIG. 5 but depicting a component according to a further embodiment of the invention.
- FIG. 7 is a diagrammatic, partially sectional view depicting an assembly in accordance with a further embodiment of the invention.
- FIG. 8 is a view similar to FIG. 7 but depicting an assembly according to yet another embodiment of the invention.
- FIG. 9 is a diagrammatic top plan view of a component in accordance with yet another embodiment of the invention.
- FIG. 10 is a diagrammatic, partially sectional elevational view of a subassembly made using the component of FIG. 9.
- FIG. 11 is a partially sectional, elevational view of an assembly in accordance with yet another embodiment of the invention.
- FIG. 12 is a view similar to FIG. 11 but depicting an assembly according to a further embodiment of the invention.
- FIG. 13 is a diagrammatic sectional view on an enlarged scale of the area indicated in FIG. 12.
- FIGS. 14 and 15 are further diagrammatic sectional elevational views depicting assemblies in accordance with further embodiments of the invention.
- An adaptor in accordance with one embodiment of the invention includes a sheetlike,
flexible substrate 20 having aninner surface 22 and an oppositely-directed,outer surface 24. As used in this disclosure, the term “sheetlike” refers to an element which has thickness substantially less than its length and width.Substrate 20 may be formed from essentially any material used in formation of flexible circuits as, for example, unreinforced or reinforced polyimides or BT resin. Most typically, the substrate is about 25-75 microns thick. Other materials and thicknesses may be employed. As discussed below, during fabrication of an assembly incorporating the adaptor in accordance with this embodiment, the substrate will be flexed in only one region, and, accordingly, only that region needs to be flexible in this embodiment. Thus, other regions of the substrate may be substantially rigid. -
Substrate 20, as seen in plan view in FIG. 1, is generally in the form of an elongated strip and has afirst socket region 26 adjacent the end of the strip towards the left as seen in FIG. 1, and has an additional orattachment region 28 adjacent the opposite end of the strip. The substrate has an array ofapertures 30 extending through it, from theinner surface 22 to theouter surface 24 in thefirst socket region 26. - The adaptor further includes a set of
first socket contacts 34 formed from one or more electrically conductive materials, typically metals. Eachfirst socket contact 32 is aligned with one of theapertures 30. Each first socket contact is adapted to engage a solder ball advanced through the correspondingaperture 30 and is also adapted to allow the solder ball to project through the aperture and through the contact itself. These contacts may be generally similar to the contacts disclosed in U.S. Pat. Nos. 5,632,631; 5,980,270; 5,802,699; 5,615,824; and 6,200,143 the disclosures of which are hereby incorporated by reference herein. In the particular embodiment depicted, eachsocket contact 32 is generally in accordance with certain preferred embodiments shown in the aforementioned '631, '824 and '270 patents; each socket contact includes amain structure 34 having a hole corresponding to theaperture 30 and fourtabs 36 which project inwardly, partially across the hole and partially across theaperture 30. As disclosed in certain of the aforementioned patents, the socket contacts may incorporate features such as asperities and hard metal elements to facilitate engagement with the solder balls and may have areas that are not wettable by the solder or other joining material, that is to be used with the socket contacts.Socket contacts 34 in the embodiment of FIGS. 1 and 2 are disposed on the outer orbottom surface 24 ofsubstrate 20. - The adaptor further includes a layer of an adhesive38 overlying the
inner surface 22 ofsubstrate 20 inattachment area 28.Adhesive 38 may be, for example, an epoxy or a so-called “dry pad” adhesive arranged to remain solid until raised to an elevated temperature and then promptly form a bond to a mating surface. - The adaptor also includes an additional functional element in the form of an array of
terminals 40 disposed on theouter surface 24 of the substrate in theattachment region 28. As used in this disclosure, the term “functional element” refers to an element which itself can perform an electrical function as, for example, a passive component such as a resistor, capacitor or inductor, a unit incorporating several passive devices, commonly referred to as a “passive chip”, or an active semiconductor component such as a semiconductor chip including numerous active devices with or without passive devices, and also refers to an element which can be used to make connections to an additional electronic device or element as, for example, an array of terminals. - At least some of
terminals 40 are connected to at least some of thefirst socket contacts 32 bytraces 42 extending along thesubstrate 20. Some of the traces are omitted for clarity of illustration in FIG. 1.Traces 42 andterminals 40 may be formed from conventional materials used in flexible circuits, as, for example, copper and copper-based alloys, with a thin layer of gold or other non-reactive, readily-solderable metal on the exposed surfaces ofterminals 40. A solder mask layer (not shown) desirably overlies theouter surface 24 of the adaptor and also covers traces 24. The solder mask layer has openings aligned withterminals 40 so that the terminals remain exposed at theouter surface 24 of the substrate. As used in this disclosure, a terminal or other conductive feature is regarded as “exposed at” a surface of a dielectric element where the terminal is arranged so that all or part of the conductive feature can be seen by looking at such surface. In the particular embodiment illustrated,terminals 40 project slightly fromouter surface 24, but this is not essential; theterminals 40 may be recessed within apertures extending to the outer surface, or even provided on the inner surface and aligned with apertures extending through the dielectric to the outer surface. - In an assembly method according to a further embodiment of the invention, the adaptor is assembled with a first
microelectronic element 44.Microelectronic element 44 may be a “bare” semiconductor chip or, preferably, a packaged semiconductor chip incorporating the active semiconductor elements or die 46 in aprotective package 48. The first microelectronic element as a whole has abottom surface 50, atop surface 52 andedges bonding contacts 58 exposed at thebottom surface 50 of the element. For example, where the first microelectronic element is a semiconductor chip in a ball grid array package, thebottom surface 50 may be defined by apackage substrate 60 andbonding contacts 58 may be provided as conductive elements on this substrate. The bonding contacts are electrically connected to theactive semiconductor chip 46 by internal leads (not shown). The edges and top surface of the microelectronic element may be defined by an encapsulant covering the active semiconductor or die 46. Such packages can be made with numerous different internal configurations. For example, the active element or die 46 may be mounted “face-up” so that the contacts of the active semiconductor element or die 46 face upwardly, away from thepackage substrate 60 or, alternatively, “face-down” so that the active die contacts face toward the package substrate. Optionally,microelectronic element 44 may havebonding contacts 58 which are moveable with respect to the active semiconductor element or die 46. - The microelectronic element is provided with an array of connecting elements in the form of
solder balls 62. The solder balls are attached tobonding pads 58 and project downwardly from thebottom surface 50 of the microelectronic element. The solder balls may be applied by conventional processes used in surface-mounting technology. For example, the solder balls may be bonded to thebonding contacts 58 by reflowing or melting the solder balls when the balls are applied. Themicroelectronic element 44, with connecting elements orsolder balls 62, is arranged over theinner surface 22 of the adaptor substrate in thefirst socket region 26, so that thebonding contacts 58 and connecting elements orsolder balls 62 are aligned with theapertures 30 in the adaptor substrate and, hence, with thesocket contacts 32. The microelectronic element and adaptor are then urged toward one another, as depicted in FIG. 3. For example, theouter surface 24 of the adaptor substrate may be supported by a resilient element or by atemporary fixture 64 havingopenings 66 larger than thesolder balls 62 arranged in an array corresponding to the array ofapertures 30 andsocket contacts 32. The top orrear surface 52 of themicroelectronic element 44 may be engaged by anotherfixture 68. In this manner, the microelectronic element is advanced toward the adaptor substrate so that thebottom surface 50 of the microelectronic element approaches or engages thetop surface 22 of the adaptor substrate. The connecting elements or solder balls pass through theapertures 30 in the substrate and engage thesocket contacts 32. As best seen in FIG. 5, at this stage of the process, thetabs 34 of the socket contacts desirably bend downwardly as thesolder balls 62 pass through the socket contacts. - In the next stage of the process,
substrate 20 is folded to the configuration depicted in FIG. 4. In this configuration, the substrate extends outwardly beyond oneedge 54 ofmicroelectronic element 44 and upwardly along that edge. Theattachment area 28 of the substrate overlies the top orrear surface 52 of the firstmicroelectronic element 44. Theinner surface 22 in the attachment region faces downwardly and confronts the top surface of the microelectronic element, whereas theouter surface 24 in the attachment region faces upwardly. Thus,terminals 40, which are exposed at theouter surface 24, are accessible from the top of the first microelectronic element. Theinner surface 22 is secured to thetop surface 52 of the microelectronic element by adhesive 38. The substrate may be folded to this configuration simply by bending the substrate around the edge of the microelectronic element or by bending the substrate around a temporary tool or fixture (not shown). - The microelectronic element and adaptor may be handled and placed onto a
circuit board 70 or other circuit panel having atop surface 72 using standard surface-mounting techniques. In accordance with standard surface-mounting techniques, the connecting elements orsolder balls 62 are aligned withbonding contacts 76 exposed at the top surface of the circuit board, and the solder balls are reflowed so as to bond the solder balls tobonding contacts 76 and thusbond contacts 76 to thecorresponding bonding contacts 58 on the bottom surface of themicroelectronic element 44. Typically, a flux is applied to aid the solder reflow process. During reflow, the solder inballs 62 forms a metallurgical bond withsocket contacts 32. As best seen in FIG. 5, theprongs 34 of the socket contacts may penetrate into the individual solder balls, as schematically depicted at 34′. The socket contacts may thus provide additional reinforcement within the solder balls in the finished assembly. - In this condition, first
microelectronic element 44 sits on the circuit panel in substantially the same position as if the adaptor were not present. Thefirst socket region 26 of adaptor substrate lies in the gap between thebottom surface 50 of the first microelectronic element and thetop surface 72 of the circuit board. The height of the microelectronic element above thetop surface 72 of the circuit panel may be nearly or exactly the same as if the adaptor were not present. The exposedterminals 40 of the adaptor provide an auxiliary mounting surface on top ofelement 44. A secondmicroelectronic element 78 and a thirdmicroelectronic element 80 may be mounted on theterminals 40, again using standard surface-mounting techniques. All of the operations involved in assembling the adaptor to the first microelectronic element mounting the adaptor to the circuit board and assembling the further microelectronic elements to the terminals can be performed as part of a “board stuffing” operation used to mount microelectronic elements on a circuit board. - Other
microelectronic elements 82 may be mounted on the top surface of the circuit board in the normal manner. Firstmicroelectronic element 44 is connected to these additional elements bytraces 74 within and on thecircuit board 70. The second and thirdmicroelectronic elements microelectronic element 44 through theterminals 40, traces 42 andsocket contacts 32 of the adaptor. The second and third microelectronic elements are also connected toappropriate contact pads 76 of the circuit board, and, hence, to other elements to other elements of the circuit, by theterminals 40, traces 42 andsocket contacts 34 in conjunction with the connecting elements or solder balls which serve to connect the first microelectronic element to the circuit board. - The assembly operation can be repeated numerous times to produce numerous circuit assemblies. The operation can be varied by varying the second and third
microelectronic elements microelectronic element 44. For example, in fabricating cellular telephones, different types of static random access memory or SRAM and different types or sizes of flash memory may be provided as the second and third microelectronic elements in different units, all of which employ the same baseband ASIC or FPGA. The cellular telephone manufacturer may purchase standard chips in standard packages. The configuration of the adaptor may be varied to accommodate different second and third microelectronic elements. - The entire assembly is compact, in that the second and third
microelectronic elements - The joints between the second and third
microelectronic elements microelectronic element 44 typically has a coefficient of thermal expansion close to those of the second and third microelectronic elements. For example, a typical copper andepoxy circuit board 70 may have a coefficient of thermal expansion on the order of 16-18 ppm/° C., whereas the coefficient of expansion of the firstmicroelectronic element 44, which is an aggregate of the coefficients of thermal expansion of the die (about 2-3 ppm/° C.) and the epoxy over-molding, and hence would be somewhat less than that of the circuit board, as, for example, about 8 ppm/° C. As mentioned above, the first microelectronic element may include provisions to allow thebonding contacts 58 to move relative to the die 46 and thus relieve differences in expansion between thecircuit board 70 and the die. Where this arrangement is employed, the adaptor does not substantially restrict movement of the bonding contacts. Some or all of the difference in thermal expansion between the die infirst element 44 andcircuit board 70 may be accommodated by deformation of the connecting elements orsolder balls 62. Because the adaptor extends around these elements and does not add height to these elements, relatively large solder balls can be used to enhance reliability of this connection without unduly increasing the overall height of the assembly. - The
socket contacts 32 can be designed to enhance the structure of thesolder balls 62 so that they can better resist strain due to CTE mismatch between the die 44 and thecircuit board 70. In particular, it is desirable for the socket contacts to enhance the regions of the solder balls near the junctions of the solder balls withbonding contacts 58, near the junctions of the solder balls with the contact pads of the circuit board, or both. Reinforcing one or both of these regions, commonly referred to as fillet regions of thesolder balls 62, can provide enhanced resistance to forces that could otherwise cause premature failure of the connections. - Because the second and third
microelectronic elements main circuit board 70 need not include layers of traces to make these interconnections. This simplifies the layout of the main circuit board and, in some cases, can reduce the number of layers required in the board as a whole. - In a variant of the manufacturing process discussed above, the second and third
microelectronic elements terminals 40 before the first microelectronic element and adaptor are assembled to the main circuit board. Indeed, the second and third microelectronic elements may be bonded to the adaptor before the adaptor is folded or may be supplied as part of the adaptor. - The adaptor discussed above with reference to FIGS. 1-4 has socket contacts on the
outer surface 24 of thedielectric substrate 20 and has the terminals and traces also disposed on the outer surface. In a further variant (FIG. 6), thesocket contacts 132, traces 142 andterminals 140 may be disposed on theinner surface 122 of thedielectric substrate 120. Here again, the socket contacts are aligned withapertures 130 in the dielectric substrate. When the firstmicroelectronic element 144 is assembled to the adaptor, the connecting elements orsolder balls 162 project through thesocket contacts 132 and through theapertures 130, as depicted in FIG. 6. Also, theterminals 140 are exposed to theouter surface 124 of the substrate throughholes 125 in the substrate aligned with the terminals. The adhesive 138 may be provided as a “dry pad” or solid adhesive layer overlying the terminals on theinner surface 122 of the substrate. Also, the adhesive 138 may extend into the socket region and may overlie the entire inner surface of the substrate. The dry pad may haveapertures 139 aligned with theapertures 130 andsocket contacts 132. In this embodiment, the dry pad acts as masking or anti-shorting layer to protect the traces from accidental contact with the edges of the chip or with one another when the substrate is folded. - An assembly according to yet another embodiment of the invention (FIG. 7) includes an adaptor having a similar
flexible substrate 220 andfirst socket contacts 232 in asocket region 226. Here again, the socket region extends into the gap between thebottom surface 250 of the first microelectronic element and thetop surface 272 of the circuit board. In this embodiment as well, the adaptor includes a functional element in the form ofterminals 240 in anattachment region 224 of the substrate, remote from thesocket region 226. Here again, the attachment region projects outwardly beyond anedge 254 of the firstmicroelectronic element 244. However, the attachment region is not folded back over the top of the first microelectronic element. Instead, the attachment region is extended over a neighboringelement 201 on the circuit board. Once again, the second microelectronic element 278 may be mounted on the attachment region of the adaptor. In further variance, attachment regions can be provided so as to overlie more than one additional element on the circuit board and can project outwardly from more than one edge of the first microelectronic element. - An assembly according to yet another embodiment of the invention shown in FIG. 8 includes an adaptor having a
substrate 320 with afirst socket region 326 andfirst socket contacts 332 similar to the first socket contacts discussed above. However, theattachment region 324 of the substrate has terminals in the form of a second set ofsocket contacts 333 similar to the first socket contacts and hasapertures 331 extending through the substrate in this region, in alignment with the second socket contacts. Thesecond socket contacts 333 are connected viatraces 340 on the substrate of the adaptor to the first socket contacts. In this assembly, the connectingelements 362 of the firstmicroelectronic element 344 extend through thefirst socket contacts 332. The second microelectronic element 378 is mounted to the adaptor in substantially the same way as the first microelectronic element, so that second connectingelements 363 such as solder balls associated with the second microelectronic element extend through theholes 331 in the attachment region of the substrate and engage the second socket contacts. Both of thesemicroelectronic elements 344 and 378 may be assembled to the adaptor in the manner discussed above with reference to FIG. 3, and the entire assembly then may be mounted on acircuit panel 370 so as to engage the connectingelements microelectronic elements 344 and 378 are interconnected throughtraces 340 of the adaptor, the circuit panel need not incorporate the traces required for such interconnection and, hence, can be simpler and, in some cases, may incorporate fewer layers than would otherwise be required. Here again, presence of the adaptor does not add to the height of the assembly. - The component depicted in FIG. 9 incorporates a
substrate 420 having afirst socket region 426 formed as a central panel of a generally cruciform shape and having additional orattachment regions 424 formed as arms of the cruciform shape projecting outwardly from the central panel. In this embodiment, the adaptor is prefabricated with functional elements in the form ofadditional semiconductor chips traces 440 extending to thefirst socket contacts 432 in thesocket region 426. The particular embodiment shown has thefirst socket contacts 432, traces 440 and additional microelectronic elements 478-481, all mounted on the inner surface of the substrate. Here again, a microelectronic element such aselement 440 is assembled to the adaptor so that connecting elements 462 on the microelectronic element project through the first socket contacts. As shown in FIG. 10, each arm of the adaptor is folded so as to bring the variousadditional regions 424 over the firstmicroelectronic element 444 and stack the various additional microelectronic elements over the first microelectronic element. Such a sub-assembly may be mounted onto a circuit board. The adaptor in accordance with this embodiment of the invention provides advantages similar to those achieved in the stacked package disclosed in commonly assigned, co-pending U.S. patent application Ser. No. 10/077,388, filed Feb. 15, 2002, the disclosure of which is also incorporated by reference herein. For example, the traces connecting the first microelectronic element andsocket contacts 432 to each of the microelectronic elements are of equal or nearly equal length, so that propagation times of signals to the various additional microelectronic elements 478-481 are substantially equal. However, the firstmicroelectronic element 444 may be provided in a standard package. The arrangement of FIGS. 9 and 10 may be made with less than four or more than four additional regions. For example, if only two additional regions are provided, these may be provided on opposite sides of the central orfirst socket region 426. Regardless of the number of such additional regions, the additional regions may be folded on top of each other as shown in FIG. 10, or may extend outwardly from the central panel as shown and described in reference to FIGS. 7 and 8. - The connecting elements which link the first microelectronic element to the circuit board need not be solder balls or other masses of bonding material. In the embodiment of FIG. 11, the first
microelectronic element 544 incorporates asemiconductor die 546 mounted in a lead frame-type package which incorporates anepoxy over-molding 545 encapsulating the active die andmetallic leads 562 projecting out of edges of the over-molding and extending downwardly beyond thebottom surface 550 of the over-molding. In this arrangement, theadaptor substrate 520 hasapertures 530 extending through it from itsinner surface 522 to itsouter surface 524. Socket contacts in the form of metallic vialiners 532 are provided in these apertures. Theapertures 530 and socket contacts are provided in asocket region 526 of the substrate. Here again, thesocket region 526 of the substrate lies at least in part beneath the firstmicroelectronic element 544, in the gap between thebottom surface 550 of the microelectronic element and thetop surface 572 of acircuit board 570 when the first microelectronic element is mounted on the circuit board. The leads 562 of the lead frame package extend through the apertures in the socket region of the substrate and engage thesocket contacts 532. The leads may be soldered to the socket contacts orvias 532 of the adaptor. Here again, anadditional region 528 of the substrate extends outside of the gap between the microelectronic 544 and the circuit board, so that an additional microelectronic element 578 can be engaged withterminals 540 on the additional orattachment region 528. In this embodiment, theadaptor substrate 520 is folded (about an axis parallel to the plane of the drawing) to place theadditional region 528 over the top surface 552 of the firstmicroelectronic element 544. Here again, the additional microelectronic element may be sub-assembled to the adaptor before or after mounting the first microelectronic element and adaptor to the circuit board. The circuit board has contact elements arranged to make connection with theleads 562 of the first microelectronic element, as, for example,pads 574 arranged for surface mounting of the leads or via holes 575 extending through the circuit board with appropriate via liners for through-board solder mounting the lead frame package. Although bothpads 574 and via holes 575 are depicted in FIG. 11, in practice the board typically would include one or the other, and not both. In a further variant, the same solder which connects leads 562 to contactelements 574 or 575 may connect the leads to thesocket contacts 532 of the adaptor. - An assembly according to a further embodiment of the invention (FIG. 12) includes an adaptor having a
dielectric body 620 generally similar to the adaptor discussed above with reference to FIGS. 1-4. However, the adaptor of FIG. 12 includes a first orbottom connection region 626 and anadditional region 628 remote fromregion 626. Here again, theadaptor body 620 has aninner surface 622 and anouter surface 624. Thefirst connection region 626 extends in a gap between the firstmicroelectronic element 644 and thecircuit board 670, and thus extends beneath thebottom surface 650 of the firstmicroelectronic element 644. In thefirst connection region 626, theinner surface 622 of the dielectric body faces upwardly, toward the first microelectronic element, whereas theouter surface 624 faces downward, toward thecircuit board 670. The additional region extends outside of the gap, and overlies thetop surface 652 of the first microelectronic element. - In place of the socket contacts discussed above, the adaptor of FIG. 12 has first
conductive attachments 634 which include conductive pads disposed at or near theinner surface 622 of the body in thefirst connection region 626, and holes 630 extending through the body in alignment with these pads.Pads 634 desirably are relatively thin as, for example, about 10-20 micron in thickness. Pads or firstconductive attachments 634 are connected bytraces 642 toterminals 640 on theadditional region 628. - Here again, the first
microelectronic element 644 hasbonding pads 658 exposed at its bottom surface. These bonding pads are connected by internal connectingelements 602 to the pads orconductive attachments 634 of the adaptor, which in turn are connected by mountingelements 662 to thecontact pads 676 of the circuit board. Most preferably, the internal conducting elements are thin layers of a conductive bonding material such as solder lands. Desirably, the height h1 of each internal conducting element, (FIG. 13) measured from thebottom surface 650 of the first microelectronic element to the bottom of the internal conducting element, is about 50 microns or less, and most preferably about 40 microns or less. The mountingelements 662 most preferably are masses of a conductive bonding material such as solder balls or solid core solder balls. The mounting elements may have height h2 or vertical extent from theupper surface 672 of the circuit board considerably greater than the height h1 of the internal connectingelements 602. For example, the height h2 of the mounting elements may be on the order of 100 to 300 microns. However, the assembly still provides a relatively low overall height or distance H between thetop surface 672 of the circuit board and thebottom surface 650 of the first microelectronic element. Because the mountingelements 662 extend throughholes 630 inbody 620, a significant portion, typically about 25% or more, of the height h2 of the mounting elements is concealed within the thickness t ofbody 620. Thus, the overall height or distance H from theboard surface 672 to the bottom surface of the first microelectronic element is less than the aggregate or sum of heights h1, h2 and the thickness t of the body. Stated another way, the assembly according to this embodiment of the invention can provide a low overall height while allowing significant solder ball height. Such relatively large solder balls can provide enhanced resistance to strains due to differential thermal expansion of the elements. - In a variant of this approach, the
conductive attachments 634 are disposed at or near theouter surface 624, and the internal connectingelements 602 extend from the firstmicroelectronic element 644 partially or entirely through the thickness of the body to the conductive attachments. In this arrangement, the internal conductive elements may be elements such as solder balls or solid core solder balls having a relatively great height. The conductive attachments orpads 634 are connected to the contact pads of the circuit board by relatively thin mounting elements such as solder lands. In this variant, the roles of the internal connecting elements and mounting elements are reversed relative to the arrangement shown in FIGS. 12 and 13. Here again, however, height of the larger element (the internal connecting element) is substantially concealed within the thickness t of the body, so that the overall height H remains less than the sum of the heights of the internal connecting elements, the mounting elements and the thickness of the body. In a further variant, the conductive attachments may include conductive elements at both surfaces of the body defining sockets adapted to receive the mounting elements, the internal connecting elements, or both so that either or both of these are partially or entirely concealed within the thickness of the body. For example, sockets as depicted in certain preferred embodiments of U.S. Pat. No. 6,200,143, the disclosure of which is incorporated by reference, may be used in this manner. - An assembly according to yet another embodiment of the invention (FIG. 14) is generally similar to the assembly of FIGS. 12 and 13. However, in the assembly of FIG. 14, the
conductive attachments 734 are arranged so that the internal connectingelements 702 which connect the firstmicroelectronic element 744 to the attachments are offset from the mountingelements 762 which connect the attachments to the contact pads of the circuit board. The height h1 of the connecting elements overlaps a part of the height h2 of the mounting elements, a part of the thickness t of the body of the adaptor, or both. In this arrangement as well, the overall distance or height H from the top surface of the circuit board to the bottom surface of the first microelectronic element is less than the sum of h1, h2 and t. In one example of such as structure, the connectingregion 726 may have a structure generally similar to the sockets shown in U.S. Pat. No. 5,951,305, the disclosure of which is also incorporated by reference herein. - In yet another variant (FIG. 15) the, internal connecting elements are again offset in horizontal directions from the mounting
elements 862. Here again, the internal connectingelements 802 make connections toconductive attachments 834 on the bottom orfirst connection region 826 of the adaptor body. This region of the body is deformed into a non-planar shape, so that once again the height h1 of the internal connecting elements overlaps the height h2 of the mounting elements, the thickness t of the body, or both. The configuration of this region may be similar to the configuration of the sockets shown in certain embodiments of U.S. Pat. No. 6,086,386, the disclosure of which is also incorporated by reference herein. The arrangements of FIGS. 14 and 15 can also provide a low overall height H of the first microelectronic element above the circuit board, and hence a low height for the entire assembly, while using internal conductive elements and/or mounting elements having substantial height. The mounting arrangements discussed above with reference to FIGS. 12-15 also can be used with any of the adaptor configurations discussed herein, including those discussed above with reference to FIGS. 7-11. Also, although the embodiments of FIGS. 12-15 have been discussed above with reference to the completed assembly, the present invention also includes the adaptors and assembly methods used to form these assemblies. The adaptors are similar to the adaptors discussed above, except that the socket contacts and socket regions are replaced by the conductive attachment elements and connection region. Also, the assembly methods are similar to those discussed above with reference to FIGS. 1-4, except that the bonding contacts of the first microelectronic element are connected to the conductive attachments of the adaptor, rather than directly to the circuit board contact pads, and the method includes the further step of connecting the conductive attachments of the adaptor to the circuit board contact pads. - Numerous other variations and combinations of the features discussed above can be utilized without departing from the present invention. For example, in the embodiments discussed above, the additional functional elements provided in the adaptor are either terminals (such as
terminals 40 in FIG. 1) or additional semiconductor chips 478-481 (FIGS. 9 and 10). However, other functional elements such as passive electrical components may be incorporated in place of or in addition to these elements. In still other arrangements, the adaptor may extend beyond the circuit board. For example, the adaptor can extend around an edge of the circuit board to provide mounting terminals on the bottom or rear surface of the circuit board. Alternatively, the adaptor can be in the form of a ribbon cable which has functional elements in the form of contacts adapted to engage a socket on another circuit board or another electronic device. - Also, it is not essential that the substrate be thin or flexible throughout its entire extent. In those embodiments where bending or folding is required, the substrate may be flexible in only the regions to be deformed during bending or folding and may be rigid in other regions. In embodiments where the substrate will not be bent or folded, as, for example, in the arrangement of FIG. 8, the substrate may be entirely or partially rigid. Also, although the adaptors discussed above incorporate only a single layer of traces, additional metallic elements may be provided as desired. For example, the adaptor may include electrically conductive plane for carrying a ground or other substantially constant potential spaced apart from the traces. Also, more than one layer of traces may be incorporated in the adaptor to accommodate more complex wiring requirements. Connecting elements other than the solder balls and leads discussed above may be employed, as, for example, solid core solder balls and pins.
- In the foregoing description, terms such as “top”, “bottom”, “upwardly” and “downwardly” refer to the frame of reference of the microelectronic element or circuit board. These terms do not refer to the normal gravitational frame of reference.
- As these and other variations and combinations of the features discussed above can be utilized without departing from the present invention as defined by the claims, the foregoing description of the preferred embodiment should be taken by way of illustration rather than by way of limitation of the invention.
Claims (1)
1. An adaptor for use with a first microelectronic package having a bottom surface, a top surface and an array of connection elements projecting downwardly beyond the bottom surface of said package, the adaptor comprising:
a substrate having a first socket region with an inner surface and an outer surface, an array of socket openings extending through the substrate in said socket region, said socket openings being disposed in an array corresponding to the arrangement of connection elements on the microelectronic element, the adaptor further comprising a set of socket contacts aligned with at least some of said socket openings, said socket contacts and socket openings being arranged so that the package can be engaged with the adaptor with the bottom surface of the package confronting the inner surface of the substrate in said socket region and with the connection elements of the package engaged with the socket contacts and projecting through said socket openings beyond the outer surface of the substrate, the adaptor further including one or more functional elements electrically connected to at least some of said socket contacts.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/862,735 US20040217461A1 (en) | 2002-08-05 | 2004-06-07 | Microelectronic adaptors, assemblies and methods |
US11/038,629 US20050167817A1 (en) | 2002-08-05 | 2005-01-19 | Microelectronic adaptors, assemblies and methods |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US40139102P | 2002-08-05 | 2002-08-05 | |
US10/236,442 US6765288B2 (en) | 2002-08-05 | 2002-09-06 | Microelectronic adaptors, assemblies and methods |
US10/862,735 US20040217461A1 (en) | 2002-08-05 | 2004-06-07 | Microelectronic adaptors, assemblies and methods |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US10/236,442 Continuation US6765288B2 (en) | 2002-08-05 | 2002-09-06 | Microelectronic adaptors, assemblies and methods |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/038,629 Continuation-In-Part US20050167817A1 (en) | 2002-08-05 | 2005-01-19 | Microelectronic adaptors, assemblies and methods |
Publications (1)
Publication Number | Publication Date |
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US20040217461A1 true US20040217461A1 (en) | 2004-11-04 |
Family
ID=31190733
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/236,442 Expired - Lifetime US6765288B2 (en) | 2002-08-05 | 2002-09-06 | Microelectronic adaptors, assemblies and methods |
US10/862,735 Abandoned US20040217461A1 (en) | 2002-08-05 | 2004-06-07 | Microelectronic adaptors, assemblies and methods |
Family Applications Before (1)
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US10/236,442 Expired - Lifetime US6765288B2 (en) | 2002-08-05 | 2002-09-06 | Microelectronic adaptors, assemblies and methods |
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US (2) | US6765288B2 (en) |
AU (1) | AU2003265340A1 (en) |
WO (1) | WO2004013910A1 (en) |
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Also Published As
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AU2003265340A1 (en) | 2004-02-23 |
WO2004013910A1 (en) | 2004-02-12 |
US20040021211A1 (en) | 2004-02-05 |
US6765288B2 (en) | 2004-07-20 |
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