Connect public, paid and private patent data with Google Patents Public Datasets

Coated and magnetic particles and applications thereof

Download PDF

Info

Publication number
US20040115340A1
US20040115340A1 US10728636 US72863603A US2004115340A1 US 20040115340 A1 US20040115340 A1 US 20040115340A1 US 10728636 US10728636 US 10728636 US 72863603 A US72863603 A US 72863603A US 2004115340 A1 US2004115340 A1 US 2004115340A1
Authority
US
Grant status
Application
Patent type
Prior art keywords
particles
magnetic
material
particle
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US10728636
Inventor
Thomas Griego
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Surfect Technologies Inc
Original Assignee
Surfect Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Images

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0244Powders, particles or spheres; Preforms made therefrom
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D15/00Electrolytic or electrophoretic production of coatings containing embedded materials, e.g. particles, whiskers, wires
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D15/00Electrolytic or electrophoretic production of coatings containing embedded materials, e.g. particles, whiskers, wires
    • C25D15/02Combined electrolytic and electrophoretic processes with charged materials
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/12Semiconductors
    • C25D7/123Semiconductors coated first with a seed layer, e.g. for filling vias
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/14Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates
    • H01F41/16Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates the magnetic material being applied in the form of particles, e.g. by serigraphy, i.e. forming thick magnetic films and precursors therefor, e.g. magnetisable pastes, inks, glass frits
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/14Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates
    • H01F41/20Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates by evaporation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/14Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates
    • H01F41/24Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates from liquids
    • H01F41/26Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates from liquids using electric currents, e.g. electroplating
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions ; Methods of application thereof
    • H05K3/3473Plating of solder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions ; Methods of application thereof
    • H05K3/3478Applying solder paste, particles or preforms; Transferring prefabricated solder patterns
    • H05K3/3484Paste or slurry or powder
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B22CASTING; POWDER METALLURGY
    • B22FWORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER
    • B22F2998/00Supplementary information concerning processes or compositions relating to powder metallurgy
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B22CASTING; POWDER METALLURGY
    • B22FWORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER
    • B22F2999/00Aspects linked to processes or compositions used in powder metallurgy
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05568Disposition the whole external layer protruding from the surface
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05571Disposition the external layer being disposed in a recess of the surface
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1131Manufacturing methods by local deposition of the material of the bump connector in liquid form
    • H01L2224/1132Screen printing, i.e. using a stencil
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/11334Manufacturing methods by local deposition of the material of the bump connector in solid form using preformed bumps
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/1147Manufacturing methods using a lift-off mask
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13005Structure
    • H01L2224/13009Bump connector integrally formed with a via connection of the semiconductor or solid-state body
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01012Magnesium [Mg]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01027Cobalt [Co]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01044Ruthenium [Ru]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01056Barium [Ba]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0106Neodymium [Nd]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01327Intermediate phases, i.e. intermetallics compounds
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • H01L2924/143Digital devices
    • H01L2924/1433Application-specific integrated circuit [ASIC]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19042Component type being an inductor
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0215Metallic fillers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0218Composite particles, i.e. first metal coated with second metal
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/08Magnetic details
    • H05K2201/083Magnetic materials
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09572Solder filled plated through-hole in the final product
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/0425Solder powder or solder coated metal powder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/043Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/104Using magnetic force, e.g. to align particles or for a temporary connection during processing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/12All metal or with adjacent metals
    • Y10T428/12014All metal or with adjacent metals having metal particles
    • Y10T428/12028Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, etc.]
    • Y10T428/12063Nonparticulate metal component

Abstract

A method of using coated and/or magnetic particles to deposit structures including solder joints, bumps, vias, bond rings, and the like. The particles may be coated with a solderable material. For solder joints, after reflow the solder material may comprise unmelted particles in a matrix, thereby increasing the strength of the joint and decreasing the pitch of an array of joints. The particle and coating may form a higher melting point alloy, permitting multiple subsequent reflow steps. The particles and/or the coating may be magnetic. External magnetic fields may be applied during deposition to precisely control the particle loading and deposition location. Elements with incompatible electropotentials may thereby be electrodeposited in a single step. Using such fields permits the fill of high aspect ratio structures such as vias without requiring complete seed metallization of the structure. Also, a catalyst consisting of a magnetic particle coated with a catalytic material, optionally including an intermediate layer.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • [0001]
    This application claims the benefit of the filing of U.S. Provisional Patent Application Serial No. 60/431,315, entitled “Solid core solder particles for printable solder paste”, filed on Dec. 5, 2002, U.S. Provisional Patent Application Serial No. 60/447,175, entitled “Electrochemical Devices and Processes”, filed on Feb. 12, 2003, and U.S. Provisional Patent Application Serial No. 60/519,813, entitled “Particle Coelectrodeposition”, filed on Nov. 12, 2003. This application is a continuation-in-part of U.S. patent application Ser. No. 09/872,214, entitled “Submicron and Nanosize Particle Encapsulation by Electrochemical Process and Apparatus”, filed May 31, 2001. The specifications of each application listed are incorporated herein by reference.
  • BACKGROUND OF THE INVENTION
  • [0002]
    1. Field of the Invention (Technical Field)
  • [0003]
    The present invention relates to magnetic or nonmagnetic particles which are coated with a desired material before the particles are deposited on a substrate or surface. The coating is thus in intimate contact with the core particle, resulting in enhanced stoichiometric control and minimization of oxidation. The coating may be any desired material, including but not limited to a solder material or a catalytic material. If the core particles and/or the coating are magnetic, external magnetic fields may be used to enhance the deposition rate or to direct the particles to specific locations, minimizing deposition on unwanted areas of the substrate. Multiple types of deposition processes may be used, such as electrodeposition, screen printing, and photostencil bumping. The present invention also relates to the use of uncoated magnetic or nonmagnetic particles to modify the properties of other structures, such as semiconductor vias or bumps.
  • [0004]
    2. Background Art
  • [0005]
    Note that the following discussion refers to a number of publications by author(s) and year of publication, and that due to recent publication dates certain publications are not to be considered as prior art vis-a-vis the present invention. Discussion of such publications herein is given for more complete background of the scientific principles and is not to be construed as an admission that such publications are prior art for patentability determination purposes.
  • [0006]
    Wafer bumping technology recently has attracted considerable attention in the high-end computing and networking markets, primarily because this technology has enabled high performance for high-density MPU, ASIC and memory device structures. Flip chip ball grid array (FCBGA) is a package type that uses solder bumping interconnection while simultaneously allowing for an area-array configuration. This ensures signal and power/ground integrity far superior to conventional peripheral wire bonding interconnection.
  • [0007]
    For commodity or consumer products, such as cellular phones, the package size is of vital importance. Chip scale packages (CSP) already are well accepted in the industry. However, the search is still on for even smaller solutions, such as wafer-level CSPs (WL-CSP), which are a true chip size package. Another example, bumped die for flip chip on board (FCOB) assembly, also can reduce a product's final size.
  • [0008]
    There are three primary wafer bumping processes: evaporation, electroplating and screen printing. Evaporation methods require substantial investment in capital equipment and typically entail high cost of ownership. Electroplating methods are known to drive the trend for finer bump pitch, but some solder materials are not suitable because of electroplating bath constraints. Screen printing methods typically are the most cost efficient; but there can be severe limitations on bump height when the bump pitch is less than 200 microns. Deposition processes that are useful according to the present invention also include electrodeposition, electrophoresis, photostencil bumping, and the like.
  • [0009]
    A fourth, recently developed advanced printing (photostencil bumping) bump method uses a photosensitive resist film and provides a solution that can address the entire range of applications, from consumer to very high end. This partly is due to the advantage of an advanced screen printing bumping process, which enables both a bump height comparable to electroplating methods and a cost structure that is competitive with standard screen printing. This method is ideal for wafer “shuttle” services, i.e., fabrication of different devices on a single wafer for one or many users who share the initial tooling costs. Because a “shuttle” wafer must be singulated prior to individual user or customer shipment, single chip solder bumping is an effective method to apply bumps separately on each device. Photostencil bumping has achieved a bump pitch as low as 100-micrometers and bumping on wafers as thin as 100 microns. These advances allow for FCOB to become a very viable solution for system miniaturization. Naturally, an optimal solution also would have to consider the total cost for bumping, substrates, packaging, assembly, testing and board-level assembly. Photostencil bumping expands current capabilities for more uniform fine-pitch bumps. The height of a bump fabricated using photostencil bumping is similar to that enabled using electroplating and at a cost competitive to typical screen-printing methods. For example, photostencil bumping can produce bumps with a height of 105˜ at a 200 micron pitch, while electroplating produces bumps 100 micron in height, and screen printing yields bumps only 75 micron tall. One important aspect of this technology is its use of a unique photosensitive resist film selected for its outstanding properties in patterning, as well as the fact that it can withstand the high temperatures required for bump formation while still responding well to stripping by alkaline solvents. Furthermore, due to the use of dry film openings at patterning, the height uniformity of the bumps is improved vastly.
  • [0010]
    The present invention may be used with any method of deposition, including all of the foregoing.
  • [0011]
    Key material, design and process considerations in solder bumping are as follows:
  • [0012]
    1) The bump material should ideally be high-temperature, eutectic-forming, and lead-free
  • [0013]
    2) The bump pitch should be as small as possible, taking into account substrate compatibility (Bismaleimide Triazine [BT], build-up, high-thermal expansion glass ceramic, etc.).
  • [0014]
    3) The bump height should be sufficient to ensure first-level reliability.
  • [0015]
    4) The bump configuration may be area-array (MPU/ASIC) or peripheral (memory/analog).
  • [0016]
    5) The bump process may be wafer-level (evaporation, electroplating, and screen printing) or single die (dimple plate).
  • [0017]
    6) Tailoring of melting point is desirable to accommodate multiple reflow processing steps.
  • [0018]
    7) Electrical contact testing must be performed both before and after assembly.
  • [0019]
    8) The bumps should have mechanical properties, such as strength, sufficient to withstand possible mechanical shock, vibration, creep, and fatigue occurring in some applications, thus ensuring long term reliability.
  • [0020]
    9) The material should be void-free before and after reflow.
  • [0021]
    10) Cost must be minimized.
  • [0022]
    The demand for lead-free bumping materials has increased because of the Waste Electric and Electronic Equipment (WEEE) & Restriction of Hazardous Substances (ROHS) Directive proposals in Europe. Furthermore, lead-free bumps minimize alpha-particle effects on memory macros in system-on-chip (SoC) devices. It has been demonstrated that as many as 11,000 bumps can be fabricated on a single die at 153 micron bump pitch using lead-free bumps on a copper wiring.
  • [0023]
    There is a need for new solder materials that have the characteristics described above. Elemental particles have been added to existing solder compositions in an attempt to improve these characteristics (see S. Jadhav et al., J. Electronic Materials 30 (9), 1197 (2002), F. Guo et al., J. Electronic Materials 30 (9) 1073 (2001), S. Hwang et al., J. Electronic Materials 31 (11) 1304 (2002), and S. Choi et al., J. Electronic Materials 28 (11) 1209 (1999), all of which are incorporated herein by reference). Uncoated particles have been electrodeposited along with a matrix or filler material. However, these approaches require multiple processing steps, increasing the complexity and cost.
  • [0024]
    In addition, solder pastes have been blended from elemental powders, but these have the disadvantages of poor shelf life, stratification in the paste (which greatly reduces uniformity and thus reliability), and the use of organic binders which are incompatible with some applications.
  • [0025]
    The present invention also relates to semiconductor fabrication techniques requiring the fill of blind vias with metallic features and the fabrication of termination devices in column or spherical shape require accelerated deposition of metals. The existing process utilizes electrodeposition, electroless deposition, plasma vapor deposition, and in some cases metallized screen printing inks and pastes.
  • [0026]
    A common technique is the electroplating fill of features defined by photoresist or photolithography. The electrodeposition occurs by metallizing the substrates and then under conventional electrodeposition steps the process of electrochemical deposition builds a metallic deposit in the defined feature until the amp minute requirement that controls the volume of fill is met. The real time process for these types of techniques varies from two hours to as much as ten or twelve hours to avoid occlusions or pinches in the feature that would sacrifice the full density structure.
  • [0027]
    The time involved in this process is not conducive to chemical or cost-effective processing. The features that result require a very complicated seed metallization to provide the current buss flow to carry out the electrodeposition. This process requires a complicated plasma vapor deposition of a seed metal layer. This seed metal layer becomes very complicated to accomplish when the aspect ratio of the via feature exceeds 10 to 1. The current practice is to use more complicated methods of cross-sputtering and still the resulting result is not sufficient to assure a high-quality and cost-effective process.
  • [0028]
    The present invention also relates to the use of magnetic materials for catalysis. Membrane-electrode assembly (MEA) fabrication involves a great deal of often proprietary art, much of which has been developed by trial and error, to achieve the right combination of soluble Nafion, heat, and pressure for the proper interpenetration of PEM and catalyst that gives highly active catalyst layers. Typically inks of suspended precious metal blacks or carbon-supported precious metals are either brushed onto carbon felt electrodes or formed into catalyst decals by evaporation of catalyst inks on Teflon surfaces prior to pressure-transfer onto the PEM layer.
  • [0029]
    The use of magnetic materials to enhance catalysis is known. The electrode fabrication approach taken by Leddy et al. relied upon blending carbon-supported and polymer-shrouded magnetic particles together with soluble Nafion to form ink, which results in considerable agglomeration of the magnetic particles and reduced contact with the separate electrocatalyst material surface (such as Pt). This method produces a catalyst layer containing a wide distribution of distances between magnetic and catalytic surfaces, yet test results were very attractive, demonstrating a three-fold improvement in the power levels compared to controls. Quantitative analysis of these results is complicated by lack of adequate knowledge of the microstructure of the magnetically modified catalyst layer, but it is estimated that only about 25% of the catalyst is active when CO is present.
  • [0030]
    This approach has been limited to the use of relatively weak magnetic particles, because attempts to form catalyst layers from particles of higher magnetic strength failed to yield smooth, physically stable layers. High field-strength particles pose undesirable force affecting the electrodes integrity by fracturing and deforming bed-layer compact. Introduction of magnetic particles in the ink introduces new complications, such as how to apply and stabilize a thin layer while magnetic forces attract the particles together, during application and after drying of the applied ink. See for example Leddy, et al., U.S. Pat. Nos. 5,817,221, 5,928,804, 6,001,248, 6,303,242, 6,322,676, and 6,479,176, the specifications of which are incorporated by reference. Leddy et al.'s method has other disadvantages, including segregation of each constituent resulting in non-uniformity of the final product and complex manufacturing process.
  • SUMMARY OF THE INVENTION (DISCLOSURE OF THE INVENTION)
  • [0031]
    The present invention is both a method of depositing structures using coated and/or magnetic particles and the resulting structures. Deposition methods include but are not limited to electrodeposition, electrophoresis, electroplating, evaporation, screen printing, and photostencil bumping.
  • [0032]
    A primary advantage of the invention is that the stoichiometry of the resulting structure is more uniform than that of structures deposited using other methods due to the intimate contact of the coating and particle.
  • [0033]
    A primary advantage of the invention is that by depositing the particle and coating materials simultaneously, oxide contamination is minimized.
  • [0034]
    A primary object of the invention is to provide a method for making a solder joint by depositing coated particles on a substrate and reflowing the particles. The coating is preferably of a solderable material. The resulting solder may comprise unmelted particles in a solidified matrix. The presence of such particles reinforces the solder, making it more resistant to compressive and shear stresses. The particles also change the surface tension of a solder bump or similar structure, reducing the attainable bump pitch and enabling a higher density of bumps. The particles and coating may partially or completely react during reflow to form an alloy. The alloy preferably has a higher melting point than the coating, which permits subsequent multiple reflow steps.
  • [0035]
    A primary object of the invention is to deposit particles that are magnetic or that are coated with a magnetic material. The particles may be suspended in an ink or paste. Alternatively, the particles may be co-deposited in an electrolytic solution. The magnetic field is used to control the particle loading as well as precisely control the depositon location of the particles. In addition, materials with incompatible electropotentials may be deposited in one step.
  • [0036]
    A primary object of the invention is to permit the deposit of high aspect ratio structures, for example filling a via, without requiring complete seed metallization of the structure. A magnetic field may be employed to direct conducting particles into the structure past previously metallized surfaces, thereby forming an electrical contact and permitting the deposition to continue until completion.
  • [0037]
    The invention is further of a catalyst comprising a magnetic particle coated with a catalytic material. The presence of the magnetic field is known to improve the catalyst performance. The controlled geometry of a coating on a particle means the magnetic field at the surface is more easily controlled. The particle may optionally have at least one intermediate layer between the particle and outer coating, which acts as a diffusion barrier to prevent the magnetic particle from poisoning the catalyst.
  • [0038]
    Other objects, advantages and novel features, and further scope of applicability of the present invention will be set forth in part in the detailed description to follow, taken in conjunction with the accompanying drawings, and in part will become apparent to those skilled in the art upon examination of the following, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • [0039]
    The accompanying drawings, which are incorporated into and form a part of the specification, illustrate several embodiments of the present invention and, together with the description, serve to explain the principles of the invention. The drawings are only for the purpose of illustrating a preferred embodiment of the invention and are not to be construed as limiting the invention. In the drawings:
  • [0040]
    FIGS. 1A-D depict two FCBGA package configurations before and after reflow;
  • [0041]
    FIGS. 2A-B depict the effect of particle loading on bump shape;
  • [0042]
    [0042]FIG. 3A depicts PVD seed metallization of a via;
  • [0043]
    FIGS. 3B-D depict partial PVD seed metallization and subsequent fill and etching of a via produced according to the present invention;
  • [0044]
    [0044]FIG. 4 is a schematic cross section of a coated catalytic powder which comprises an inner protective layer.
  • DESCRIPTION OF THE PREFERRED EMBODIMENTS (BEST MODES FOR CARRYING OUT THE INVENTION)
  • [0045]
    The present invention is of a solder material manufactured using coated particles. As used throughout the specification and claims, “solder material” also means filler metal, particle joining material, structural joining material, brazing material, welding material, and the like.
  • [0046]
    The coated powder preferably comprises a preferably metallic elemental core, for example nickel or copper, coated, optionally by electroplating, with a solderable metal or alloy such as tin, tin/lead tin/silver or other compositions suitable for electronic component joining. The core powder may be any size, including a few microns or even submicron, and thus can be made compatible with any manufacturing process. The core material may comprise nickel, copper or other conductive powder with a melting point higher than the melting point of the encapsulating deposit. The solder material may form a eutectic. The coating step may be accomplished without agglomeration. The coated powder may be electrodeposited onto the substrate as desired. Alternatively, the coated powder may be blended into a paste or ink that can be printed on to wafers through conventional photostencils, i.e., screen printed, and reflowed to create reinforced spherical bumps for, for example, flip chip bonding.
  • [0047]
    In this embodiment, during reflow the solder material melts, wetting and spreading over the entire core particle and substrate surface, and forming a solder bump. Upon solidification the solder coating joins together the individual particles and bonds with the substrate. The solidified bump contains embedded unmelted elemental core particles. FIG. 1 depicts two FCBGA package configurations: FIG. 1A depicts a bump for a glass ceramic substrate before reflow; FIG. 1B shows the same bump after reflow. FIG. 1C depicts a bump as deposited on a build-up substrate before reflow, and FIG. 1D shows the bump after etching and reflow. FIGS. 1C and 1D show a composite solder bump comprising unmelted particles.
  • [0048]
    The resulting structure is a composite, or aggregate, material with a significantly higher compressive and shear strengths than solder that doesn't contain any particles. This reinforcement increases reliability not only because of resistance to mechanical shock, vibration, and the like, but also because the resulting bumps are strong enough to withstand shear stresses due to the mismatch in the thermal expansion coefficients of the solder and the substrate, even at higher temperatures. This eliminates the need for underfill, saving cost and a manufacturing step.
  • [0049]
    Although the core material has not melted in this embodiment, there may be a reaction between the core particle and the coating. During reflow, a solid solution or intermetallic compound may be formed at the interface between the core particle and coating due to interdiffusion of the atoms in each. This diffusion may occur when the solder is liquid, resulting in a compositional change in the interfacial liquid, in which case the reaction is known as transient liquid phase bonding. Alternatively, if reflow is performed at a temperature less than the melting point of the solder coating, the reaction is called solid state diffusion bonding. In either case, the resulting interfacial compound may have a higher melting temperature than the original solder coating, thus enabling the material to withstand multiple reflow cycles at higher temperatures than the melting point of the original solder material, especially if all of the solder material has reacted with the core material. This bonding serves to drastically increase the strength of the solder joints. Traditional solder pastes composed of multiple elemental powders have the problem of non-uniformity due to the non-intimate contact of the reactants. These pastes thus cannot withstand multiple reflow cycles because they undergo secondary reflow due to prior incomplete reaction of their constituents. Multiple reflow capability is an important aspect of Level 1 soldering of an electronic device, because the device must be soldered further, joining on to the substrates of a mother board or electronic substrates as it is combined into a system.
  • [0050]
    In another embodiment, rather than using a core particle which doesn't melt during reflow, a powder material may be chosen which melts and thereby alloys with the coating during reflow. The alloy may be eutectic. For example, silver and copper particles have been coated with tin. The coated particles are screened onto a substrate. During reflow at a temperature higher than the temperature of both elemental metals, a eutectic alloy solder is created. Although these alloys are known, the advantage of this method is that they allow these materials to be deposited economically. Because for many alloys each of the elemental powders which form the alloy's components must be electrodeposited (that is, delivered ionically) in separate steps due to incompatibility of the electrolytic solutions, manufacturing time and cost is increased. In addition, there is a greater risk of oxidation of the surface of the already deposited powder because the substrate must be moved between multiple plating cells to deposit each element. Any oxide formation will inhibit the reaction of the elements. Another method entails evaporation of elemental multilayers which are then reacted; however, this process is very slow and expensive. These methods have the drawback of non-uniform stoichiometry of the final product due to incomplete reaction and non-intimate contact of the reactant elements. Another prior method has been to deposit the material already alloyed, which requires very high reflow temperatures, greatly reducing solderability and possibly adversely impacting other device components which cannot withstand high temperatures. In all embodiments the coated powders of the present invention may be electrodeposited in a single step, thereby avoiding the aforementioned problems and reducing cost and manufacturing time. And because the coating and core powder are always in intimate contact, wetting is greatly enhanced and oxidation cannot occur.
  • [0051]
    The coated powders of the present invention can be used with any type of interconnections, for example Level 1 or chip-level interconnections, such as flip chip solder bumps, wire bonds, or stitch bonds, or Level 2 interconnections, which are the traditional printed circuit board solder joints including surface mount or through-hole configurations.
  • [0052]
    By matching the chemical and physical properties of the coatings and core powders, other desirable properties of the final material can be achieved, such as higher thermal conductivity to enhance package cooling and improved electrical properties such as current capacity or higher inductance if desired. And because adding particles changes the surface tension of the melted solder, at high particle loading (i.e. particle concentration or density), a lower bump pitch (i.e., increased bump density) can be achieved. Rather than forming a sphere during reflow, the bump may form an elliptical shape with steeper sides, which does not extend laterally to the same extent as a sphere, allowing bumps to be placed closer together. This is illustrated in FIG. 2, which schematically depicts the effect of particle loading on the reflowed solder bumps of FIG. 1. FIG. 2A is identical to FIG. 1D; as the particle loading is increased, the bump shape changes from a sphere to one having a narrower profile (FIG. 2B).
  • [0053]
    In addition, the final chemical composition of the material can be chosen to enhance the stability of properties such as electromigration of the solder material, for example pure tin. This will increase the reliability of the solder joint by, among other things, preventing the formation of solid state dendrites, which have been shown to cause gross failure in electronic components. These properties are applicable to any structure created according to the present invention, including but not limited to solder bumps, bond rings, and vias.
  • [0054]
    By choosing core particles which are magnetic, external magnetic fields can be utilized to enhance deposition of the solder, including but not limited to using the methods of electrodeposition, photostencil bumping, and screen printing. The particles, or paste or ink that include them, can be more precisely directed exactly to the desired deposition location. The particle loading can be more precisely controlled. In addition, the unique properties of a magnetic core particle, made from an element or alloy such as nickel, could also have importance in novel fabrication techniques using magnetic field enhancements and the electrical testing of bumped die. For example, a magnetic field may be applied during reflow to control the spatial distribution of the powders in the solder joint, which may change the surface tension as well as wetting or other properties of the solder material.
  • [0055]
    The co-deposition of particles, preferably magnetic, can improve both the production process and final material properties of other microfabricated structures, such as vias, as well. Many of the advantages discussed above are applicable to these other structures. The particles may be uncoated particles, magnetic or nonmagnetic, or coated particles. The coated particles, if magnetic properties are desired, may have a magnetic core such as nickel. Alternatively they may comprise a nonmagnetic core coated with a magnetic material. By optionally using magnetic fields the particles can be more precisely directed to the desired deposition location. Also, dissimilar materials, for example those with widely differing electropotentials or incompatible electrolytic solutions, may be co-deposited in one step, saving time, manufacturing cost, and eliminating the potential for oxide contamination occurring between process steps. In addition, particle loading of the deposited material may be more precisely controlled using magnetic assistance. The final material may consist of the particles embedded in a matrix of the deposited material. The particles and/or the coatings thereon may react with the matrix material during further processing steps.
  • [0056]
    By co-depositing particles, preferably with magnetic assistance to more precisely direct the particles to the desired location, during fill electrodeposition, the current requirement for a complete film to be formed during prior seed layer metallization performed by PVD (plasma vapor deposition) could be relaxed. Thus the base of the via could be metal free and the particles being drawn in by the magnetic field would extend the electrical current buss into the base of the via, once they are in contact with a shoulder metallization that follows into the via. FIG. 3 shows the cross section of a via in silicon or ceramic substrate 300. FIG. 3A shows PVD seed metallization 310 that was complete and coats the walls of the full three-dimensional geometry of the via. FIG. 3B depicts the same via geometry with PVD metallization 320 which is incomplete and tapers off towards the base of the via, leaving the base and possibly one-third to two-thirds of the length of the via without seed metallization.
  • [0057]
    Complete metallization would not be necessary, because by subsequently co-depositing conducting, preferably magnetic particles 330, preferably by magnetic assistance, into the via during electrodeposition of the fill, they will extend the current flow into the base of the un-metallized via and provide the electrical continuity to provide a consistent reliable and repeatable electrodeposited fill of the via.
  • [0058]
    By introducing particles into the electrolyte and preferably directing them magnetically into the via, the rate of fill for the via can be accelerated linearly over a large range of particle concentrations; for example, a 60% solid concentration may increase the deposition rate by 60%, depending on the particle size and rate of loading. A typical volume ratio of particles to electrodeposit is approximately three to one, although other ratios are possible. As depicted in FIG. 3C, resulting fill 340 would be composed of particles 350 bound in the fully densified matrix of the electrodeposit. By co-depositing such particles, more favorable current conditions are created which allow acceleration of both the deposition and densification of the process.
  • [0059]
    According to FIG. 3D, wafer or substrate 360 may then be plasma etched on back side 370, removing the substrate material and exposing bump 380 on the back surface of the wafer substrate which forms a through via interconnect. The rate of etch and the amount of substrate removed would define the geometry, including aspect ratio and the height, of the resulting bump on the back side of the wafer. In addition to the stated improvements in the via fill process, the presence of particles, preferably nickel particles, will also provide appreciable improvements in the thermal conductivity of the via and will provide a consistent solderable surface. Note that the drawings in FIG. 3 are schematic and are not meant to represent any particular relative size of the particles and via, or any particular particle concentration.
  • [0060]
    Another structure that may be deposited according to the present invention are bond rings, which are typically composed of a tin-gold eutectic solder. Preferably, 1-2 micron nickel particles are coated with tin, suspended in a gold electrolyte, and are co-deposited in a single step along with the gold. Multiple layers may be employed. Although a specific size range is disclosed, any particle size may be employed in order to optimize the properties of the structure. The magnitude and duration of an external magnetic field will partially determine the fill proportion and final composition of the deposited structure. After subsequent reaction a tin-gold composition may be formed, preferably an 80:20 eutectic composition. The nickel particles will mechanically reinforce the bond rings. Alternatively, pure tin particles suspended in the gold electrolyte may be co-deposited with the gold, again with the goal of producing a desired eutectic composition. In the latter embodiment, magnetic fields would not be employed to assist with the co-deposition.
  • [0061]
    By selecting various particulate material, coated or uncoated, for its catalytic, electronic or other surface properties, the present invention can be used to create embedded passive component devices in a substrate during the microfabrication process. Such devices include but are not limited to resistors, capacitors and inductors. Choice of the particle, optional coating, and electrolyte materials would define further intrinsic properties that may be valuable in defining the properties of, for example, electronic components, hydrogen storage fields, and inductive or magnetic transducers.
  • EXAMPLE
  • [0062]
    Magnetic Core Catalyst Particles
  • [0063]
    An example of the use of coated magnetic core powders is in the manufacture of electrocatalyst materials for applications including, but not limited to, fuel cells. Not only does the use of magnetic core powders improve manufacturability of the device, it enhances its efficiency as well. The present invention comprises coating a magnetic particle, preferably Ni, with a catalytic material, preferably a metal, and preferably platinum. Optionally, other elements such as ruthenium may be added to the surface, either entirely encapsulating the particle or partially coating the surface, to tailor the catalyst's mechanical, electrochemical, electronic, and/or magnetic properties. The partial coatings may comprise isolated islands of the additional element. The ruthenium may optionally be oxidized.
  • [0064]
    The use of a magnetic material in catalyst electrodes results in improved catalytic properties. The magnetic moment of the core particles improves efficiency of device, and makes the catalyst more resistant to contamination. By fixing the electrocatalyst to the surface of the magnetic particle, and thus effectively providing a single distance from the magnetic material to the catalyst surface rather than a distribution of distances, a reasonable certainty to estimates of the local magnetic field at or through the catalytic surface is provided, so that a quantitative relationship can be established for the magnetic effect on CO tolerance. This is another advantage over the existing art.
  • [0065]
    One embodiment of the present invention is the production of magnetic electrode materials that can be cast on or pressed into ionomer membranes in a reliable and predictable fashion to give stable, uniform catalyst loading and membrane-electrode assemblies (MEAs) with highly active electrodes, even when utilizing high field-strength materials, such as Nd—Fe—B, are used that exert strong forces of self-attraction. The present invention provides superior MEA performance and tolerance to CO levels present in hydrogen from reformed hydrocarbons, as well as improved abrasion resistance. An optional protective interfacial layer can render the core particles inert with respect with the catalytic reaction, and provide a robust interface ideal for addition of preferably Pt and/or Pt/Ru catalyst layers, directly on each encapsulated magnetic particle, where the field strength is the strongest. Preforming the precious metal layer onto magnetic particles completely encapsulated with a non-corroding metal bonding layer will place the electrocatalyst as close as possible to the surface of the magnetic material, regardless of subsequent processing steps to form MEAs. In the case of encapsulation by a protective Ni layer, or Ni-Pd layer if better corrosion resistance is needed, the protective barrier metal is also magnetic and should enhance the magnetic effect.
  • [0066]
    An example process for producing coated particles according to a preferred embodiment of the present invention is as follows.
  • [0067]
    1. Use optimal particle geometries from available metal and metal oxide powders that are suitable to process in aqueous electroplating solutions. Criteria should include magnetic saturation, geometry aspect ratio for dipole susceptibility, size/distribution, and surface morphology.
  • [0068]
    2. Determine a suitable barrier coat metal that can withstand the corrosive environment. Verify by acid test the required weight gain of the deposit to achieve full particle encapsulation without agglomeration.
  • [0069]
    3. Calculate the equivalent specific weight of platinum based on the previous catalyst loading reported. Determine parameters for electrodeposition of a very thin, uniform platinum coating on to the encapsulated magnetic particles, to give a 3 to 10 percent by weight platinum.
  • [0070]
    4. Optional deposition of a partial surface coverage of ruthenium onto the platinum coated encapsulated metallic particles, under conditions to yield a high degree of nucleation and formation of small islands of ruthenium on the surface of the particle.
  • [0071]
    5. Apply stable, uniform catalyst layers to membrane or gas-diffusion electrodes and form MEAs using Nafion 112 and demonstrate highly active electrodes layers.
  • [0072]
    6. Deposition of uniform layer of magnetically supported particles blended with Nafion polymers and mounted to carbon felt.
  • [0073]
    To ensure chemical and physical stability of the magnetic particles, we use inert metallic encapsulation techniques based on electrodeposition using a rotary-flow-thru electroplater that will provide magnetic beads encapsulated by a protective, corrosion-free barrier. The encapsulation process is based on electrodeposition using a patented rotary electroplater, specifically designed for electrolytic application of coatings onto particles in the few-micron to sub-micron range of diameters. One example of such a process is disclosed in U.S. Patent Application Ser. No. 09/872,214, entitled “Submicron and Nanosize Particle Encapsulation by Electrochemical Process and Apparatus”, filed May 31, 2001, incorporated herein by reference. This process is applicable to the manufacture of coated particles according to any of the embodiments of the present invention. A very durable platinum or palladium/nickel alloy coating may be applied and annealed to a nickel undercoat to keep the magnetic material from leaching into the cell and to put the Platinum or ruthenium catalytic element electrodeposited onto surface at the location of highest possible field strength. This approach provides a more robust, chemically inert layer than polystyrene, which is known to be unstable as the ionomer-base polymer in PEM fuel cells, PEM electrolysers, or hydrocarbon reformers and will advance the development of the critical microstructure responsible for the beneficial effects of magnetic particles in MEAs. This method will provide an integrated composite of the materials and mitigate the uncertainty due to the art of blending electrocatalyst and magnetic materials.
  • [0074]
    The Rotary Flow-thru electrodeposition on powder encapsulation process utilizes centrifugal force to compact bulk materials in aqueous solution against an electrolytic cathode contact. The particle material is loaded through the top opening and the plating cell is rotated at sufficiently high rpm to centrifugally cast the powder against the cathode contact. Electroplating solution is continuously introduced at the top opening of the rotating cell through the immersed anode and flows through the cell exiting through a sintered porous plastic ring layered between the domed top, cathode contact ring, and base plate. Electroplating is carried out with a cycle of periodic stopping and/or counter rotation and sequential switching of the DC power supply to the cell to circulate the particle position for even coverage and prevention of agglomeration (bridging).
  • [0075]
    Optionally, the anode and cathode can be switched to operate the apparatus in anodic rather than cathodic mode. The sequential positioning of the nozzles, anodes (the anode can be easily removed and switched to provide for deposition of different metals), and drain port provides a method to expose the materials being plated to a multiple step chemical process without intermixing the chemistry. Furthermore, the continuous immersion of the plated work prevents oxidation that normally occurs on the substrate when transferred from tank to tank in the conventional barrel plating process. The continuous immersion is preferably achieved by performing all steps of the process in the same cell. The chemical solutions are sequentially returned via the porous ring to the appropriate return drain for a discrete circulation of each chemical solution. Then by introducing the rinse water during high-speed rotation the chemical solutions are exchanged with minimal dilution due to the differing specific weights. Subsequent steps are then carried out.
  • [0076]
    The preferred cell process flow for electrolytic encapsulation of discrete particles with nickel plate (as an example) is as follows:
  • [0077]
    1 Load conductive powder;
  • [0078]
    2 Rinse;
  • [0079]
    3 Hot soak;
  • [0080]
    4 Nickel electroplate with start/stop cycle;
  • [0081]
    5 Rinse;
  • [0082]
    6 Hot rinse; and
  • [0083]
    7 Vacuum dry.
  • [0084]
    According to another embodiment, the Rotary Flow-Thru electrodeposition technique is used to encapsulate iron oxide (ferrite) powder to create a chemically inert magnet core, which will subsequently be rendered to inert permanent magnet beads with a platinum layer deposited on the nickel barrier. The process steps of this embodiment are as follows.
  • [0085]
    Use metal alloy powder with a particle size range of 3-5 μm-diameters, which is electroplated in a nickel sulfamate solution at an amperage density of <0.2 amps/dm2.
  • [0086]
    This material is then rinsed and dried in a vacuum oven for further processing.
  • [0087]
    The total amp hour requirement is controlled by weight gain percentage using the physical constants established to deposit nickel: 0.91308-ampere hours to deposit 1 gram of 2-valency nickel metal.
  • [0088]
    After determining the weight gain percentage that assures chemical resistance and inertness. The platinum weight gain is determined by calculating specific weight of the active catalyst in an amount less than approximately 0.4 mg/cm2. As a rule of thumb, the specific surface area goes down by about a factor of 3 for a 10-fold increase in particle radius, so somewhat lower Pt and Ru loadings may be required to keep the thickness of the catalyst layer to less than 20 microns for 1 to 5 micron diameter magnetic supports.
  • [0089]
    This applied equivalent weight is controlled by the physical constant for electrodepositing platinum metal: 0.54957-ampere hours to deposit 1 gram of 4-valency platinum metal.
  • [0090]
    The resulting electroplated particles are examined using a scanning electron microscope and EPMA mapping of the electroplated platinum deposit, which measures Pt surface coverage, to verify complete and uniform Pt deposition. Should the Ni-encapsulated ferrite-based magnetic materials prove less stable than desired, either a different alloy may be used as the barrier layer, or higher loading of precious metal may be applied, or an alternative magnetic material, such as Ni—Fe or Al—Ni—Co, may be used.
  • [0091]
    After determining the coated particles meet the design specifications the particles can be permanently magnetized as powder with a medium energy (440 Joules), low voltage, capacitor discharge type magnetizer capable of saturating Alnico and Barium Ferrite magnetic materials.
  • [0092]
    A typical 3-5 μm diameter coated particle produced according to this embodiment is schematically depicted by the cross section in FIG. 4. The particles are magnetically charged and ready for blending into ink for deployment as the catalyst electrode at either the cathode or anode. Note that the particles may be of any diameter, from submicron to over a hundred microns, depending on the requirements of the application.
  • [0093]
    The particle-size distribution, geometry, and degree of porosity may be determined by combined BET and Scanning electron Microscopy (SEM), coupled with energy dispersive X-ray analysis may be used to ascertain the depth of catalyst deposition and the purity of the applied platinum catalyst layer.
  • [0094]
    The quality of coatings is assessed by placing the particles in acid such as nitric acid, to determine if iron leaches from the core. If particles remain intact and no significant yellowing of the solution is observed, the particles are incorporated into a Nafion film on a glassy carbon electrode at ˜15% loading.
  • [0095]
    The catalyst must now be applied to the electrodes. The direct application of catalyst layers to electrodes, which is the standard approach, is attractive from a commercial point of view, because of its compatibility with the demands of high volume manufacturing processes. Methods devised in the laboratory, such as decal transfer of ink layers cast first onto non-stick vellum, can be cost prohibitive in the real world. On the other hand, simple application methods, such as brushing of catalyst solutions directly onto porous gas-diffusion electrodes can be ill-defined and difficult to perform reproducibly to obtain the best degree of loading, penetration and uniformity. A simple, direct application method could yield spontaneous self-assembly of particles into the pores, driven by matching of relative particle sizes, when narrow size distributions are involved. Catalyst layers may be deposited as inks on membranes or carbon paper electrodes obtained from commercial sources as described in the literature, such as in a fashion according to the methods of Leddy et al., supra, to form a dense layer of catalyst particle in contact with the PEM layer. Tight tolerance on the thickness and uniformity of the catalyst layer may be achieved by controlling the viscosity of the ink solution, which is controlled by concentration of Nafion.
  • [0096]
    A slurry of catalyst layer may be prepared by dispersing the catalyst coated magnetic particles with carbon black Vulcan XC72R for the anode into the solvent substituted Nafion solution this was coated on the micro-porous layer formed electrode by tape casting. The particle distribution is assured by strong magnetic field on the backside of the casting surface.
  • [0097]
    One advantage of the present invention is the ability to use magnetic fields to assist in depositing a monolayer of particles on the MEA. This minimizes or eliminates the platinum which is not at the surface, and thus is not in direct contact with the flow stream, drastically reducing the cost of the device. In addition, magnetic fields may be used during screen printing to direct the deposition of catalytic particles, limiting them only to the pattern the flow stream will follow. Thus, the particles are not deposited where they will not be used, again dramatically reducing costs. For the present embodiment, the deposition method is preferably screen printing.
  • [0098]
    In addition to fuel cells, the present invention is applicable for batteries, including rechargeable batteries, hydrogen-based energy developers, electronics, and MEMS, delivering faster charge cycles, longer life, higher power, and smaller size.
  • [0099]
    A further embodiment of the present invention is to create multilayer or stratified compositions where on one layer a target material could be co-deposited followed by a second layer co-deposited with a reactive material, providing the capability to create solid state battery fields deposited on a substrate. By having the ability to deposit in stratified layers, many electrochemical devices, including fuel cell membranes, can be fabricated in the layered composition with the chemistry of the composition selected to perform the counter electrode properties of a normal electrochemical cell in this area.
  • [0100]
    Although the invention has been described in detail with particular reference to these preferred embodiments, other embodiments can achieve the same results. Variations and modifications of the present invention will be obvious to those skilled in the art and it is intended to cover all such modifications and equivalents. The entire disclosures of all patents and publications cited above are hereby incorporated by reference.

Claims (37)

What is claimed is:
1. A method of making a solder joint, the method comprising the steps of:
depositing particles comprising at least one coating on a substrate; and
reflowing the particles to at least partially melt the coating, thereby forming a substantially continuous solidified solder material.
2. The method of claim 1 wherein the depositing step comprises depositing via a process selected from the group consisting of electrodeposition, electrophoresis, electroplating, evaporation, screen printing, and photostencil bumping.
3. The method of claim 1 wherein the depositing step comprises blending the particles into a paste or ink.
4. The method of claim 1 wherein the depositing step comprises electrodepositing in one deposition step at least two materials with incompatible electropotentials.
5. The method of claim 1 wherein the solder material comprises unmelted particles in a solidified matrix.
6. The method of claim 5 wherein the unmelted particles increase at least one strength of the solder material.
7. The method of claim 6 wherein the strength is selected from the group consisting of shear strength and compressive strength.
8. The method of claim 6 wherein the solder material is reinforced by the unmelted particles.
9. The method of claim 1 wherein the reflowing step comprises forming an alloy.
10. The method of claim 9 wherein the reflowing step comprises forming an alloy which comprises substantially all of the coating of the particles.
11. The method of claim 10 wherein the alloy has a substantially higher melting temperature than the coating.
12. The method of claim 9 wherein the solder material contains a substantially uniform distribution of stoichiometries.
13. The method of claim 12 wherein the solder material is substantially uniform in composition.
14. The method of claim 1 wherein the depositing step comprises controlling a concentration of the particles, thereby reducing a size of the solder joint in directions parallel to the substrate surface.
15. The method of claim 14 further comprising the step of decreasing the pitch of solder joints on the substrate.
16. The method of claim 1 wherein the particles are magnetic.
17. The method of claim 16 wherein the depositing step comprises controlling a particle loading with at least one external magnetic field.
18. The method of claim 16 wherein the depositing step comprises controlling a deposition location with at least one external magnetic field.
19. The method of claim 16 wherein the reflowing step comprises controlling a particle distribution in the solder joint with at least one external magnetic field.
20. A solder material comprising particles that were coated before being deposited on a substrate.
21. A method of co-depositing particles comprising the steps of:
suspending the particles in a suspension;
applying at least one magnetic field to the particles;
co-depositing the particles along with at least one component of the suspension; and
forming a desired structure.
22. The method of claim 21 wherein the applying step comprises controlling at least one deposition location of the particles.
23. The method of claim 21 wherein the applying step comprises controlling a particle loading.
24. The method of claim 21 wherein the particles are magnetic.
25. The method of claim 22 wherein the particles have been coated with at least one coating.
26. The method of claim 25 wherein the coating is magnetic.
27. The method of claim 21 wherein the suspending step comprises suspending the particles in an electrolytic solution.
28. The method of claim 27 wherein the co-depositing step comprises co-depositing in one deposition step at least two materials with incompatible electropotentials.
29. The method of claim 21 wherein the suspending step comprises suspending the particles in an ink or paste.
30. The method of claim 22 wherein the forming step comprises filling a via.
31. The method of claim 30 wherein the forming step comprises accelerating a fill rate by controlling particle loading.
32. The method of claim 30 wherein the forming step further comprises controlling the particle location with at least one external magnetic field, thereby permitting fill electrodeposition within the via without the presence of prior seed metallization of an entire surface of the via.
33. A method of making a via comprising the steps of:
providing seed metallization to only a portion of a surface of the via;
filling the via with a material comprising conducting particles.
34. A via comprising a seed metallization layer only partially coating a surface of the via.
35. A catalyst comprising a magnetic particle coated with at least one catalytic material.
36. An electrode comprising at least one surface layer deposited using the catalyst of claim 35.
37. The catalyst of claim 35 further comprising a first coating of the particle, wherein said first coating comprises a stable barrier to prevent diffusion of elements comprising the particle into the catalytic material.
US10728636 2001-05-31 2003-12-05 Coated and magnetic particles and applications thereof Abandoned US20040115340A1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
US09872214 US6942765B2 (en) 2001-05-31 2001-05-31 Submicron and nano size particle encapsulation by electrochemical process and apparatus
US43131502 true 2002-12-05 2002-12-05
US44717503 true 2003-02-12 2003-02-12
US51981303 true 2003-11-12 2003-11-12
US10728636 US20040115340A1 (en) 2001-05-31 2003-12-05 Coated and magnetic particles and applications thereof

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US10728636 US20040115340A1 (en) 2001-05-31 2003-12-05 Coated and magnetic particles and applications thereof
US10778647 US20040256222A1 (en) 2002-12-05 2004-02-12 Apparatus and method for highly controlled electrodeposition
PCT/US2004/004277 WO2004072331A3 (en) 2003-02-12 2004-02-12 Apparatus and method for highly controlled electrodeposition
US11212277 US20060049038A1 (en) 2003-02-12 2005-08-25 Dynamic profile anode

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US09872214 Continuation-In-Part US6942765B2 (en) 2001-05-31 2001-05-31 Submicron and nano size particle encapsulation by electrochemical process and apparatus

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10778647 Continuation-In-Part US20040256222A1 (en) 2001-05-31 2004-02-12 Apparatus and method for highly controlled electrodeposition

Publications (1)

Publication Number Publication Date
US20040115340A1 true true US20040115340A1 (en) 2004-06-17

Family

ID=32512327

Family Applications (1)

Application Number Title Priority Date Filing Date
US10728636 Abandoned US20040115340A1 (en) 2001-05-31 2003-12-05 Coated and magnetic particles and applications thereof

Country Status (3)

Country Link
US (1) US20040115340A1 (en)
JP (1) JP2006513041A (en)
WO (1) WO2004052547A3 (en)

Cited By (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050230260A1 (en) * 2004-02-04 2005-10-20 Surfect Technologies, Inc. Plating apparatus and method
US20060011487A1 (en) * 2001-05-31 2006-01-19 Surfect Technologies, Inc. Submicron and nano size particle encapsulation by electrochemical process and apparatus
WO2006019992A1 (en) * 2004-07-15 2006-02-23 University Of Iowa Research Foundation Methods for increasing carbon monoxide tolerance in fuel cells
US20060068216A1 (en) * 2004-09-30 2006-03-30 Fay Hua Nano-sized metals and alloys, and methods of assembling packages containing same
US20070001280A1 (en) * 2005-06-30 2007-01-04 Fay Hua Electromigration-resistant and compliant wire interconnects, nano-sized solder compositions, systems made thereof, and methods of assembling soldered packages
US20070007983A1 (en) * 2005-01-06 2007-01-11 Salmon Peter C Semiconductor wafer tester
US20070023889A1 (en) * 2005-08-01 2007-02-01 Salmon Peter C Copper substrate with feedthroughs and interconnection circuits
US20070023923A1 (en) * 2005-08-01 2007-02-01 Salmon Peter C Flip chip interface including a mixed array of heat bumps and signal bumps
US20070026292A1 (en) * 2005-08-01 2007-02-01 Radoslav Adzic Electrocatalysts having gold monolayers on platinum nanoparticle cores, and uses thereof
US20080092378A1 (en) * 2004-11-24 2008-04-24 Dai Nippon Printing Co., Ltd. Method For Manufacturing Electroconductive Material-Filled Throughhole Substrate
US20090168390A1 (en) * 2007-12-28 2009-07-02 Lehman Jr Stephen E Directing the flow of underfill materials using magnetic particles
US20090193652A1 (en) * 2005-08-01 2009-08-06 Salmon Peter C Scalable subsystem architecture having integrated cooling channels
EP2103719A1 (en) * 2008-03-18 2009-09-23 Technical University of Denmark A method for producing a multilayer structure
US20100031501A1 (en) * 2008-08-08 2010-02-11 Napra Co., Ltd. Method for filling through hole or non-through hole formed on board with filler
WO2010037689A1 (en) * 2008-09-30 2010-04-08 Consiglio Nazionale Delle Ricerche Micrometer-scale or nanometer-scale spatially controlled incorporation of particles in a conducting surface layer of a support
US20100096754A1 (en) * 2008-10-17 2010-04-22 Samsung Electronics Co., Ltd. Semiconductor package, semiconductor module, and method for fabricating the semiconductor package
US20100285376A1 (en) * 2009-05-08 2010-11-11 Industrial Technology Research Institute Magnetic catalyst and method for manufacturing the same
US20110088935A1 (en) * 2008-07-24 2011-04-21 Sony Chemical & Information Device Corporation Conductive particle, anisotropic conductive film, joined structure, and joining method
US20110210283A1 (en) * 2010-02-24 2011-09-01 Ainissa G. Ramirez Low melting temperature alloys with magnetic dispersions
US20110220704A1 (en) * 2010-03-09 2011-09-15 Weiping Liu Composite solder alloy preform
WO2012118476A1 (en) * 2011-02-28 2012-09-07 Hewlett-Packard Development Company L.P. Coating particles
US8641845B2 (en) 2011-01-13 2014-02-04 Siemens Energy, Inc. Method of determining bond coverage in a joint
US20140183733A1 (en) * 2013-01-03 2014-07-03 Duksan Hi-Metal Co., Ltd Metal core solder ball and heat dissipation structure for semiconductor device using the same
GB2509888A (en) * 2012-09-17 2014-07-23 Hipermag Ltd A method and apparatus for forming a magnetic film on a substrate
CN104465583A (en) * 2014-12-09 2015-03-25 三星半导体(中国)研究开发有限公司 Ball grid array packaging piece and method for installing ball grid array packaging piece on substrate
US20150137352A1 (en) * 2013-11-18 2015-05-21 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanisms for forming post-passivation interconnect structure
US20160172324A1 (en) * 2014-12-12 2016-06-16 International Business Machines Corporation Alignment of three dimensional integrated circuit components
US9704512B2 (en) 2013-11-19 2017-07-11 Peacekeepers (International) Ltd. Electromagnetic data storage devices having improved magnetic structure
WO2017118853A3 (en) * 2016-01-06 2017-08-24 Coventry University Material deposition in a magnetic field

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005042109A1 (en) * 2005-09-05 2007-03-08 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. A method for producing a metal powder and an electrically insulating plastic composite, plastic composite material and electronic component
JP5119738B2 (en) * 2007-05-18 2013-01-16 トヨタ自動車株式会社 The electrode catalyst for an alkaline fuel cell, alkaline fuel cell, and method for forming a alkaline fuel cell electrode catalyst
WO2012071002A1 (en) * 2010-11-22 2012-05-31 Andreas Fischer A method and an apparatus for forming electrically conductive vias in a substrate, an automated robot-based manufacturing system, a component comprising a substrate with via holes, and an interposer device

Citations (80)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2866831A (en) * 1953-11-16 1958-12-30 Imperiral Chemical Ind Ltd Catalytic process for producing 1-methylcyclohexene
US2909641A (en) * 1958-05-02 1959-10-20 Republic Aviat Corp Tool for electro-shaping
US3359195A (en) * 1963-10-29 1967-12-19 Hojyo Kazuya Automatic chromium plating apparatus
US3421997A (en) * 1958-11-10 1969-01-14 Anocut Eng Co Electrode for electrolytic shaping
US3425926A (en) * 1965-07-27 1969-02-04 Kazuya Hojyo Apparatus for automatically electroplating various articles with chromium
US3922651A (en) * 1972-10-26 1975-11-25 Kokusai Denshin Denwa Co Ltd Memory device using ferromagnetic substance lines
US4088545A (en) * 1977-01-31 1978-05-09 Supnet Fred L Method of fabricating mask-over-copper printed circuit boards
US4120758A (en) * 1975-09-09 1978-10-17 Rippere Ralph E Production of powder metallurgy alloys
US4201635A (en) * 1977-12-21 1980-05-06 Bbc Brown Boveri & Company Limited Method and apparatus for carrying out an electrolysis process
US4240881A (en) * 1979-02-02 1980-12-23 Republic Steel Corporation Electroplating current control
US4278245A (en) * 1979-11-23 1981-07-14 General Electric Company Apparatus for clamping a plurality of elements
US4279707A (en) * 1978-12-18 1981-07-21 International Business Machines Corporation Electroplating of nickel-iron alloys for uniformity of nickel/iron ratio using a low density plating current
US4338169A (en) * 1979-01-17 1982-07-06 Extramet Process for promoting physical and/or chemical reactions performed in a fluid medium
US4377619A (en) * 1981-05-08 1983-03-22 Bell Telephone Laboratories, Incorporated Prevention of surface mass migration by means of a polymeric surface coating
US4390404A (en) * 1978-05-12 1983-06-28 Nippon Electric Co., Ltd. Process for manufacture of thin-film magnetic bubble domain detection device
US4441118A (en) * 1983-01-13 1984-04-03 Olin Corporation Composite copper nickel alloys with improved solderability shelf life
US4465264A (en) * 1983-05-27 1984-08-14 Olin Corporation Apparatus for producing acicular iron or iron alloy particles
US4666568A (en) * 1986-10-10 1987-05-19 State Of Oregon Acting By And Through The State Board Of Higher Education On Behalf Of Portland State University Electrolytic codeposition of metals and nonmetallic particles
US4696729A (en) * 1986-02-28 1987-09-29 International Business Machines Electroplating cell
US4701248A (en) * 1985-07-09 1987-10-20 Siemens Aktiengesellschaft Apparatus for electrolytic surface treatment of bulk goods
US5000827A (en) * 1990-01-02 1991-03-19 Motorola, Inc. Method and apparatus for adjusting plating solution flow characteristics at substrate cathode periphery to minimize edge effect
US5277785A (en) * 1992-07-16 1994-01-11 Anglen Erik S Van Method and apparatus for depositing hard chrome coatings by brush plating
US5312532A (en) * 1993-01-15 1994-05-17 International Business Machines Corporation Multi-compartment eletroplating system
US5421987A (en) * 1993-08-30 1995-06-06 Tzanavaras; George Precision high rate electroplating cell and method
US5428331A (en) * 1991-11-28 1995-06-27 Robert Bosch Gmbh Component substrate and method for holding a component made of ferromagnetic material
US5443707A (en) * 1992-07-10 1995-08-22 Nec Corporation Apparatus for electroplating the main surface of a substrate
US5487824A (en) * 1993-08-31 1996-01-30 Uemura Kogyo Kabushiki Kaisha Electroplating apparatus and electroplating method of small articles
US5514258A (en) * 1994-08-18 1996-05-07 Brinket; Oscar J. Substrate plating device having laminar flow
US5516412A (en) * 1995-05-16 1996-05-14 International Business Machines Corporation Vertical paddle plating cell
US5530609A (en) * 1993-05-31 1996-06-25 Tdk Corporation Magnetic recording/reproducing method using a thin film magnetic
US5565079A (en) * 1993-08-31 1996-10-15 Griego; Thomas P. Fine particle microencapsulation and electroforming
US5573859A (en) * 1995-09-05 1996-11-12 Motorola, Inc. Auto-regulating solder composition
US5764567A (en) * 1996-11-27 1998-06-09 International Business Machines Corporation Magnetic tunnel junction device with nonferromagnetic interface layer for improved magnetic field response
US5817221A (en) * 1994-08-25 1998-10-06 University Of Iowa Research Foundation Composites formed using magnetizable material, a catalyst and an electron conductor
US5879520A (en) * 1994-08-26 1999-03-09 Griego; Thomas P. Rotary electrodeposition apparatus
US5955141A (en) * 1994-12-09 1999-09-21 Alpha Metals, Inc. Process for silver plating in printed circuit board manufacture
US6001248A (en) * 1994-08-25 1999-12-14 The University Of Iowa Research Foundation Gradient interface magnetic composites and systems therefor
US6030851A (en) * 1995-06-07 2000-02-29 Grandmont; Paul E. Method for overpressure protected pressure sensor
US6153320A (en) * 1999-05-05 2000-11-28 International Business Machines Corporation Magnetic devices with laminated ferromagnetic structures formed with improved antiferromagnetically coupling films
US6193860B1 (en) * 1999-04-23 2001-02-27 Vlsi Technolgy, Inc. Method and apparatus for improved copper plating uniformity on a semiconductor wafer using optimized electrical currents
US6200453B1 (en) * 1997-10-20 2001-03-13 Rajev R. Agarrwal Monolith electroplating process
US6251250B1 (en) * 1999-09-03 2001-06-26 Arthur Keigler Method of and apparatus for controlling fluid flow and electric fields involved in the electroplating of substantially flat workpieces and the like and more generally controlling fluid flow in the processing of other work piece surfaces as well
US6251238B1 (en) * 1999-07-07 2001-06-26 Technic Inc. Anode having separately excitable sections to compensate for non-uniform plating deposition across the surface of a wafer due to seed layer resistance
US6261433B1 (en) * 1998-04-21 2001-07-17 Applied Materials, Inc. Electro-chemical deposition system and method of electroplating on substrates
US6274022B1 (en) * 1999-02-19 2001-08-14 Nagoya University Method for producing electro- or electroless-deposited film with a controlled crystal orientation
US6286206B1 (en) * 1997-02-25 2001-09-11 Chou H. Li Heat-resistant electronic systems and circuit boards
US6322676B1 (en) * 1998-03-25 2001-11-27 University Of Iowa Research Foundation Magnetic composites exhibiting distinct flux properties due to gradient interfaces
US6346181B1 (en) * 1999-12-24 2002-02-12 Korea Institute Of Machinery And Materials Electroplating process for preparing a Ni layer of biaxial texture
US6365017B1 (en) * 1998-09-08 2002-04-02 Ebara Corporation Substrate plating device
US6391166B1 (en) * 1998-02-12 2002-05-21 Acm Research, Inc. Plating apparatus and method
US6402923B1 (en) * 2000-03-27 2002-06-11 Novellus Systems Inc Method and apparatus for uniform electroplating of integrated circuits using a variable field shaping element
US6413404B1 (en) * 1997-03-31 2002-07-02 Shinko Electric Industries Co., Ltd. Method of forming bumps by electroplating
US20020139685A1 (en) * 1999-07-22 2002-10-03 Gabriel Colombier Continuous nickel plating process for an aluminum conductor and corresponding device
US20020139683A1 (en) * 2000-05-05 2002-10-03 Akihisa Hongo Substrate plating apparatus
US20020179430A1 (en) * 2001-05-31 2002-12-05 Griego Thomas P. Submicron and nano size particle encapsulation by electrochemical process and apparatus
US6495004B1 (en) * 1998-10-05 2002-12-17 Ebara Corporation Substrate plating apparatus
US6497801B1 (en) * 1998-07-10 2002-12-24 Semitool Inc Electroplating apparatus with segmented anode array
US6610189B2 (en) * 2001-01-03 2003-08-26 Applied Materials, Inc. Method and associated apparatus to mechanically enhance the deposition of a metal film within a feature
US6630360B2 (en) * 2002-01-10 2003-10-07 Advanced Micro Devices, Inc. Advanced process control (APC) of copper thickness for chemical mechanical planarization (CMP) optimization
US20030196901A1 (en) * 2002-04-23 2003-10-23 Applied Materials, Inc. Method for plating metal onto wafers
US6680128B2 (en) * 2001-09-27 2004-01-20 Agilent Technologies, Inc. Method of making lead-free solder and solder paste with improved wetting and shelf life
US20040011655A1 (en) * 2002-07-03 2004-01-22 Hidetoshi Tsuzuki Plating apparatus and method
US20040016637A1 (en) * 2002-07-24 2004-01-29 Applied Materials, Inc. Multi-chemistry plating system
US20040023277A1 (en) * 1997-01-07 2004-02-05 Research Development Foundation Large scale genotyping of diseases and a diagnostic test for spinocerebellar ataxia type 6
US6689216B2 (en) * 2000-08-09 2004-02-10 Ebara Corporation Plating apparatus and plating liquid removing method
US20040055890A1 (en) * 2002-08-29 2004-03-25 Dainippon Screen Mfg. Co., Ltd. Plating apparatus and plating method
US20040084316A1 (en) * 2002-10-31 2004-05-06 Renesas Technology Corp. Plating apparatus and method
US20040124090A1 (en) * 2002-12-30 2004-07-01 Chen-Chung Du Wafer electroplating apparatus and method
US6773571B1 (en) * 2001-06-28 2004-08-10 Novellus Systems, Inc. Method and apparatus for uniform electroplating of thin metal seeded wafers using multiple segmented virtual anode sources
US20040245112A1 (en) * 2003-05-29 2004-12-09 Masahiko Sekimoto Apparatus and method for plating a substrate
US20040256222A1 (en) * 2002-12-05 2004-12-23 Surfect Technologies, Inc. Apparatus and method for highly controlled electrodeposition
US20040262150A1 (en) * 2002-07-18 2004-12-30 Toshikazu Yajima Plating device
US20040261500A1 (en) * 2003-06-03 2004-12-30 Nano-Proprietary, Inc. Method and apparatus for sensing hydrogen gas
US6890412B2 (en) * 2001-08-27 2005-05-10 Surfect Technologies, Inc. Electrodeposition apparatus and method using magnetic assistance and rotary cathode for ferrous and magnetic particles
US6913651B2 (en) * 2002-03-22 2005-07-05 Blue29, Llc Apparatus and method for electroless deposition of materials on semiconductor substrates
US20050230260A1 (en) * 2004-02-04 2005-10-20 Surfect Technologies, Inc. Plating apparatus and method
US20050245083A1 (en) * 1998-03-20 2005-11-03 Semitool, Inc. Apparatus and method for electrochemically depositing metal on a semiconductor workpiece
US20060011487A1 (en) * 2001-05-31 2006-01-19 Surfect Technologies, Inc. Submicron and nano size particle encapsulation by electrochemical process and apparatus
US20060049038A1 (en) * 2003-02-12 2006-03-09 Surfect Technologies, Inc. Dynamic profile anode
US20070080057A1 (en) * 2003-01-21 2007-04-12 Dainippon Screen Mfg. Co., Ltd. Plating apparatus, plating cup and cathode ring

Patent Citations (85)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2866831A (en) * 1953-11-16 1958-12-30 Imperiral Chemical Ind Ltd Catalytic process for producing 1-methylcyclohexene
US2909641A (en) * 1958-05-02 1959-10-20 Republic Aviat Corp Tool for electro-shaping
US3421997A (en) * 1958-11-10 1969-01-14 Anocut Eng Co Electrode for electrolytic shaping
US3359195A (en) * 1963-10-29 1967-12-19 Hojyo Kazuya Automatic chromium plating apparatus
US3425926A (en) * 1965-07-27 1969-02-04 Kazuya Hojyo Apparatus for automatically electroplating various articles with chromium
US3922651A (en) * 1972-10-26 1975-11-25 Kokusai Denshin Denwa Co Ltd Memory device using ferromagnetic substance lines
US4120758A (en) * 1975-09-09 1978-10-17 Rippere Ralph E Production of powder metallurgy alloys
US4088545A (en) * 1977-01-31 1978-05-09 Supnet Fred L Method of fabricating mask-over-copper printed circuit boards
US4201635A (en) * 1977-12-21 1980-05-06 Bbc Brown Boveri & Company Limited Method and apparatus for carrying out an electrolysis process
US4390404A (en) * 1978-05-12 1983-06-28 Nippon Electric Co., Ltd. Process for manufacture of thin-film magnetic bubble domain detection device
US4279707A (en) * 1978-12-18 1981-07-21 International Business Machines Corporation Electroplating of nickel-iron alloys for uniformity of nickel/iron ratio using a low density plating current
US4338169A (en) * 1979-01-17 1982-07-06 Extramet Process for promoting physical and/or chemical reactions performed in a fluid medium
US4240881A (en) * 1979-02-02 1980-12-23 Republic Steel Corporation Electroplating current control
US4278245A (en) * 1979-11-23 1981-07-14 General Electric Company Apparatus for clamping a plurality of elements
US4377619A (en) * 1981-05-08 1983-03-22 Bell Telephone Laboratories, Incorporated Prevention of surface mass migration by means of a polymeric surface coating
US4441118A (en) * 1983-01-13 1984-04-03 Olin Corporation Composite copper nickel alloys with improved solderability shelf life
US4465264A (en) * 1983-05-27 1984-08-14 Olin Corporation Apparatus for producing acicular iron or iron alloy particles
US4701248A (en) * 1985-07-09 1987-10-20 Siemens Aktiengesellschaft Apparatus for electrolytic surface treatment of bulk goods
US4696729A (en) * 1986-02-28 1987-09-29 International Business Machines Electroplating cell
US4666568A (en) * 1986-10-10 1987-05-19 State Of Oregon Acting By And Through The State Board Of Higher Education On Behalf Of Portland State University Electrolytic codeposition of metals and nonmetallic particles
US5000827A (en) * 1990-01-02 1991-03-19 Motorola, Inc. Method and apparatus for adjusting plating solution flow characteristics at substrate cathode periphery to minimize edge effect
US5428331A (en) * 1991-11-28 1995-06-27 Robert Bosch Gmbh Component substrate and method for holding a component made of ferromagnetic material
US5443707A (en) * 1992-07-10 1995-08-22 Nec Corporation Apparatus for electroplating the main surface of a substrate
US5277785A (en) * 1992-07-16 1994-01-11 Anglen Erik S Van Method and apparatus for depositing hard chrome coatings by brush plating
US5312532A (en) * 1993-01-15 1994-05-17 International Business Machines Corporation Multi-compartment eletroplating system
US5530609A (en) * 1993-05-31 1996-06-25 Tdk Corporation Magnetic recording/reproducing method using a thin film magnetic
US5421987A (en) * 1993-08-30 1995-06-06 Tzanavaras; George Precision high rate electroplating cell and method
US5487824A (en) * 1993-08-31 1996-01-30 Uemura Kogyo Kabushiki Kaisha Electroplating apparatus and electroplating method of small articles
US5565079A (en) * 1993-08-31 1996-10-15 Griego; Thomas P. Fine particle microencapsulation and electroforming
US5514258A (en) * 1994-08-18 1996-05-07 Brinket; Oscar J. Substrate plating device having laminar flow
US6479176B2 (en) * 1994-08-25 2002-11-12 University Of Iowa Research Foundation Gradient interface magnetic composites and methods therefor
US6001248A (en) * 1994-08-25 1999-12-14 The University Of Iowa Research Foundation Gradient interface magnetic composites and systems therefor
US5928804A (en) * 1994-08-25 1999-07-27 The University Of Iowa Research Foundation Fuel cells incorporating magnetic composites having distinct flux properties
US5817221A (en) * 1994-08-25 1998-10-06 University Of Iowa Research Foundation Composites formed using magnetizable material, a catalyst and an electron conductor
US6303242B1 (en) * 1994-08-25 2001-10-16 The University Of Iowa Research Foundation Gradient interface magnetic composites and methods therefor
US5879520A (en) * 1994-08-26 1999-03-09 Griego; Thomas P. Rotary electrodeposition apparatus
US5955141A (en) * 1994-12-09 1999-09-21 Alpha Metals, Inc. Process for silver plating in printed circuit board manufacture
US5516412A (en) * 1995-05-16 1996-05-14 International Business Machines Corporation Vertical paddle plating cell
US6030851A (en) * 1995-06-07 2000-02-29 Grandmont; Paul E. Method for overpressure protected pressure sensor
US5573859A (en) * 1995-09-05 1996-11-12 Motorola, Inc. Auto-regulating solder composition
US5764567A (en) * 1996-11-27 1998-06-09 International Business Machines Corporation Magnetic tunnel junction device with nonferromagnetic interface layer for improved magnetic field response
US20040023277A1 (en) * 1997-01-07 2004-02-05 Research Development Foundation Large scale genotyping of diseases and a diagnostic test for spinocerebellar ataxia type 6
US6286206B1 (en) * 1997-02-25 2001-09-11 Chou H. Li Heat-resistant electronic systems and circuit boards
US6413404B1 (en) * 1997-03-31 2002-07-02 Shinko Electric Industries Co., Ltd. Method of forming bumps by electroplating
US6200453B1 (en) * 1997-10-20 2001-03-13 Rajev R. Agarrwal Monolith electroplating process
US6391166B1 (en) * 1998-02-12 2002-05-21 Acm Research, Inc. Plating apparatus and method
US20050245083A1 (en) * 1998-03-20 2005-11-03 Semitool, Inc. Apparatus and method for electrochemically depositing metal on a semiconductor workpiece
US6322676B1 (en) * 1998-03-25 2001-11-27 University Of Iowa Research Foundation Magnetic composites exhibiting distinct flux properties due to gradient interfaces
US6261433B1 (en) * 1998-04-21 2001-07-17 Applied Materials, Inc. Electro-chemical deposition system and method of electroplating on substrates
US6497801B1 (en) * 1998-07-10 2002-12-24 Semitool Inc Electroplating apparatus with segmented anode array
US6365017B1 (en) * 1998-09-08 2002-04-02 Ebara Corporation Substrate plating device
US6495004B1 (en) * 1998-10-05 2002-12-17 Ebara Corporation Substrate plating apparatus
US6274022B1 (en) * 1999-02-19 2001-08-14 Nagoya University Method for producing electro- or electroless-deposited film with a controlled crystal orientation
US6193860B1 (en) * 1999-04-23 2001-02-27 Vlsi Technolgy, Inc. Method and apparatus for improved copper plating uniformity on a semiconductor wafer using optimized electrical currents
US6153320A (en) * 1999-05-05 2000-11-28 International Business Machines Corporation Magnetic devices with laminated ferromagnetic structures formed with improved antiferromagnetically coupling films
US6251238B1 (en) * 1999-07-07 2001-06-26 Technic Inc. Anode having separately excitable sections to compensate for non-uniform plating deposition across the surface of a wafer due to seed layer resistance
US6780303B2 (en) * 1999-07-22 2004-08-24 Aluminium Pechiney Continuous nickel plating process for an aluminum conductor and corresponding device
US20020139685A1 (en) * 1999-07-22 2002-10-03 Gabriel Colombier Continuous nickel plating process for an aluminum conductor and corresponding device
US6251250B1 (en) * 1999-09-03 2001-06-26 Arthur Keigler Method of and apparatus for controlling fluid flow and electric fields involved in the electroplating of substantially flat workpieces and the like and more generally controlling fluid flow in the processing of other work piece surfaces as well
US6346181B1 (en) * 1999-12-24 2002-02-12 Korea Institute Of Machinery And Materials Electroplating process for preparing a Ni layer of biaxial texture
US6402923B1 (en) * 2000-03-27 2002-06-11 Novellus Systems Inc Method and apparatus for uniform electroplating of integrated circuits using a variable field shaping element
US20020139683A1 (en) * 2000-05-05 2002-10-03 Akihisa Hongo Substrate plating apparatus
US6689216B2 (en) * 2000-08-09 2004-02-10 Ebara Corporation Plating apparatus and plating liquid removing method
US6610189B2 (en) * 2001-01-03 2003-08-26 Applied Materials, Inc. Method and associated apparatus to mechanically enhance the deposition of a metal film within a feature
US20060011487A1 (en) * 2001-05-31 2006-01-19 Surfect Technologies, Inc. Submicron and nano size particle encapsulation by electrochemical process and apparatus
US6942765B2 (en) * 2001-05-31 2005-09-13 Surfect Technologies, Inc. Submicron and nano size particle encapsulation by electrochemical process and apparatus
US20020179430A1 (en) * 2001-05-31 2002-12-05 Griego Thomas P. Submicron and nano size particle encapsulation by electrochemical process and apparatus
US6773571B1 (en) * 2001-06-28 2004-08-10 Novellus Systems, Inc. Method and apparatus for uniform electroplating of thin metal seeded wafers using multiple segmented virtual anode sources
US6890412B2 (en) * 2001-08-27 2005-05-10 Surfect Technologies, Inc. Electrodeposition apparatus and method using magnetic assistance and rotary cathode for ferrous and magnetic particles
US6680128B2 (en) * 2001-09-27 2004-01-20 Agilent Technologies, Inc. Method of making lead-free solder and solder paste with improved wetting and shelf life
US6630360B2 (en) * 2002-01-10 2003-10-07 Advanced Micro Devices, Inc. Advanced process control (APC) of copper thickness for chemical mechanical planarization (CMP) optimization
US6913651B2 (en) * 2002-03-22 2005-07-05 Blue29, Llc Apparatus and method for electroless deposition of materials on semiconductor substrates
US20030196901A1 (en) * 2002-04-23 2003-10-23 Applied Materials, Inc. Method for plating metal onto wafers
US20040011655A1 (en) * 2002-07-03 2004-01-22 Hidetoshi Tsuzuki Plating apparatus and method
US20040262150A1 (en) * 2002-07-18 2004-12-30 Toshikazu Yajima Plating device
US20040016637A1 (en) * 2002-07-24 2004-01-29 Applied Materials, Inc. Multi-chemistry plating system
US20040055890A1 (en) * 2002-08-29 2004-03-25 Dainippon Screen Mfg. Co., Ltd. Plating apparatus and plating method
US20040084316A1 (en) * 2002-10-31 2004-05-06 Renesas Technology Corp. Plating apparatus and method
US20040256222A1 (en) * 2002-12-05 2004-12-23 Surfect Technologies, Inc. Apparatus and method for highly controlled electrodeposition
US20040124090A1 (en) * 2002-12-30 2004-07-01 Chen-Chung Du Wafer electroplating apparatus and method
US20070080057A1 (en) * 2003-01-21 2007-04-12 Dainippon Screen Mfg. Co., Ltd. Plating apparatus, plating cup and cathode ring
US20060049038A1 (en) * 2003-02-12 2006-03-09 Surfect Technologies, Inc. Dynamic profile anode
US20040245112A1 (en) * 2003-05-29 2004-12-09 Masahiko Sekimoto Apparatus and method for plating a substrate
US20040261500A1 (en) * 2003-06-03 2004-12-30 Nano-Proprietary, Inc. Method and apparatus for sensing hydrogen gas
US20050230260A1 (en) * 2004-02-04 2005-10-20 Surfect Technologies, Inc. Plating apparatus and method

Cited By (55)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060011487A1 (en) * 2001-05-31 2006-01-19 Surfect Technologies, Inc. Submicron and nano size particle encapsulation by electrochemical process and apparatus
US20050230260A1 (en) * 2004-02-04 2005-10-20 Surfect Technologies, Inc. Plating apparatus and method
WO2006019992A1 (en) * 2004-07-15 2006-02-23 University Of Iowa Research Foundation Methods for increasing carbon monoxide tolerance in fuel cells
US20100291415A1 (en) * 2004-07-15 2010-11-18 Johna Leddy Methods for increasing carbon monoxide tolerance in fuel cells
US20060068216A1 (en) * 2004-09-30 2006-03-30 Fay Hua Nano-sized metals and alloys, and methods of assembling packages containing same
US7524351B2 (en) * 2004-09-30 2009-04-28 Intel Corporation Nano-sized metals and alloys, and methods of assembling packages containing same
US20110023298A1 (en) * 2004-11-24 2011-02-03 Dai Nippon Printing Co., Ltd. Method for manufacturing electroconductive material-filled throughhole substrate
US20080092378A1 (en) * 2004-11-24 2008-04-24 Dai Nippon Printing Co., Ltd. Method For Manufacturing Electroconductive Material-Filled Throughhole Substrate
US7918020B2 (en) * 2004-11-24 2011-04-05 Dai Nippon Printing Co., Ltd. Method for manufacturing electroconductive material-filled throughhole substrate
US8196298B2 (en) * 2004-11-24 2012-06-12 Dai Nippon Printing Co., Ltd. Method for manufacturing electroconductive material-filled throughhole substrate
US20070007983A1 (en) * 2005-01-06 2007-01-11 Salmon Peter C Semiconductor wafer tester
US20070001280A1 (en) * 2005-06-30 2007-01-04 Fay Hua Electromigration-resistant and compliant wire interconnects, nano-sized solder compositions, systems made thereof, and methods of assembling soldered packages
US7615476B2 (en) 2005-06-30 2009-11-10 Intel Corporation Electromigration-resistant and compliant wire interconnects, nano-sized solder compositions, systems made thereof, and methods of assembling soldered packages
US8441118B2 (en) 2005-06-30 2013-05-14 Intel Corporation Electromigration-resistant and compliant wire interconnects, nano-sized solder compositions, systems made thereof, and methods of assembling soldered packages
US20100047971A1 (en) * 2005-06-30 2010-02-25 Fay Hua Electromigration-resistant and compliant wire interconnects, nano-sized solder compositions, systems made thereof, and methods of assembling soldered packages
US20090193652A1 (en) * 2005-08-01 2009-08-06 Salmon Peter C Scalable subsystem architecture having integrated cooling channels
US7704919B2 (en) 2005-08-01 2010-04-27 Brookhaven Science Associates, Llc Electrocatalysts having gold monolayers on platinum nanoparticle cores, and uses thereof
WO2008033113A3 (en) * 2005-08-01 2008-11-06 Brookhaven Science Ass Llc Electrocatalysts having gold monolayers on platinum nanoparticle cores, and uses thereof
US20070023889A1 (en) * 2005-08-01 2007-02-01 Salmon Peter C Copper substrate with feedthroughs and interconnection circuits
US20070023923A1 (en) * 2005-08-01 2007-02-01 Salmon Peter C Flip chip interface including a mixed array of heat bumps and signal bumps
WO2008033113A2 (en) * 2005-08-01 2008-03-20 Brookhaven Science Associates Electrocatalysts having gold monolayers on platinum nanoparticle cores, and uses thereof
US20070026292A1 (en) * 2005-08-01 2007-02-01 Radoslav Adzic Electrocatalysts having gold monolayers on platinum nanoparticle cores, and uses thereof
US7586747B2 (en) 2005-08-01 2009-09-08 Salmon Technologies, Llc. Scalable subsystem architecture having integrated cooling channels
US8009442B2 (en) * 2007-12-28 2011-08-30 Intel Corporation Directing the flow of underfill materials using magnetic particles
US20090168390A1 (en) * 2007-12-28 2009-07-02 Lehman Jr Stephen E Directing the flow of underfill materials using magnetic particles
WO2009115317A1 (en) * 2008-03-18 2009-09-24 Technical University Of Denmark A method for producing a multilayer structure
EP2103719A1 (en) * 2008-03-18 2009-09-23 Technical University of Denmark A method for producing a multilayer structure
KR101592057B1 (en) 2008-07-24 2016-02-05 데쿠세리아루즈 가부시키가이샤 Conductive particle, anisotropic conductive film, joined body, and connecting method
US20110088935A1 (en) * 2008-07-24 2011-04-21 Sony Chemical & Information Device Corporation Conductive particle, anisotropic conductive film, joined structure, and joining method
US8395052B2 (en) * 2008-07-24 2013-03-12 Dexerials Corporation Conductive particle, anisotropic conductive film, joined structure, and joining method
US20100031501A1 (en) * 2008-08-08 2010-02-11 Napra Co., Ltd. Method for filling through hole or non-through hole formed on board with filler
WO2010037689A1 (en) * 2008-09-30 2010-04-08 Consiglio Nazionale Delle Ricerche Micrometer-scale or nanometer-scale spatially controlled incorporation of particles in a conducting surface layer of a support
US20110240478A1 (en) * 2008-09-30 2011-10-06 Massimiliano Cavallini Micrometer-scale or nanometer=scale spatially controlled incorporation of particles in a conducting surface layer of a support
US20100096754A1 (en) * 2008-10-17 2010-04-22 Samsung Electronics Co., Ltd. Semiconductor package, semiconductor module, and method for fabricating the semiconductor package
US20100285376A1 (en) * 2009-05-08 2010-11-11 Industrial Technology Research Institute Magnetic catalyst and method for manufacturing the same
US20110210283A1 (en) * 2010-02-24 2011-09-01 Ainissa G. Ramirez Low melting temperature alloys with magnetic dispersions
US20110220704A1 (en) * 2010-03-09 2011-09-15 Weiping Liu Composite solder alloy preform
US8348139B2 (en) 2010-03-09 2013-01-08 Indium Corporation Composite solder alloy preform
US8641845B2 (en) 2011-01-13 2014-02-04 Siemens Energy, Inc. Method of determining bond coverage in a joint
WO2012118476A1 (en) * 2011-02-28 2012-09-07 Hewlett-Packard Development Company L.P. Coating particles
GB2509888A (en) * 2012-09-17 2014-07-23 Hipermag Ltd A method and apparatus for forming a magnetic film on a substrate
EP2895423B1 (en) * 2012-09-17 2017-11-15 Nano Resources Limited Core-shell nanoparticles
US9478333B2 (en) 2012-09-17 2016-10-25 Nano Resources Limited Process and apparatus for forming magnetic structures on a substrate
EP2895423A1 (en) * 2012-09-17 2015-07-22 Nano Resources Limited Magnetic structures
GB2509888B (en) * 2012-09-17 2016-05-11 Nano Resources Ltd Magnetic structures
CN105263856A (en) * 2012-09-17 2016-01-20 纳米资源有限公司 Magnetic structures
US20140183733A1 (en) * 2013-01-03 2014-07-03 Duksan Hi-Metal Co., Ltd Metal core solder ball and heat dissipation structure for semiconductor device using the same
US9620469B2 (en) * 2013-11-18 2017-04-11 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming post-passivation interconnect structure
US20150137352A1 (en) * 2013-11-18 2015-05-21 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanisms for forming post-passivation interconnect structure
US9704512B2 (en) 2013-11-19 2017-07-11 Peacekeepers (International) Ltd. Electromagnetic data storage devices having improved magnetic structure
CN104465583A (en) * 2014-12-09 2015-03-25 三星半导体(中国)研究开发有限公司 Ball grid array packaging piece and method for installing ball grid array packaging piece on substrate
US9508614B2 (en) 2014-12-12 2016-11-29 International Business Machines Corporation Alignment of three dimensional integrated circuit components
US20160172324A1 (en) * 2014-12-12 2016-06-16 International Business Machines Corporation Alignment of three dimensional integrated circuit components
US9721855B2 (en) * 2014-12-12 2017-08-01 International Business Machines Corporation Alignment of three dimensional integrated circuit components
WO2017118853A3 (en) * 2016-01-06 2017-08-24 Coventry University Material deposition in a magnetic field

Also Published As

Publication number Publication date Type
WO2004052547A3 (en) 2004-12-02 application
JP2006513041A (en) 2006-04-20 application
WO2004052547A2 (en) 2004-06-24 application

Similar Documents

Publication Publication Date Title
US5121299A (en) Multi-level circuit structure utilizing conductive cores having conductive protrusions and cavities therein
Carraro et al. Metallization and nanostructuring of semiconductor surfaces by galvanic displacement processes
US5837119A (en) Methods of fabricating dendritic powder materials for high conductivity paste applications
US20040084206A1 (en) Fine pad pitch organic circuit board for flip chip joints and board to board solder joints and method
US4131516A (en) Method of making metal filled via holes in ceramic circuit boards
US20040079194A1 (en) Functional alloy particles
US20100216632A1 (en) High Stability, Self-Protecting Electrocatalyst Particles
US6224690B1 (en) Flip-Chip interconnections using lead-free solders
Dow et al. Roles of chloride ion in microvia filling by copper electrodeposition i. studies using sem and optical microscope
US20070221404A1 (en) Circuitized substrate with conductive paste, electrical assembly including said circuitized substrate and method of making said substrate
US20100197490A1 (en) Platinum-Coated Non-Noble Metal-Noble Metal Core-Shell Electrocatalysts
US20020100972A1 (en) Semiconductor device with gold bumps, and method and apparatus of producing the same
US20100206737A1 (en) Process for electrodeposition of copper chip to chip, chip to wafer and wafer to wafer interconnects in through-silicon vias (tsv)
US20080131658A1 (en) Electronic packages and components thereof formed by co-deposited carbon nanotubes
US20110189848A1 (en) Method to form solder deposits on substrates
JPH11124682A (en) Method for plating plastic microbead
Ke et al. Fabrication and properties of macroporous tin–cobalt alloy film electrodes for lithium-ion batteries
JP2002334618A (en) Forming method of plating-substitute conductive metal film using metal fine particle dispersed liquid
Magagnin et al. Selective deposition of thin copper films onto silicon with improved adhesion
US6059952A (en) Method of fabricating coated powder materials and their use for high conductivity paste applications
US20130014978A1 (en) Electrical Barrier Layers
US6583058B1 (en) Solid hermetic via and bump fabrication
US7087441B2 (en) Method of making a circuitized substrate having a plurality of solder connection sites thereon
US6622907B2 (en) Sacrificial seed layer process for forming C4 solder bumps
US20060124345A1 (en) Method for manufacturing board with built-in device and board with built-in device and method for manufacturing printed wiring board and printed wiring board

Legal Events

Date Code Title Description
AS Assignment

Owner name: SURFECT TECHNOLOGIES, INC., NEW MEXICO

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:GRIEGO, THOMAS P.;REEL/FRAME:015055/0060

Effective date: 20040624