US20040033644A1 - Methods for transfer molding encapsulation of a semiconductor die with attached heat sink - Google Patents

Methods for transfer molding encapsulation of a semiconductor die with attached heat sink Download PDF

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US20040033644A1
US20040033644A1 US10/639,127 US63912703A US2004033644A1 US 20040033644 A1 US20040033644 A1 US 20040033644A1 US 63912703 A US63912703 A US 63912703A US 2004033644 A1 US2004033644 A1 US 2004033644A1
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heat sink
dam
semiconductor die
plurality
semiconductor device
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US10/639,127
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Richard Wensel
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Wensel Richard W.
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Priority to US08/804,911 priority Critical patent/US6001672A/en
Priority to US09/287,665 priority patent/US6403387B1/en
Priority to US10/077,452 priority patent/US6869811B2/en
Application filed by Wensel Richard W. filed Critical Wensel Richard W.
Priority to US10/639,127 priority patent/US20040033644A1/en
Publication of US20040033644A1 publication Critical patent/US20040033644A1/en
Application status is Abandoned legal-status Critical

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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0102Calcium [Ca]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

A semiconductor device includes a heat sink adjacent to a die. A dam is positioned at the peripheral edges of the heat sink. During a transfer molding process, the dam serves two purposes. First, the dam prevents damage to the mold. Second, the dam prevents encapsulant packaging compound material from flowing onto the heat sink. The dam may be a gasket. The dam may also be a burr created by, for example, stamping the bottom of the heat sink. The dam may include copper, polyamides, and leadlock tape. The dam may be permanently connected to the heat sink or removed following packaging. The dam may be removed mechanically, through the use of heat, or during an electrolytic deflash cycle.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • This application is a continuation of application Ser. No. 10/077,452, filed Feb. 14, 2002, pending, which is a continuation of application Ser. No. 09/287,665, filed Apr. 7, 1999, now U.S. Pat. No. 6,403,387, issued Jun. 11, 2002, which is a continuation of application Ser. No. 08/804,911, filed Feb. 25, 1997, now U.S. Pat. No. 6,001,672, issued Dec. 14, 1999.[0001]
  • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0002]
  • The present invention relates to the transfer molding of semiconductor devices. More specifically, the present invention relates to a method of using a dam in transfer molding encapsulation of a semiconductor device and a heat sink, and in the resulting semiconductor device assembly. [0003]
  • 2. State of the Art [0004]
  • A semiconductor integrated circuit (IC) device (referred to as a die or chip) includes bond pads on the active surface thereof for interfacing the integrated circuits of the semiconductor device with other circuits outside the die located on differing substrates. Since the semiconductor devices are relatively small and the attendant bond pads on the active surface thereof are, in comparison, considerably smaller, lead frames having a plurality of leads thereon connected to the bond pads of a semiconductor device are used to connect the semiconductor device with other circuits on differing substrates. [0005]
  • In a conventional lead frame design for use with an integrated circuit semiconductor device, the lead frame includes a plurality of leads having their ends terminating adjacent a side or edge of the integrated circuit semiconductor device with the device being supported by the die paddle portion of the lead frame. Electrical connections are made by means of wire bonds extending between the leads of the lead frame and the bond pads located on the active surface of the integrated circuit semiconductor device. [0006]
  • Subsequent to the wire bonding operation, portions of the leads of the lead frame and the integrated circuit semiconductor device may be encapsulated in suitable plastic material to form a packaged semiconductor device assembly. The leads and lead frame are then trimmed and formed to the desired configuration after the packaging of the semiconductor device in the encapsulant material. [0007]
  • In a Leads-Over-Chip (LOC) type lead frame configuration for an integrated circuit semiconductor (IC) device assembly, the leads of the lead frame extend over the active surface of the semiconductor device being insulated therefrom by tape which is adhesively bonded to the semiconductor device and the leads of the lead frame. Electrical connections are made between the leads of the lead frame and bond pads on the active surface of the semiconductor device by way of wire bonds extending therebetween. After wire bonding, the leads of the LOC lead frame and the semiconductor device are encapsulated in suitable plastic to encapsulate the semiconductor device and portions of the leads. Subsequently, the leads are trimmed and formed to the desired configuration to complete the packaged semiconductor device. [0008]
  • By far the most common manner of forming a plastic package about a semiconductor device assembly is molding and, more specifically, transfer molding. In this process, with specific reference to an LOC type semiconductor die assembly, a semiconductor die is suspended by its active surface from the underside of inner lead extensions of a lead frame (typically Cu or Alloy 42) by a tape, screen print or spin-on dielectric adhesive layer. The bond pads of the die and the inner lead ends of the frame are then electrically connected by wire bonds (typically Au, although Al and other metal alloy wires have also been employed) by means known in the art. The resulting LOC die assembly, which may comprise the framework of a dual-in-line package (DIP), zig-zag in-line package (ZIP), small outline j-lead package (SOJ), quad flat pack (QFP), plastic leaded chip carrier (PLCC), surface mount device (SMD) or other plastic package configuration known in the art, is placed in a mold cavity and encapsulated in a thermosetting polymer which, when heated, reacts irreversibly to form a highly cross-linked matrix no longer capable of being re-melted. [0009]
  • The thermosetting polymer generally is comprised of three major components: an epoxy resin, a hardener (including accelerators), and a filler material. Other additives such as flame retardants, mold release agents and colorants are also employed in relatively small amounts. While many variations of the three major components are known in the art, the focus of the present invention resides in the filler materials employed and their effects on the active die surface. [0010]
  • Filler materials are usually a form of fused silica, although other materials such as calcium carbonates, calcium silicates, talc, mica and clays have been employed for less rigorous applications. Powdered, fused quartz is currently the primary filler used in encapsulants. Fillers provide a number of advantages in comparison to unfilled encapsulants. For example, fillers reinforce the polymer and thus provide additional package strength, enhance thermal conductivity of the package, provide enhanced resistance to thermal shock, and greatly reduce the cost of the polymer in comparison to its unfilled state. Fillers also beneficially reduce the coefficient of thermal expansion (CTE) of the composite material by about fifty percent in comparison to the unfilled polymer, resulting in a CTE much closer to that of the silicon or gallium arsenide die. Filler materials, however, also present some recognized disadvantages, including increasing the stiffness of the plastic package, as well as the moisture permeability of the package. [0011]
  • When a heat sink is used on a semiconductor device assembly package, encapsulation of the semiconductor device becomes more difficult during the transfer molding process. In the first instance, the inclusion of the heat sink along with the semiconductor device attached to the lead frame makes the transfer molding of the assembly more difficult as more components must be placed and aligned within the mold cavity. Misalignment of the semiconductor device and the heat sink within the mold cavity may cause bleeding and flashing of the resin molding compound over the heat sink. Furthermore, when the heat sink, which is usually copper or an alloy thereof, rests against the mold surface during the transfer molding process, damage to the mold surface can occur by the mold surface being scratched and/or worn from contact therewith by the heat sink. The resulting worn mold surfaces cause the resin molding compound to bleed and flash over the outside of the heat sink during the transfer molding process. This affects the ability of the heat sink to transfer heat to the surrounding environment during the operation of the semiconductor device as well as presenting a poor appearance of the molded semiconductor device assembly. [0012]
  • Accordingly, there is a need for an improved transfer molding process for packaging semiconductor devices having heat sinks associated therewith to help prevent or reduce the bleeding or flashing of the molding compound over portions of the heat sink during the transfer molding process of the semiconductor device assembly. [0013]
  • BRIEF SUMMARY OF THE INVENTION
  • The present invention is directed to a semiconductor device assembly that includes a heat sink adjacent to a die. A dam positioned about the peripheral edges of the heat sink during the transfer molding process serves to help prevent damage to the mold and help prevent encapsulant packaging compound material from flowing onto the heat sink. The dam may be a resilient, non-metallic material. The dam may also be a protrusion created by, for example, stamping the heat sink from a sheet of material or stamping the bottom of the heat sink to form the dam thereon. The dam may include a suitable metal material, such as copper, copper alloys, etc., and a suitable non-metallic material, such as polyamides, and tape. The dam may be permanently connected to the heat sink or removed following packaging. The dam may be removed with heat or during an electrolytic deflash cycle or, if desired, mechanically. The invention may be employed in connection with various types of lead frame configurations or, when a lead frame is not used, with a bare semiconductor device of the semiconductor device assembly.[0014]
  • BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
  • While the specification concludes with claims particularly pointing out and distinctly claiming that which is regarded as the present invention, the advantages of this invention can be more readily ascertained from the following description of the invention when read in conjunction with the accompanying drawings in which: [0015]
  • FIG. 1 comprises a flow chart of an exemplary process sequence for plastic package molding; [0016]
  • FIGS. 2A and 2B are side schematic views of a typical transfer molding, showing pre-molding and post-molding encapsulant positions; [0017]
  • FIG. 3 shows a top schematic view of one side of a transfer mold of FIGS. 2A and 2B, depicting encapsulant flow and venting of the primary mold runner and the mold cavities wherein the semiconductor device assemblies are contained; [0018]
  • FIGS. 4A, 4B, and [0019] 4C depict encapsulant flow scenarios for a mold cavity;
  • FIG. 5 is a side view of a semiconductor device including a heat sink, a dam, a die, and packaging compound; [0020]
  • FIG. 6 is a bottom view of the device of FIG. 5; [0021]
  • FIG. 7 is a first embodiment of the device of FIG. 5, taken along lines [0022] 3-3 of FIG. 6 in which the dam is a gasket;
  • FIG. 8 is a second embodiment of the device of FIG. 5, taken along lines [0023] 4-4 of FIG. 6 in which the dam is a burr;
  • FIG. 9 is a side view of a mold and a die, lead frame, heat sink, and dam positioned therein.[0024]
  • DETAILED DESCRIPTION OF THE INVENTION
  • To more fully understand the present invention in the context of the prior art, a brief description of a transfer apparatus and method for forming a plastic package about an LOC die assembly is provided. The term “transfer” molding is descriptive of this process as the molding compound, once melted, is transferred under pressure to a plurality of remotely-located mold cavities containing semiconductor device assemblies to be encapsulated. [0025]
  • FIG. 1 is a flow chart of a typical process sequence for plastic package molding. It should be noted that the solder dip/plate operation has been shown as one step for brevity; normally, plating would occur prior to trim and form. [0026]
  • FIGS. 2A and 2B show pre-molding and post-molding positions of encapsulant during a transfer molding operation using a typical mold apparatus comprising upper and lower mold halves [0027] 10 and 12, each mold half including a platen 14 or 16 with its associated chase 18 or 20. Heating elements 22 are employed in the platens to maintain an elevated and relatively uniform temperature in the runners and mold cavities during the molding operation.
  • FIG. 3 shows a top view of one side of the transfer mold apparatus of FIGS. 2A and 2B. In the transfer mold apparatus shown, the encapsulant flows into each mold cavity [0028] 44 through the short end thereof.
  • In operation, a heated pellet of resin mold compound [0029] 30 is disposed beneath ram or plunger 32 in pot 34. The plunger descends, melting the pellet and forcing the melted encapsulant down through sprue 36 and into primary runner 38, from and through the mold cavities 44 through the short side thereof flowing across the semiconductor device assemblies 100, wherein semiconductor device assemblies 100 comprising semiconductor devices 102 with attached lead frames 104 are disposed (usually in strips so that a strip of six lead frames, for example, would be cut and placed in and across the six cavities 44 shown in FIG. 3). Air in the runners 38 and 40 and mold cavities 44 is vented to the atmosphere through vents 46 and 48. At the end of the molding operation, the encapsulant is “packed” by application of a high pressure to eliminate voids and reduce non-uniformities of the encapsulant in the mold cavities 44. After molding, the encapsulated semiconductor device assemblies 100 are ejected from the cavities 44 by ejector pins 50, after which they are post-cured at an elevated temperature to complete cross-linking of the resin, followed by other operations as known in the art and set forth in FIG. 1, by way of example. It will be appreciated that other transfer molding apparatus configurations, as well as variations in the details of the described method are known in the art. However, none of such are pertinent to the invention, and so will not be discussed herein.
  • Encapsulant flow in the mold cavities [0030] 44 is demonstrably non-uniform. The presence of the semiconductor device assembly 100 comprising a semiconductor device 102 with lead frame 104 disposed across the mid-section of a cavity 44 splits the viscous encapsulant flow front 106 into upper 108 and lower 110 components (FIG. 4A). Further, the presence of the (relatively) large semiconductor device 102 with its relatively lower temperature in the middle of a cavity 44 permits the flow front 106 on each side of the semiconductor device to advance ahead of the front which passed over and under the semiconductor device 102.
  • FIGS. 4A and 4B show two mold cavity encapsulant flow scenarios where, respectively, the lower flow front [0031] 110 and the upper flow front 108 lead the overall encapsulant flow front 106 in the cavity 44 containing the semiconductor device assembly 100. FIG. 4C depicts the advance of a flow front 106 from above, before and after a die 102 is encountered, the flow being depicted as time-separated instantaneous flow fronts 106 a, 106 b, 106 c, 106 d, 106 e, and 106 f. As the encapsulant flow front advances and the mold operation is completed by packing the cavities, encapsulant pressure in substantially all portions of the cavities reaches hydrostatic pressure.
  • Referring to FIG. 5, a semiconductor device assembly [0032] 210 includes a semiconductor device 214 having bond pads 215 located thereon interconnected to a lead frame 220 by one or more wire bonds 217 and a heat sink 216 adjacent to the semiconductor device 214. The semiconductor device 214 may be separated, if desired, from heat sink 216 through a portion of the lead frame 220. Various types of lead frame arrangements of the lead frame 220 may be employed, such as conventional type lead frames or Leads-Over-Chip (LOC) type lead frames, for example. Alternatively, a lead frame is not required with the semiconductor device 214 being connected to the heat sink 216 and encapsulated, except for the active surface of the semiconductor device 214 having bond pads 215 thereon. After the encapsulation of the lead frame 220, semiconductor device 214, and heat sink 216 during the transfer molding process, the encapsulant compound material 224 surrounds the semiconductor device 214 and heat sink 216, except where prevented from doing so by the dam 228. A dam 228 is positioned at the peripheral edges of heat sink 216 which prevents the flow of encapsulant molding material from bleeding over or flashing around the heat sink 216 during the encapsulation of the lead frame 220, semiconductor device 214, and heat sink 216 in the molding process in the transfer molding apparatus described hereinbefore.
  • FIG. 6 shows a bottom view of semiconductor device assembly [0033] 210. As seen in FIG. 6, dam 228 preferably extends substantially around the peripheral edges of the bottom of the heat sink 228. During a transfer molding process, dam 228 serves two purposes, (1) the dam 228 prevents damage to the mold and (2) the dam 228 prevents encapsulant molding (packaging) compound material 224 from flowing (i.e., bleeding or flashing) onto heat sink 216.
  • Referring to FIG. 7, dam [0034] 228 may be a suitable resilient material or a gasket formed of suitable material which is suitable for such use and which is suitable for use in the transfer molding process, such as polyamides, Kapton™ tape, etc. The resilient material forming the dam 228 may be applied to the periphery of the bottom of the heat sink 216 by a molding operation, such as molding a suitable plastic material dam 228 about the periphery of the heat sink 216.
  • Referring to FIG. 8, dam [0035] 228 may also be a protrusion or substantially continuously formed burr type edge or lip extending around the periphery of the bottom surface of the heat sink 216 created, for example, through the stamping of the heat sink 216 from a sheet of material or, alternately, by the stamping of the bottom of heat sink 216 to form the protrusion thereon.
  • FIG. 9 shows a mold [0036] 234 to encase encapsulant compound material 224 that is received through an encapsulant compound source 238 during the transfer molding process as described hereinbefore.
  • Dam [0037] 228 prevents encapsulant compound material 224 from flashing or bleeding over the outside of heat sink 216. Flashing or bleeding occurs due to a combination of high pressure used in the molding process and the inherent inconsistency in the flatness of the mold and the heat sink. When the compound bleeds over the heat sink, the heat sink becomes less effective due to a loss in exposed surface area of the heat sink.
  • Dam [0038] 228 may include any suitable metal, such as copper, aluminum, copper alloys, aluminum alloys, etc., polyamides, and leadlock tape. Leadlock tape may consist of a Kapton™ carrier film and have an adhesive coating or material thereon. (See FIG. 7.) These materials are softer and would probably form more of a gasket than would copper, thereby resulting in less resin bleed and a longer mold life. In such a case, the dam material would not have to have good adhesion to encapsulant compound material 224 or heat sink 216 since dam 228 only needs to be present during the molding process. Dam 228 may be permanently connected to the heat sink or removed following packaging. Dam 228 may be removed with heat or during an electrolytic deflash cycle.
  • As used herein, the term “adjacent” does not necessarily mean touching. For example, a heat sink may be adjacent to a die, although separated from the die by a lead frame. Further, the term “connected” or a related term does not necessarily mean directly connected but could include being indirectly connected. [0039]
  • Having thus described in detail preferred embodiments of the present invention, it is to be understood that the invention defined by the appended claims is not to be limited by particular details set forth in the above description as many apparent variations thereof are possible without departing from the spirit or scope thereof. [0040]

Claims (5)

What is claimed is:
1. A transfer molding method for packaging a plurality of semiconductor device assemblies at the same time, each semiconductor device assembly having a semiconductor die having a plurality of bond pads thereon and having a portion thereof attached to a portion of a lead frame having a plurality of leads, at least one bond pad of the plurality of bond pads of the semiconductor die connected to at least one lead of the plurality of leads of the lead frame, comprising:
forming a heat sink having a top surface and a bottom surface, each top and bottom surface having peripheral edges therearound for each semiconductor die;
forming a substantially continuously formed protruding edge from the heat sink at the peripheral edges of the bottom surface of the heat sink for each semiconductor die;
positioning the top surface of each heat sink adjacent to each semiconductor die having the plurality of bond pads thereon;
placing the each heat sink and each semiconductor die of each semiconductor device assembly of said plurality of semiconductor device assemblies in a transfer molding apparatus having the protruding edge formed at the peripheral edges of the bottom surface of each heat sink in contact with a portion of the transfer molding apparatus; and
removing a dam from adjacent to a surface of each heat sink following an encapsulation of each semiconductor die and the heat sink.
2. The method of claim 1, wherein the protruding edge is removed with heat.
3. The method of claim 1, wherein the protruding edge is removed during an electrolytic deflash cycle.
4. A method of packaging a plurality of semiconductor device assemblies, each semiconductor device assembly having a semiconductor die having a plurality of bond pads thereon and having a portion thereof attached to a portion of a lead frame having a plurality of leads, at least one bond pad of the plurality of bond pads of the semiconductor die connected to at least one lead of the plurality of leads of the lead frame, comprising:
forming a dam adjacent a periphery of a heat sink for each semiconductor die, each dam formed from material of the heat sink, the dam protruding from edge portions of the periphery of the heat sink;
positioning the heat sink adjacent each semiconductor die;
positioning the dam, heat sink, and each semiconductor die in a transfer molding apparatus having the dam contacting a portion of the transfer molding apparatus for encapsulating a plurality of semiconductor device assemblies;
encapsulating each semiconductor die and each heat sink in molding material in the transfer molding apparatus; and
removing the dam from adjacent to a surface of the heat sink following the encapsulation of each semiconductor die and each heat sink in the molding material in the transfer molding apparatus.
5. A method of packaging a semiconductor device assembly of a plurality of semiconductor device assemblies, each semiconductor device assembly having a semiconductor die having a plurality of bond pads thereon and having a portion thereof attached to a portion of a lead frame having a plurality of leads, at least one bond pad of the plurality of bond pads of the semiconductor die connected to at least one lead of the plurality of leads of the lead frame, comprising:
providing a heat sink for each semiconductor die;
forming a dam adjacent a periphery of the heat sink for each semiconductor die, each dam formed from a material thereof, the dam configured as a protruding edge portion of the periphery of the heat sink;
positioning the heat sink adjacent to the semiconductor die;
positioning the lead frame, the semiconductor die, the heat sink, and the dam in a transfer molding apparatus in a plurality of semiconductor device assemblies, each dam contacting a portion of the transfer molding apparatus;
encapsulating a portion of the portion of the lead frame, the semiconductor die, and the heat sink in molding material in the transfer molding apparatus for each semiconductor device assembly of a plurality semiconductor device assemblies; and
removing the dam from adjacent to a surface of the heat sink following the encapsulation of each semiconductor die and the heat sink in the molding material in the transfer molding apparatus.
US10/639,127 1997-02-25 2003-08-12 Methods for transfer molding encapsulation of a semiconductor die with attached heat sink Abandoned US20040033644A1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US08/804,911 US6001672A (en) 1997-02-25 1997-02-25 Method for transfer molding encapsulation of a semiconductor die with attached heat sink
US09/287,665 US6403387B1 (en) 1997-02-25 1999-04-07 Method and apparatus for transfer molding encapsulation of a semiconductor die with attached heat sink
US10/077,452 US6869811B2 (en) 1997-02-25 2002-02-14 Methods for transfer molding encapsulation of a semiconductor die with attached heat sink
US10/639,127 US20040033644A1 (en) 1997-02-25 2003-08-12 Methods for transfer molding encapsulation of a semiconductor die with attached heat sink

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Application Number Priority Date Filing Date Title
US10/639,127 US20040033644A1 (en) 1997-02-25 2003-08-12 Methods for transfer molding encapsulation of a semiconductor die with attached heat sink

Related Parent Applications (1)

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US10/077,452 Continuation US6869811B2 (en) 1997-02-25 2002-02-14 Methods for transfer molding encapsulation of a semiconductor die with attached heat sink

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US08/804,911 Expired - Lifetime US6001672A (en) 1997-02-25 1997-02-25 Method for transfer molding encapsulation of a semiconductor die with attached heat sink
US08/909,228 Expired - Lifetime US5959349A (en) 1997-02-25 1997-08-11 Transfer molding encapsulation of a semiconductor die with attached heat sink
US09/287,665 Expired - Fee Related US6403387B1 (en) 1997-02-25 1999-04-07 Method and apparatus for transfer molding encapsulation of a semiconductor die with attached heat sink
US09/302,343 Expired - Lifetime US6249050B1 (en) 1997-02-25 1999-04-29 Encapsulated transfer molding of a semiconductor die with attached heat sink
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US10/077,452 Expired - Fee Related US6869811B2 (en) 1997-02-25 2002-02-14 Methods for transfer molding encapsulation of a semiconductor die with attached heat sink
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US09/287,665 Expired - Fee Related US6403387B1 (en) 1997-02-25 1999-04-07 Method and apparatus for transfer molding encapsulation of a semiconductor die with attached heat sink
US09/302,343 Expired - Lifetime US6249050B1 (en) 1997-02-25 1999-04-29 Encapsulated transfer molding of a semiconductor die with attached heat sink
US09/837,038 Expired - Fee Related US6373132B2 (en) 1997-02-25 2001-04-18 Semiconductor die with attached heat sink and transfer mold
US10/077,452 Expired - Fee Related US6869811B2 (en) 1997-02-25 2002-02-14 Methods for transfer molding encapsulation of a semiconductor die with attached heat sink
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US6249050B1 (en) 2001-06-19
US5959349A (en) 1999-09-28
US6583504B2 (en) 2003-06-24
US20040004274A1 (en) 2004-01-08
US6001672A (en) 1999-12-14
US6403387B1 (en) 2002-06-11
US7061082B2 (en) 2006-06-13
US20020076856A1 (en) 2002-06-20
US20020074648A1 (en) 2002-06-20
US20010013649A1 (en) 2001-08-16
US6869811B2 (en) 2005-03-22
US6373132B2 (en) 2002-04-16

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