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US20030042571A1 - Chip-scale coils and isolators based thereon - Google Patents

Chip-scale coils and isolators based thereon

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Publication number
US20030042571A1
US20030042571A1 US10214883 US21488302A US2003042571A1 US 20030042571 A1 US20030042571 A1 US 20030042571A1 US 10214883 US10214883 US 10214883 US 21488302 A US21488302 A US 21488302A US 2003042571 A1 US2003042571 A1 US 2003042571A1
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substrate
input
circuit
output
signal
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US10214883
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Baoxing Chen
Geoffrey Haigh
Mark Szostkiewicz
Ronn Kliger
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Analog Devices Inc
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Analog Devices Inc
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type
    • H01F17/0006Printed inductances
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F19/00Fixed transformers or mutual inductances of the signal type
    • H01F19/04Transformers or mutual inductances suitable for handling frequencies considerably beyond the audio range
    • H01F19/08Transformers having magnetic bias, e.g. for handling pulses
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227Inductive arrangements or effects of, or between, wiring layers
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60Protection against electrostatic charges or discharges, e.g. Faraday shields
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/52One-way transmission networks, i.e. unilines
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B5/00Near-field transmission systems, e.g. inductive loop type
    • H04B5/0075Near-field transmission systems, e.g. inductive loop type using inductive coupling
    • H04B5/0093Near-field transmission systems, e.g. inductive loop type using inductive coupling with one coil at each side, e.g. with primary and secondary coils
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; Arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/0266Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F19/00Fixed transformers or mutual inductances of the signal type
    • H01F19/04Transformers or mutual inductances suitable for handling frequencies considerably beyond the audio range
    • H01F19/08Transformers having magnetic bias, e.g. for handling pulses
    • H01F2019/085Transformer for galvanic isolation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F38/00Adaptations of transformers or inductances for specific applications or functions
    • H01F38/14Inductive couplings
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05553Shape in top view being rectangular
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B5/00Near-field transmission systems, e.g. inductive loop type
    • H04B5/0025Near field system adaptations
    • H04B5/005Near field system adaptations for isolation purposes

Abstract

Coil structures and isolators using them. A coil(s) is (are) used as a magnetic field-generating element(s) paired with another coil(s) or other magnetic field-receiving element(s). The coil(s) is(are) formed in or on a substrate which does not include some or all of the driver (i.e., input) or receiver (i.e., output) circuits. The coil(s) and magnetic field-receiving element(s) thus can be manufactured separately from the driver and/or receiver circuitry, using different processes, instead of subjecting the chip areas containing both input and output circuits to post processing to form the coil(s). Isolators can be assembled using such coils with a resultant lower cost. Isolators also can be assembled using transformers made from such coils wherein the transformers can be driven on either of their windings in order to provide bi-directional isolation with a single transformer.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • [0001]
    This application is a continuation-in-part of Ser. No. 09/838,520, filed Apr. 19, 2001, which is a continuation-in-part of Ser. No. 09/557,542, filed Apr. 25, 2000, which is a continuation of Ser. No. 09/118,032, filed Jul. 17, 1998, now U.S. Pat. No. 6,054,780, which claims priority from provisional application No. 60/063,221. These priority documents are expressly incorporated by reference for all purposes.
  • FIELD OF THE INVENTION
  • [0002]
    This invention relates to coils as well as to coil-based or partially coil-based isolator circuitry and structures for isolating electronic signals. Such isolators are used, for example, to interface and galvanically isolate sensor signals in a process control system, or between microcontrollers and other signal sources and transducers or other devices using those signals.
  • BACKGROUND OF THE INVENTION
  • [0003]
    In a variety of environments, such as in process control systems, analog or digital signals must be transmitted between diverse sources and circuitry using those signals, while maintaining electrical (i.e., galvanic) isolation between the sources and the using circuitry. Isolation may be needed, for example, between analog sensors and amplifiers or other circuits which process sensor outputs; or between microcontrollers, on the one hand, and sensors or transducers which generate or use microcontroller input or output signals, on the other hand. Electrical isolation is intended, inter alia, to prevent extraneous transient signals, including common-mode transients, from inadvertently being processed as status or control information, or to protect equipment from shock hazards or to permit the equipment on each side of an isolation barrier to be operated at a different supply voltage, among other known objectives. One well-known method for achieving such isolation is to use optical isolators that convert input electrical signals to light levels or pulses generated by light emitting diodes (LEDs), and then to receive and convert the light signals back into electrical signals. Optical isolators present certain limitations, however: among other limitations, they are rather non-linear and their current transfer ratios can vary over a large range with input voltage, temperature and lifetime, presenting challenges to the user and generally making them unsuitable for accurate linear applications; they require significant space on a card or circuit board; they draw a large current; they do not operate well at high frequencies; and they are very inefficient. They also provide somewhat limited levels of common mode transient immunity. To achieve and common mode transient immunity, opto-electronic isolators have been made with some attempts at providing an electrostatic shield between the optical transmitter and the optical receiver. However, a conductive shield which provides a significant degree of common mode transient immunity improvement is not sufficiently transparent for use in this application.
  • [0004]
    One isolation amplifier avoiding the use of such optical couplers is U.S. Pat. No. 5,831,426 to Black et al, which shows a current determiner having an output at which representations of input currents are provided, having an input conductor for the input current and a current sensor supported on a substrate electrically isolated from one another but with the sensor positioned in the magnetic fields arising about the input conductor due to any input currents. The sensor extends along the substrate in a direction primarily perpendicular to the extent of the input conductor and is formed of at least a pair of thin-film ferromagnetic layers separated by a non-magnetic conductive layer. The sensor can be electrically connected to electronic circuitry formed in the substrate, including a nonlinearity adaptation circuit to provide representations of the input currents of increased accuracy despite nonlinearities in the current sensor, and can include further current sensors in bridge circuits. Another non-optical isolation amplifier, for use in a digital signaling environment, is described in U.S. Pat. No. 4,748,419 to Somerville. In that patent, an input data signal is differentiated to create a pair of differential signals that are each transmitted across high voltage capacitors to create differentiated spike signals for the differential input pair. Circuitry on the other side of the capacitive barrier has a differential amplifier, a pair of converters for comparing the amplified signal against high and low thresholds, and a set/reset flip-flop to restore the spikes created by the capacitors into a logic signal. In such a capacitively-coupled device, however, during a common mode transient event, the capacitors couple high, common-mode energy into the receiving circuit. As the rate of voltage change increases in that common-mode event, the current injected into the receiver increases. This current potentially can damage the receiving circuit and can trigger a faulty detection. Such capacitively coupled circuitry thus couples signals that should be rejected. The patent also mentions, without elaboration, that a transformer with a short R/L time constant can provide an isolation barrier, but such a differential approach is nonetheless undesirable because any mismatch in the non-magnetic (i.e., capacitive) coupling of the windings would cause a common-mode signal to appear as a difference signal.
  • [0005]
    In a coil-based isolator, an input signal is coupled (directly or indirectly) from an input node to a coil or coils which generate(s) a magnetic field(s) that is(are) coupled to a gavanically isolated field-receiving or field-sensing element(s). An output circuit(s) coupled to the field-receiving element(s) converts the received field variations to an output signal corresponding to the input signal. The coupling from input node to input-side coil(s) may be made through elements or driving circuits that drive the coil(s) with signals derived from the input signal and not the same as the input signal.
  • [0006]
    Typically, there are two classes of coil-based isolators, depending on the nature of the field-receiving elements. The field-receiving elements may be another coil(s) or a type of magneto-resistive (MR)/giant-magneto-resistive (GMR) element(s) (which are collectively referred to herein as MR elements unless the need appears to distinguish them). If the field-receiving element(s) is(are) a coil(s), then the field-generating and field-receiving coils form transformers. With respect to coil-based isolators, we shall use the terms “winding” and “coil” interchangeably.
  • [0007]
    In transformer-based isolators, a Faraday shield may be interposed between the primary and secondary windings. The input signal is referenced to a first ground, or reference potential, and the output signal is referenced to a second ground, or reference potential. The Faraday shield also is referenced to the second ground. Common mode transients are capacitively coupled from the field generator (i.e., primary winding) into the Faraday shield and therethrough to the second ground, instead of into the corresponding field-receiving elements (i.e., secondary windings). Further, two Faraday shields may be disposed in spaced relationship between the transformer windings. In such an arrangement, a first Faraday shield usually is at the first reference potential and a second Faraday shield usually is at the second reference potential.
  • [0008]
    The isolation barrier may be formed on one or two silicon die, as shown in Application Serial No. 838,520, and can be formed from one or more pairs of field-generating and field-receiving elements, in each case preferably creating a vertically stacked structural arrangement with a dielectric (and in the case of windings, a Faraday shield) between the field-generating and field-receiving elements, for electrical isolation.
  • [0009]
    Such, an isolator may be monolithically fabricated. As disclosed in U.S. patent application Ser. No. 09/838,520, either one die or two may be used. An embodiment is shown therein with a complete isolator formed monolithically on a single die.
  • [0010]
    With appropriate driver and receiver circuits, embodiments of the isolator are useful for either analog signals or digital signals. Exemplary driver and receiver circuits for each type of signal also were shown in said application, though other driver and receiver circuits may be used, of course.
  • [0011]
    A need exists, however, to reduce the size and cost of such coil-based isolators, without degrading performance and without requiring greater power consumption. The cost of such isolators is highly dependent on semiconductor wafer fabrication costs and wafer area requirements.
  • SUMMARY OF THE INVENTION
  • [0012]
    Despite the benefits of the foregoing isolator designs, with respect to the coil-type isolator, manufacturing costs are still higher than is desired in many situations. A cost savings can be achieved by fabricating the coils (and, if used, MR elements) in, on or above a substrate which contains at most only input or output circuitry of the isolator, and preferably neither input nor output circuitry. The area requirements for the input circuitry and output circuitry are less than the area required by the coils. Therefore, when input and/or output circuitry is fabricated on the same substrate as at least one of the coils, the coil(s) will be determinative of the size of the substrate (die) which is required. Since cost is a direct function of die area requirements, coil size thus strongly influences the cost of manufacturing an isolator. Additionally, many of the expensive semiconductor processing steps used to create the input and/or output circuitry are unnecessary for coil fabrication and are essentially wasted on most of the die area. At the same time, some of the coil fabrication steps, usually performed in “post processing” operations after the circuitry is created, may be deleterious to the circuitry so the circuitry must be protected during coil manufacture. Hence, certain cost savings may result from only forming the input or output circuitry on the same substrate as the coil(s) and greater savings result from fabricating the coil(s) on a substrate of its (their) own, separate from the input and output circuitry; the latter reduces the cost of fabricating the circuitry as well as the cost of fabricating the transformer(s); simpler, more efficient manufacturing processes can be used to make the transformer, and the input and output circuits can be fabricated on dedicated wafers. Further, some of the processing methods which desirably would be used to fabricate the coils could, in fact, be problematic when the coils and circuitry are on the same substrate. Consequently, other, less desirable methods have to be used to fabricate the coils when input and/or output circuitry is made on the same substrate with the coils.
  • [0013]
    The cost savings increase still further for multi-channel isolators.
  • [0014]
    Accordingly, coil-based isolator structures are illustrated wherein coil windings are formed in or on (including above) a substrate which does not include some or all of the driver (i.e., input) or receiver (i.e., output) circuits.
  • [0015]
    This arrangement allows the substrate supporting the coil(s) to be made of an insulating material such as a glass, rather than a semiconductor material. In this way, when the field-receiving element is a coil, forming a transformer with the field-generating coil, improved transformer performance is obtainable. That is, such transformers are well-suited for dual direction, symmetrical drive/receive operation. Coil-substrate capacitance is reduced, there is less substrate loss and other parameters, such as creepage, are improved.
  • [0016]
    In a first aspect, there is provided a signal isolator comprising a first substrate; a first transformer formed on the first substrate; an input circuit operatively connected to drive the transformer in response to a received input signal; an output circuit operatively connected to generate an output signal responsive to a signal from the transformer; and wherein at least one of the input circuit and the output circuit is not formed on the first substrate. The transformer may include a first winding disposed in or on the first substrate and a second winding disposed above the first winding and electrically insulated from the first winding. At least one of the input circuit and the output circuit may be formed in or on a semiconductor substrate which is not the first substrate. In some embodiments, the input circuit is formed in or on a first semiconductor substrate and the output circuit is formed in or on a second semiconductor substrate. And in some embodiments, either the first semiconductor substrate or the second semiconductor substrate is the same as the first substrate. Optionally, there are formed on or in the first substrate one or more elements other than the first transformer, which elements are not part of the input circuit or output circuit. The transformer may comprise a first winding disposed on or in a first surface of the first substrate and a second winding disposed on or in an opposing second surface of the first substrate. As a desirable alternative, the first substrate may be formed of a material resistivity substantially higher than 10 ohm-cm. In some embodiments, an insulation material disposed between windings of the transformer.
  • [0017]
    A transformer as described may include a first, bottom winding and a second, top winding and a layer of dielectric material is disposed on a surface of the first substrate between the substrate and the bottom winding of the transformer. The input circuit may be operatively connected to drive the second winding and the output circuit may be operatively connected to receive a signal from the first winding responsive to the drive from said input circuit. The isolator may further include a second input circuit operatively connected to drive the first winding and a second output circuit operatively connected to receive a signal from the second winding responsive to the drive from the second input circuit. The input circuit may be operatively connected to drive the first winding and the output circuit may be operatively connected to receive a signal from the second winding responsive to the drive from said input circuit.
  • [0018]
    According to another aspect, there is provided a multi-channel isolator in which two or more channels are provided for communicating in opposing directions, comprising a first semiconductor substrate containing input circuitry for channels of first directionality and output circuitry for channels of second, opposing directionality; a second semiconductor substrate containing output circuitry for channels of first directionality and input circuitry for channels of second directionality; and a third substrate containing one or more transformers each with first windings in or on the third substrate and with second windings disposed above the first windings and with interconnections from the first substrate circuitry to the first windings and from the second substrate circuitry to the second windings. To the extent there is no incompatibility, such an isolator may include any of the features discussed above.
  • [0019]
    According to yet another aspect, there is shown a signal isolator comprising a first substrate; a coil formed in or on the first substrate for use in generating a magnetic field; a magnetic field-receiving element formed under or over the coil and spaced therefrom by an insulator; an input circuit operatively connected to drive the coil in response to a received input signal; an output circuit operatively connected to generate an output signal responsive to a signal from the field-receiving element; and wherein neither the input circuit nor the output circuit is formed on the first substrate. Optionally, the field-receiving element may include at least one MR element.
  • [0020]
    Further aspects of the invention include corresponding methods for forming, or assembling, such isolators.
  • [0021]
    The foregoing and other features, advantages and alternative embodiments of the invention, will be more readily understood and become apparent from the detail description which follows, which should be read in conjunction with the accompanying drawings and claims. The detailed description will be understood to be exemplary only and is not intended to be limiting of the invention.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • [0022]
    [0022]FIG. 1 is a schematic circuit diagram for a first exemplary implementation of a non-optical isolator as taught in application Ser. No. 09/838,520.
  • [0023]
    [0023]FIG. 2 is a waveform diagram illustrating operation of the circuit of FIG. 1 as a digital signal isolator.
  • [0024]
    [0024]FIG. 3 is a logic diagram for a driver circuit suitable for use in the digital isolator of FIG. 2.
  • [0025]
    [0025]FIG. 4 is a waveform diagram illustrating operation of the circuit of FIG. 3.
  • [0026]
    [0026]FIGS. 5 and 8 are diagrammatic, exploded views showing conceptually how an isolator as disclosed in application Ser. No. 09/838,520 may be fabricated using integrated circuit manufacturing techniques, with MR elements receiving a magnetic field in FIG. 5, and a magnetic field detected by a second pair of coils in FIG. 8.
  • [0027]
    [0027]FIG. 6 illustrates in a simplified side view, schematically, the layers of materials that form monolithically the elements of such an isolator.
  • [0028]
    [0028]FIG. 7 is a simplified diagrammatic, isometric view, partially in cross section, showing how a complete isolator, with an input driver circuit, may be fabricated monolithically on a single substrate.
  • [0029]
    [0029]FIGS. 9 and 10 are combination block/schematic/diagrammatic illustrations showing an alternative implementation for a coil-coil version of an isolator according to said application.
  • [0030]
    [0030]FIG. 11 is a diagrammatic illustration of a transformer-based (also called “coil-coil”) isolator as taught herein, wherein a single transformer establishes the isolation barrier and the transformer is of a planar type having windings formed on or in a substrate including neither input nor output circuitry.
  • [0031]
    [0031]FIG. 12 is a diagrammatic illustration of another transformer-based isolator as taught herein, wherein a pair of transformers establish the isolation barrier and the transformers are of planar type having windings formed on or in a substrate including neither input nor output circuitry.
  • [0032]
    [0032]FIG. 13 is a diagrammatic illustration of another transformer-isolator similar to that of FIG. 11 except that the primary and secondary windings of the transformer are disposed on opposite surfaces of the substrate.
  • [0033]
    [0033]FIG. 14 is a diagrammatic illustration of yet another transformer-based isolator, similar to that of FIG. 11, wherein the input circuitry is formed on its own substrate which is separate from the substrate carrying the transformer.
  • [0034]
    [0034]FIG. 15 is a diagrammatic illustration of yet another transformer-based isolator, similar to that of FIG. 11, wherein the output circuitry is formed on its own substrate which is separate from the substrate carrying the transformer.
  • [0035]
    [0035]FIG. 16 is a diagrammatic illustration of still another transformer-based isolator wherein the input circuitry and the transformer are formed on the same substrate, but the output circuitry is formed on a separate substrate.
  • [0036]
    [0036]FIG. 17 is a diagrammatic illustration of yet another transformer-based isolator, wherein each of the input circuitry and the output circuitry is formed on its own substrate and, in turn, each of those substrates is separate from the substrate carrying the transformer.
  • [0037]
    [0037]FIG. 18 is a diagrammatic illustration of a bi-directional transformer-based isolator, wherein the transformer is formed on its own substrate.
  • [0038]
    [0038]FIG. 19 is a diagrammatic illustration of a multi-channel transformer-based isolator as taught herein, with the transformer formed on its own substrate.
  • DETAILED DESCRIPTION
  • [0039]
    As this invention improves upon that shown in U.S. patent application Ser. No. 09/838,520, we shall first review appropriate portions of the disclosure from that application. Some of those portions relate to isolators which use elements other than coils to establish the isolation barrier, but they show input and output circuitry and signals usable with transformer-based isolators, as well.
  • [0040]
    An exemplary implementation of an isolator 10 using coil-type field-generating and MR field-sensing (receiving) elements is illustrated schematically in FIG. 1. An input voltage is supplied at port 12 to a magnetic field generator 13, comprising an input driver 14 and one or more coils L1, L2. Driver 14 supplies output signals DRIVE A and DRIVE B on lines 16 and 18, respectively, to respective coils L1 and L2. Each of coils L1 and L2 generates a magnetic field which is sensed by a bridge 20 formed by MR elements 22, 24, 26 and 28. Elements 22 and 24 are connected in series across the supply rails as are elements 26 and 28. The bridge provides a differential output across nodes 32 and 34 at the respective junctions between resistors 22 and 24 on the one hand, and 26 and 28 on the other. Node 32 supplies a first signal RCVDC on line 36 to a non-inverting input of a differential receiver 40 and node 34 supplies a second received signal RCVDD on line 38 to the inverting input of the receiver 40. The output of the isolator appears on line 42 at the output of receiver 40. Since galvanic isolation of the output from the input is a principal objective, the input is referenced to a first ground, GND 1, and the output is referenced to a second ground, GND2. A Faraday shield, connected to ground GND2, is interposed between the coils L1, L2, on the one hand, and bridge 20, on the other. Faraday shield 50 provides electrostatic isolation between the coils and the MR bridge while allowing the magnetic fields generated by the coils to pass through to the MR elements of the bridge. Specifically, the field generated by coil L1 passes through elements 22 and 28 while the field generated by coil L2 passes through the elements 24 and 26.
  • [0041]
    For use as an analog signal isolator, the driver 14 may typically provide signals DRIVEA and DRIVEB as a pair of differential output signals. Some wave-shaping or signal conditioning may be applied in driver 14 or in receiver 40, as appropriate to the applications.
  • [0042]
    For use as a digital signal isolator, operation of isolator 10 circuit may be understood with reference to the waveforms of FIG. 2. In FIG. 2, it is assumed that the input signal is a voltage having a waveform representing a logic signal illustrated at 60. Prior to time T1, signal 60 is low. At time T1, the input goes from a low to a high value and driver 14 presents a pulse 72 of a short, predetermined width and amplitude in the signal DRIVEA. At the falling edge of the input signal, at time T2, a comparable pulse 74 is generated by driver 14 in the signal DRIVEB. The corresponding received signals detected at nodes 32 and 34 are shown in the waveforms for the signals RCVDC and RCVDD. Receiver 40 is a comparator with a slight amount of hysteresis, which essentially operates as a bistable element. The “pulse” 76 generated in the RCVDC signal by DRIVEA pulse 72 sets the output signal high, and the pulse 78 generated in the RCVDD signal generated by the DRIVEB pulse 74 resets the output signal to a low level. Thus, the output signal recreates the input signal faithfully.
  • [0043]
    The amount of hysteresis employed in receiver 40 preferably is selected to assure a high reliability of set and reset operation of the receiver while obtaining as much insensitivity to noise as possible.
  • [0044]
    While numerous circuits may be employed for driver 14 in the digital signal processing mode, an exemplary circuit 14A is shown in FIG. 3. The input signal applied to port 12 is supplied to an odd number of inverters 82-1 through 82-N (three inverters may suffice), as well as to one input of each of NOR-gate 84 and AND gate 86, as well as to pulse generator 88. (Pulse generator 88 is optional and its use is described in the incorporated patent. A second input of each of gates 84 and 86 is supplied from the output of the inverter string 82-1 through 82-N. The output of NOR-gate 84 supplies the DRIVEA signal on line 16 to coil L I and the output of AND GATE 86 supplies the DRIVEB signal on line 18 to coil L2.
  • [0045]
    The operation of the circuit of FIG. 3 is now explained with reference to the waveforms of FIG. 4. The input signal again is assumed to be a logic signal which is high between times T, and T2. The delayed and inverted state of the input signal which appears at node 92, termed D-I INPUT, thus is a copy of the input signal, inverted and delayed by the propagation delay of the inverter chain 82-1 through 82-N, which delay is labeled in the drawing as Δt. It is assumed that Δt is much smaller than the interval from T, through T2. For example, Δt is typically just a few nanoseconds. The output from NOR-gate 84 consequently is high except during interval from T2 to T2+Δt; and the output of the AND gate 86, the DRIVEB signal, is high except in the interval from T1 to T1+Δt.
  • [0046]
    Naturally, when the isolator employs a single transformer with a single winding for the primary, the drive circuitry and signals may have to be different from those shown for the dual-coil primary arrangement. One satisfactory approach may be to apply the DRIVEA and DRIVEB signals, or close counterparts thereof, to the opposite ends of the primary winding. On the secondary side of the transformer, when a single winding is employed, the receiver circuitry must also be adapted to that arrangement. That is, the receiver circuitry must be connected either to each end of the secondary winding or one end of the winding can be grounded and the receiver connected to only one end of the secondary winding.
  • [0047]
    A diagrammatic illustration, as shown in FIG. 5, is useful to illustrate conceptually how such an isolator may be fabricated monolithically, continuing with an embodiment having two coils for field generation and two coils for field sensing (i.e., a pair of transformers). Such fabrication may occur with the driver 14 on a first substrate, SUB 1, and with the coils (L1, L2), Faraday shield 50, MR sensor and receiver 40 on a second substrate, SUB 2, or with the entire apparatus on a single substrate (i.e., where SUB I and SUB 2 are the same substrate), as more fully explained below.
  • [0048]
    Without indicating any patterning, FIG. 6 shows a schematic side view of the layers of materials that form monolithically the coils, Faraday shield, sensor and receiver of FIG. 5. The resistive sensors 110 are formed on or in a semiconductor substrate 112 along with the receiver circuitry indicated generally in area 114. A thin layer of oxide 116 is then formed over the substrate. This is followed by a metallization layer which connects to the substrate (i.e., the input's ground) and which provides the Faraday shield; appropriate positioning and area considerations are discussed below). A thick oxide layer 118 is applied over the metallization. On top of the thick oxide layer 118 there is formed a metallization layer 120 which is patterned to form coil L I and L2 in appropriate geometric relationship and placement over sensor elements 110.
  • [0049]
    Turning to FIG. 7 there is generally illustrated a single substrate embodiment containing the entire isolator. The driver circuitry 14 is electrically isolated from the sensors 20 and receiving circuitry 40 by building the entire isolator structure on an oxide layer formed over the substrate 112 and then surrounding the driver and/or sensors and receiver by one or more dielectric isolation zones, also called trenches, 132 which are filled during fabrication with an oxide or other dielectric material. To avoid obfuscation, the coils are not drawn but are represented operatively by the dashed line M, representing a magnetic linking.
  • [0050]
    Using a trench-isolated IC manufacturing process, approximately one kilovolt of isolation is provided per micrometer of oxide (or nitride or similar dielectric) thickness. With a base oxide layer and trenches three micrometers thick, approximately three kilovolts of isolation will be achieved. This is satisfactory for a large number of typical applications and it can be increased for other applications.
  • [0051]
    A typical opto-isolator draws a steady current of about 3-15 mA for high-speed digital operation, using a supply voltage in the three- to five-volt range. By contrast, the exemplary apparatus of FIG. 2 et seq. draws very little current except during the drive pulses. With a 50 MHz clock speed, and a pulse width, Δt, of one nanosecond, if the current drawn during the pulse is 10 mA, the average current is only 0.5 mA. At low clock speeds or data rates such as a 50 Hz rate as might be used in medical electronics, for example, the drive pulses consume an average current of only about 0.5 microamps. Even considering the current required for operating the receiver and quiescent driver circuits, the entire apparatus may be operated on only about 10-12 microamps. Additionally, magnetoresistive elements are very fast to respond to changes in magnetic field, reacting in the nanosecond domain. As a result, such an isolator should be much faster (e.g., ten times faster) than an opto-isolator.
  • [0052]
    For GMR elements, the change in resistance over the range of magnetic field from a zero field to a saturation field is only about 1-4 percent. When a five-volt power supply is used, this means the GMR elements produce only about a 50-200 millivolt signal swing. The capacitive coupling between the coils and the GMR elements may be about .1-1 pF without the Faraday shield. If a transient common mode voltage is imposed on driver 14, it is capacitively coupled from the output of drive 14 into Faraday shield 50, and the capacitive current is coupled to ground.
  • [0053]
    Numerous design considerations must be taken into account when assembling such an isolator, in addition to those already discussed. These are easily within the skill of circuit design and semiconductor engineers. For example, the MR elements must be placed relative to the magnetic field provided by the coils so as, preferably, to have the magnetic field direction coincide substantially with the sensors' lengthwise, most-sensitive, direction. The MR elements will thus generate the greatest output for a given magnetic field if they (the MR elements) are all similarly oriented relative to the magnetic field.
  • [0054]
    [0054]FIG. 8 shows an isolator that is similar in certain fabrication aspects to the isolator shown in FIG. 5, except that in FIG. 8, the GMR receiving elements have been replaced by a second set of (output or secondary) coils (140 and 142), to provide magnetic (i.e., inductive) coupling from input coils L1, L2 to output coils 140, 142; that is, to form two transformers. The top (input, or primary) coils can be separated from the respective bottom (output, or secondary) coils with dielectric layers of appropriate composition and thickness, and by a Faraday shield 50″.
  • [0055]
    The driver and receiver circuitry which is used should be selected with the application for the isolator and with the characteristics of the selected passive components (e.g., coils, GMR elements, etc.) in mind.
  • [0056]
    Referring to FIGS. 9 and 10, there is shown a block diagram/diagrammatic illustration for an exemplary coil-coil isolator. A driver circuit 172 on a first substrate 174 receives a logic signal input on pad 176 (referenced to an input ground pad 178). In the driver circuit, the input signal drives a Schmidt trigger 182 which, in turn, drives the enable inputs of a first pulse generator 184 and a second pulse generator 186, the former via an inverter 188. Information is coupled from the input side of the isolation barrier to the output side of the isolation barrier in the form of SET and RESET pulses to a differential receiver with hysteresis (not shown) connected to receive the outputs of coil windings 192, 194, which form the secondary windings of a transformer. The pulse generators 184, 186 drive (via wires 196-198) coils 202, 204, respectively, which form the primary windings of two transformers. Coils 202, 204, 192, 194 are formed on (which could include in) a second substrate 206 (which is electrically isolated from the first substrate). Between coils 202, 204 on one hand and coils 192, 194 on the other hand is formed an isolation layer 208 of a dielectric material. Preferably, a Faraday shield 210 also is formed between the primary and secondary windings, with the Faraday shield being connected to a ground 211 which is galvanically isolated from the input ground 178 and which is the reference ground for the output circuits (not shown) driven by coils 192, 194. As shown in FIG. 8, the Faraday shield may be formed over windings 192, 194; the isolation layer 208 (not shown) is formed over the coils 192, 194; and the coils 202, 204 are formed over the isolation layer.
  • [0057]
    Switches 212 and 214 effectively short out their respective windings when not transmitting data. An external electromagnetic field would try to couple inductively into the secondary windings but the primary windings appear shorted and thus prevent voltage from being induced in the respective secondary windings. This provides immunity to electromagnetic interference.
  • [0058]
    The pulse generators create pulses in response to the rising edge or falling edge of the input signal. On the driver side, a watchdog circuit (not shown) preferably monitors the edge activity of the input. If no edges are received for more than one or two microseconds, then a pulse is sent anyway, representing the logical level of the input. The circuitry may be designed such that those pulses do not collide with edge-generated pulses and so that edge-generated pulses take precedence.
  • [0059]
    An exemplary receiver circuit 220 is shown in FIG. 10. The receiver includes circuits 222 and 224 that monitor the pulses received from the transformers' secondaries. If pulses are not received from either one for more than four or five micro-seconds, then through logic 225 the FAULT output is pulled low, the output driver 227 (which buffers a differential comparator 229) goes in to a tri-state (high impedance) condition, and the output is pulled high resistively via a switch 226. If pulses are received simultaneously from both secondary windings, the assumption is that they are due to common mode noise pickup and they may be ignored.
  • [0060]
    To reduce the size of the coils needed, instead of a single pulse there may be transmitted a burst of several (e.g., three to five) cycles of a high frequency (e.g., 1.1 GHz) carrier. In this case, the receiver circuits 222 and 224 may rectify the bursts and present that information to a differential comparator. As another alternative, a continuous carrier may be transmitted via one of the transformers.
  • [0061]
    [0061]FIG. 11 shows a first exemplary embodiment of a resulting isolator 240 in which isolation is provided by a single transformer 242 formed on or in a substrate 244 and wherein an appropriate input circuit 245 and output circuit 246 are not formed on substrate 244. The input circuit 245 formats the input signal Vin into a format suitable for driving the primary winding of transformer 242, while the output circuit 246 formats the output from the transformer secondary winding into an output signal Vout. Optionally, devices (not shown) additional to transformer 242 may be formed on substrate 244, though it is preferable that these devices not be part of the input or output circuitry. Each of the input and output circuits may be formed on their own respective substrates such as the substrates 252 and 254 illustrated, respectively, in FIGS. 14-17.
  • [0062]
    Isolation between the input circuit and output circuit may be provided by a single transformer 242 as in FIG. 11 or via multiple transformers such as the pair of transformers 202, 192 and 204, 194 of FIG. 9 or 262, 264 shown in FIG. 12. In the case of an isolator according to FIG. 12, the input and output circuits may, for example, be as illustrated in FIGS. 9 and 10, or as otherwise desired as a matter of design choice. FIGS. 11 and 12 may accept and provide either analog or digital signals, depending upon the specifics of the input and output circuits that are employed.
  • [0063]
    Turning to FIG. 13, there is shown a variation on the single coil isolator of FIG. 11, wherein the primary coil winding 242P is formed on a first side of substrate 244 and a secondary coil winding 242S is formed on another (e.g., bottom) surface of the substrate. Note that the substrate for the isolation coil windings need not be a semiconductor substrate. The substrate itself and insulation material between the coil windings (not shown in some Figs.) may be formed from a variety of suitable materials including, but not limited to, polyamides, benzocyclobutenes, Hardbake, DNQ-Novolac photoresist, and SU-8 photoresists. Exemplary materials for the transformer coils include, among others, gold, copper, aluminum, silver and alloys which include at least one of the foregoing elements. Coil windings may be formed in a variety of ways, such as by using deposition techniques or etching processes. Typically, coils driven by single pulses may occupy from about 70,000 to about 100,000 square microns while coils driven by bursts may occupy only about 30,000 to 50,000 square microns under similar conditions. The spacing separating the coils may be held to less than about 200 microns with the above-listed or comparable insulation materials and withstand a potential of up to about 10,000 volts between the primary and secondary windings.
  • [0064]
    Use of a non-semiconductor substrate avoids a variety of complications that arise from using a semiconductor substrate for the coils. Among the complications, a large potential of a first polarity on a coil may cause a current between the coil and the substrate, while a potential of opposite polarity may cause a large capacitance between the coil and substrate.
  • [0065]
    In FIGS. 11-13, the input and output circuits are shown but not any specific packaging of them. FIG. 14 illustrates an implementation of the isolator of FIG. 11 wherein the input circuit is embodied in a second substrate 254, which is typically a semiconductor substrate and the packaging of the output circuit is still unspecified.
  • [0066]
    [0066]FIG. 15 correspondingly depicts and implementation of the isolator of FIG. 11 wherein the output circuit is embodied on a separate substrate 254, which also typically would be a semiconductor substrate.
  • [0067]
    Alternatively, as shown in FIG. 16, the input circuitry or a portion thereof may be formed within the same substrate 244 as the transformer 242. Of course, this probably is not as cost-effective as the implementations wherein the coils are on their own substrate.
  • [0068]
    In other variations, both the input circuit and the output circuit could be on separate and independent substrates 252 and 254 as shown in FIG. 17. The same approaches may be used to fabricate/assemble bi-directional and multi-channel isolators. A block diagram for a bi-directional isolator as taught herein appears in FIG. 11. As shown there, a first circuit 262 is connected through a bi-directional lead or link to a first coil 266 on a substrate 244 and a second coil 268 which is inductively coupled to the first coil is operably connected bi-directionally to a second circuit 264. Each of the first circuit and second circuit may perform the functions of both input circuit and output circuit. That is, the first circuit may format a first input signal from line 272 into a format suitable for, and delivered to, the first winding 266 of the transformer (formed by coils 266 and 268), generating a corresponding signal in the second winding 268 which is coupled to the second circuit 264 that, in turn, provides a corresponding output on line 274. Alternatively, the input signal may be supplied to second circuit 264 on line 276 and an output is supplied by first circuit 262 on line 278. The input and output signals may be analog or digital, upon selection of suitable input and output circuits.
  • [0069]
    In bi-directional use of an isolation transformer having stacked windings, in one direction the top coil is the input (or primary) winding and the bottom coil is the output (or secondary) winding, while in the other direction the roles of the coils are reversed. That is, in the first situation the signal is driven from top to bottom and in the other situation the signal is driven from bottom to top. That is problematic when the bottom coil is closer to the substrate than the top coil, as that configuration makes it more difficult to transmit the field from the bottom coil than from the top coil. With a silicon substrate, substrate conductivity causes the capacitance to ground of the bottom coil to be much higher than that for the top coil. This increased capacitance causes multiple problems for the drive function. For example, it can cause oscillations and lead to an increase in power consumption, pulse width distortion and a degradation in the maximum data rate for which the isolator is usable. Addressing this capacitance problem calls for reducing the capacitance by modifying the substrate, the coil configurations, or both. For example, the silicon substrate (having a resistivity typically of about 10 ohm-cm) may be replaced with a substrate of higher resistivity, such as a glass. Such a substrate acts more like an insulator and reduces the capacitance between each winding and ground. The capacitance between the bottom coil and the substrate also can be decreased by using a thicker dielectric (or one of lower dielectric constant) between the substrate and the bottom coil.
  • [0070]
    The ability to transmit from bottom coil to top coil as well as from top coil to bottom coil lowers unit cost for isolators by permitting a single transformer to provide a duplex path, and may reduce development time, also. Additionally, for isolators providing bi-directional communication, the ability to transmit from both bottom coil to top coil and vice versa is required for a three-chip arrangement having coils on a stand-alone substrate unless the size is not a consideration. This is a result of the fact that if the input signals from both directions both have to be fed to the top coils, there will not be effective isolation between them. Using one or both of a higher (than silicon) resistivity substrate and a thick dielectric between the substrate and the bottom coil alleviates some performance difficulties and simplifies duplex (i.e., bi-directional) use.
  • [0071]
    Using current processing technologies and their costs, we have estimated, for comparison purposes, cost data for typical two- and three-chip implementations of a two-channel coil-coil isolator with bi-directional communication. These cost estimates, while excluding yield implications and based on fictitious cost data, nevertheless serve to illustrate the benefits of the concepts introduced here. Assembly cost for a two-chip configuration with only top-to-bottom transmission through the transformers was computed at about $0.37.
  • [0072]
    Assembly cost for a two-chip configuration with bi-directional communication (top-to-bottom and bottom-to-top) through the transformers) reduced the computed cost to $0.31. With a three-chip configuration employing bi-directional communication, the computed cost fell to $0.27. Table I, below, provides greater detail about the calculations.
    TABLE I
    Assumptions (Two Channels in Opposing Directions)
    Semiconductor Wafer $1,000
    Cost
    Post-Processing Wafer $1,000
    Cost
    Contents Die/Wafer $/Die
    Embodiment A 2-Chip Approach with only top-to-bottom
    communication
    Chip #1 1 Driver + 1 Receiver + 2 16,000 $0.13
    transformers
    Chip #2 1 Driver + 1 Receiver + 2 16,000 $0.13
    transformers
    Chip #3 $0.12
    Packaging Cost
    Total Assembly Cost $0.37
    Embodiment B 2-Chip Approach with top-to-bottom and bottom-to-top
    communication
    Chip #1 1 Driver + 1 Receiver 50,000 $0.02
    Chip #2 1 Driver + 1 Receiver + 4 12,000 $0.17
    transformers
    Chip #3 $0.12
    Packaging Cost
    Total Assembly Cost $0.31
    Embodiment C 3-Chip Approach
    Chip #1 1 Driver + 1 Receiver 50,000 $0.02
    Chip #2 4 transformers 13,000 $0.08
    Chip #3 1 Driver + 1 Receiver 50,000 $0.02
    Packaging Cost $0.15
    Total Assembly Cost $0.27
  • [0073]
    The isolators of FIGS. 11-18 may be used in appropriate combinations, in addition to singly. When packaged in combination, they can form multi-channel isolators. The transformers for individual isolators may be formed on a common substrate and input and output circuitry may correspondingly be formed on and share one or two other substrates. Or in a variation, indeed, input circuitry for one isolator may be formed on the same substrate as output circuitry for another isolator. As well, bi-directional input/output circuitry may be formed on the same substrate as input or output circuitry of another isolator or on the substrate on which the coil windings are formed. Another use of the current teachings is to form a multi-channel isolator in which a single isolation transformer may be used to process signals for multiple channels for still greater cost efficiencies. FIG. 19 shows just one possible implementation of such a multi-channel isolator. In addition to the components shown in FIG. 11, a parallel-to-serial converter 282 is coupled between multiple input signal lines 284 and a single input line 286 to input circuit 288. The output circuit 292 supplies an output signal to a corresponding serial-to-parallel converter 294 which supply outputs on several lines 296.
  • [0074]
    The various designs and configurations discussed herein, and their variations, lend themselves to chip-scale products. That is, to packaging in integrated circuit-size packages. This is a direct result of the coil-on-substrate architecture. Low cost, small size and very good performance characteristics are achieved.
  • [0075]
    As used herein, unless context requires otherwise, such as in the preceding paragraph and claims, when a coil is said to be formed “on” a substrate, “on” should be understood to include “in” or partially in the substrate.
  • [0076]
    Having thus described the invention and various illustrative embodiments of the invention, some of its advantages and optional features, it will be apparent that such embodiments are presented by way of example only and not by way of limitation. Those persons skilled in the art will readily devise alterations and improvements on these embodiments, as well as additional embodiments, without departing from the spirit and scope of the invention. For example, it will be appreciated that although the MR sensor is shown as a bridge circuit in the illustrated embodiments, a single MR element or two MR elements might be employed, instead, and four elements might be arranged in a manner other than as a bridge. Likewise, though two coils are shown as the magnetic field generation members, one might choose to use just one coil, or some other number than two, with appropriate driver circuitry. The driver circuit is not needed in all cases, as the input signal source may be able to drive the coils directly. Alternatively, some other magnetic-field generating apparatus may be employed. Though several embodiments are shown in which the field-receiving elements are coils, it deserves repeating that they could also be MR or GMR elements. Also, the roles of the coils in the all-coil embodiments may be reversed, with the “lower” coils being driven by the input driver circuits and the “upper” coils being the receiving coils on the output side of the isolation barrier and supplying the output signals. It is impossible to enumerate all of the variations that will quite quickly occur to those in the art. Accordingly, the invention is limited only as defined in the following claims and equivalents thereto.

Claims (47)

    What is claimed is:
  1. 1. A signal isolator comprising:
    a first substrate;
    a first transformer formed on the first substrate;
    an input circuit operatively connected to drive the transformer in response to a received input signal;
    an output circuit operatively connected to generate an output signal responsive to a signal from the transformer; and
    wherein at least one of the input circuit and the output circuit is not formed on the first substrate.
  2. 2. The signal isolator of claim 1 wherein the transformer includes a first winding disposed in or on the first substrate and a second winding disposed above the first winding and electrically insulated from the first winding.
  3. 3. The signal isolator of claim 1 wherein at least one of the input circuit and the output circuit is formed in or on a semiconductor substrate which is not the first substrate.
  4. 4. The signal isolator of claim 3 wherein the input circuit is formed in or on a first semiconductor substrate and the output circuit is formed in or on a second semiconductor substrate.
  5. 5. The signal isolator of claim 4 wherein either the first semiconductor substrate or the second semiconductor substrate is the same as the first substrate.
  6. 6. The signal isolator of any of claims 1, 3 or 4 wherein there are formed on or in the first substrate one or more elements other than the first transformer, which elements are not part of the input circuit or output circuit.
  7. 7. The signal isolator of claim 1 wherein the transformer comprises a first winding disposed on or in a first surface of the first substrate and a second winding disposed on or in an opposing second surface of the first substrate.
  8. 8. The signal isolator of any of claims 1, 2, 4, 5 and 7 further including a Faraday shield disposed between the windings of the transformer.
  9. 9. The signal isolator of any of claims 1, 2, 4, 5 and 7 wherein the first substrate is formed of a material having a resistivity substantially higher than 10 ohm-cm.
  10. 10. The isolator of any of claims 1-5 further including an insulation material disposed between windings of the transformer
  11. 11. The isolator of claim 10 wherein the transformer includes a first, bottom winding and a second, top winding and a layer of dielectric material is disposed on a surface of the first substrate between the substrate and the bottom winding of the transformer.
  12. 12. The isolator of claim 11 wherein said input circuit is operatively connected to drive the second winding and said output circuit is operatively connected to receive a signal from the first winding responsive to the drive from said input circuit.
  13. 13. The isolator of claim 12 further including a second input circuit operatively connected to drive the first winding and a second output circuit operatively connected to receive a signal from the second winding responsive to the drive from the second input circuit.
  14. 14. The isolator of claim 11 wherein said input circuit is operatively connected to drive the first winding and said output circuit is operatively connected to receive a signal from the second winding responsive to the drive from said input circuit.
  15. 15. A multi-channel isolator in which two or more channels are provided for communicating in opposing directions, comprising:
    a first semiconductor substrate containing input circuitry for channels of first directionality and output circuitry for channels of second, opposing directionality;
    a second semiconductor substrate containing output circuitry for channels of first directionality and input circuitry for channels of second directionality; and
    a third substrate containing one or more transformers each with first windings in or on the third substrate and with second windings disposed above the first windings and with interconnections from the first substrate circuitry to the first windings and from the second substrate circuitry to the second windings.
  16. 16. A signal isolator comprising:
    a first substrate;
    a coil formed in or on the first substrate for use in generating a magnetic field;
    a magnetic field-receiving element formed under or over the coil and spaced therefrom by an insulator;
    an input circuit operatively connected to drive the coil in response to a received input signal;
    an output circuit operatively connected to generate an output signal responsive to a signal from the field-receiving element; and
    wherein neither the input circuit nor the output circuit is formed on the first substrate.
  17. 17. The signal isolator of claim 16 wherein the field-receiving element includes at least one MR element.
  18. 18. A method of providing signal isolation comprising:
    providing a first substrate;
    forming a first transformer on the first substrate;
    operatively connecting to a first winding of the transformer an input circuit to drive the transformer in response to a received input signal; and
    operatively connecting an output circuit to a second winding of the transformer to generate an output signal responsive to a signal from the transformer;
    without forming at least one of the input circuit and the output circuit on the first substrate.
  19. 19. The method of claim 18 wherein the act of forming the transformer includes forming the transformer with a first winding disposed in or on the first substrate and a second winding disposed above the first winding and electrically insulated from the first winding.
  20. 20. The method of claim 18 further including:
    forming at least one of the input circuit and the output circuit in or on a semiconductor substrate which is not the first substrate.
  21. 21. The method of claim 20 wherein the input circuit is formed in or on a first semiconductor substrate and the output circuit is formed in or on a second semiconductor substrate.
  22. 22. The method of claim 21 wherein either the first semiconductor substrate or the second semiconductor substrate is the same as the first substrate.
  23. 23. The method of any of claims 18, 20 or 21 further including forming on or in the first substrate one or more elements other than the first transformer, which elements are not part of the input circuit or output circuit.
  24. 24. The method of claim 18 wherein forming the transformer includes forming a first winding disposed on or in a first surface of the first substrate and a second winding disposed on or in an opposing second surface of the first substrate.
  25. 25. The method of any of claims 18, 19, 21, 22 and 24 further including providing a Faraday shield disposed between the windings of the transformer.
  26. 26. The method of any of claims 18, 19, 21, 22 and 24 further including forming the first substrate of a material having a resistivity substantially higher than 10 ohm-cm.
  27. 27. The method of any of claims 18-22 further including disposing an insulation material between windings of the transformer
  28. 28. The method of claim 27 wherein the transformer includes a first, bottom winding and a second, top winding and said method further includes disposing a layer of dielectric material on a surface of the first substrate between the substrate and the bottom winding of the transformer.
  29. 29. The method of claim 28 including operatively connecting said input circuit to drive the second winding and operatively connecting said output circuit to receive a signal from the first winding responsive to the drive from said input circuit.
  30. 30. The method of claim 29 further including operatively connecting a second input circuit to drive the first winding and a second output circuit to receive a signal from the second winding responsive to the drive from the second input circuit.
  31. 31. The method of claim 28 further including operatively connecting said input circuit to drive the first winding and said output circuit to receive a signal from the second winding responsive to the drive from said input circuit.
  32. 32. A method for forming a multi-channel isolator in which two or more channels are provided for communicating in opposing directions, comprising:
    forming on a first semiconductor substrate input circuitry for channels of first directionality and output circuitry for channels of second, opposing directionality;
    forming on a second semiconductor substrate output circuitry for channels of first directionality and input circuitry for channels of second directionality;
    forming on a third substrate one or more transformers each with a first winding in or on the third substrate and with a second winding disposed above said transformer's first winding; and
    interconnecting the first substrate circuitry to the first windings and the second substrate circuitry to the second windings.
  33. 33. A method for forming a signal isolator comprising:
    providing a first substrate;
    forming a coil in or on the first substrate for use in generating a magnetic field;
    forming a magnetic field-receiving element under or over the coil and spaced therefrom by an insulator;
    operatively connecting an input circuit to drive the coil in response-to a received input signal; and
    operatively connecting an output circuit to generate an output signal responsive to a signal from the field-receiving element;
    wherein neither the input circuit nor the output circuit is formed on the first substrate.
  34. 34. The method of claim 33 wherein the field-receiving element includes at least one MR element.
  35. 35. A signal isolator comprising:
    a first substrate;
    a single transformer formed on the first substrate;
    an input circuit operatively connected to drive the transformer in response to a received input signal;
    an output circuit operatively connected to generate an output signal responsive to a signal from the transformer; and
    wherein at least one of the input circuit and the output circuit is not formed on the first substrate.
  36. 36. The signal isolator of claim 35 wherein the transformer includes a first winding disposed in or on the first substrate and a second winding disposed above the first winding and electrically insulated from the first winding.
  37. 37. The signal isolator of claim 35 wherein at least one of the input circuit and the output circuit is formed in or on a semiconductor substrate which is not the first substrate.
  38. 38. The signal isolator of claim 37 wherein the input circuit is formed in or on a first semiconductor substrate and the output circuit is formed in or on a second semiconductor substrate.
  39. 39. The signal isolator of claim 38 wherein either the first semiconductor substrate or the second semiconductor substrate is the same as the first substrate.
  40. 40. The signal isolator of claim 35 wherein the transformer comprises a first winding disposed on or in a first surface of the first substrate and a second winding disposed on or in an opposing second surface of the first substrate.
  41. 41. The signal isolator of any of claims 35-40 wherein the first substrate is formed of a material having a resistivity substantially higher than 10 ohm-cm.
  42. 42. The isolator of any of claims 35-40 further including an insulation material disposed between windings of the transformer.
  43. 43. The signal isolator of claim 42 wherein the first substrate is formed of a material having a resistivity substantially higher than 10 ohm-cm.
  44. 44. The isolator of any of claims 35-40 wherein the transformer includes a first, bottom winding and a second, top winding and a layer of dielectric material is disposed on a surface of the first substrate between the substrate and the bottom winding of the transformer.
  45. 45. The isolator of claim 44 wherein said input circuit is operatively connected to drive the second winding and said output circuit is operatively connected to receive a signal from the first winding responsive to the drive from said input circuit.
  46. 46. The isolator of claim 45 further including a second input circuit operatively connected to drive the first winding and a second output circuit operatively connected to receive a signal from the second winding responsive to the drive from the second input circuit.
  47. 47. The isolator of claim 44 wherein said input circuit is operatively connected to drive the first winding and said output circuit is operatively connected to receive a signal from the second winding responsive to the drive from said input circuit.
US10214883 1997-10-23 2002-08-08 Chip-scale coils and isolators based thereon Abandoned US20030042571A1 (en)

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US6322197 true 1997-10-23 1997-10-23
US09118032 US6054780A (en) 1997-10-23 1998-07-17 Magnetically coupled signal isolator using a Faraday shielded MR or GMR receiving element
US09557542 US6291907B1 (en) 1997-10-23 2000-04-25 Magnetically coupled signal isolator using a faraday shielded MR or GMR receiving element
US09838520 US6873065B2 (en) 1997-10-23 2001-04-19 Non-optical signal isolator
US10214883 US20030042571A1 (en) 1997-10-23 2002-08-08 Chip-scale coils and isolators based thereon

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US10214883 US20030042571A1 (en) 1997-10-23 2002-08-08 Chip-scale coils and isolators based thereon
EP20030254772 EP1388988B1 (en) 2002-08-08 2003-07-31 Chip-scale coils and isolators based thereon
US11704459 US7545059B2 (en) 1997-10-23 2007-02-09 Chip-scale coils and isolators based thereon

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EP1388988A3 (en) 2006-03-22 application
US20080030080A1 (en) 2008-02-07 application

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