US20020000649A1 - Method of fabrication of a microstructure having an internal cavity - Google Patents

Method of fabrication of a microstructure having an internal cavity Download PDF

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US20020000649A1
US20020000649A1 US09924229 US92422901A US2002000649A1 US 20020000649 A1 US20020000649 A1 US 20020000649A1 US 09924229 US09924229 US 09924229 US 92422901 A US92422901 A US 92422901A US 2002000649 A1 US2002000649 A1 US 2002000649A1
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layer
chip
cavity
substrate
solder
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Hendrikus Tilmans
Eric Beyne
Myriam Van de Peer
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Tilmans Hendrikus A.C.
Eric Beyne
Van De Peer Myriam
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261Processes for packaging MEMS devices
    • B81C1/00277Processes for packaging MEMS devices for maintaining a controlled atmosphere inside of the cavity containing the MEMS
    • B81C1/00293Processes for packaging MEMS devices for maintaining a controlled atmosphere inside of the cavity containing the MEMS maintaining a controlled atmosphere with processes not provided for in B81C1/00285
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032Packages or encapsulation
    • B81B7/0077Other packages not provided for in groups B81B7/0035 - B81B7/0074
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01LMEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L9/00Measuring steady or quasi-steady pressure of a fluid or a fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material by electric or magnetic means
    • G01L9/0041Transmitting or indicating the displacement of flexible diaphragms
    • G01L9/0042Constructional details associated with semiconductive diaphragm sensors, e.g. etching, or constructional details of non-semiconductive diaphragms
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01LMEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L9/00Measuring steady or quasi-steady pressure of a fluid or a fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material by electric or magnetic means
    • G01L9/0041Transmitting or indicating the displacement of flexible diaphragms
    • G01L9/0072Transmitting or indicating the displacement of flexible diaphragms using variations in capacitance
    • G01L9/0073Transmitting or indicating the displacement of flexible diaphragms using variations in capacitance using a semiconductive diaphragm
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01PMEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G01P15/02Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
    • G01P15/08Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
    • G01P15/0802Details
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01PMEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G01P15/02Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
    • G01P15/08Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
    • G01P15/125Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values by capacitive pick-up
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H1/00Contacts
    • H01H1/0036Switches making use of microelectromechanical systems [MEMS]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/10Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/10Mounting in enclosures
    • H03H9/1057Mounting in enclosures for microelectro-mechanical devices
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01JMEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRA-RED, VISIBLE OR ULTRA-VIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00Radiation pyrometry
    • G01J5/02Details
    • G01J5/04Casings Mountings
    • G01J5/041Mountings in enclosures or in a particular environment
    • G01J5/045Sealings; Vacuum enclosures; Encapsulated packages; Wafer bonding structures; Getter arrangements
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H35/00Switches operated by change of a physical condition
    • H01H35/14Switches operated by change of acceleration, e.g. by shock or vibration, inertia switch
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01025Manganese [Mn]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01077Iridium [Ir]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01327Intermediate phases, i.e. intermetallics compounds

Abstract

The present invention relates to a method of fabricating a microstructure having an inside cavity comprising the steps of:
depositing a first layer or a first stack of layers in a substantially closed geometric configuration on a first substrate;
performing an indent on the first layer or on the top layer of said first stack of layers;
depositing a second layer or a second stack of layers substantially with said substantially closed geometric configuration on a second substrate;
aligning and bonding said first substrate on said second substrate such that a microstructure having a cavity is formed according to said closed geometry configuration.

Description

    FIELD OF THE INVENTION
  • The present invention is related to a microstructure product and a method of fabricating of a microstructure having an internal and preferably sealed cavity. [0001]
  • The present invention is also related to specific applications of this method of fabricating of a microstructure. [0002]
  • BACKGROUND
  • Microstructures having an internal cavity can be formed by making an assembly of two chips or two wafers or a chip-on-wafer with a spacer in-between. Such structures should have hermetically sealed cavities filled with a controlled ambient (gas composition and/or pressure). [0003]
  • These structures can be used for many different applications such as microaccelerometers, microgyroscopes, microtubes, vibration microsensors, micromirrors, micromechanical resonators or “resonant strain gauges”, micromechanical filters, microswitches and microrelays. [0004]
  • Traditionally, for these applications, the ambient of the cavity is defined during the assembly of the several components by anodic, fusion or eutectic wafer bonding, wafer bonding using low temperature glasses or polymers as the brazing material and reactive sealing techniques. [0005]
  • A common drawback of these techniques is that they are rather limited in applicability, since device separation is difficult (the device has been made on one of the two wafers). It is also difficult to create electrical contacts. The drawbacks of three of the most common techniques are discussed herebelow. [0006]
  • The technique of diffusion bonding of a Si cap wafer on the device wafer requires flat Si surfaces and a high temperature process. [0007]
  • Wafer bonding techniques such as anodic bonding and silicon fusion bonding require a very clean environment, i.e., low particle contamination. There are applications that are not compatible with these boundary conditions of temperature and flatness. Furthermore, the technique of anodic bounding also requires flat surfaces and needs the application of a high voltage in order to achieve the bonding. [0008]
  • Finally, the technique of gluing does not provide a real hermetic bond. [0009]
  • U.S. Pat. No. 5,296,408 describes a fabrication method of making a microstructure having a vacuum sealed cavity therein, including the process steps of forming an aluminum filled cavity in a body of silicon material and heating the structure such that the aluminum is absorbed into the silicon material leaving a vacuum in the cavity. In one embodiment, a cavity is etched into a silicon wafer and filled with aluminum. A silicon dioxide layer is formed over the aluminum filled cavity and the structure is heated to produce the vacuum cavity. [0010]
  • The document “[0011] Fluxless flip-chip technology” by Patrice Caillat and Gérard Nicolas of LETI, published at the First International Flip-Chip Symposium, San Jose, Calif., February 1994 describes a flip-chip assembly of two chips with a solder sealing ring defining a cavity during the assembly itself. The assembly and the subsequent sealing are normally done in air or under an N2 purge. Similar conditions may exists for the other wafer bonding techniques as mentioned hereabove (except for the technique of reactive sealing).
  • ADVANTAGES OF THE PRESENT INVENTION
  • The present invention is directed to a microstructure product and a method of fabricating a microstructure having an internal cavity. Preferably, the covity is sealed with a controlled ambient allowing a free choice of the sealing gas composition and the sealing pressure or vacuum. [0012]
  • The method preferably does not require special equipment to perform the fabrication of such microstructures in a vacuum or controlled inert gas ambient. [0013]
  • The method is suited for micro-electromechanical systems (MEMS) packaging wherein all the process steps are compatible with packaging equipment. [0014]
  • SUMMARY OF THE PRESENT INVENTION
  • The present invention is related to a method of fabricating a microstructure having an inside cavity, comprising: [0015]
  • making a first layer or a first stack of layers in a substantially closed geometric configuration on a first substrate; [0016]
  • creating an indent on the first layer or on the top layer of said first stack of layers; [0017]
  • making a second layer or a second stack of layers substantially with said substantially closed geometric configuration on a second substrate; [0018]
  • aligning and bonding said first substrate to said second substrate such that a microstructure having an inside cavity is formed according to said closed geometry configuration. [0019]
  • The indent preferably is formed with a groove made in one of the a layers such that when the two substrates are secured together, a connection, preferably a contacting channel, between the inside cavity of a microstructure and the outside ambient is created. [0020]
  • Such an indent can be made using a variety of different techniques including lithographic and/or chemical techniques or mechanical techniques removing a part of the first layer using a tool such as a shearing tool or cutting tool by applying a force using an indent tool on the first layer or by other steps. [0021]
  • As used herein, the term “making a layer on a substrate” means any type of method of providing a layer as the substrate including depositing or growing a layer on the substrate. [0022]
  • After the two substrates are secured together the indent is closed by reflowing the first layer at a reflow temperature. The reflow temperature is preferably at a temperature at which said first layer, or at least the top layer of the first stack of layers, is fusible but not the substrate and/or the other materials thereon. The reflow temperature can be lower than the melting temperature of the first layer or of one of the layers (the top layer) of the first stack of layers, the temperature being just high enough to achieve the closing of the indent and/or the corresponding fusion of the two substrates. The reflow temperature can also be equal to or above said melting temperature. Thus the reflow temperature is the temperature at which the first layer or the top layer of the first stack of layers has sufficient plasticivity to reflow for closing the indent and achieving at the same time the fusion of the two substrates. [0023]
  • The inside cavity can contain any kind of device with a predetermined vacuum or inert gas (N[0024] 2, He, Ar, Xe, . . . ) atmosphere or any other kind of gaseous atmosphere.
  • One of the embodiments of the present invention makes use of a solder sealing ring that can be combined with standard solder bumps for electrical contact. [0025]
  • Advantages of the technique of the present invention include flexible packaging of devices. A good electrical contact between device and package is also made possible, the second or the first substrate can be a more complex device by itself, a hermetic cavity sealing can be achieved and the technique can be executed to a large extent at wafer-level. [0026]
  • It is a further advantage of bonding techniques based on a solder bond, that are less susceptible to particles. Furthermore, flip-chip solder bonds also have the interesting property of self-alignment (within certain limits) and display a good control, predictability and reproducibility of the solder height and thus the cavity height. Furthermore, a solder bond leads to a metallic seal, which is known to provide the best hermeticity possible. Also, the metallic seal can be used as an electrical feedthrough from one chip (e.g. the bottom chip) to the other (e.g. the top chip of the stack). [0027]
  • Further characteristics or advantages will be found in the following description of several preferred embodiments of the present invention.[0028]
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIGS. [0029] 1 to 6 represent the several steps of a preferred embodiment of the method of fabrication of a microstructure having a sealed cavity according to the present invention.
  • FIGS. 7 and 8 represent the two last steps of a second preferred embodiment of fabrication of a microstructure having a sealed cavity according to the present invention. [0030]
  • FIGS. [0031] 9 to 11 respectively represent in detail three alternative embodiments of methods of creating the indent in the fabrication of a microstructure having a sealed cavity according to the present invention.
  • FIGS. [0032] 12 to 15 respectively represent several examples of applications of microstructures fabricated according to the method of the present invention.
  • FIG. 16 represents a schematic cross section of a micro-relay in a package made in accordance with the principles of the present invention. [0033]
  • FIG. 17 represents the process-flow in order to fabricate the electromagnet chip which is the bottom chip of FIG. 16. starting from a FeSi substrate. [0034]
  • FIG. 18 represents the process-flow of the fabrication of the armature chip which is the upper chip of FIG. 16 starting from a silicon substrate. [0035]
  • DETAILED DESCRIPTION OF THE DRAWINGS
  • The present invention will be described more in detail hereunder referring to specific embodiments which are more precisely described in the drawings. [0036]
  • The method of fabrication of a microstructure having a sealed cavity, according to the present invention can be referred to as the indent-reflow-sealing (IRS) technique, which is based on a flip-chip technique using a fluxless soldering process, and which allows one to make hermetically sealed cavities with a controlled ambient (gas(es) and pressure) preferably at low temperature (typically of the order of 300° C.). [0037]
  • By controlled ambient, it should be understood that the inside ambient in the cavity is not in direct contact with the outside ambient. The pressure (or vacuum) in the cavity and/or its gas composition can therefore be adapted to the user requirements. The pressured (or vacuum) atmosphere in the cavity and/or its gas composition also can be adapted while forming the cavity. [0038]
  • The cavities are preferably formed by making an assembly of two chips (or two wafers, or chip-on-wafer) with a spacer in between. The spacer typically consists of a solder layer with or without an additional spacer layer. The alignment is done as a pick&place operation (in particular applicable for chip-on-wafer processes) on a flip-chip aligner/bonder. One of the advantages of the present invention is that the sealing is done in an oven as a post-assembly operation, i.e., not during the assembly operation itself. The fact that the cavity sealing is done in an oven makes the present method more flexible with respect to the choice of the sealing gas and the sealing pressure. Standard flip-chip assembly as used by Caillat et al. in the prior art, is done in air ambient, with or without a nitrogen flow over the devices. [0039]
  • From a manufacturing standpoint, it should further be noted that the IRS technique according to the present invention has a cost advantage as compared to the other methods of the state of the art. The pick&place operation done on the flip-chip aligner&bonder is in general the most time-consuming and most expensive step. By doing the reflow operating as a post-assembly step in an oven, the operate time on the flip-chip aligner is (drastically) reduced. In addition, large batches of chip-on-wafer (or chip-on-chip) assemblies can be sealed in an oven at the same time. All this results in a high throughput and reduction in manufacturing costs. [0040]
  • An element of the method according to the present invention is that the solder reflow and sealing is done in an oven as a post-assembly operation, not during the flip-chip assembly operation itself. This makes the present technique more flexible with respect to the choice of the sealing gas and the sealing pressure as compared to the prior art method used by Caillat et al. Furthermore, from a manufacturing standpoint it is concluded that a cost advantage is expected for the present technique. [0041]
  • A specific embodiment of the method of fabrication of a microstructure according to the present invention, which is based on the assembly chip-on-chip will be described hereunder with reference witoth FIGS. [0042] 1 to 6, wherein an explanation of the different processing steps follows hereunder:
  • Step 1: Preparation of the first chip (FIG. 1) [0043]
  • deposition and patterning of a metallization seed layer ([0044] 5) on the first substrate or on a first chip (1),
  • preparation of a plating mould (e.g., polyimide which can be as thick as 100 μm) and electrodeposition (electroplating) of the solder ([0045] 3). Some examples of possible solders can be SnPb63/37, SnPb5/95, SnPbAg (2% Ag), In, AuSn (80/20), SnAg, SnAgCu or SnBi,
  • removing the mould and making the indent or groove ([0046] 4). This can also be conveniently done on wafer level, the wafer is next diced to obtain the individual chips.
  • Advantages of using solder in the method of the present invention are as follows: [0047]
  • the solder is of a soft material, thus allowing an indent to be made using a shearing tool or an indenting tool (soft should be understood as opposed to brittle, hard). The indent can be made in a photolithographic and/or chemical manner, or through mechanical means. [0048]
  • the solder can be reflowed at moderate temperatures (200-350° C.) well below the melting point of the substrate. Due to the high surface tension, the indent will completely disappear after reflow (the solder is brought back into its shape without any traces of the indent); [0049]
  • the solder can be electroplated using LIGA-like processing. It is thus convenient to define a geometrically enclosed structure forming an inside sealed cavity afterwards. In addition, electrodeposition allows the fabrication of high cavity walls (>5 μm). This facilitates the making of the indent as well. [0050]
  • the solder leads to an excellent hermetic seal of the cavity. [0051]
  • Step 2: Preparation of the second substrate or chip (FIG. 2) [0052]
  • deposition and patterning of a suitable metallization layer ([0053] 6) on the second chip (2) (this can also be conveniently done on wafer level). The requirements for a suitable metallization layer should be adequately wettable and form a stable intermetallic compound with solder (3). For instance, if a SnPb-base solder is used in Step 1, most stable SnCu will be convenient. A seed layer of SnNi can also be used. Therefore, the SnNi layer needs also to be covered by a thin Au layer since Ni oxidises in air. A thickness of the Au layer will be in the range of 0.1-0.3 μm in order to be adequately wettable, while having a thicker Au layer will result in an unreliable solder connection. If a AuSn-base solder is used, a Au metallization will yield good results. This metallization will serve as the counter metallization for the flip-chip operation (see step 3).
  • Step 3: Pre-treatment “flip-chip” alignement (FIG. 3) [0054]
  • On a flip-chip aligner & bonding device, both chips ([0055] 1 & 2) are aligned so that the solder ring (3) on the first chip (1) is aligned with the metal ring (6) on the second chip (2). Before loading, both chips are preferably given an adequate plasma pretreatment in order to achieve a reliable adhesion (so-called “prebond”, see step 4) of both chips without solder reflow.
  • Step 4: Pre-bonding (FIG. 4) [0056]
  • Both chips are heated to a temperature well below the melting point of the solder (a softening temperature that is well below the reflow temperature), for instance for SnPb (67/37) having a melting point 183° C., the chips are typically heated to a temperature comprised between 120-160° C. The chips are next prebonded by applying a bonding force (F), (typically of 2000 gf) The chips now “stick” and can be moved to the reflow oven. The exact temperature and bonding force depend on the solder, the solder history and the type of metallization used. [0057]
  • Step 5: Pump vacuum and filling of the cavity (FIG. 5) [0058]
  • In the reflow oven, the cavity ([0059] 8) is evacuated and next filled with the desired gas such as N2 or a gas mixture such as N2/H2 mixture or even SF6 to a required pressure. Optionally, the cavity could be evacuated to a vacuum pressure.
  • Step 6: Reflow and sealing (FIG. 6) [0060]
  • The temperature of the oven is now raised to about or above the melting point of the solder but below the melting point of all other materials used. The solder ([0061] 3) will melt so as to close the indent resulting in a hermetically sealed cavity with a controlled ambient.
  • The process flow as represented in FIGS. [0062] 1 to 6 shows an assembly in which the cavity height is set by the solder itself, without using any additional spacer layer. However, the method of assemblying product with an additional spacer layer is described in reference to FIGS. 7 and 8.
  • FIGS. 7 and 8 represent the last two process steps of the method of fabrication according to the present invention using a spacer layer ([0063] 9) in combination with the solder layer (3) according to said cavity height.
  • FIGS. 9, 10, and [0064] 11 represent in detail three methods of creating an indent in the preparation of one of the two chips.
  • More particularly, FIGS. [0065] 9 represents local electrodeposition of the solder using a patterned mould (comparable to LIGA as 3D-microforming techniques), wherein:
  • FIG. 9[0066] a shows the deposition of a seed layer (95), the growing of a mould material (910) (e.g. photoresist, polyimide), and the patterning of the mould (910);
  • FIG. 9[0067] b shows the electrodeposition of the solder (93);
  • FIG. 9[0068] c shows the removing of the mould (910) and seed layer (95) (locally).
  • FIG. 10 represents a second method of creating an indentation by removing the solder using a shearing tool such as a shear tester. [0069]
  • FIG. 11 represents a third method of creating an indentation by using an indenter wherein the indent of the solder is made by applying a (high) force. [0070]
  • The two last embodiments represented in FIGS. 10 and 11 are possible because the solder is a soft material that allows an indentation by forcing a tool such as a shearing or an indenting tool. [0071]
  • FIGS. [0072] 12 to 15 represent several structures using the method of fabrication of a microstructure having a sealed cavity according to the present invention for specific applications such as a microreed switch (FIG. 12), a capacitive microaccelerator (FIG. 13), a vacuum microtriode (FIG. 14), a one-port microresonator using electrostatic drive/sense (FIG. 15), a microrelay (not represented), pressure sensors, light mirror devices, radiation (infrared up to X-rays) sensitive devices such as micropiles and bolometers. It is an advantage of the present invention that these devices are bulk or surface micro-machines having delicate surface structures such as membranes and moving parts. Therefore, they can not be encapsulated with a plastic moulding compound.
  • Furthermore, in several applications, these devices require access to light or electromagnetic radiation and more particularly to IR or UV light, X-rays, etc. Examples of such radiation applications are the packaging of imaging devices such as CMOS based imagers. In such case, the first or second substrate should be transparent for the electromagnetic radiation (light) or should at least comprise a portion of the substrate (a window) that is transparent for the radiation. Thus the second or first substrate can be chosen to be a material such as Ge-wafer or a Pb halogenide material or ZnS or quartz. [0073]
  • For some of the above-mentioned applications, a controlled atmosphere for proper operation is required, e.g. reference gas for IR sensor, nitrogen or He for low or high thermal conductivity. In packaging, the bolometer sensor disclosed in the patent application EP-A-0867702 can be an advantageous example of the packaging technique of the present invention. This technique also provides thermal isolation of the bolometer device. The thermal isolation is achieved by creating a vacuum atmosphere in the cavity. Also the presence of a noble gas of heavier atoms (Xe, Ar, . . . ) will be beneficial for the performance characteristics of the bolometer device. [0074]
  • Furthermore, in order to achieve commercial success, all these devices preferably should be produced in high volume and at low cost. The fabrication of a fully packaged electromagnetic micro-relay is hereunder described in details as a best mode embodiment of the present invention. [0075]
  • BEST MODE EMBODIMENT
  • An integral design and fabrication approach incorporating all the key elements of a micro-relay, i.e., actuator, electrical contacts, housing of the electrical contacts, structural design, micro-machining fabrication process and packaging, has resulted in the micro-relay schematically shown in FIG. 16. The heart of the micro-relay comprises two “flip-chip assemblied” chips ([0076] 161) using the method of the present invention described hereabove.
  • The assembly process is based on the eutectic ([0077] 162) bonding between electroplated tin lead (SnPb) and gold (Au) layers. One of the two chips of the assembly uses a ferromagnetic substrate (161) and comprises a U-core electromagnet, consisting of a double-layer Cu coil (cross section Cu winding 6×8 μm2, total number of turns N=127), electroplated NiFe (50/50) poles (1×0.15 mm2), and the lower electrical contact. The upper chip (162) uses an oxidised silicon substrate. The chip accomodates an armature consisting of a keeper plate (2×1.8 mm2) and two supporting beams (1.6×0.15 mm2) acting as springs, composed of approximately 20 μm thick electrodeposited NiFe (80/20). The keeper and the beams are suspended 1 μm above the silicon substrate (162). The upper contacts are deposited on the keeper plate. For the current design, the contacts are 0.20×0.15 mm2 in size and are made of Au (1.5 μm on the keeper and 0.5 μm on the electromagnet). The contacts and the armature are housed in a hermetically sealed cavity, filled with either forming gas or air. The in-plane size of the cavity is defined by a metallic sealing ring, consisting of a spacer layer of electrodeposited nickel Ni covered with SnPb. Contact gap and actuation (pole) gap differ only by the total thickness of the contacts (approximately 2 μm), and are mainly set by the thickness of the Ni spacer layer, with a small contribution from the SnPb solder layer. For the current design, the contact gap spacing is approximately 22 μm, whereby the Ni spacer is close to 20 μm.
  • The fabrication of the electromagnet chip ([0078] 161) with the multilayer coil starts with a ferromagnetic (FeSi, 3% silicon) substrate. The process-flow is represented in FIG. 17, wherein FIG. 17a represents the substrate (161) after the fabrication of the Cu coil; FIG. 17b represents the substrate (161) after “Ni-pad” and NiFe pole growing; FIG. 17c represents the substrate (161) after lapping and polishing poles and Ni pads, next deposition of the Ni-spacer and SnPb layer for the sealing ring and the feedthrough, and finally the deposition of the contact layer.
  • The sealing ring includes a double layer of a Ni spacer and a SnPb (e.g., eutectic 63/37) solder layer for making the flip-chip assembly bond. The fabrication process is based on 3D microforming technologies involving key steps such as electrodeposition of Cu for the coil windings and interconnects, of NiFe for the poles, of Ni for the spacer and moreover, of the SnPb solder for making the flip-chip assembly bond. Further steps are the preparation of a plating mould using BCB's (cyclotene) and lapping and polishing of the “overplated” metals. The armature chip (chip ([0079] 162) in FIG. 16) uses a silicon substrate as the starting material. The process-flow is represented in FIG. 18, wherein FIG. 18a represents the substrate after patterning of the Al sacrificial layer; FIG. 18b represents the substrate after electrodeposition of the NiFe for the armature, followed by the deposition and patterning of the contact layer; and FIG. 18c represents the substrate after sacrificial layer etching of the Al in KOH.
  • Packaging focuses on low-cost, miniature packaging techniques. In addition to the four primary purposes of the package for integrated circuits, i.e., power distribution, signal distribution, power dissipation and mechanical support and protection, a fifth and very relevant function is to be added for micro-relays: definition of the housing and control of the ambient for the electrical contacts. The latter is referred to as 0-level packaging, as opposed to the 1-level packaging which comprises what is usually interpreted as packaging, i.e., the assembly capsule and the leads for interconnecting the assembly to the outside world. [0080]
  • The 0-level packaging deals with the fabrication of the cavity, which in the first place houses the electrical contacts (see FIG. 16). As such, it replaces the glass capsule of conventional reed switches and relays. The atmosphere in the capsule is generally nitrogen, forming gas or a vacuum and is tuned so as to increase the breakdown voltage and to improve the life expectancy of the switching contacts. For the micro-relay, the cavity is formed according to the low-temperature (<350° C.) flip-chip assembly process of the present invention of upper and bottom chips. The cavity is enclosed by both of these chips and by a geometrically enclosed sealing ring. For the reasons indicated before, the cavity must be hermetically sealed and must have a clean and controllable ambient. The term “Controllability” as used herein means an ambient containing a predetermined gas (e.g., nitrogen or SF[0081] 6) or gas mixture (e.g., forming gas) with a predetermined pressure (including a vacuum). As already indicated above, a metallic sealing ring can be implemented to meet the hermeticity requirements. For the under-bump-metallization (UBM), TiAu (0.02/0.12 μm) is preferably used and for the top-surface-metallization (TSM), Au is used which is simultaneously deposited with the contact layer.
  • Controllability of the ambient is achieved with the method of the present invention. In addition to the above requirements, an electrical feedthrough must be implemented to interconnect the electrical contacts on the armature(upper) chip to the output pads which are located on the electromagnet (bottom) chip. The metallic stack of Ni spacer and SnPb can also provide this feedthrough as shown in FIG. 16. [0082]
  • The size of the relay configuration of FIG. 16 is set by the bottom electromagnet chip and is approximately 5.3×4.1 mm[0083] 2. The thickness of the flip-chip assembly is approximately 1 mm.
  • Upon energising the coil, the keeper is attracted towards the poles, thus closing the electrical contacts. The output of the relay can either be defined by the two bottom contacts whereby the keeper merely acts as a shorting element, or, by one (or both) bottom contacts and the upper contacts. In the latter case, the upper contact is interconnected to the output pad on the bottom chip via the supporting beams and the electrical feedthrough (FIG. 16) if a magnetic force F[0084] m acting on the keeper is in general limited by magnetic saturation of the keeper and/or by the residual pole gap spacing after closure. For the current design, Fm is around 2 mN (saturation limited), which is calculated for a magneto-motive force NI>0.8 AT, a permeability μr=2,000 and a saturation induction of 1 T of the keeper material, an average keeper length of 1.6 mm and a residual gap of 1 μm. The contact force Fc (hereby assuming that pull-in has occurred) is limited by the maximum magnetic force minus the spring force, and thus, Fc<2 mN/2=1 mN (factor 2 arises because the force is distributed over two contacts). It should be noted that the spring force is determined by the stiffness of the supporting beams but also by the stiffness of the keeper plate. The latter will deform upon closure of the contacts and this way, an additional spring stiffness is introduced.

Claims (1)

  1. 1. A microstructure including a sealed cavity, wherein said cavity is defined by walls according to a closed geometric configuration between two substrates, said walls being a stack of layers comprising at least the first metallization layer, a reflowed solder layer, and a second metallization layer.
US09924229 1998-04-17 2001-08-07 Method of fabrication of a microstructure having an internal cavity Abandoned US20020000649A1 (en)

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US09293750 US6297072B1 (en) 1998-04-17 1999-04-16 Method of fabrication of a microstructure having an internal cavity
US09924229 US20020000649A1 (en) 1998-04-17 2001-08-07 Method of fabrication of a microstructure having an internal cavity

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Cited By (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020131228A1 (en) * 2001-03-13 2002-09-19 Potter Michael D. Micro-electro-mechanical switch and a method of using and making thereof
US20020182091A1 (en) * 2001-05-31 2002-12-05 Potter Michael D. Micro fluidic valves, agitators, and pumps and methods thereof
US6621163B2 (en) * 2000-11-09 2003-09-16 Koninklijke Philips Electronics N.V. Electronic device having an electronic component with a multi-layer cover, and method
GB2392555A (en) * 2002-09-02 2004-03-03 Qinetiq Ltd Hermetic packaging
US20040145271A1 (en) * 2001-10-26 2004-07-29 Potter Michael D Electrostatic based power source and methods thereof
US20040155555A1 (en) * 2001-10-26 2004-08-12 Potter Michael D. Electrostatic based power source and methods thereof
EP1471769A2 (en) * 2003-04-23 2004-10-27 Murata Manufacturing Co., Ltd. Surface-mountable electronic component
US20040264152A1 (en) * 2003-06-25 2004-12-30 Heck John M. MEMS RF switch module including a vertical via
US20050044955A1 (en) * 2003-08-29 2005-03-03 Potter Michael D. Methods for distributed electrode injection and systems thereof
US20050173769A1 (en) * 2004-02-09 2005-08-11 Don Michael Package for a micro-electro mechanical device
US20050202591A1 (en) * 2004-02-19 2005-09-15 Chien-Hua Chen System and methods for hermetic sealing of post media-filled MEMS package
US20050205966A1 (en) * 2004-02-19 2005-09-22 Potter Michael D High Temperature embedded charge devices and methods thereof
US20050241850A1 (en) * 2004-04-29 2005-11-03 International Business Machines Corporation Method and structures for implementing customizable dielectric printed circuit card traces
US20050263866A1 (en) * 2004-05-27 2005-12-01 Chang-Fegn Wan Hermetic pacakging and method of manufacture and use therefore
US20060071324A1 (en) * 2004-09-30 2006-04-06 Daoqiang Lu Microelectronic package having chamber sealed by material including one or more intermetallic compounds
US20060081983A1 (en) * 2004-10-14 2006-04-20 Giles Humpston Wafer level microelectronic packaging with double isolation
NL1028253C2 (en) * 2005-02-11 2006-08-14 Uteke Maria Klaassens Microchip sensor with contact ring, imaging sensor, imaging camera.
US20060221591A1 (en) * 2005-04-05 2006-10-05 Hon Hai Precision Industry Co., Ltd. EMI shielding package and method for making the same
US20070074731A1 (en) * 2005-10-05 2007-04-05 Nth Tech Corporation Bio-implantable energy harvester systems and methods thereof
US20070128828A1 (en) * 2005-07-29 2007-06-07 Chien-Hua Chen Micro electro-mechanical system packaging and interconnect
US20070139655A1 (en) * 2005-12-20 2007-06-21 Qi Luo Method and apparatus for reducing back-glass deflection in an interferometric modulator display device
US20070152776A1 (en) * 2003-08-29 2007-07-05 Nth Tech Corporation Method for non-damaging charge injection and system thereof
US20070172987A1 (en) * 2005-06-14 2007-07-26 Roger Dugas Membrane-based chip tooling
US20070290868A1 (en) * 2004-11-12 2007-12-20 Manning Paul A Infrared Detector
US20070297037A1 (en) * 2006-06-21 2007-12-27 Qualcomm Incorporated Mems device having a recessed cavity and methods therefor
US20080096313A1 (en) * 2000-12-07 2008-04-24 Texas Instruments Incorporated Methods for Depositing, Releasing and Packaging Micro-Electromechanical Devices on Wafer Substrates
US20080296709A1 (en) * 2007-05-30 2008-12-04 Tessera, Inc. Chip assembly
US20090102003A1 (en) * 2006-04-25 2009-04-23 Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. Package comprising an electrical circuit
US7629678B2 (en) 2004-09-27 2009-12-08 Qualcomm Mems Technologies, Inc. Method and system for sealing a substrate
US20100020382A1 (en) * 2008-07-22 2010-01-28 Qualcomm Mems Technologies, Inc. Spacer for mems device
US7715080B2 (en) 2006-04-13 2010-05-11 Qualcomm Mems Technologies, Inc. Packaging a MEMS device using a frame
US20100304565A1 (en) * 2005-06-14 2010-12-02 John Trezza Processed wafer via
US20110096508A1 (en) * 2009-10-23 2011-04-28 Qualcomm Mems Technologies, Inc. Light-based sealing and device packaging
US20110248364A1 (en) * 2010-04-08 2011-10-13 United Microelectronics Corporation Wafer Level Package of MEMS Microphone and Manufacturing Method thereof
US8220140B1 (en) 2010-09-13 2012-07-17 Western Digital (Fremont), Llc System for performing bonding a first substrate to a second substrate
US20120182706A1 (en) * 2011-01-14 2012-07-19 Rf Micro Devices, Inc. Stacked shield compartments for electronic components
US8227331B2 (en) 2004-03-01 2012-07-24 Imec Method for depositing a solder material on a substrate
EP1554564B1 (en) * 2002-09-17 2012-12-19 Robert Bosch Gmbh Detection device and device for measuring the concentration of a substance
US20130105538A1 (en) * 2011-10-31 2013-05-02 Memc Electronic Materials, Inc. Methods for cleaving a bonded wafer structure
US20130207240A1 (en) * 2011-06-09 2013-08-15 Xintec Inc. Chip package structure and manufacturing method thereof
US8619257B2 (en) 2007-12-13 2013-12-31 Kimberley-Clark Worldwide, Inc. Recombinant bacteriophage for detection of nosocomial infection
US20140116122A1 (en) * 2012-10-25 2014-05-01 Robert Bosch Tool Corporation Combined pressure and humidity sensor
US8735225B2 (en) 2004-09-27 2014-05-27 Qualcomm Mems Technologies, Inc. Method and system for packaging MEMS devices with glass seal
US20170166443A1 (en) * 2015-12-11 2017-06-15 Hyundai Motor Company Manufacturing method of micro-electro-mechanical system sensor

Families Citing this family (175)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6252229B1 (en) * 1998-07-10 2001-06-26 Boeing North American, Inc. Sealed-cavity microstructure and microbolometer and associated fabrication methods
US6853067B1 (en) 1999-10-12 2005-02-08 Microassembly Technologies, Inc. Microelectromechanical systems using thermocompression bonding
US6750521B1 (en) * 1999-10-22 2004-06-15 Delphi Technologies, Inc. Surface mount package for a micromachined device
US6400015B1 (en) * 2000-03-31 2002-06-04 Intel Corporation Method of creating shielded structures to protect semiconductor devices
KR100370398B1 (en) * 2000-06-22 2003-01-30 삼성전자 주식회사 Method for surface mountable chip scale packaging of electronic and MEMS devices
US6938783B2 (en) * 2000-07-26 2005-09-06 Amerasia International Technology, Inc. Carrier tape
JP2002144300A (en) 2000-07-27 2002-05-21 Toshiba Tec Corp Pipe joint, method of manufacturing the same, and fluid device using pipe joint
US6519075B2 (en) * 2000-11-03 2003-02-11 Agere Systems Inc. Packaged MEMS device and method for making the same
US6448109B1 (en) * 2000-11-15 2002-09-10 Analog Devices, Inc. Wafer level method of capping multiple MEMS elements
US20020096421A1 (en) * 2000-11-29 2002-07-25 Cohn Michael B. MEMS device with integral packaging
US6847752B2 (en) * 2000-12-07 2005-01-25 Bluebird Optical Mems Ltd. Integrated actuator for optical switch mirror array
US6550664B2 (en) * 2000-12-09 2003-04-22 Agilent Technologies, Inc. Mounting film bulk acoustic resonators in microwave packages using flip chip bonding technology
US6531332B1 (en) * 2001-01-10 2003-03-11 Parvenu, Inc. Surface micromachining using a thick release process
US6711317B2 (en) * 2001-01-25 2004-03-23 Lucent Technologies Inc. Resiliently packaged MEMs device and method for making same
KR100396551B1 (en) 2001-02-03 2003-09-03 삼성전자주식회사 Wafer level hermetic sealing method
KR100387239B1 (en) * 2001-04-26 2003-06-12 삼성전자주식회사 MEMS Relay and fabricating method thereof
US6800912B2 (en) * 2001-05-18 2004-10-05 Corporation For National Research Initiatives Integrated electromechanical switch and tunable capacitor and method of making the same
US6606247B2 (en) 2001-05-31 2003-08-12 Alien Technology Corporation Multi-feature-size electronic structures
US6890834B2 (en) * 2001-06-11 2005-05-10 Matsushita Electric Industrial Co., Ltd. Electronic device and method for manufacturing the same
US7005314B2 (en) * 2001-06-27 2006-02-28 Intel Corporation Sacrificial layer technique to make gaps in MEMS applications
US6511866B1 (en) * 2001-07-12 2003-01-28 Rjr Polymers, Inc. Use of diverse materials in air-cavity packaging of electronic devices
US6940636B2 (en) * 2001-09-20 2005-09-06 Analog Devices, Inc. Optical switching apparatus and method of assembling same
US6893574B2 (en) * 2001-10-23 2005-05-17 Analog Devices Inc MEMS capping method and apparatus
US7004015B2 (en) * 2001-10-25 2006-02-28 The Regents Of The University Of Michigan Method and system for locally sealing a vacuum microcavity, methods and systems for monitoring and controlling pressure and method and system for trimming resonant frequency of a microstructure therein
US6808955B2 (en) * 2001-11-02 2004-10-26 Intel Corporation Method of fabricating an integrated circuit that seals a MEMS device within a cavity
US7553686B2 (en) * 2002-12-17 2009-06-30 The Regents Of The University Of Colorado, A Body Corporate Al2O3 atomic layer deposition to enhance the deposition of hydrophobic or hydrophilic coatings on micro-electromechanical devices
US7426067B1 (en) 2001-12-17 2008-09-16 Regents Of The University Of Colorado Atomic layer deposition on micro-mechanical devices
US20030179057A1 (en) * 2002-01-08 2003-09-25 Jun Shen Packaging of a micro-magnetic switch with a patterned permanent magnet
US7214569B2 (en) * 2002-01-23 2007-05-08 Alien Technology Corporation Apparatus incorporating small-feature-size and large-feature-size components and method for making same
US6887769B2 (en) * 2002-02-06 2005-05-03 Intel Corporation Dielectric recess for wafer-to-wafer and die-to-die metal bonding and method of fabricating the same
US6624003B1 (en) * 2002-02-06 2003-09-23 Teravicta Technologies, Inc. Integrated MEMS device and package
US6661085B2 (en) * 2002-02-06 2003-12-09 Intel Corporation Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack
US6975016B2 (en) * 2002-02-06 2005-12-13 Intel Corporation Wafer bonding using a flexible bladder press and thinned wafers for three-dimensional (3D) wafer-to-wafer vertical stack integration, and application thereof
US6762076B2 (en) 2002-02-20 2004-07-13 Intel Corporation Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices
US6852926B2 (en) * 2002-03-26 2005-02-08 Intel Corporation Packaging microelectromechanical structures
US6635509B1 (en) 2002-04-12 2003-10-21 Dalsa Semiconductor Inc. Wafer-level MEMS packaging
US7029829B2 (en) * 2002-04-18 2006-04-18 The Regents Of The University Of Michigan Low temperature method for forming a microcavity on a substrate and article having same
US20050045585A1 (en) * 2002-05-07 2005-03-03 Gang Zhang Method of electrochemically fabricating multilayer structures having improved interlayer adhesion
US20050029109A1 (en) * 2002-05-07 2005-02-10 Gang Zhang Method of electrochemically fabricating multilayer structures having improved interlayer adhesion
US7125510B2 (en) * 2002-05-15 2006-10-24 Zhili Huang Microstructure fabrication and microsystem integration
US6902656B2 (en) * 2002-05-24 2005-06-07 Dalsa Semiconductor Inc. Fabrication of microstructures with vacuum-sealed cavity
JP2006524880A (en) * 2002-09-18 2006-11-02 マグフュージョン, インコーポレイテッド Method of assembling a laminated electro-mechanical structure
US7215229B2 (en) * 2003-09-17 2007-05-08 Schneider Electric Industries Sas Laminated relays with multiple flexible contacts
US7781850B2 (en) 2002-09-20 2010-08-24 Qualcomm Mems Technologies, Inc. Controlling electromechanical behavior of structures within a microelectromechanical systems device
US7550794B2 (en) 2002-09-20 2009-06-23 Idc, Llc Micromechanical systems device comprising a displaceable electrode and a charge-trapping layer
US20040108588A1 (en) * 2002-09-24 2004-06-10 Cookson Electronics, Inc. Package for microchips
US6822326B2 (en) * 2002-09-25 2004-11-23 Ziptronix Wafer bonding hermetic encapsulation
FR2845075B1 (en) * 2002-09-27 2005-08-05 Thales Sa DIP has electrostatic actuation has low response time and power switching and realization METHOD THEREOF
US20040063237A1 (en) * 2002-09-27 2004-04-01 Chang-Han Yun Fabricating complex micro-electromechanical systems using a dummy handling substrate
US6933163B2 (en) * 2002-09-27 2005-08-23 Analog Devices, Inc. Fabricating integrated micro-electromechanical systems using an intermediate electrode layer
US6964882B2 (en) * 2002-09-27 2005-11-15 Analog Devices, Inc. Fabricating complex micro-electromechanical systems using a flip bonding technique
US7317232B2 (en) * 2002-10-22 2008-01-08 Cabot Microelectronics Corporation MEM switching device
DE10257097B4 (en) * 2002-12-05 2005-12-22 X-Fab Semiconductor Foundries Ag A process for the production of microelectromechanical systems (Micro Electro Mechanical Systems: MEMS) using high temperature silicon fusion bonding
US6962835B2 (en) 2003-02-07 2005-11-08 Ziptronix, Inc. Method for room temperature metal direct bonding
US7514283B2 (en) * 2003-03-20 2009-04-07 Robert Bosch Gmbh Method of fabricating electromechanical device having a controlled atmosphere
US7253735B2 (en) 2003-03-24 2007-08-07 Alien Technology Corporation RFID tags and processes for producing RFID tags
US20050007118A1 (en) * 2003-04-09 2005-01-13 John Kitching Micromachined alkali-atom vapor cells and method of fabrication
US7297471B1 (en) 2003-04-15 2007-11-20 Idc, Llc Method for manufacturing an array of interferometric modulators
US20040232535A1 (en) * 2003-05-22 2004-11-25 Terry Tarn Microelectromechanical device packages with integral heaters
US7075160B2 (en) 2003-06-04 2006-07-11 Robert Bosch Gmbh Microelectromechanical systems and devices having thin film encapsulated mechanical structures
US20050012197A1 (en) 2003-07-15 2005-01-20 Smith Mark A. Fluidic MEMS device
US20050012212A1 (en) * 2003-07-17 2005-01-20 Cookson Electronics, Inc. Reconnectable chip interface and chip package
US20060182993A1 (en) * 2004-08-10 2006-08-17 Mitsubishi Chemical Corporation Compositions for organic electroluminescent device and organic electroluminescent device
US20050093134A1 (en) 2003-10-30 2005-05-05 Terry Tarn Device packages with low stress assembly process
US20050170609A1 (en) * 2003-12-15 2005-08-04 Alie Susan A. Conductive bond for through-wafer interconnect
US7034393B2 (en) * 2003-12-15 2006-04-25 Analog Devices, Inc. Semiconductor assembly with conductive rim and method of producing the same
US7427527B1 (en) * 2004-02-13 2008-09-23 Surfect Technologies, Inc. Method for aligning devices
EP1575084B1 (en) * 2004-03-01 2010-05-26 Imec Method for depositing a solder material on a substrate
DE102004011035B4 (en) * 2004-03-06 2006-05-04 X-Fab Semiconductor Foundries Ag Method for testing the tightness of wafer bonding connections and arrangement for performing the method
US7342473B2 (en) * 2004-04-07 2008-03-11 Schneider Electric Industries Sas Method and apparatus for reducing cantilever stress in magnetically actuated relays
KR100575363B1 (en) * 2004-04-13 2006-05-03 재단법인서울대학교산학협력재단 Method of packaging of mems device at the vacuum state and vacuum packaged mems device using the same
US7292111B2 (en) * 2004-04-26 2007-11-06 Northrop Grumman Corporation Middle layer of die structure that comprises a cavity that holds an alkali metal
US7608534B2 (en) * 2004-06-02 2009-10-27 Analog Devices, Inc. Interconnection of through-wafer vias using bridge structures
US20060003548A1 (en) * 2004-06-30 2006-01-05 Kobrinsky Mauro J Highly compliant plate for wafer bonding
US7307005B2 (en) * 2004-06-30 2007-12-11 Intel Corporation Wafer bonding with highly compliant plate having filler material enclosed hollow core
KR101313117B1 (en) 2004-07-29 2013-09-30 퀄컴 엠이엠에스 테크놀로지스, 인크. System and method for micro-electromechanical operating of an interferometric modulator
WO2006020744A3 (en) * 2004-08-12 2006-06-08 Masud Beroz Structure and method of forming capped chips
US7087538B2 (en) * 2004-08-16 2006-08-08 Intel Corporation Method to fill the gap between coupled wafers
US7202100B1 (en) 2004-09-03 2007-04-10 Hrl Laboratories, Llc Method of manufacturing a cloverleaf microgyroscope and cloverleaf microgyroscope
JP4820609B2 (en) * 2004-09-10 2011-11-24 パナソニック株式会社 Filter module using a piezoelectric resonator, duplexer, and communication device and manufacturing method thereof
US8124434B2 (en) 2004-09-27 2012-02-28 Qualcomm Mems Technologies, Inc. Method and system for packaging a display
US7327510B2 (en) 2004-09-27 2008-02-05 Idc, Llc Process for modifying offset voltage characteristics of an interferometric modulator
US7553684B2 (en) * 2004-09-27 2009-06-30 Idc, Llc Method of fabricating interferometric devices using lift-off processing techniques
US7424198B2 (en) 2004-09-27 2008-09-09 Idc, Llc Method and device for packaging a substrate
US20060065622A1 (en) * 2004-09-27 2006-03-30 Floyd Philip D Method and system for xenon fluoride etching with enhanced efficiency
US7630119B2 (en) 2004-09-27 2009-12-08 Qualcomm Mems Technologies, Inc. Apparatus and method for reducing slippage between structures in an interferometric modulator
US7422962B2 (en) * 2004-10-27 2008-09-09 Hewlett-Packard Development Company, L.P. Method of singulating electronic devices
US7615479B1 (en) 2004-11-08 2009-11-10 Alien Technology Corporation Assembly comprising functional block deposited therein
KR100498708B1 (en) * 2004-11-08 2005-06-22 옵토팩 주식회사 Electronic package for semiconductor device and packaging method thereof
US7353598B2 (en) * 2004-11-08 2008-04-08 Alien Technology Corporation Assembly comprising functional devices and method of making same
US7551141B1 (en) 2004-11-08 2009-06-23 Alien Technology Corporation RFID strap capacitively coupled and method of making same
US7688206B2 (en) 2004-11-22 2010-03-30 Alien Technology Corporation Radio frequency identification (RFID) tag for an item having a conductive layer included or attached
US7385284B2 (en) 2004-11-22 2008-06-10 Alien Technology Corporation Transponder incorporated into an electronic device
US7232700B1 (en) * 2004-12-08 2007-06-19 Hrl Laboratories, Llc Integrated all-Si capacitive microgyro with vertical differential sense and control and process for preparing an integrated all-Si capacitive microgyro with vertical differential sense
JP2006187685A (en) * 2004-12-28 2006-07-20 Fuji Xerox Co Ltd Microstructure, microreactor, heat exchanger and manufacturing method of microstructure
US20060211233A1 (en) * 2005-03-21 2006-09-21 Skyworks Solutions, Inc. Method for fabricating a wafer level package having through wafer vias for external package connectivity and related structure
US7250353B2 (en) * 2005-03-29 2007-07-31 Invensense, Inc. Method and system of releasing a MEMS structure
US7576426B2 (en) * 2005-04-01 2009-08-18 Skyworks Solutions, Inc. Wafer level package including a device wafer integrated with a passive component
US7508063B2 (en) * 2005-04-05 2009-03-24 Texas Instruments Incorporated Low cost hermetically sealed package
US7408250B2 (en) * 2005-04-05 2008-08-05 Texas Instruments Incorporated Micromirror array device with compliant adhesive
US7038321B1 (en) * 2005-04-29 2006-05-02 Delphi Technologies, Inc. Method of attaching a flip chip device and circuit assembly formed thereby
US7692521B1 (en) 2005-05-12 2010-04-06 Microassembly Technologies, Inc. High force MEMS device
US7786592B2 (en) 2005-06-14 2010-08-31 John Trezza Chip capacitive coupling
US8456015B2 (en) 2005-06-14 2013-06-04 Cufer Asset Ltd. L.L.C. Triaxial through-chip connection
US7838997B2 (en) 2005-06-14 2010-11-23 John Trezza Remote chip attachment
US7560813B2 (en) * 2005-06-14 2009-07-14 John Trezza Chip-based thermo-stack
US7687397B2 (en) 2006-06-06 2010-03-30 John Trezza Front-end processed wafer having through-chip connections
US7687400B2 (en) 2005-06-14 2010-03-30 John Trezza Side stacking apparatus and method
US7781886B2 (en) 2005-06-14 2010-08-24 John Trezza Electronic chip contact structure
US7851348B2 (en) 2005-06-14 2010-12-14 Abhay Misra Routingless chip architecture
US7807550B2 (en) 2005-06-17 2010-10-05 Dalsa Semiconductor Inc. Method of making MEMS wafers
US7542301B1 (en) 2005-06-22 2009-06-02 Alien Technology Corporation Creating recessed regions in a substrate and assemblies having such recessed regions
US7067397B1 (en) * 2005-06-23 2006-06-27 Northrop Gruman Corp. Method of fabricating high yield wafer level packages integrating MMIC and MEMS components
JP2007027279A (en) 2005-07-13 2007-02-01 Shinko Electric Ind Co Ltd Semiconductor device and manufacturing method thereof
US20070015357A1 (en) * 2005-07-15 2007-01-18 Government Of The Usa, As Represented By Secretary Of U.S. Army Process of adhesive bonding with patternable polymers for producing microstructure devices on a wafer assembly
EP1907316A1 (en) 2005-07-22 2008-04-09 Qualcomm Mems Technologies, Inc. Support structure for mems device and methods therefor
EP2495212A3 (en) 2005-07-22 2012-10-31 QUALCOMM MEMS Technologies, Inc. Mems devices having support structures and methods of fabricating the same
US7417307B2 (en) * 2005-07-29 2008-08-26 Hewlett-Packard Development Company, L.P. System and method for direct-bonding of substrates
JP4690817B2 (en) * 2005-08-03 2011-06-01 パナソニック株式会社 The method of manufacturing a film bulk acoustic resonator
US7485968B2 (en) 2005-08-11 2009-02-03 Ziptronix, Inc. 3D IC method and device
US7582969B2 (en) * 2005-08-26 2009-09-01 Innovative Micro Technology Hermetic interconnect structure and method of manufacture
JP4834369B2 (en) * 2005-10-07 2011-12-14 ルネサスエレクトロニクス株式会社 Semiconductor device
US20070114643A1 (en) * 2005-11-22 2007-05-24 Honeywell International Inc. Mems flip-chip packaging
US7491567B2 (en) * 2005-11-22 2009-02-17 Honeywell International Inc. MEMS device packaging methods
US7795061B2 (en) 2005-12-29 2010-09-14 Qualcomm Mems Technologies, Inc. Method of creating MEMS device cavities by a non-etching process
US7382515B2 (en) 2006-01-18 2008-06-03 Qualcomm Mems Technologies, Inc. Silicon-rich silicon nitrides as etch stops in MEMS manufacture
US20070170528A1 (en) 2006-01-20 2007-07-26 Aaron Partridge Wafer encapsulated microelectromechanical structure and method of manufacturing same
KR100804891B1 (en) * 2006-02-14 2008-02-20 엘에스전선 주식회사 Dicing die attach film and semiconductor packaging method using the same
US7450295B2 (en) 2006-03-02 2008-11-11 Qualcomm Mems Technologies, Inc. Methods for producing MEMS with protective coatings using multi-component sacrificial layers
FR2898597B1 (en) * 2006-03-16 2008-09-19 Commissariat Energie Atomique Encapsulation in a hermetic cavity of a compound microelectronics, in particular a mems
US7321457B2 (en) 2006-06-01 2008-01-22 Qualcomm Incorporated Process and structure for fabrication of MEMS device having isolated edge posts
US20090315169A1 (en) * 2006-07-20 2009-12-24 Nxp B.V. Frame and method of manufacturing assembly
JP5026016B2 (en) * 2006-07-31 2012-09-12 京セラクリスタルデバイス株式会社 Method for manufacturing a piezoelectric device
US7635606B2 (en) * 2006-08-02 2009-12-22 Skyworks Solutions, Inc. Wafer level package with cavities for active devices
US7763546B2 (en) 2006-08-02 2010-07-27 Qualcomm Mems Technologies, Inc. Methods for reducing surface charges during the manufacture of microelectromechanical systems devices
US20080057619A1 (en) * 2006-08-30 2008-03-06 Honeywell International Inc. Microcontainer for Hermetically Encapsulating Reactive Materials
US20080087979A1 (en) * 2006-10-13 2008-04-17 Analog Devices, Inc. Integrated Circuit with Back Side Conductive Paths
US8100012B2 (en) * 2007-01-11 2012-01-24 Analog Devices, Inc. MEMS sensor with cap electrode
US7670874B2 (en) * 2007-02-16 2010-03-02 John Trezza Plated pillar package formation
US20080217708A1 (en) * 2007-03-09 2008-09-11 Skyworks Solutions, Inc. Integrated passive cap in a system-in-package
US7733552B2 (en) 2007-03-21 2010-06-08 Qualcomm Mems Technologies, Inc MEMS cavity-coating layers and methods
US7719752B2 (en) 2007-05-11 2010-05-18 Qualcomm Mems Technologies, Inc. MEMS structures, methods of fabricating MEMS components on separate substrates and assembly of same
DE102007022509B4 (en) * 2007-05-14 2015-10-22 Robert Bosch Gmbh Micromechanical component with Dünnschichtverkappung and Herstellungsverfahrung
US7569488B2 (en) 2007-06-22 2009-08-04 Qualcomm Mems Technologies, Inc. Methods of making a MEMS device by monitoring a process parameter
US8739398B2 (en) * 2007-11-20 2014-06-03 Board Of Regents, The University Of Texas System Method and apparatus for detethering mesoscale, microscale, and nanoscale components and devices
KR20150068495A (en) * 2007-11-30 2015-06-19 스카이워크스 솔루션즈, 인코포레이티드 Wafer level packaging using flip chip mounting
US8900931B2 (en) 2007-12-26 2014-12-02 Skyworks Solutions, Inc. In-situ cavity integrated circuit package
WO2009093176A3 (en) * 2008-01-21 2010-02-25 Nxp B.V. Clean and hermetic sealing of a package cavity
US7851239B2 (en) 2008-06-05 2010-12-14 Qualcomm Mems Technologies, Inc. Low temperature amorphous silicon sacrificial layer for controlled adhesion in MEMS devices
US8618670B2 (en) * 2008-08-15 2013-12-31 Qualcomm Incorporated Corrosion control of stacked integrated circuits
US7943411B2 (en) * 2008-09-10 2011-05-17 Analog Devices, Inc. Apparatus and method of wafer bonding using compatible alloy
US8956904B2 (en) 2008-09-10 2015-02-17 Analog Devices, Inc. Apparatus and method of wafer bonding using compatible alloy
US7719754B2 (en) * 2008-09-30 2010-05-18 Qualcomm Mems Technologies, Inc. Multi-thickness layers for MEMS and mask-saving sequence for same
US20100224994A1 (en) * 2009-03-05 2010-09-09 Analog Devices, Inc. Low Temperature Metal to Silicon Diffusion and Silicide Wafer Bonding
US7864403B2 (en) 2009-03-27 2011-01-04 Qualcomm Mems Technologies, Inc. Post-release adjustment of interferometric modulator reflectivity
DE102009002068A1 (en) * 2009-04-01 2010-10-07 Robert Bosch Gmbh damping device
US20100314149A1 (en) 2009-06-10 2010-12-16 Medtronic, Inc. Hermetically-sealed electrical circuit apparatus
US8172760B2 (en) 2009-06-18 2012-05-08 Medtronic, Inc. Medical device encapsulated within bonded dies
US20100320595A1 (en) * 2009-06-22 2010-12-23 Honeywell International Inc. Hybrid hermetic interface chip
US8058106B2 (en) * 2009-09-04 2011-11-15 Magic Technologies, Inc. MEMS device package with vacuum cavity by two-step solder reflow method
EP2363373A1 (en) * 2010-03-02 2011-09-07 SensoNor Technologies AS Bonding process for sensitive micro-and nano-systems
US8536693B2 (en) 2010-07-20 2013-09-17 Avago Technologies General Ip (Singapore) Pte. Ltd. Tiered integrated circuit assembly and a method for manufacturing the same
US8666505B2 (en) 2010-10-26 2014-03-04 Medtronic, Inc. Wafer-scale package including power source
EP2455332B1 (en) * 2010-11-19 2014-02-12 Imec Method for producing temporary cap on a MEMS device
US8424388B2 (en) 2011-01-28 2013-04-23 Medtronic, Inc. Implantable capacitive pressure sensor apparatus and methods regarding same
US8659816B2 (en) 2011-04-25 2014-02-25 Qualcomm Mems Technologies, Inc. Mechanical layer and methods of making the same
US20130333471A1 (en) * 2012-06-14 2013-12-19 Analog Devices, Inc. Teeter-Totter Type MEMS Accelerometer with Electrodes on Circuit Wafer
FR2999805B1 (en) * 2012-12-17 2017-12-22 Commissariat Energie Atomique A method of making an infrared detection device
US9556017B2 (en) 2013-06-25 2017-01-31 Analog Devices, Inc. Apparatus and method for preventing stiction of MEMS devices encapsulated by active circuitry
US10081535B2 (en) 2013-06-25 2018-09-25 Analog Devices, Inc. Apparatus and method for shielding and biasing in MEMS devices encapsulated by active circuitry
CN103728029B (en) * 2013-12-19 2016-05-11 无锡元创华芯微机电有限公司 Based on infrared bolometer and its manufacturing method of mems
US9227839B2 (en) * 2014-05-06 2016-01-05 Raytheon Company Wafer level packaged infrared (IR) focal plane array (FPA) with evanescent wave coupling
US9604841B2 (en) 2014-11-06 2017-03-28 Analog Devices, Inc. MEMS sensor cap with multiple isolated electrodes
US10078098B2 (en) 2015-06-23 2018-09-18 Analog Devices, Inc. Z axis accelerometer design with offset compensation
US9953941B2 (en) 2015-08-25 2018-04-24 Invensas Bonding Technologies, Inc. Conductive barrier direct hybrid bonding

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5793225A (en) * 1980-12-01 1982-06-10 Mitsubishi Electric Corp Vacuum sealing method of vacuum container for pressure transducer
JPS60257546A (en) 1984-06-04 1985-12-19 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
US5067008A (en) 1989-08-11 1991-11-19 Hitachi Maxell, Ltd. Ic package and ic card incorporating the same thereinto
US5247133A (en) 1991-08-29 1993-09-21 Motorola, Inc. High-vacuum substrate enclosure
JP2729005B2 (en) * 1992-04-01 1998-03-18 三菱電機株式会社 The semiconductor pressure sensor and a manufacturing method thereof
US5317922A (en) * 1992-04-30 1994-06-07 Ford Motor Company Capacitance transducer article and method of fabrication
DE69311277T2 (en) 1992-12-15 1998-01-15 Asulab Sa Reed switch and manufacturing method of three-dimensional metallic suspended microstructures
US5296408A (en) * 1992-12-24 1994-03-22 International Business Machines Corporation Fabrication method for vacuum microelectronic devices
FR2705163B1 (en) 1993-05-12 1995-07-28 Pixel Int Sa Process for vacuum layout of screens and flat display sealing.
FR2713017B1 (en) 1993-11-23 1996-01-12 Commissariat Energie Atomique Radiation detector in two bands of wavelengths, and method for manufacturing this sensor.
FI945124A0 (en) 1994-10-31 1994-10-31 Valtion Teknillinen Spektrometer
US5610431A (en) 1995-05-12 1997-03-11 The Charles Stark Draper Laboratory, Inc. Covers for micromechanical sensors and other semiconductor devices
FR2748156B1 (en) 1996-04-26 1998-08-07 Suisse Electronique Microtech Device comprising two substrates intended to form a microsystem or a portion of a microsystem and method for assembling two micro-factories substrates
US5965933A (en) * 1996-05-28 1999-10-12 Young; William R. Semiconductor packaging apparatus
US6140144A (en) * 1996-08-08 2000-10-31 Integrated Sensing Systems, Inc. Method for packaging microsensors
JP3444121B2 (en) * 1996-12-04 2003-09-08 株式会社村田製作所 Production method of the external force detector
JP3045089B2 (en) * 1996-12-19 2000-05-22 株式会社村田製作所 Package structure and a manufacturing method thereof of the element
US5929728A (en) * 1997-06-25 1999-07-27 Hewlett-Packard Company Imbedded waveguide structures for a microwave circuit package
US6124145A (en) * 1998-01-23 2000-09-26 Instrumentarium Corporation Micromachined gas-filled chambers and method of microfabrication

Cited By (92)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6621163B2 (en) * 2000-11-09 2003-09-16 Koninklijke Philips Electronics N.V. Electronic device having an electronic component with a multi-layer cover, and method
US20080096313A1 (en) * 2000-12-07 2008-04-24 Texas Instruments Incorporated Methods for Depositing, Releasing and Packaging Micro-Electromechanical Devices on Wafer Substrates
US20020131228A1 (en) * 2001-03-13 2002-09-19 Potter Michael D. Micro-electro-mechanical switch and a method of using and making thereof
US7280014B2 (en) * 2001-03-13 2007-10-09 Rochester Institute Of Technology Micro-electro-mechanical switch and a method of using and making thereof
US20020182091A1 (en) * 2001-05-31 2002-12-05 Potter Michael D. Micro fluidic valves, agitators, and pumps and methods thereof
US20040145271A1 (en) * 2001-10-26 2004-07-29 Potter Michael D Electrostatic based power source and methods thereof
US20040155555A1 (en) * 2001-10-26 2004-08-12 Potter Michael D. Electrostatic based power source and methods thereof
US7348203B2 (en) 2002-09-02 2008-03-25 Qinetiq Limited Hermetic packaging
US20060166407A1 (en) * 2002-09-02 2006-07-27 Kaushal Tej P Hermetic packaging
GB2392555A (en) * 2002-09-02 2004-03-03 Qinetiq Ltd Hermetic packaging
EP1554564B1 (en) * 2002-09-17 2012-12-19 Robert Bosch Gmbh Detection device and device for measuring the concentration of a substance
EP1471769A3 (en) * 2003-04-23 2009-11-18 Murata Manufacturing Co., Ltd. Surface-mountable electronic component
EP1471769A2 (en) * 2003-04-23 2004-10-27 Murata Manufacturing Co., Ltd. Surface-mountable electronic component
US20040218769A1 (en) * 2003-04-23 2004-11-04 Murata Manufacturing Co., Ltd. Package of surface-mountable electronic component
US7583011B2 (en) * 2003-04-23 2009-09-01 Murata Manufacturing Co., Ltd. Package of surface-mountable electronic component
US7324350B2 (en) 2003-06-25 2008-01-29 Intel Corporation MEMS RF switch module including a vertical via
US20070029659A1 (en) * 2003-06-25 2007-02-08 Heck John M MEMS RF switch module including a vertical via
US20040264152A1 (en) * 2003-06-25 2004-12-30 Heck John M. MEMS RF switch module including a vertical via
US7170155B2 (en) * 2003-06-25 2007-01-30 Intel Corporation MEMS RF switch module including a vertical via
US20070152776A1 (en) * 2003-08-29 2007-07-05 Nth Tech Corporation Method for non-damaging charge injection and system thereof
US20050044955A1 (en) * 2003-08-29 2005-03-03 Potter Michael D. Methods for distributed electrode injection and systems thereof
US7465600B2 (en) * 2004-02-09 2008-12-16 Hewlett-Packard Development Company, L.P. Package for a micro-electro mechanical device
US20050173769A1 (en) * 2004-02-09 2005-08-11 Don Michael Package for a micro-electro mechanical device
US20050205966A1 (en) * 2004-02-19 2005-09-22 Potter Michael D High Temperature embedded charge devices and methods thereof
US8581308B2 (en) 2004-02-19 2013-11-12 Rochester Institute Of Technology High temperature embedded charge devices and methods thereof
US7534662B2 (en) * 2004-02-19 2009-05-19 Hewlett-Packard Development Company, L.P. Methods for hermetic sealing of post media-filled MEMS package
US20050202591A1 (en) * 2004-02-19 2005-09-15 Chien-Hua Chen System and methods for hermetic sealing of post media-filled MEMS package
US8227331B2 (en) 2004-03-01 2012-07-24 Imec Method for depositing a solder material on a substrate
US20060288570A1 (en) * 2004-04-29 2006-12-28 International Business Machines Corporation Method and structures for implementing customizable dielectric printed circuit card traces
US7197818B2 (en) 2004-04-29 2007-04-03 International Business Machines Corporation Method and structures for implementing customizable dielectric printed circuit card traces
US7129417B2 (en) * 2004-04-29 2006-10-31 International Business Machines Corporation Method and structures for implementing customizable dielectric printed circuit card traces
US20050241850A1 (en) * 2004-04-29 2005-11-03 International Business Machines Corporation Method and structures for implementing customizable dielectric printed circuit card traces
US20050263866A1 (en) * 2004-05-27 2005-12-01 Chang-Fegn Wan Hermetic pacakging and method of manufacture and use therefore
US7952189B2 (en) * 2004-05-27 2011-05-31 Chang-Feng Wan Hermetic packaging and method of manufacture and use therefore
US7642127B2 (en) 2004-09-27 2010-01-05 Qualcomm Mems Technologies, Inc. Method and system for sealing a substrate
US8735225B2 (en) 2004-09-27 2014-05-27 Qualcomm Mems Technologies, Inc. Method and system for packaging MEMS devices with glass seal
US7935555B2 (en) 2004-09-27 2011-05-03 Qualcomm Mems Technologies, Inc. Method and system for sealing a substrate
US20100072595A1 (en) * 2004-09-27 2010-03-25 Qualcomm Mems Technologies, Inc. Method and system for sealing a substrate
US7629678B2 (en) 2004-09-27 2009-12-08 Qualcomm Mems Technologies, Inc. Method and system for sealing a substrate
US20060192281A1 (en) * 2004-09-30 2006-08-31 Daoqiang Lu Methods for sealing chambers of microelectronic packages
US20060071324A1 (en) * 2004-09-30 2006-04-06 Daoqiang Lu Microelectronic package having chamber sealed by material including one or more intermetallic compounds
US7061099B2 (en) * 2004-09-30 2006-06-13 Intel Corporation Microelectronic package having chamber sealed by material including one or more intermetallic compounds
WO2006044219A2 (en) * 2004-10-14 2006-04-27 Tessera, Inc. Wafer level microelectronic packaging with double isolation
WO2006044219A3 (en) * 2004-10-14 2006-06-29 Tessera Inc Wafer level microelectronic packaging with double isolation
US20060081983A1 (en) * 2004-10-14 2006-04-20 Giles Humpston Wafer level microelectronic packaging with double isolation
US8373561B2 (en) 2004-11-12 2013-02-12 Qinetiq Limited Infrared detector
US20070290868A1 (en) * 2004-11-12 2007-12-20 Manning Paul A Infrared Detector
NL1028253C2 (en) * 2005-02-11 2006-08-14 Uteke Maria Klaassens Microchip sensor with contact ring, imaging sensor, imaging camera.
US7480153B2 (en) * 2005-04-05 2009-01-20 Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd. EMI shielding package and method for making the same
US20060221591A1 (en) * 2005-04-05 2006-10-05 Hon Hai Precision Industry Co., Ltd. EMI shielding package and method for making the same
US20070172987A1 (en) * 2005-06-14 2007-07-26 Roger Dugas Membrane-based chip tooling
US8643186B2 (en) 2005-06-14 2014-02-04 Cufer Asset Ltd. L.L.C. Processed wafer via
US20100304565A1 (en) * 2005-06-14 2010-12-02 John Trezza Processed wafer via
US9324629B2 (en) 2005-06-14 2016-04-26 Cufer Asset Ltd. L.L.C. Tooling for coupling multiple electronic chips
US9754907B2 (en) 2005-06-14 2017-09-05 Cufer Asset Ltd. L.L.C. Tooling for coupling multiple electronic chips
US8846445B2 (en) 2005-06-14 2014-09-30 Cufer Asset Ltd. L.L.C. Inverse chip connector
US20120108009A1 (en) * 2005-06-14 2012-05-03 John Trezza Electrically conductive interconnect system and method
US20110147932A1 (en) * 2005-06-14 2011-06-23 John Trezza Contact-based encapsulation
US9147635B2 (en) 2005-06-14 2015-09-29 Cufer Asset Ltd. L.L.C. Contact-based encapsulation
US8217473B2 (en) 2005-07-29 2012-07-10 Hewlett-Packard Development Company, L.P. Micro electro-mechanical system packaging and interconnect
US20070128828A1 (en) * 2005-07-29 2007-06-07 Chien-Hua Chen Micro electro-mechanical system packaging and interconnect
US20070074731A1 (en) * 2005-10-05 2007-04-05 Nth Tech Corporation Bio-implantable energy harvester systems and methods thereof
US20070139655A1 (en) * 2005-12-20 2007-06-21 Qi Luo Method and apparatus for reducing back-glass deflection in an interferometric modulator display device
US7561334B2 (en) 2005-12-20 2009-07-14 Qualcomm Mems Technologies, Inc. Method and apparatus for reducing back-glass deflection in an interferometric modulator display device
US7715080B2 (en) 2006-04-13 2010-05-11 Qualcomm Mems Technologies, Inc. Packaging a MEMS device using a frame
US20090102003A1 (en) * 2006-04-25 2009-04-23 Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. Package comprising an electrical circuit
US8581357B2 (en) * 2006-04-25 2013-11-12 Fraunhofer-Gesellschft Zur Foerderung Der Angewandten Forschung E.V. Package comprising an electrical circuit
WO2007149475A2 (en) * 2006-06-21 2007-12-27 Qualcomm Mems Technologies, Inc. Method for packaging an optical mems device
WO2007149475A3 (en) * 2006-06-21 2008-06-05 Qualcomm Mems Technologies Inc Method for packaging an optical mems device
US7826127B2 (en) 2006-06-21 2010-11-02 Qualcomm Mems Technologies, Inc. MEMS device having a recessed cavity and methods therefor
US20070297037A1 (en) * 2006-06-21 2007-12-27 Qualcomm Incorporated Mems device having a recessed cavity and methods therefor
US20080296709A1 (en) * 2007-05-30 2008-12-04 Tessera, Inc. Chip assembly
US7737513B2 (en) 2007-05-30 2010-06-15 Tessera, Inc. Chip assembly including package element and integrated circuit chip
US8619257B2 (en) 2007-12-13 2013-12-31 Kimberley-Clark Worldwide, Inc. Recombinant bacteriophage for detection of nosocomial infection
US20100020382A1 (en) * 2008-07-22 2010-01-28 Qualcomm Mems Technologies, Inc. Spacer for mems device
US8379392B2 (en) 2009-10-23 2013-02-19 Qualcomm Mems Technologies, Inc. Light-based sealing and device packaging
US20110096508A1 (en) * 2009-10-23 2011-04-28 Qualcomm Mems Technologies, Inc. Light-based sealing and device packaging
US20110248364A1 (en) * 2010-04-08 2011-10-13 United Microelectronics Corporation Wafer Level Package of MEMS Microphone and Manufacturing Method thereof
US8368153B2 (en) * 2010-04-08 2013-02-05 United Microelectronics Corp. Wafer level package of MEMS microphone and manufacturing method thereof
US8220140B1 (en) 2010-09-13 2012-07-17 Western Digital (Fremont), Llc System for performing bonding a first substrate to a second substrate
US8763235B1 (en) 2010-09-13 2014-07-01 Western Digital (Fremont), Llc Method for bonding substrates in an energy assisted magnetic recording head
US20120182706A1 (en) * 2011-01-14 2012-07-19 Rf Micro Devices, Inc. Stacked shield compartments for electronic components
US8351221B2 (en) * 2011-01-14 2013-01-08 Rf Micro Devices, Inc. Stacked shield compartments for electronic components
US8779558B2 (en) * 2011-06-09 2014-07-15 Xintec Inc. Chip package structure and manufacturing method thereof
US20130207240A1 (en) * 2011-06-09 2013-08-15 Xintec Inc. Chip package structure and manufacturing method thereof
US9165802B2 (en) * 2011-10-31 2015-10-20 Sunedison Semiconductor Limited (Uen201334164H) Methods for cleaving a bonded wafer structure
US9925755B2 (en) 2011-10-31 2018-03-27 Sunedison Semiconductor Limited (Uen201334164H) Clamping apparatus for cleaving a bonded wafer structure and methods for cleaving
US20130105538A1 (en) * 2011-10-31 2013-05-02 Memc Electronic Materials, Inc. Methods for cleaving a bonded wafer structure
US9159596B2 (en) 2011-10-31 2015-10-13 Sunedison Semiconductor Limited Clamping apparatus for cleaving a bonded wafer structure
US20140116122A1 (en) * 2012-10-25 2014-05-01 Robert Bosch Tool Corporation Combined pressure and humidity sensor
US20170166443A1 (en) * 2015-12-11 2017-06-15 Hyundai Motor Company Manufacturing method of micro-electro-mechanical system sensor
US9828241B2 (en) * 2015-12-11 2017-11-28 Hyundai Motor Company Manufacturing method of micro-electro-mechanical system sensor capable of preventing diffusion phenomenon and reflow phenomenon

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