US20010046229A1 - Packet processor with real-time edit program construction engine - Google Patents

Packet processor with real-time edit program construction engine Download PDF

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Publication number
US20010046229A1
US20010046229A1 US09757354 US75735401A US20010046229A1 US 20010046229 A1 US20010046229 A1 US 20010046229A1 US 09757354 US09757354 US 09757354 US 75735401 A US75735401 A US 75735401A US 20010046229 A1 US20010046229 A1 US 20010046229A1
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Prior art keywords
packet
edit
switching
inbound
engine
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US09757354
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David Clear
Greg Davis
Mike Helbling
Tim Michels
Mathieu Tallegas
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Alcatel Internetworking PE Inc
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Alcatel Internetworking PE Inc
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Abstract

A switch includes one or more programmable packet switching controllers. The programmable packet switching controller has a real-time edit program construction engine. The edit program construction engine receives packet data, e.g., the header data, and disposition decisions generated by, for example, an application engine. The edit program construction engine uses the packet data and the disposition decisions to construct edit programs in real-time. The edit programs include a number of instructions for performing operations, such as COPY, DELETE, RECORD, PLAYBACK, INSERT and OVERWRITE, and are stored in an instruction RAM associated with an edit engine. The edit engine executes the instructions to modify inbound packets in order to transmit them as outbound packets.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • [0001]
    The present application claims the priority of U.S. Provisional Application No. 60/206,617 entitled “System and Method for Enhanced Line Cards” filed May 24, 2000, U.S. Provisional Application No. 60/206,996 entitled “Flow Resolution Logic System and Method” filed May 24, 2000 and U.S. Provisional Application No. 60/220,335 entitled “Programmable Packet Processor” filed Jul. 24, 2000, the contents of all of which are fully incorporated by reference herein. The present application contains subject matter related to the subject matter disclosed in U.S. Patent Application (Attorney Docket No. 40029/JEJ/X2/134021) entitled “Programmable Packet Processor with Flow Resolution Logic” filed Dec. 28, 2000, the contents of which are fully incorporated by reference herein.
  • BACKGROUND OF THE INVENTION
  • [0002]
    Many conventional packet switching controllers rely on fixed, i.e. non-programmable, logic to make the lion's share of packet decisions. Programmable logic has been relied on, if at all, to make decisions for “exceptional” packets. Such “hardwired” controllers, which make fixed logic the bulwark of decision-making and relegate programmable logic to at most a collateral role, have generally supported relatively high forwarding speeds but also a severely limited feature set. Feature limitations have been imposed by the general requirement of including discrete fixed logic for each application the controller is expected to support. This general requirement of application-specific fixed logic has limited the number of applications the controller can support and has made it difficult to “field upgrade” the controller to add application support. Instead, new application support has typically required a hardware upgrade.
  • [0003]
    Due to the relative inflexibility of hardwired switching controllers, controllers reliant on programmable logic for routine packet decision-making (particularly controllers having multiple programmable processors) have been given more attention in recent years. Such multiprocessor controllers, sometimes called “network processors”, can typically support a variety of applications and are typically more amenable to field upgrades due to their programmable nature.
  • [0004]
    Within the realm of network processors, there is still room for architectural improvement. In particular, a network processor that provides the high degree of flexibility normally associated with network processors without substantially sacrificing the high speed of conventional hardwired controllers is desired. For example, it is often desirable to be able to modify in field the edit programs used to modify inbound packets. This way, the edit programs can be customized for the inbound packets.
  • [0005]
    Therefore, it is desirable to provide a programmable network processor having an edit program construction engine that is capable of creating edit programs real-time.
  • SUMMARY
  • [0006]
    In one embodiment of the present invention, an edit module is provided. The edit module includes an edit program construction engine. The edit program construction engine creates an edit program for a packet in response to a disposition decision for the packet. The edit program is applied to modify the packet.
  • [0007]
    In another embodiment of the present invention, a method of modifying an inbound packet to generate an outbound packet is provided. An edit program is created for the inbound packet in response to a disposition decision for the inbound packet, and the edit program is applied to the inbound packet to generate the outbound packet.
  • [0008]
    In yet another embodiment of the present invention, a packet switching controller for processing an inbound packet is provided. The packet switching controller includes a first engine for constructing an edit program for the inbound packet in response to a disposition decision for the inbound packet. The packet switching controller also includes a memory for storing the edit program and a second engine for executing the edit program to modify the inbound packet to generate an outbound packet.
  • [0009]
    In still another embodiment of the present invention, a method is provided for processing an inbound packet to generate an outbound packet using a real-time constructed edit program. The edit program is constructed for the inbound packet in response to a disposition decision for the inbound packet. The edit program is stored in a memory, and the inbound packet is modified by executing the edit program to generate the outbound packet.
  • [0010]
    In further embodiment of the present invention, a switch is provided. The switch comprises a switching backplane and a plurality of packet switching controllers. One or more packet switching controllers comprise a buffer for receiving and storing an inbound packet, a first engine for constructing an edit program real-time using a disposition decision for the inbound packet, and a second engine for executing the edit program to modify the inbound packet into an outbound packet. The packet switching controller that modifies the inbound packet transmits the outbound packet over the switching backplane to one or more of other packet switching controllers.
  • [0011]
    In further embodiment of the present invention, a switch is provided. The switch comprises a switching backplane and a plurality of packet switching controllers. One or more packet switching controllers comprise means for receiving and storing an inbound packet, means for constructing an edit program real-time using a disposition decision for the inbound packet, and means for executing the edit program to modify the inbound packet into an outbound packet. The packet switching controller that modifies the inbound packet transmits the outbound packet over the switching backplane to one or more of other packet switching controllers.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • [0012]
    These and other aspects of the invention may be understood by reference to the following detailed description, taken in conjunction with the accompanying drawings, which are briefly described below.
  • [0013]
    [0013]FIG. 1 illustrates a network environment including a packet switching node in which one embodiment of the present invention is used;
  • [0014]
    [0014]FIG. 2 is a block diagram of a switching interface in one embodiment of the present invention;
  • [0015]
    [0015]FIG. 3 is a block diagram of a programmable packet switching controller in one embodiment of the present invention;
  • [0016]
    [0016]FIG. 4 is a block diagram of a programmable packet switching controller in another embodiment of the present invention;
  • [0017]
    [0017]FIG. 5 is a block diagram illustrating a process of creating and executing edit programs in one embodiment of the present invention; and
  • [0018]
    [0018]FIG. 6 is a flow diagram illustrating creation and execution of edit programs in one embodiment of the present invention.
  • DETAILED DESCRIPTION
  • [0019]
    I. Overview
  • [0020]
    In FIG. 1, network environment including a packet switching node 10 is illustrated. The packet switching node may also be referred to as a switch, a data communication node or a data communication switch. The packet switching node 10 includes switching interfaces 14, 16 and 18 interconnected to respective groups of LANs 30, 32, 34, and interconnected to one another over data paths 20, 22, 24 via switching backplane 12. The switching backplane 12 preferably includes switching fabric. The switching interfaces may also be coupled to one another over control paths 26 and 28.
  • [0021]
    The switching interfaces 14, 16, 18 preferably forward packets to and from their respective groups of LANs 30, 32, 34 in accordance with one or more operative communication protocols, such as, for example, media access control (MAC) bridging and Internet Protocol (IP) routing. The switching node 10 is shown for illustrative purposes only. In practice, packet switching nodes may include more or less than three switching interfaces.
  • [0022]
    [0022]FIG. 2 is a block diagram of a switching interface 50 in one embodiment of the present invention. The switching interface 50 may be similar, for example, to the switching interfaces 14, 16, 18 of FIG. 1. The switching interface 50 includes an access controller 54 coupled between LANs and a packet switching controller 52. The access controller 54, which may, for example, include a media access controller (MAC), preferably receives inbound packets off LANs, performs flow-independent physical and MAC layer operations on the inbound packets and transmits the inbound packets to the packet switching controller 52 for flow-dependent processing. The access controller 54 preferably also receives outbound packets from the packet switching controller 52 and transmits the packets on LANs. The access controller 54 may also perform physical and MAC layer operations on the outbound packets prior to transmitting them on LANs.
  • [0023]
    The packet switching controller 52 preferably is programmable for handling packets having wide variety of communications protocols. The packet switching controller 52 preferably receives inbound packets, classifies the packets, modifies the packets in accordance with flow information and transmits the modified packets on switching backplane, such as the switching backplane 12 of FIG. 1. The packet switching controller 52 preferably also receives packets modified by other packet switching controllers via the switching backplane and transmits them to the access controller 54 for forwarding on LANs. The packet switching controller 52 may also subject selected ones of the packets to egress processing prior to transmitting them to the access controller 54 for forwarding on LANs.
  • [0024]
    [0024]FIG. 3 is a block diagram of a programmable packet switching controller 100 in one embodiment of the present invention. The programmable packet switching controller 100, for example, may be similar to the packet switching controller 52 of FIG. 2. The programmable packet switching controller 100 preferably has flow resolution logic for classifying and routing incoming flows of packets. Packet switching controllers in other embodiments may include more or less components. For example, a packet switching controller in another embodiment may include a pattern match module for comparing packet portions against a predetermined pattern to look for a match. Further, packet switching controllers in still other embodiments may include other components, such as, for example, a policing engine, in addition to or instead of the components included in the programmable packet switching controller 100.
  • [0025]
    Due to its programmable nature, the programmable packet switching controller preferably provides flexibility in handling many different protocols and/or field upgradeability. The programmable packet switching controller may also be referred to as a packet switching controller, a switching controller, a programmable packet processor, a network processor, a communications processor or as another designation commonly used by those skilled in the art.
  • [0026]
    The programmable packet switching controller 100 includes a packet buffer 102, a packet classification engine 104, and an application engine 106. The programmable packet switching controller 100 preferably receives inbound packets 108. The packets may include, but are not limited to, Ethernet frames, ATM cells, TCP/IP and/or UDP/IP packets, and may also include other Layer 2 (Data Link/MAC Layer), Layer 3 (Network Layer) or Layer 4 (Transport Layer) data units. For example, the packet buffer 102 may receive inbound packets from one or more Media Access Control (MAC) Layer interfaces over the Ethernet.
  • [0027]
    The received packets preferably are stored in the packet buffer 102. The packet buffer 102 may include a packet FIFO for receiving and temporarily storing the packets. The packet buffer 102 preferably provides the stored packets or portions thereof to the packet classification engine 104 and the application engine 106 for processing.
  • [0028]
    The packet buffer 102 may also include an edit module for editing the packets prior to forwarding them out of the switching controller as outbound packets 118. The edit module may include an edit program construction engine for creating edit programs real-time and/or an edit engine for modifying the packets. The application engine 106 preferably provides application data 116, which may include a disposition decision for the packet, to the packet buffer 102, and the edit program construction engine preferably uses the application data to create the edit programs. The outbound packets 118 may be transmitted over a switching fabric interface to communication networks, such as, for example, the Ethernet.
  • [0029]
    The packet buffer 102 may also include either or both a header data extractor and a header data cache. The header data extractor preferably is used to extract one or more fields from the packets, and to store the extracted fields in the header data cache as extracted header data. The extracted header data may include, but are not limited to, some or all of the packet header. In an Ethernet system, for example, the header data cache may also store first N bytes of each frame.
  • [0030]
    The extracted header data preferably is provided in an output signal 110 to the packet classification engine 104 for processing. The application engine may also request and receive the extracted header data over an interface 114. The extracted header data may include, but are not limited to, one or more of Layer 2 MAC addresses, 802.1P/Q tag status, Layer 2 encapsulation type, Layer 3 protocol type, Layer 3 addresses, ToS (type of service) values and Layer 4 port numbers. In other embodiments, the output signal 110 may include the whole inbound packet, instead of or in addition to the extracted header data. In still other embodiments, the packet classification engine 104 may be used to edit the extracted header data to be placed in a format suitable for use by the application engine, and/or to load data into the header data cache.
  • [0031]
    The packet classification engine 104 preferably includes a programmable microcode-driven embedded processing engine. The packet classification engine 104 preferably is coupled to an instruction RAM (IRAM) (not shown) . The packet classification engine preferably reads and executes instructions stored in the IRAM. In one embodiment, many of the instructions executed by the packet classification engine are conditional jumps. In this embodiment, the classification logic includes a decision tree with leaves at the end points that preferably indicate different types of packet classifications. Further, branches of the decision tree preferably are selected based on comparisons between the conditions of the instructions and the header fields stored in the header data cache. In other embodiments, the classification logic may not be based on a decision tree.
  • [0032]
    In one embodiment of the present invention, the application engine 106 preferably has a pipelined architecture wherein multiple programmable sub-engines are pipelined in series. Each programmable sub-engine preferably performs an action on the packet, and preferably forwards the packet to the next programmable sub-engine in a “bucket brigade” fashion. The packet classification engine preferably starts the pipelined packet processing by starting the first programmable sub-engine in the application engine using a start signal 112. The start signal 112 may include identification of one or more programs to be executed in the application engine 106. The start signal 112 may also include packet classification information. The programmable sub-engines in the application engine preferably have direct access to the header data and the extracted fields stored in the header data cache over the interface 114.
  • [0033]
    The application engine may include other processing stages not performed by the programmable sub-engines, however, the decision-making stages preferably are performed by the programmable sub-engines to increase flexibility. In other embodiments, the application engine may include other processing architectures.
  • [0034]
    II. Real-Time Edit Program Construction Engine
  • [0035]
    [0035]FIG. 4 is a block diagram of a programmable packet switching controller 150. Similar to the programmable packet switching controller 100 of FIG. 3, the programmable packet switching controller 150 includes a packet buffer 152, a packet classification engine 154 and an application engine 156. In addition, the programmable packet switching controller 150 includes an edit engine 172, an instruction RAM (IRAM) 174 and an edit program construction engine 168. In the programmable packet switching controller 100 of FIG. 3, an IRAM, an edit engine and an edit program construction engine may be included in the packet buffer 102.
  • [0036]
    Referring back to FIG. 4, the application engine 156 preferably provides an output signal 166 to the edit program construction engine 168. The output signal 166 preferably includes application data (or a disposition decision), which may include, but is not limited to, one or more of accounting data, routing data and policing data. The output signal 166 preferably also includes packet header data.
  • [0037]
    The edit program construction engine 168 preferably uses the packet header data and the application data to generate an edit program that has been tailored to the packet being processed. The edit program preferably contains a number of instructions to be executed by the edit engine 172. The instructions in the edit program may be used to perform operations including, but are not limited to, one or more of RECORD, PLAYBACK, COPY, DELETE, INSERT and OVERWRITE operations or their equivalents. Prior to being executed, the edit programs 170 preferably are provided to and stored in the IRAM 174 associated with the edit engine 172. In other embodiments, the IRAM may be included in the edit engine 172.
  • [0038]
    The edit engine 172 preferably executes the instructions stored in the IRAM 174 to modify an inbound packet 176 from the packet buffer 152 to provide as an outbound packet 178. The edit program preferably has been customized by the edit program construction engine for that particular inbound packet. The process of creating the edit program based on disposition decision for a particular packet and executing the edit program to modify that particular packet preferably continues for the flows of inbound packets that the programmable packet switching controller receives.
  • [0039]
    [0039]FIG. 5 is a block diagram illustrating a process of constructing and executing edit programs in one embodiment of the present invention. An edit program construction engine 204 preferably is used to create edit programs for inbound packets. The edit programs preferably are stored in an IRAM 202, and preferably are executed by an edit engine 200. The edit engine 200, the IRAM 202 and the edit program construction engine 204 may be included in a packet buffer, such as, for example, the packet buffer 102 of the programmable packet switching controller 100 in FIG. 3. The edit engine 200, the IRAM 202 and the edit program construction engine 204 may alternatively be included in a programmable packet switching controller, such as, for example, the programmable packet switching controller 150 of FIG. 4, separate and apart from a packet buffer.
  • [0040]
    The edit program construction engine 204 preferably receives packet data and application data 216 from an application engine, such as, for example, the application engine 156 of FIG. 4. The packet data may include packet header data. The packet header data may include, but are not limited to, one or more of Layer 2 MAC addresses, 802.1P/Q tag status, Layer 2 encapsulation type, Layer 3 protocol type, Layer 3 addresses, ToS (type of service) values and Layer 4 port numbers. The application data may include a disposition decision for a packet, and may contain, but are not limited to, one or more of accounting data, routing data and policing data.
  • [0041]
    The edit program construction engine 204 preferably uses the application data and the packet data to create edit programs 218. The edit programs preferably are tailored to the packets to be edited. The edit programs preferably are stored in the IRAM 202. The edit programs preferably include a number of instructions to be executed, and preferably have a starting location and an ending (or halting) location.
  • [0042]
    The edit engine 200 preferably includes a playback buffer 206, a packet input buffer 208 and a packet output buffer 210. In other embodiments, however, one or more of the playback buffer, the packet input buffer and the packet output buffer may be implemented outside of the edit engine. The packet input buffer 208 preferably receives inbound packets 212 from, for example, a packet FIFO within the packet buffer, and provide them to the playback buffer 206 and the packet output buffer 210 as needed. In other embodiments, the packet input buffer 212 may not be used, and instead, the playback buffer 206 and the packet output buffer 210 may receive the inbound packets directly from the packet FIFO.
  • [0043]
    The inbound packet may be stored in the packet FIFO (inside the packet buffer) and/or the packet input buffer 208 until such time when an edit program has been created to modify that inbound packet. in other embodiments, the inbound packet may be stored in other buffers. The edit program preferably includes a number of instructions for performing one or more of the following operations: RECORD, PLAYBACK, COPY, DELETE, INSERT and OVERWRITE, or their equivalents. The edit program may also include other instructions to perform other operations.
  • [0044]
    The playback buffer 206 preferably receives instructions 220 to perform a RECORD operation. During the RECORD operation, the playback buffer preferably stores data, such as, for example, the header data, from the current inbound packet 214. The RECORD operation preferably is performed for IP fragmentation where the inbound packet's IP header preferably is recorded and then played back multiple times to construct each fragment. For the PLAYBACK operation, the instructions 220 preferably are provided to the playback buffer to read the IP header and instructions 224 preferably are provided to the packet output buffer 210 to write the IP header. In other embodiments, the playback buffer may store one or more inbound packets to be played back.
  • [0045]
    The inbound packets stored in the packet input buffer 208 may be discarded by providing instructions 222 to the packet input buffer to perform a DELETE operation. For editing purposes, the inbound packets may be copied from the packet input buffer to the packet output buffer during a COPY operation. For the COPY operation, instructions 222 preferably are provided to the packet input buffer to read the inbound packets 228, and instructions 224 preferably are provided to the packet output buffer 210 to write the inbound packets 228.
  • [0046]
    Editing of the inbound packets preferably are performed in the packet output buffer during OVERWRITE operations. The packet output buffer 210 preferably receives instructions 224 to perform the OVERWRITE operations. During the OVERWRITE operations, one or more bits of the inbound packets preferably are overwritten with other bits so as to modify the inbound packets into outbound packets. The edit programs preferably include one or more instructions that determine the bits to be overwritten in the inbound packets. The edit programs preferably also include one or more instructions that determine the data to be used to overwrite these bits. The overwritten bits preferably are in the packet header. The packet output buffer preferably transmits the modified inbound packets as outbound packets 230.
  • [0047]
    [0047]FIG. 6 is a flow diagram illustrating creation and execution of edit programs in one embodiment of the present invention. In step 250, a packet input buffer, such as, for example, the packet input buffer 208 of FIG. 5 preferably receives an inbound packet. The inbound packet preferably remains in the packet input buffer until an edit program is created to modify it.
  • [0048]
    In step 252, an edit program construction engine, such as, for example, the edit program construction engine 204 of FIG. 5, preferably receives application data and packet data of the inbound packet. The application data may include a disposition decision, and may contain, but are not limited to, one or more of accounting data, routing data and policing data. The packet data may include, but are not limited to, packet header data.
  • [0049]
    In step 254, the edit program construction engine preferably creates an edit program using the application data and the packet data. The edit program may include instructions for performing, but is not limited to, one or more of RECORD, PLAYBACK, COPY, DELETE, INSERT and OVERWRITE operations. In step 256, the created edit program preferably is stored in an IRAM, such as, for example, the IRAM 202 of FIG. 5.
  • [0050]
    In step 258, the inbound packet preferably is copied to a packet output buffer, such as, for example, the packet output buffer 210 of FIG. 5, during a COPY operation. In step 260, the inbound packet preferably is modified into an outbound packet using INSERT, OVERWRITE, DELETE or other operations.
  • [0051]
    For example, for basic IP routing, the MAC source address of the packet, e.g., frame, preferably is replaced through packet modification with the MAC address of the router. The IP TTL (time-to-live) field in the IP header preferably is decremented to indicate that the IP packet has traversed a hop, and the IP header checksum is preferably updated to reflect the changed IP headers. In addition, Quality of Service (QoS) actions may modify the ToS/Precedence field, which may also be referred to as the Differentiated Services Codepoint field, in the IP header to reflect the QoS handling of the packet.
  • [0052]
    In other exemplary uses, such as Network Address Translation, the IP source or destination addresses may be rewritten, as may the TCP source or destination port number as well as fields in the TCP header, such as, for example, the Sequence Number or Acknowledge Number. Changes to IP addresses typically also affect the TCP header checksum, which may also be changed. The edit logic in the edit engine preferably is notified by special commands that edited data affects the IP and/or TCP header checksums, and when the checksums appear in the data stream, the edit checksum logic preferably fixes, i.e., corrects, the checksums appropriately. The edit checksum logic preferably is implemented using hardware, but it may also be implemented using software.
  • [0053]
    In step 262, the outbound packet preferably is transmitted, for example, over a switching backplane, which includes switching fabric. A packet switching controller on the egress side (of the backplane) preferably receives the outbound packet. The packet switching controller on the egress side preferably provides the outbound packet to an access controller (MAC Layer interface) for transmission on the Ethernet.
  • [0054]
    Although this invention has been described in certain specific embodiments, many additional modifications and variations would be apparent to those skilled in the art. It is therefore to be understood that this invention may be practiced otherwise than as specifically described. Thus, the present embodiments of the invention should be considered in all respects as illustrative and not restrictive, the scope of the invention to be determined by the appended claims and their equivalents.

Claims (22)

    We claim:
  1. 1. An edit module comprising:
    an edit program construction engine,
    wherein the edit program construction engine creates an edit program for a packet in response to a disposition decision for the packet, and wherein the edit program is applied to modify the packet.
  2. 2. The edit module of
    claim 1
    wherein the edit program includes a plurality of instructions, and wherein one or more instructions determined one or more data bits to be included in the modified packet.
  3. 3. A method of modifying an inbound packet to generate an outbound packet, the method comprising the steps of:
    creating an edit program for the inbound packet in response to a disposition decision for the inbound packet; and
    applying the edit program to the inbound packet to generate the outbound packet.
  4. 4. The method of modifying an inbound packet of
    claim 3
    wherein the edit program includes a plurality of instructions, and wherein the step of applying the edit program comprises the step of determining one or more data bits to be included in the outbound packet.
  5. 5. A packet switching controller for processing an inbound packet, the packet switching controller comprising:
    a first engine for constructing an edit program for the inbound packet in response to a disposition decision for the inbound packet;
    a memory for storing the edit program; and
    a second engine for executing the edit program to modify the inbound packet to generate an outbound packet.
  6. 6. The packet switching controller of
    claim 5
    wherein the edit program includes a plurality of instructions, and one or more instructions determine a plurality of data bits to be included in the outbound packet.
  7. 7. The packet switching controller of
    claim 5
    wherein the edit program includes a plurality of instructions, and one or more instructions are for performing at least one operation selected from the group consisting of RECORD, PLAYBACK, COPY, DELETE, INSERT and OVERWRITE operations.
  8. 8. The packet switching controller of
    claim 5
    wherein the edit program includes a plurality of instructions that are executed serially.
  9. 9. The packet switching controller of
    claim 5
    wherein the second engine includes a packet input buffer for receiving and for temporarily storing the inbound packet.
  10. 10. The packet switching controller of
    claim 9
    wherein the inbound packet is stored in the packet input buffer until the edit program has been constructed for the inbound packet.
  11. 11. The packet switching controller of
    claim 5
    wherein the second engine includes a playback buffer for storing data from the inbound packet and for playing back at least a portion of the stored data.
  12. 12. The packet switching controller of
    claim 5
    wherein the second engine includes a packet output buffer, which is used to modify one or more bits of the inbound packet to generate the outbound packet, and to transmit the outbound packet.
  13. 13. A method of processing an inbound packet to generate an outbound packet using a real-time constructed edit program, the method comprising the steps of:
    constructing the edit program for the inbound packet in response to a disposition decision for the inbound packet;
    storing the edit program in a memory;
    modifying the inbound packet by executing the edit program to generate the outbound packet.
  14. 14. The method of processing an inbound packet of
    claim 13
    wherein the step of modifying the inbound packet includes the step of determining a plurality of data bits to be included in the outbound packet.
  15. 15. The method of processing an inbound packet of
    claim 13
    wherein the step of modifying the inbound packet includes the step of performing at least one operation selected from the group consisting of RECORD, PLAYBACK, COPY, DELETE, INSERT and OVERWRITE operations.
  16. 16. The method of processing an inbound packet of
    claim 13
    wherein the step of modifying the inbound packet includes the step of serially executing a plurality of instructions.
  17. 17. The method of processing an inbound packet of
    claim 13
    further comprising the steps of receiving the inbound packet and temporarily storing the inbound packet.
  18. 18. The method of processing an inbound packet of
    claim 17
    wherein the inbound packet is stored until the edit program has been constructed for the inbound packet.
  19. 19. The method of processing an inbound packet of
    claim 13
    further comprising the steps of storing data from the inbound packet and playing back at least a portion of the stored data.
  20. 20. The method of processing an inbound packet of
    claim 13
    wherein the step of modifying the inbound packet includes the step of modifying one or more bits of the inbound packet.
  21. 21. A switch comprising a switching backplane and a plurality of packet switching controllers, one or more packet switching controllers comprising:
    a buffer for receiving and storing an inbound packet;
    a first engine for constructing an edit program real-time using a disposition decision for the inbound packet; and
    a second engine for executing the edit program to modify the inbound packet into an outbound packet,
    wherein the packet switching controller that modifies the inbound packer transmits the outbound packet over the switching backplane to one or more of other packet switching controllers.
  22. 22. A switch comprising a switching backplane and a plurality of packet switching controllers, one or more packet switching controllers comprising:
    means for receiving and storing an inbound packet;
    means for constructing an edit program real-time using a disposition decision for the inbound packet; and
    means for executing the edit program to modify the inbound packet,
    wherein the packet switching controller that modifies the inbound packet transmits the outbound packet over the switching backplane to one or more of other packet switching controllers.
US09757354 2000-05-24 2001-01-08 Packet processor with real-time edit program construction engine Abandoned US20010046229A1 (en)

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US09757349 Abandoned US20010053150A1 (en) 2000-05-24 2001-01-08 Packet processor with programmable application logic
US09757354 Abandoned US20010046229A1 (en) 2000-05-24 2001-01-08 Packet processor with real-time edit program construction engine
US09861013 Abandoned US20020016856A1 (en) 2000-05-24 2001-05-18 Dynamic application port service provisioning for packet switch
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040052244A1 (en) * 2001-01-24 2004-03-18 Ilpo Vitikka Method for carrying out log in
US20060126622A1 (en) * 2004-12-13 2006-06-15 Electronics And Telecommunications Research Institute Apparatus for changing MAC address to identify subscriber and method thereof
US20080279196A1 (en) * 2004-04-06 2008-11-13 Robert Friskney Differential Forwarding in Address-Based Carrier Networks
US20090122784A1 (en) * 2005-06-06 2009-05-14 Yikang Lei Method and device for implementing the security of the backbone network
US9118590B2 (en) 2004-07-02 2015-08-25 Rpx Clearinghouse Llc VLAN support of differentiated services
US20150326696A1 (en) * 2014-05-09 2015-11-12 Google Inc. System and method for adapting to network protocol updates
US9356862B2 (en) 2004-04-06 2016-05-31 Rpx Clearinghouse Llc Differential forwarding in address-based carrier networks

Families Citing this family (148)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7382736B2 (en) 1999-01-12 2008-06-03 Mcdata Corporation Method for scoring queued frames for selective transmission through a switch
US7600131B1 (en) 1999-07-08 2009-10-06 Broadcom Corporation Distributed processing in a cryptography acceleration chip
US7436830B2 (en) * 2000-04-03 2008-10-14 P-Cube Ltd. Method and apparatus for wire-speed application layer classification of upstream and downstream data packets
US7236490B2 (en) 2000-11-17 2007-06-26 Foundry Networks, Inc. Backplane interface adapter
US6735218B2 (en) * 2000-11-17 2004-05-11 Foundry Networks, Inc. Method and system for encoding wide striped cells
US7356030B2 (en) 2000-11-17 2008-04-08 Foundry Networks, Inc. Network switch cross point
US7206283B2 (en) 2001-05-15 2007-04-17 Foundry Networks, Inc. High-performance network switch
US7596139B2 (en) 2000-11-17 2009-09-29 Foundry Networks, Inc. Backplane interface adapter with error control and redundant fabric
US7002980B1 (en) 2000-12-19 2006-02-21 Chiaro Networks, Ltd. System and method for router queue and congestion management
US6731652B2 (en) * 2001-02-14 2004-05-04 Metro Packet Systems Inc. Dynamic packet processor architecture
US7286532B1 (en) * 2001-02-22 2007-10-23 Cisco Technology, Inc. High performance interface logic architecture of an intermediate network node
US6606681B1 (en) * 2001-02-23 2003-08-12 Cisco Systems, Inc. Optimized content addressable memory (CAM)
JP4410467B2 (en) * 2001-03-19 2010-02-03 インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation Selection methods and apparatus of the cache input
US6910097B1 (en) * 2001-04-09 2005-06-21 Netlogic Microsystems, Inc. Classless interdomain routing using binary content addressable memory
JP2003018196A (en) * 2001-04-27 2003-01-17 Fujitsu Ltd Packet transfer device, semiconductor device, and packet transfer system
US20020188732A1 (en) * 2001-06-06 2002-12-12 Buckman Charles R. System and method for allocating bandwidth across a network
US7095715B2 (en) * 2001-07-02 2006-08-22 3Com Corporation System and method for processing network packet flows
US6950873B2 (en) * 2001-08-02 2005-09-27 International Business Machines Corporation Apparatus and method for port sharing a plurality of server processes
US20030033519A1 (en) * 2001-08-13 2003-02-13 Tippingpoint Technologies,Inc. System and method for programming network nodes
US7170891B2 (en) * 2001-08-30 2007-01-30 Messenger Terabit Networks, Inc. High speed data classification system
US20030074467A1 (en) * 2001-10-11 2003-04-17 Oblak Sasha Peter Load balancing system and method for data communication network
US20030126234A1 (en) * 2001-11-20 2003-07-03 P-Cube Ltd. Apparatus, method, and software for analyzing network traffic in a service aware network
US7844688B2 (en) * 2001-11-20 2010-11-30 P-Cube Ltd. Apparatus, method, and software for analyzing network traffic in a service aware network
US7424019B1 (en) 2001-11-27 2008-09-09 Marvell Israel (M.I.S.L) Ltd. Packet header altering device
US7239639B2 (en) * 2001-12-27 2007-07-03 3Com Corporation System and method for dynamically constructing packet classification rules
US6961808B1 (en) * 2002-01-08 2005-11-01 Cisco Technology, Inc. Method and apparatus for implementing and using multiple virtual portions of physical associative memories
US7321926B1 (en) 2002-02-11 2008-01-22 Extreme Networks Method of and system for allocating resources to resource requests
US7447777B1 (en) * 2002-02-11 2008-11-04 Extreme Networks Switching system
US7584262B1 (en) 2002-02-11 2009-09-01 Extreme Networks Method of and system for allocating resources to resource requests based on application of persistence policies
US7814204B1 (en) 2002-02-11 2010-10-12 Extreme Networks, Inc. Method of and system for analyzing the content of resource requests
US7298746B1 (en) 2002-02-11 2007-11-20 Extreme Networks Method and system for reassembling and parsing packets in a network environment
WO2003085519A1 (en) 2002-04-04 2003-10-16 Xelerated Ab Method and apparatus for processing data
US7649885B1 (en) 2002-05-06 2010-01-19 Foundry Networks, Inc. Network routing system for enhanced efficiency and monitoring capability
US7187687B1 (en) * 2002-05-06 2007-03-06 Foundry Networks, Inc. Pipeline method and system for switching packets
US20120155466A1 (en) 2002-05-06 2012-06-21 Ian Edward Davis Method and apparatus for efficiently processing data packets in a computer network
US7266117B1 (en) 2002-05-06 2007-09-04 Foundry Networks, Inc. System architecture for very fast ethernet blade
US7468975B1 (en) 2002-05-06 2008-12-23 Foundry Networks, Inc. Flexible method for processing data packets in a network routing system for enhanced efficiency and monitoring capability
US7548541B2 (en) * 2002-06-04 2009-06-16 Alcatel-Lucent Usa Inc. Managing VLAN traffic in a multiport network node using customer-specific identifiers
US7167913B2 (en) * 2002-06-05 2007-01-23 Universal Electronics Inc. System and method for managing communication links
WO2004010288A1 (en) * 2002-07-19 2004-01-29 Xelerated Ab Method and apparatus for pipelined processing of data packets
US7403542B1 (en) * 2002-07-19 2008-07-22 Qlogic, Corporation Method and system for processing network data packets
US7411904B2 (en) * 2002-07-22 2008-08-12 Lucent Technologies Inc. Multiprotocol label switching (MPLS) edge service extraction
EP1552412A4 (en) * 2002-08-14 2007-05-23 Drs Technical Services Inc Method and apparatus for monitoring and controlling the allocation of network bandwidth
EP1395015B1 (en) * 2002-08-30 2005-02-02 Errikos Pitsos Method, gateway and system for transmitting data between a device in a public network and a device in an internal network
US20040042463A1 (en) * 2002-08-30 2004-03-04 Intel Corporation Method and apparatus for address lookup
US20040057433A1 (en) * 2002-09-24 2004-03-25 Daniel Wayne T. Methods and systems for prioritizing packets of data in a communications system
JP4598354B2 (en) 2002-09-30 2010-12-15 株式会社エヌ・ティ・ティ・ドコモ Communication system, relay apparatus and communication control method
US20040123120A1 (en) * 2002-12-18 2004-06-24 Broadcom Corporation Cryptography accelerator input interface data handling
US7568110B2 (en) * 2002-12-18 2009-07-28 Broadcom Corporation Cryptography accelerator interface decoupling from cryptography processing cores
US20040196840A1 (en) * 2003-04-04 2004-10-07 Bharadwaj Amrutur Passive measurement platform
US7953885B1 (en) * 2003-04-18 2011-05-31 Cisco Technology, Inc. Method and apparatus to apply aggregate access control list/quality of service features using a redirect cause
US6901072B1 (en) 2003-05-15 2005-05-31 Foundry Networks, Inc. System and method for high speed packet transmission implementing dual transmit and receive pipelines
US7613775B2 (en) 2003-11-25 2009-11-03 Freescale Semiconductor, Inc. Network message filtering using hashing and pattern matching
US7240041B2 (en) * 2003-11-25 2007-07-03 Freescale Semiconductor, Inc. Network message processing using inverse pattern matching
US8181258B2 (en) * 2003-11-26 2012-05-15 Agere Systems Inc. Access control list constructed as a tree of matching tables
US7644085B2 (en) * 2003-11-26 2010-01-05 Agere Systems Inc. Directed graph approach for constructing a tree representation of an access control list
US7903555B2 (en) * 2003-12-17 2011-03-08 Intel Corporation Packet tracing
US7535899B2 (en) * 2003-12-18 2009-05-19 Intel Corporation Packet classification
US7496684B2 (en) * 2004-01-20 2009-02-24 International Business Machines Corporation Developing portable packet processing applications in a network processor
WO2005088180A1 (en) * 2004-03-10 2005-09-22 Swagelok Company Fluid device actuator with manual override
US7817659B2 (en) 2004-03-26 2010-10-19 Foundry Networks, Llc Method and apparatus for aggregating input data streams
US7292591B2 (en) 2004-03-30 2007-11-06 Extreme Networks, Inc. Packet processing system architecture and method
US7385984B2 (en) * 2004-03-30 2008-06-10 Extreme Networks, Inc. Packet processing system architecture and method
US8161270B1 (en) 2004-03-30 2012-04-17 Extreme Networks, Inc. Packet data modification processor
US7304996B1 (en) 2004-03-30 2007-12-04 Extreme Networks, Inc. System and method for assembling a data packet
US8730961B1 (en) 2004-04-26 2014-05-20 Foundry Networks, Llc System and method for optimizing router lookup
US7813263B2 (en) 2004-06-30 2010-10-12 Conexant Systems, Inc. Method and apparatus providing rapid end-to-end failover in a packet switched communications network
US7760719B2 (en) * 2004-06-30 2010-07-20 Conexant Systems, Inc. Combined pipelined classification and address search method and apparatus for switching environments
EP1776573A1 (en) 2004-08-09 2007-04-25 ABB Sp.z.o.o. A method and a device for diagnosing technical equipment
US20060080467A1 (en) * 2004-08-26 2006-04-13 Sensory Networks, Inc. Apparatus and method for high performance data content processing
US9197857B2 (en) * 2004-09-24 2015-11-24 Cisco Technology, Inc. IP-based stream splicing with content-specific splice points
US7657703B1 (en) 2004-10-29 2010-02-02 Foundry Networks, Inc. Double density content addressable memory (CAM) lookup scheme
FR2878346A1 (en) * 2004-11-22 2006-05-26 France Telecom Method and system for measuring the use of an application
US20060198375A1 (en) * 2004-12-07 2006-09-07 Baik Kwang H Method and apparatus for pattern matching based on packet reassembly
EP1829295B1 (en) 2004-12-21 2009-09-23 TELEFONAKTIEBOLAGET LM ERICSSON (publ) An arrangement and a method relating to flow of packets in communication systems
US8250231B2 (en) 2004-12-22 2012-08-21 Marvell International Ltd. Method for reducing buffer capacity in a pipeline processor
US7739424B2 (en) * 2005-04-18 2010-06-15 Integrated Device Technology, Inc. Packet processing switch and methods of operation thereof
CN100493225C (en) 2005-06-10 2009-05-27 株式会社Ntt都科摩 Portable communication terminal
US8498297B2 (en) 2005-08-26 2013-07-30 Rockstar Consortium Us Lp Forwarding table minimisation in ethernet switches
US7639715B1 (en) 2005-09-09 2009-12-29 Qlogic, Corporation Dedicated application interface for network systems
US20070136209A1 (en) * 2005-12-06 2007-06-14 Shabbir Khan Digital object title authentication
US8448162B2 (en) 2005-12-28 2013-05-21 Foundry Networks, Llc Hitless software upgrades
JP4759389B2 (en) * 2006-01-10 2011-08-31 アラクサラネットワークス株式会社 Packet communication device
US7596142B1 (en) * 2006-05-12 2009-09-29 Integrated Device Technology, Inc Packet processing in a packet switch with improved output data distribution
US7817652B1 (en) 2006-05-12 2010-10-19 Integrated Device Technology, Inc. System and method of constructing data packets in a packet switch
US7747904B1 (en) 2006-05-12 2010-06-29 Integrated Device Technology, Inc. Error management system and method for a packet switch
US7706387B1 (en) 2006-05-31 2010-04-27 Integrated Device Technology, Inc. System and method for round robin arbitration
US8064464B2 (en) * 2006-06-16 2011-11-22 Harris Corporation Method and system for inbound content-based QoS
US20070291768A1 (en) * 2006-06-16 2007-12-20 Harris Corporation Method and system for content-based differentiation and sequencing as a mechanism of prioritization for QOS
US7895331B1 (en) * 2006-08-10 2011-02-22 Bivio Networks, Inc. Method for dynamically configuring network services
US7903654B2 (en) 2006-08-22 2011-03-08 Foundry Networks, Llc System and method for ECMP load sharing
KR100847146B1 (en) 2006-11-06 2008-07-18 한국전자통신연구원 2×10 giga bit ethernet application implementation apparatus
US8179896B2 (en) * 2006-11-09 2012-05-15 Justin Mark Sobaje Network processors and pipeline optimization methods
US8238255B2 (en) 2006-11-22 2012-08-07 Foundry Networks, Llc Recovering from failures without impact on data traffic in a shared bus architecture
US20090279441A1 (en) 2007-01-11 2009-11-12 Foundry Networks, Inc. Techniques for transmitting failure detection protocol packets
US8594085B2 (en) * 2007-04-11 2013-11-26 Palo Alto Networks, Inc. L2/L3 multi-mode switch including policy processing
US8542720B2 (en) * 2007-04-24 2013-09-24 Aclara Power-Line Systems, Inc. Detection of outbound message signals in a power line two-way communications system
US7693040B1 (en) 2007-05-01 2010-04-06 Integrated Device Technology, Inc. Processing switch for orthogonal frequency division multiplexing
US8023419B2 (en) 2007-05-14 2011-09-20 Cisco Technology, Inc. Remote monitoring of real-time internet protocol media streams
US7936695B2 (en) 2007-05-14 2011-05-03 Cisco Technology, Inc. Tunneling reports for real-time internet protocol media streams
US7835406B2 (en) 2007-06-18 2010-11-16 Cisco Technology, Inc. Surrogate stream for monitoring realtime media
US8301789B2 (en) 2007-06-18 2012-10-30 Emc Corporation Techniques for port hopping
US7817546B2 (en) 2007-07-06 2010-10-19 Cisco Technology, Inc. Quasi RTP metrics for non-RTP media flows
US8271859B2 (en) * 2007-07-18 2012-09-18 Foundry Networks Llc Segmented CRC design in high speed networks
US8037399B2 (en) 2007-07-18 2011-10-11 Foundry Networks, Llc Techniques for segmented CRC design in high speed networks
EP2023533B1 (en) * 2007-08-10 2011-04-06 Alcatel Lucent Method and system for classifying traffic in IP networks
US7996520B2 (en) 2007-09-19 2011-08-09 Cisco Technology, Inc. Behavioral classification of communication sessions using active session initiation
US8509236B2 (en) 2007-09-26 2013-08-13 Foundry Networks, Llc Techniques for selecting paths and/or trunk ports for forwarding traffic flows
US8190881B2 (en) 2007-10-15 2012-05-29 Foundry Networks Llc Scalable distributed web-based authentication
US8966551B2 (en) * 2007-11-01 2015-02-24 Cisco Technology, Inc. Locating points of interest using references to media frames within a packet flow
US8656451B2 (en) * 2008-03-07 2014-02-18 At&T Mobility Ii Llc Policy application server for mobile data networks
WO2009143224A3 (en) * 2008-05-20 2010-01-14 Fox Chase Center Center Method for the treatment or prophylaxis of lymphangioleiomyomatosis (lam) and animal model for use in lam research
EP2281370A4 (en) * 2008-05-26 2017-07-12 Oricane Ab Method for data packet classification in a data communications network
US7864764B1 (en) * 2008-09-16 2011-01-04 Juniper Networks, Inc. Accelerated packet processing in a network acceleration device
US8539035B2 (en) * 2008-09-29 2013-09-17 Fujitsu Limited Message tying processing method and apparatus
US7916735B2 (en) 2008-12-02 2011-03-29 At&T Intellectual Property I, L.P. Method for applying macro-controls onto IP networks using intelligent route indexing
US20100202464A1 (en) * 2009-02-10 2010-08-12 Ralink Technology Corporation Method and apparatus for preloading packet headers and system using the same
CN101808029B (en) 2009-02-13 2013-03-13 雷凌科技股份有限公司 Method and device for preloading packet header and system using method
US8090901B2 (en) 2009-05-14 2012-01-03 Brocade Communications Systems, Inc. TCAM management approach that minimize movements
US8284776B2 (en) * 2009-06-10 2012-10-09 Broadcom Corporation Recursive packet header processing
US8599850B2 (en) 2009-09-21 2013-12-03 Brocade Communications Systems, Inc. Provisioning single or multistage networks using ethernet service instances (ESIs)
US8301982B2 (en) * 2009-11-18 2012-10-30 Cisco Technology, Inc. RTP-based loss recovery and quality monitoring for non-IP and raw-IP MPEG transport flows
WO2011069228A1 (en) * 2009-12-10 2011-06-16 Redknee Inc. Feedback loop for dynamic network resource allocation
US8291058B2 (en) * 2010-02-19 2012-10-16 Intrusion, Inc. High speed network data extractor
US8819714B2 (en) 2010-05-19 2014-08-26 Cisco Technology, Inc. Ratings and quality measurements for digital broadcast viewers
KR101145389B1 (en) 2010-09-28 2012-05-15 광주과학기술원 Scalable centralized network architecture with de-centralization of network control and network switching apparatus therefor
EP2636183A4 (en) * 2010-11-01 2016-08-31 Hewlett Packard Entpr Dev Lp Managing mac moves with secure port groups
US9225656B2 (en) 2011-02-07 2015-12-29 Brocade Communications Systems, Inc. Quality of service in a heterogeneous network
US8605732B2 (en) 2011-02-15 2013-12-10 Extreme Networks, Inc. Method of providing virtual router functionality
US8661295B1 (en) * 2011-03-31 2014-02-25 Amazon Technologies, Inc. Monitoring and detecting causes of failures of network paths
US9385917B1 (en) 2011-03-31 2016-07-05 Amazon Technologies, Inc. Monitoring and detecting causes of failures of network paths
US9001667B1 (en) 2011-03-31 2015-04-07 Amazon Technologies, Inc. Monitoring and detecting causes of failures of network paths
US8730811B2 (en) * 2011-04-07 2014-05-20 Hewlett-Packard Development Company, L.P. Managing network traffic
JP5655692B2 (en) * 2011-04-28 2015-01-21 富士通株式会社 Communication apparatus and communication method
US8830834B2 (en) * 2011-12-21 2014-09-09 Cisco Technology, Inc. Overlay-based packet steering
KR20130093848A (en) * 2012-01-27 2013-08-23 한국전자통신연구원 Packet processing apparatus and method for load balancing of multi-layered protocols
US9104543B1 (en) 2012-04-06 2015-08-11 Amazon Technologies, Inc. Determining locations of network failures
US9798588B1 (en) * 2012-04-25 2017-10-24 Significs And Elements, Llc Efficient packet forwarding using cyber-security aware policies
US9094459B2 (en) * 2012-07-16 2015-07-28 International Business Machines Corporation Flow based overlay network
US8937870B1 (en) 2012-09-11 2015-01-20 Amazon Technologies, Inc. Network link monitoring and testing
US9210038B1 (en) 2013-02-11 2015-12-08 Amazon Technologies, Inc. Determining locations of network failures
US9197495B1 (en) 2013-02-11 2015-11-24 Amazon Technologies, Inc. Determining locations of network failures
KR101467942B1 (en) * 2013-04-24 2014-12-02 주식회사 윈스 Fast Application Recognition System and Processing Method Therof
US9742638B1 (en) 2013-08-05 2017-08-22 Amazon Technologies, Inc. Determining impact of network failures
US9324039B2 (en) 2013-11-27 2016-04-26 Avago Technologies General Ip (Singapore) Pte. Ltd. Incremental updates for ordered multi-field classification rules when represented by a tree of longest prefix matching tables
WO2015107385A3 (en) * 2013-12-18 2015-09-24 Marvell Israel (M.I.S.L.) Ltd. Methods and network device for oversubscription handling
KR101564644B1 (en) * 2014-07-03 2015-10-30 한국전자통신연구원 Method and system of extracting access control list
CN104809158A (en) * 2015-03-26 2015-07-29 小米科技有限责任公司 Network content filter method and device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4862451A (en) * 1987-01-28 1989-08-29 International Business Machines Corporation Method and apparatus for switching information between channels for synchronous information traffic and asynchronous data packets
US5182748A (en) * 1989-10-20 1993-01-26 Kokusai Denshin Denwa Co., Ltd. Protocol conversion system
US5563878A (en) * 1995-01-05 1996-10-08 International Business Machines Corporation Transaction message routing in digital communication networks
US5598410A (en) * 1994-12-29 1997-01-28 Storage Technology Corporation Method and apparatus for accelerated packet processing
US5748905A (en) * 1996-08-30 1998-05-05 Fujitsu Network Communications, Inc. Frame classification using classification keys

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5398245A (en) * 1991-10-04 1995-03-14 Bay Networks, Inc. Packet processing method and apparatus
DE69226436T2 (en) * 1992-06-17 1998-12-03 Hewlett Packard Co Network monitoring method and device
GB9326476D0 (en) * 1993-12-24 1994-02-23 Newbridge Networks Corp Network
US6145064A (en) * 1996-08-28 2000-11-07 Canon Information Systems Research Australia Pty Ltd Method of efficiently updating hashed page tables
US5938736A (en) * 1997-06-30 1999-08-17 Sun Microsystems, Inc. Search engine architecture for a high performance multi-layer switch element
US6212183B1 (en) * 1997-08-22 2001-04-03 Cisco Technology, Inc. Multiple parallel packet routing lookup
US6412000B1 (en) * 1997-11-25 2002-06-25 Packeteer, Inc. Method for automatically classifying traffic in a packet communications network
WO1999034558A1 (en) * 1997-12-25 1999-07-08 Kabushiki Kaisha Toshiba Atm repeater and network including the same
US7466703B1 (en) * 1998-05-01 2008-12-16 Alcatel-Lucent Usa Inc. Scalable high speed router apparatus
US6628653B1 (en) * 1998-06-04 2003-09-30 Nortel Networks Limited Programmable packet switching device
US6157955A (en) * 1998-06-15 2000-12-05 Intel Corporation Packet processing system including a policy engine having a classification unit
US6876653B2 (en) * 1998-07-08 2005-04-05 Broadcom Corporation Fast flexible filter processor based architecture for a network device
US6525850B1 (en) * 1998-07-17 2003-02-25 The Regents Of The University Of California High-throughput, low-latency next generation internet networks using optical label switching and high-speed optical header generation, detection and reinsertion
JP2000092118A (en) * 1998-09-08 2000-03-31 Hitachi Ltd Programmable network
US6678268B1 (en) * 1998-09-18 2004-01-13 The United States Of America As Represented By The Secretary Of The Navy Multi-interface point-to-point switching system (MIPPSS) with rapid fault recovery capability
US6567408B1 (en) * 1999-02-01 2003-05-20 Redback Networks Inc. Methods and apparatus for packet classification with multi-level data structure
CN1293502C (en) * 1999-06-30 2007-01-03 倾向探测公司 Method and apparatus for monitoring traffic in a network
US6611524B2 (en) * 1999-06-30 2003-08-26 Cisco Technology, Inc. Programmable data packet parser
JP3643507B2 (en) * 1999-09-20 2005-04-27 株式会社東芝 Packet processing apparatus and packet processing method
US6728243B1 (en) * 1999-10-28 2004-04-27 Intel Corporation Method for specifying TCP/IP packet classification parameters
US6697380B1 (en) * 1999-12-07 2004-02-24 Advanced Micro Devices, Inc. Multiple key lookup arrangement for a shared switching logic address table in a network switch
US6977930B1 (en) * 2000-02-14 2005-12-20 Cisco Technology, Inc. Pipelined packet switching and queuing architecture
US6778546B1 (en) * 2000-02-14 2004-08-17 Cisco Technology, Inc. High-speed hardware implementation of MDRR algorithm over a large number of queues
US6778534B1 (en) * 2000-06-30 2004-08-17 E. Z. Chip Technologies Ltd. High-performance network processor
US20030009466A1 (en) * 2001-06-21 2003-01-09 Ta John D. C. Search engine with pipeline structure
US20050232303A1 (en) * 2002-04-26 2005-10-20 Koen Deforche Efficient packet processing pipeline device and method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4862451A (en) * 1987-01-28 1989-08-29 International Business Machines Corporation Method and apparatus for switching information between channels for synchronous information traffic and asynchronous data packets
US5182748A (en) * 1989-10-20 1993-01-26 Kokusai Denshin Denwa Co., Ltd. Protocol conversion system
US5598410A (en) * 1994-12-29 1997-01-28 Storage Technology Corporation Method and apparatus for accelerated packet processing
US5563878A (en) * 1995-01-05 1996-10-08 International Business Machines Corporation Transaction message routing in digital communication networks
US5748905A (en) * 1996-08-30 1998-05-05 Fujitsu Network Communications, Inc. Frame classification using classification keys

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040052244A1 (en) * 2001-01-24 2004-03-18 Ilpo Vitikka Method for carrying out log in
US7516222B2 (en) 2001-01-24 2009-04-07 Sonera Oyj Method for carrying out log-in in a communication system
US8976793B2 (en) 2004-04-06 2015-03-10 Rockstar Consortium Us Lp Differential forwarding in address-based carrier networks
US20080279196A1 (en) * 2004-04-06 2008-11-13 Robert Friskney Differential Forwarding in Address-Based Carrier Networks
US9356862B2 (en) 2004-04-06 2016-05-31 Rpx Clearinghouse Llc Differential forwarding in address-based carrier networks
US8923292B2 (en) 2004-04-06 2014-12-30 Rockstar Consortium Us Lp Differential forwarding in address-based carrier networks
US9118590B2 (en) 2004-07-02 2015-08-25 Rpx Clearinghouse Llc VLAN support of differentiated services
US7990966B2 (en) * 2004-12-13 2011-08-02 Electronics And Telecommunications Research Institute Apparatus for changing MAC address to identify subscriber and method thereof
US20060126622A1 (en) * 2004-12-13 2006-06-15 Electronics And Telecommunications Research Institute Apparatus for changing MAC address to identify subscriber and method thereof
US20090122784A1 (en) * 2005-06-06 2009-05-14 Yikang Lei Method and device for implementing the security of the backbone network
US20150326696A1 (en) * 2014-05-09 2015-11-12 Google Inc. System and method for adapting to network protocol updates
US9503552B2 (en) * 2014-05-09 2016-11-22 Google Inc. System and method for adapting to network protocol updates

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