US20010021570A1 - Process for making microstructures and microstructures made thereby - Google Patents

Process for making microstructures and microstructures made thereby Download PDF

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US20010021570A1
US20010021570A1 US09794455 US79445501A US2001021570A1 US 20010021570 A1 US20010021570 A1 US 20010021570A1 US 09794455 US09794455 US 09794455 US 79445501 A US79445501 A US 79445501A US 2001021570 A1 US2001021570 A1 US 2001021570A1
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bonding
material
substrate
silicon
temperature
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US6436853B2 (en )
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Liwei Lin
Yu-Ting Cheng
Khalil Najafi
Kensall Wise
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Liwei Lin
Yu-Ting Cheng
Khalil Najafi
Wise Kensall D.
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    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/10Mounting in enclosures
    • H03H9/1057Mounting in enclosures for microelectro-mechanical devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261Processes for packaging MEMS devices
    • B81C1/00269Bonding of solid lids or wafers to the substrate
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/0072Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks of microelectro-mechanical resonators or networks
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00Forming microstructural systems
    • B81C2203/01Packaging MEMS
    • B81C2203/0172Seals
    • B81C2203/0181Using microheaters for bonding the lid
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01PMEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G01P15/02Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
    • G01P15/08Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
    • G01P2015/0805Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values being provided with a particular type of spring-mass-system for defining the displacement of a seismic mass due to an external acceleration
    • G01P2015/0822Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values being provided with a particular type of spring-mass-system for defining the displacement of a seismic mass due to an external acceleration for defining out-of-plane movement of the mass
    • G01P2015/0825Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values being provided with a particular type of spring-mass-system for defining the displacement of a seismic mass due to an external acceleration for defining out-of-plane movement of the mass for one single degree of freedom of movement of the mass
    • G01P2015/0828Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values being provided with a particular type of spring-mass-system for defining the displacement of a seismic mass due to an external acceleration for defining out-of-plane movement of the mass for one single degree of freedom of movement of the mass the mass being of the paddle type being suspended at one of its longitudinal ends
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/162Disposition
    • H01L2924/16235Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip

Abstract

A method for making a microstructure assembly, the method including the steps of providing a first substrate and a second substrate; depositing an electrically conductive material on the second substrate; contacting the second substrate carrying the electrically conductive material with the first substrate; and then supplying current to the electrically conductive material to locally elevate the temperature of said electrically conductive material and cause formation of a bond between the first substrate and the second substrate.

Description

    STATEMENT OF GOVERNMENT SUPPORT
  • [0001] This invention was made with government support provided by the National Science Foundation (NSF) under the terms of Contract No. ECS-9734421 and provided by the Defense Advanced Research Projects Agency (DARPA) under the terms of Contract No. F30602-98-2-0227. The government has certain rights in the invention.
  • FIELD OF THE INVENTION
  • [0002]
    The invention relates to miniaturized devices, referred to as microelectronic devices or microdevices, including those used in integrated circuits, and the invention further relates to methods for fabricating assemblies which contain such microdevices.
  • BACKGROUND OF THE INVENTION
  • [0003]
    The fabrication of modern, high-speed microelectronic devices includes a number of intricate and costly processing and fabrication steps which are conducted on a very small, microscopic scale. Various types of such microelectronic devices, as well as microelectronic integrated circuits (IC's) which incorporate as many as thousands of such devices, are fabricated and mass produced on silicon wafers. Each silicon wafer generally comprises an array of numerous electrically-isolated individual integrated microelectronic circuits. Each individual circuit on the wafer typically has numerous fabricated pads which are located proximate to the bulk of the circuit and which are electrically connected to the individual circuit itself. The pads serve as electrical interfaces for routing electrical current through the individual microelectronic circuit. Once a silicon wafer and the array of circuits embedded thereon is completely fabricated, the wafer is then generally sliced apart to thereby physically separate the array of circuits into individual circuits. Each individual circuit on its separated portion of the previously-whole silicon wafer is generically referred to as a “chip.” In this separated chip form, an individual circuit can then be wire-bonded into, for example, a plastic or ceramic package and sealed therein for general electrical and thermal insulation purposes. The pads of the packaged chip are commonly wire-bonded to electrical leads mounted on the outside of the package to provide electrical access to the packaged chip via the external leads.
  • [0004]
    Presently, free-standing micro-structure devices called MEMS (Micro-Electrical Mechanical Systems) are gaining ever-growing popularity in the microelectronics industry. Such MEMS devices may include, for example, a micro-accelerometer, a micro-mechanical filter, a pressure sensor, a gyroscope, or a micro-resonator. In light of such popularity, manufacturers are now attempting to fabricate composite devices which integrate both microelectronic integrated circuits and MEMS together on the same chip. However, due to the unique nature of MEMS devices, more reliable packaging processes and methods need to be developed to simultaneously accommodate both microelectronic integrated circuits and MEMS so that composite devices can be mass-produced commercially.
  • [0005]
    More particularly, many MEMS devices, by their very nature, must be encapsulated and hermetically sealed within a microshell in order to operate properly. For example, a MEMS device such as a pressure sensor or an accelerometer has movable micro-mechanical parts which must be permitted to move for the MEMS to operate properly. Such MEMS require hermetic encapsulation within a microshell to prevent contaminants, such as dust, from interfering with the MEMS device performance. Furthermore, due to the fact that a typical MEMS device has a size on the order of 10−6 to 10−3 meter, the fabrication and precise positioning of a microshell over a MEMS device to thereby encapsulate the device can prove to be a significant challenge, for such a small scale environment can require microfabrication and precision positioning on the order of 10−7 to 10−9 meter.
  • [0006]
    One prior art process method for hermetically encapsulating and thereby protecting a MEMS device (in this instance, a microresonator) is described in U.S. Pat. No. 5,589,082, incorporated herein in its entirety by reference (see FIG. 1). The initial steps in the process include standard surface micromachining steps which ultimately produce a comb-shaped resonator MEMS device mounted on a silicon wafer substrate (see FIG. 1(a)) Since the fingers of the comb-shaped resonator must be protected so that they are free to move to help operate the resonator correctly, a hermetically-sealed microshell needs to be formed about the resonator. Thus, next, a thick layer of PSG (phosphorus doped glass) is deposited on the silicon substrate so that the PSG surrounds and covers the MEMS device, thereby defining the area to be sealed by a microshell (see FIG. 1(b)). Then, a thin layer of PSG is deposited, patterned, and etched to form etch channels (see FIG. 1(c)). Next, a thin layer silicon nitride is deposited over the thick layer of PSG to define a microshell, and etch holes are thereafter precisely defined in the thin layer of silicon nitride (see FIG. 1(d)). Thereafter, all PSG within the microshell is etched away in a concentrated HF gas bath via the etch holes. After rinsing in water and in methanol, the silicon wafer and its encapsulated MEMS device is dried using a supercritical CO2 process. Finally, a relatively thin layer of nitride is deposited to thereby hermetically seal the MEMS resonator device within its microshell, and contact pads are thereafter etched open to provide electrical access to the MEMS device (see FIG. 1(e)). In this manner, the MEMS device is protected from contaminants, and electrical access is also provided.
  • [0007]
    This particular MEMS encapsulation process method, as briefly described hereinabove and more fully explained in U.S. Pat. No. 5,589,082, is operable for the very narrow purpose intended, but a simpler and more versatile process method is instead desired. In particular, a process method which hermetically encapsulizes a MEMS device while at the same time is highly compatible with standard process methods used to fabricate microelectronic integrated circuits is highly desirable, for such would enable composite devices to be mass-produced commercially.
  • [0008]
    Another prior art process method for encapsulating a MEMS device is described in U.S. Pat. No. 5,576,251, incorporated herein in its entirety by reference, wherein two substrates are fused together to form a protective covering for a MEMS device. A bonding material is interposed between the two substrates, and the temperature of the bonding material is raised to about 950° C. for about 30 minutes during which time fusion bonding of the two substrates occurs, and chemical reactions remove gas from the cavity between the two substrates, thereby creating a vacuum and a hermetically sealed enclosure about the MEMS device. In another prior art process method, described in U.S. Pat. No. 5,668,033, global heating is utilized to bond two substrates together within an oven. In this particular method, the entire MEMS structure must be heated in an oven to a temperature sufficient to form the bond between the two substrates. Such a temperature, however, often has undesirable and damaging effects on the MEMS device. In still another prior art process method, described in U.S. Pat. No. 4,625,561, the method therein also teaches bonding by global heating in a furnace. One common aspect of the particular prior art encapsulation and bonding methods alluded to hereinabove is that a high temperature is required to facilitate the process of bonding. As a result, such methods are not suitable for use in situations involving microelectronic integrated circuits and/or MEMS which cannot tolerate exposure to such high temperatures.
  • [0009]
    In general, micromachining and microfabrication process techniques which are typically used to produce MEMS devices and/or microelectronic integrated circuits are very costly. In addition to being costly to produce, MEMS devices and microelectronic integrated circuits are typically temperature sensitive and can be permanently damaged if exposed to high temperatures. Thus, the integration of a MEMS device with a microelectronic integrated circuit device must be carefully executed so as to not permanently damage any expensive temperature-sensitive device. In light of such, a common critical concern in fabricating a composite device is how to integrate a free-standing MEMS device, which requires a high-temperature bonding process for encapsulation, with a temperature-sensitive microelectronic integrated circuit.
  • [0010]
    Bonding techniques, including fusion bonding (such as silicon-to-silicon bonding), eutectic bonding (such as silicon-to-gold bonding), and anodic bonding (such as silicon-to-glass bonding), have all been used both in microelectronic integrated circuit and MEMS fabrication for many years. Each of these different bonding processes require two basic elements in order to be successful. First, the two surfaces to be bonded must each be flat to ensure intimate contact for proper bonding. Second, proper processing temperatures are required to provide the proper bonding energy. For example, a conventional silicon-to-silicon fusion bonding process occurs at a bonding temperature of above 1,000° C. On the other hand, anodic bonding is performed at a lower temperature of about 450° C., but requires the assistance of a high electrostatic field. Silicon-gold eutectic bonding theoretically occurs at a temperature of 363° C. Among these bonding processes, one common drawback is the high temperature requirement that may damage and degrade temperature-sensitive integrated circuits and/or MEMS. Therefore, such bonding processes are not generally applicable in fabricating or packaging devices when temperature-sensitive devices are involved. For the past few years, many efforts have been undertaken to find a reliable bonding process that can be conducted at a low temperature. Unfortunately, the success of each of these bonding processes depends highly upon a particular fabrication process' idiosyncracies, such as the particular bonding material used, surface treatment, and the flatness of the actual surfaces which are to be bonded together. Due to the significant number of such contingencies, such bonding processes are generally neither adaptable nor economical for the large scale production of composite devices.
  • [0011]
    Therefore, presently known high-temperature bonding process techniques, for encapsulating a MEMS device under a microshell, are highly process dependent and are generally not suitable for producing composite devices which incorporate temperature-sensitive microelectronic integrated circuits, for such bonding techniques require high temperatures which may damage temperature-sensitive integrated circuits and/or MEMS devices. In addition, such bonding processes typically strictly require very flat bonding surfaces, select bonding materials, and very tight process control to be successful. As a result, presently known bonding processes are not ideal for encapsulating free-standing MEMS structures on composite devices.
  • SUMMARY OF THE INVENTION
  • [0012]
    The present invention relates to a method for making a microstructure assembly, the method including the steps of providing a first substrate and a second substrate; depositing an electrically conductive material, called a microheater, on the second substrate; contacting the second substrate carrying the electrically conductive material with the first substrate; and then supplying current to the electrically conductive material to locally elevate the temperature of the electrically conductive material and cause the formation of a bond between the first substrate and the second substrate.
  • [0013]
    Furthermore, the present invention also generally relates to a microstructure having two substrate bodies bonded together at selected surface bonding regions on the two bodies. More particularly, the microstructure is comprised of a first body, having a first surface and which comprises a first material, and a second body, having a second surface and which comprises a second material. A resistive heating material, called a microheater, is carried on the second surface such that the heating material defines a bonding area between the first surface and the second surface. A bonding interface joining the first and second substrate bodies together, the bonding surface comprising the first material and a bonding material between the surfaces, is created as a result of the first material and the bonding material being bonded together by localized heat generated from current which is applied to and passed through the resistive heating material.
  • [0014]
    In this way, as described in significant detail hereinbelow according to the present invention, composite devices which include both microelectronic integrated circuits and a MEMS device can now be fabricated and mass produced through the utilization of localized, high-temperature bonding processes and/or techniques. Such localized, high-temperature bonding ensures that microshells are properly bonded over MEMS devices to hermetically encapsulate and protect the MEMS devices while at the same time ensuring that nearby temperature-sensitive microelectronic integrated circuits are not damaged from the high temperatures generated during the bonding process. The precise utilization and positioning of microheaters in conjunction with thermally insulating materials ensures that the high-temperature heat generated during the bonding process is precisely localized and confined so as to not permanently damage nearby temperature-sensitive circuits and/or devices.
  • [0015]
    These and other objects, features, and advantages will become apparent from the following detailed description of the preferred embodiment, the claims, and the accompanying drawings.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • [0016]
    [0016]FIG. 1 is an illustration of a prior art process method for fabricating a protective microshell covering to encapsulate a MEMS device on a silicon substrate.
  • [0017]
    [0017]FIG. 2 is a schematic showing a localized bonding method and structure, including (a) a cross-sectional view, (b) a top view schematic of a microheater, and (c) a top view schematic of a temperature sensor.
  • [0018]
    [0018]FIG. 3 shows isotherms around a 2 μm wide microheater.
  • [0019]
    [0019]FIG. 4 illustrates agreement between experimental and simulation results of 5 and 7 μm wide polysilicon microheaters under different current inputs.
  • [0020]
    [0020]FIG. 5 is an SEM micrograph showing that the glass cap substrate is softened and has the shape of the polysilicon microheater.
  • [0021]
    [0021]FIG. 6 is an SEM micrograph showing the localized silicon-glass fusion bonding. After the bond is forcefully broken, the microheater, the silicon dioxide, and the glass cover can each be clearly observed.
  • [0022]
    [0022]FIG. 7 shows a polysilicon microheater after being dipped into HF.
  • [0023]
    [0023]FIG. 8 is an SEM micrograph showing localized silicon-to-gold eutectic bonding. After the bond is forcefully broken, silicon attached to the gold line can be observed.
  • [0024]
    [0024]FIG. 9 is an SEM micrograph showing non-uniformity in a conventional eutectic bonding process.
  • [0025]
    [0025]FIG. 10 is a schematic showing the process steps for forming a protective cap with cavity, the microheater circumscribing the cavity opening, and the bonding material for sealing the cap to a substrate.
  • [0026]
    [0026]FIG. 11 contains 11 a and 11 b which are schematics showing respective caps, similar to that of FIG. 10, being aligned with a substrate for bonding thereto. In FIG. 11a the bonding material is designated as micro-glue layer and is any type of material including chemical vapor deposited bonding material. In FIG. 11b the cap is the same configuration as that prepared by the steps illustrated in FIG. 10.
  • [0027]
    [0027]FIG. 12 is a schematic of an array of microheaters which are electrically connected together on a silicon substrate.
  • [0028]
    [0028]FIG. 13 is a schematic of an experimental setup for executing a localized bonding process.
  • [0029]
    [0029]FIG. 14 is a schematic showing localized, indirect bonding methods and structures with intermediate layers, including (a) a cross-section view of PSG-to-glass bonding and (b) a cross-section view of Indium-to-glass bonding.
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • [0030]
    The present invention provides a new bonding process for encapsulating MEMS devices based on the concept of localized high temperature bonding. High temperature, localized bonding is accomplished along a defined bonding path between two bodies. The regions of the bodies adjacent the path are maintained at a relatively low temperature. The localized high temperature causes softening of the bonding material which compensates for rough bonding surfaces on the bodies which are to be bonded together. Such provides a very effective seal, for it bonds the two bodies together while simultaneously minimizing adverse temperature effects in regions adjacent the bonded area.
  • [0031]
    The particular method of the present invention is useful to prepare and situate a variety of configurations of microstructures exemplified in the following description. In one embodiment, the overall microstructure comprises two bodies bonded together at their respective bonding surfaces. The first body has a first surface which comprises a first material, and the second body has a second surface which comprises a second material. A resistance microheater is attached to the second body at the second surface. The microheater is formed of a third material, and the microheater defines a path of a bonding area (pad) between the first surface of the first body and the second surface of the second body. The microheater is electrically conductive, and the path defined by the microheater is an electrically conductive path. Preferably, the materials of the first and second surfaces comprise an insulation material which prevents electrical current from deviating from the electrically conductive path of the microheater.
  • [0032]
    When current is supplied to the microheater to thereby generate bond-facilitating heat, a bonded area is formed which joins regions of the first and second bodies to one another. This bonded area or region is referred to as a bonding interface. Regions adjacent the bonding interface remain at relatively low, near ambient temperature when heat supplied by the microheater joins the bodies together.
  • [0033]
    At least one of the bodies has a cavity with an opening defined therein. The bodies are bonded to together such that the opening is disposed between the bodies. The bonding path of the microheater circumscribes the opening, and the bonding interface forms a seal which cooperates with the first and second bodies to enclose the cavity. The cavity may contain a microdevice, such as a microelectronic sensor, a micro-electrical mechanical (MEMS) device, or other miniaturized electronic component.
  • [0034]
    In one embodiment of the method according to the present invention, the assembly which comprises the microelectronic device is prepared by first placing the microelectronic device on a first substrate. Next, a second substrate is prepared having a layer of electrically insulating material on its surface, which layer is also preferably thermally insulating. Next, a cavity is etched into the surface of the second substrate. A microheater is placed on the insulating layer of the second substrate. The microheater is arranged on the surface in a path which circumscribes the opening of the cavity. A layer of electrically insulating material is then placed on the second substrate to cover at least the microheater and the interior surface of the cavity. Then, a bonding material is placed over the electrically insulating layer on the second substrate in a pattern which follows the path of the microheater.
  • [0035]
    Finally, the first substrate, which carries the microelectronic device, is placed in contact with the second substrate carrying the microheater. Electric current is then supplied to the microheater to elevate the temperature of the microheater and cause the formation of a bond between the first substrate and the second substrate. The microheater, being a resistance heater, provides bond-facilitating heat only along the path where a bond is to be formed. The electrically isolating material on both sides of the microheater helps to precisely define and confine the path of electric current and heat flow. Therefore, the bond is formed with almost no temperature change to regions adjacent the bonding interface where the bond is formed. The joining of the first and second substrates by localized, high-temperature bonding facilitated by the resistance microheater hermetically seals the cavity with the microelectronic device contained therein and does not adversely affect adjacent regions or components.
  • [0036]
    In one embodiment, the substrate which comprises the cavity may be considered to be a protective cap or a microshell. The material of this protective cap may be selected from any material which is rigid enough to protect the underlying device encapsulated within the cavity. Therefore, any material may be selected, including but not limited to glass, silicon, plastic, and metal. The material of the substrate carrying the microelectronic device is also not limited and may also be comprised of any of the materials listed above. However, the substrate carrying the microelectronic device must include a layer which is electrically isolating. This layer separates the material of the substrate from the resistance microheater. Such separation is necessary to define the path of the microheater and prevent current from flowing into the substrate in a situation where the substrate itself has electrically conductive features. The layer is preferably also thermal insulating so that the bond-facilitating heat generated by the resistance microheater is confined to the area where the bond is desired.
  • [0037]
    In the case where the bonding material itself is electrically conductive, it is preferred that the surface of the first substrate which comes in contact with the bonding material be electrically non-conductive. Thus, the first substrate may generally comprise any material. However, if the first substrate is electrically conductive, then the first substrate must have an electrically insulating layer on its bonding surface which comes in contact with the bonding material, if the bonding material is also electrically conductive.
  • [0038]
    The microheater may be formed from a variety of materials so long as they are electrically conductive and suitable for operation as a resistance heater. The materials from which the microheater may be formed are, by example, polysilicon, gold, titanium, tungsten, copper, aluminum, platinum, and other refractory metals. The term refractory metal indicates a metal or alloy that is capable of enduring high temperatures. Essentially, any electrically conductive material may be selected and the temperature at which the bonding is desired to occur will typically determine the selection of the material.
  • [0039]
    In some cases, the microheater may itself constitute the bonding material. Alternatively, the microheater and the bonding material may constitute separate layers. In this case, if the bonding material is electrically conductive, it is preferred that a layer of electrically insulating material be disposed between the microheater and the bonding material so as to better control the path of the current through the microheater and prevent the current from being directed through the bonding material.
  • [0040]
    Materials which may function as bonding materials include polysilicon, doped polysilicon, gold, silicon dioxide, copper, titanium, glass frit, PSG, BSG, and soldering materials like indium, silicon/gold alloy, and silicon/aluminum alloy. The PSG stands for phosphosilicate glass, also referred to as phosphorous doped glass. It is a glass (silicon dioxide) with some phosphorous content. Similarly, the BSG stands for glass doped with boron.
  • [0041]
    Materials which may function as both a microheater and a bonding material include polysilicon, doped polysilicon, gold, and aluminum.
  • [0042]
    Polysilicon is a polycrystalline silicon which constitutes grains of silicon grown together. It is relatively easy to fabricate layers of polysilicon on a substrate by chemical vapor deposition (CVD) means. Polysilicon is conveniently grown in an oven or reactor by CVD. Such polysilicon is in contrast to silicon which is a single crystal material conventionally known.
  • [0043]
    If dissipation of current through and from the bonding material is not a concern, then the microheater and bonding material may constitute one integrated single element, or the microheater need not be insulated from the bonding material. The bonding material is essentially any material which, when heated, is capable of forming a bond. The bond achieved by the method according to the present invention is preferably a fusion bond, or a bond formed by eutectic joining of materials. Therefore, the bonding material is selected on the basis of its ability to melt and form a fusion bond or by its ability to form a eutectic mixture with the material to which it is being joined. Thus, the bonding material is selected on the basis of its ability to fuse or to form a eutectic mixture at a temperature sufficiently low so that when bonding occurs, adjacent regions will not be subjected to an undesirably high temperature and damage nearby integrated circuits and/or MEMS.
  • [0044]
    As described earlier herein, an isolating film which is preferably also a thermally insulating film is produced on the surface of one or both of the substrates prior to execution of the bonding process. The bonding process is preferably performed by supplying current to the resistance microheater at the same time pressure or force is applied to one or both of the substrates to bias the substrates toward one another to be joined. When performing the bonding by heating and such pressurization, it is thought that any insulating/isolating film on the surface of the substrate is destroyed. As a result, bonding occurs uniformly over an entire region of the bonding surface with the result that it is possible to form the bonding interface with essentially no void therein. This is the case for both eutectic and fusion bonding.
  • [0045]
    In one embodiment, the bonding material is the decomposition product of a gaseous precursor which decomposes on contact with, or in the presence of, heat generated by the resistance microheater.
  • [0046]
    A wide variety of precursor reactions are available for the deposition of solid material and are usable in low-pressure chemical vapor deposition (LPCVD) systems. Such materials include, but are not limited to, molybdenum, nickel, carbon, silicon dioxide, alumina; nitrides of silicon, titanium, and boron; and carbides of silicon, titanium, and boron. Other materials able to be deposited by CVD or plasma-assisted CVD include tungsten, silicon dioxide, nitrides of tin and boron, and a composite of tin and boron. It is also known to deposit platinum by chemical vapor deposition. A variety of deposition materials and precursors are available and known to those skilled in the art. They will not be repeated here. A discussion of such materials and techniques can be found in Advanced Surface Coatings: A Handbook of Surface Engineering, edited by D. S. Rickerby and A. Matthews, and published by Chapman & Hall, New York, 1991.
  • [0047]
    The examples set forth below demonstrate use of the new bonding process based on localized high-temperature heating and utilizing the structure and methods of the invention. High temperature, localized bonding was accomplished along a defined bonding path between two bodies. The regions of the bodies adjacent the path were maintained at a low temperature, while localized high-temperature bonding was accomplished in the bonding path. By this method, localized high temperature was able to cause softening of the bonding material and compensate for rough surfaces on the bodies being joined together as evidenced by test results and microscopic examination of the bonding interface. The examples below demonstrate both localized fusion and eutectic bonding processes. In the examples, phosphorous-doped polysilicon was applied in the localized, silicon-to-glass fusion bonding experiments. Gold was used in the silicon-to-gold eutectic bonding tests. Polysilicon and gold films were patterned as line-shaped resistive heaters, and they reacted as bonding materials in the experiments. The experiments below demonstrate bonding by both processes was accomplished in five minutes and the high temperature bonding region was confined to a small area.
  • EXAMPLE 1 Direct Bonding
  • [0048]
    Part 1: Experimental Set-Up and Design Verification
  • [0049]
    [0049]FIG. 13 is an example of a small scale experimental testing setup for executing and implementing the method process and related structure according to the present invention. The microscope and micromanipulators together serve to align the top silicon substrate to the gold microheater which was deposited on the bottom silicon substrate. The alignment of the electrical probes onto the electrical contact pads associated with the microheater can also be achieved with the help of the microscope and the micromanipulators. In this manner, electrical current from a power source is successfully passed through the microheater to thereby initiate the localized, high-temperature bonding process according to the present invention.
  • [0050]
    [0050]FIG. 2 shows the experimental setup for the bonding tests, including (a) a cross-sectional view, (b) a schematic view of the design of the microheater, and (c) a schematic view of the design of a temperature sensor. FIG. 2(a) shows the cross-sectional view where a silicon or glass cap was prepared to be bonded to the device substrate. A silicon dioxide layer was grown on the device substrate for electrical and thermal insulation. In the associated fusion bonding experiments, polysilicon was grown and patterned as both the heating and the bonding material. In the eutectic bonding experiment, gold resistive microheaters were likewise used as both the heating and the bonding materials. A proper pressure (about 1 MPa) was applied to put the cap substrate in contact with the bonding resistors (microheaters) as shown in FIG. 2(a). FIG. 2(b) shows the top view design of the enclosed-shape microheater usable to help encapsulate MEMS devices. In order to measure the temperature surrounding the microheater, a temperature sensor made of polysilicon or gold was placed 15 μm away from the bonding area as shown in FIG. 2(c). The temperature was sensed and characterized by monitoring the change in resistance of the microheater, by dividing ΔV by the input current I. Heat transfer study by this set-up detected a high temperature confined in a very small region. FIG. 3 shows the resulting isotherm of such a bonding system. When the microheater was at a high temperature of 1000° C., the temperature dropped to 100° C. less than 2 μm away from the microheater as shown. Therefore, localized and confined heating was successfully achieved by the proper arrangement of microheaters and insulation layers in this particular set-up.
  • [0051]
    Two widths, 5 or 7 μm, of the microheaters were designed and tested with a square bonding area of 500 μm2. A pressure of 1 MPa was applied on top of two wafers and a current, which corresponded to the particular design of the microheaters, was passed through the heaters to provide the proper bonding temperature. An electro-thermal model based on the conservation of energy was used to estimate the temperature. FIG. 4 shows the simulation results (solid lines) and experiments (symbols) of polysilicon microheaters under different input currents without the cap substrate. The experimental data was calculated by assuming a linear dependence of resistivity with respect to temperature:
  • p(T)=p o(1+E(T−T o))   (1)
  • [0052]
    where po is the resistivity at room temperature and E is the temperature coefficient of resistivity. For N-type polysilicon with a dopant concentration of 7.5×1019/cm3, this temperature coefficient is about 1.2×10−3/°K.
  • [0053]
    This same principle was utilized with the temperature sensor to determine the temperature changes and gradient at a short distance, such as 15 μm, away from the microheater. It was found that when an electric current of 30 mA was passed through the 5 μm polysilicon resistive heater, the temperature reached the melting point of polysilicon (˜1415° C.). At the same time, the temperature sensor indicated a temperature increase of less than 40° C. Thus, the high temperature in the bonding region was successfully and very well confined in a small region within the device is substrate.
  • [0054]
    Part 2: Localized Fusion Bonding
  • [0055]
    Based on the concept of localized high-temperature bonding, localized silicon-to-glass bonding was successfully accomplished using a glass cap substrate. First, a Pyrex glass cap substrate (7740 from Dow Corning) was placed and pressed on the top of polysilicon microheaters as shown in FIG. 2(a). A 31 mA input current was then applied to the 5 μm wide, 1.1 μm thick polysilicon microheater for about 5 minutes. This input current was close to that required to cause melting of polysilicon. This input current generated a temperature of about 1300° C. based on the current-temperature simulation that included the effect of the glass cap on top of the micro-heater. This temperature is slightly lower than the data shown in FIG. 4 under the same input current because of heat losses to the glass cap.
  • [0056]
    [0056]FIG. 5 shows the SEM micrograph of a forcefully broken fusion bond on the glass cap. It was observed that the square shape microheater was reflected on the originally flat glass substrate. Moreover, part of the polysilicon was attached to the glass cap. This microphoto demonstrated two very important features for the localized fusion bonding experiment. First, it was very easy to raise the microheater temperature to be above the glass soften point of ˜820° C., such that the glass cap is locally softened. Second, the applied pressure was high enough to cause intimate contact of the glass cap and the microheaters. Since intimate contact was made at the proper temperature and reaction time, a good and reliable fusion bond resulted.
  • [0057]
    In order to determine the bonding strength, a close-up SEM microphoto was taken as shown in FIG. 6. For this particular sample, the breakage was along one of the microheaters. The polysilicon microheater, underneath the silicon dioxide layer and the top glass cap, was clearly identified. The morphology of glass near the heater line showed the glass had been softened locally. After dipping the sample into an HF solution, the polysilicon heater was clearly delineated as shown in FIG. 7. In this case, the polysilicon-glass bond seemed to be stronger than the bottom polysilicon-oxide adhesion where the broken trace was clearly observed. Therefore, these results strongly suggest that an excellent silicon-to-glass fusion bonding can be achieved with localized high-temperature bonding.
  • [0058]
    According to established fusion bonding principles, flat surfaces, hydrophilic surface treatment, sufficiently high bonding temperature, and reasonable bonding time together result in successful bonding. The typical conventional bonding temperature is above 1000° C. for about 2 hours. In the experiments presented here, microheaters were cleaned by SPM (sulfuric peroxide mixture, i.e. a mixture of H2SO4 and H2O2) followed by an HF dip and water rinse for proper hydrophilic surface treatment. Bright red light emitted from microheaters during the high-temperature bonding process. It was found that when the bonding temperature was raised to very close to the melting temperature of polysilicon, the silicon-to-glass fusion bonding occurred in less than 2 minutes. In another experiment, a lower bonding current of 29 mA, which corresponds to a temperature of about 1000° C., was applied continuously for 30 minutes. The result showed poor bonding strength and poor uniformity. According to these experimental results, hermetic bonding results when the bonding temperature is controlled to be very close to the melting point of the polysilicon material. At a lower bonding temperature, a significantly longer bonding period is needed to achieve such excellent bonding.
  • [0059]
    Part 3: Localized Eutectic Bonding
  • [0060]
    In the silicon-to-gold eutectic bonding experiments, gold microheaters were used both as the heating material and the bonding material. A silicon cap substrate was placed on top of the gold microheater, as shown in FIG. 2(a). A 0.27 A electric current was then applied to the 5 μm wide, 0.5 μm thick gold microheater for about 5 minutes. The bonding temperature was estimated to be about 800° C. During the bonding process, gold diffused into the silicon, and the resistivity of the gold line was thereby increased. Thus, it was necessary to increase the current density through the gold microheater to maintain a high bonding temperature during the bonding process. FIG. 8 shows the result of silicon-to-gold eutectic bonding by the technique of localized heating. It appeared that silicon was broken and attached to the gold microheater when the eutectic bond was forcefully broken. Moreover, uniform eutectic bonds were observed around the square shape microheater.
  • COMPARATIVE EXAMPLE
  • [0061]
    For comparison purposes, the same eutectic bonding experiment was also performed by using the conventional eutectic bonding technique. The process was conducted in an oven that provided global heating and bonding. The processing temperature was first ramped to 410° C. in 10 minutes and was kept at 410° C. for 10 minutes before cooling down to room temperature in 10 minutes. FIG. 9 shows the bonding result in a SEM microphoto. Nonuniform eutectic bonding was clearly observed in this photo. This is probably the reason why hermetic sealing was not achieved. It is well-known that the diffusivity and solubility of gold into a silicon substrate both increase when the processing temperature increases. At higher bonding temperatures, as those used in the localized bonding process, more gold atoms can diffuse into silicon. Therefore, a thicker layer of gold-silicon alloy can form at a higher bonding temperature and a stronger eutectic bond is expected. However, this also results in the degradation of nearby heat-sensitive components. Therefore, a balance between achieving a good bond and the maintenance of component integrity is difficult and often impossible to achieve.
  • [0062]
    Temperature and processing time are the two key success factors for both fusion and eutectic bonding in order to achieve intimate contact as per the invention. In the silicon-to-glass fusion bonding system, atoms obtain thermal energy provided by temperature to overcome reaction barrier to form chemical bonds. In the silicon-to-gold eutectic bonding system, diffusion is activated under a high temperature environment when atoms overcome the diffusion barrier to form eutectic bonds. It is desirable to have high processing temperatures in both fusion and eutectic bonding processes for a higher diffusion constant and reaction rates. Localized heating provides an excellent way to accomplish the high temperature bonding requirement while maintaining low temperature at the wafer level. Therefore, fast reaction and strong bonding are expected to occur locally. There are many ways to achieve localized heating, including using microheaters or a focused micro-laser. The key structural design is to prevent the heat losses to the environment or substrate. An insulation layer (such as a silicon dioxide) underneath the heating element serves well for this purpose, as illustrated in FIG. 3. In accordance with the present invention, further design optimizations, of course, can be implemented based on basic heat transfer principles to improve the effectiveness of localized heating.
  • [0063]
    In some embodiments, direct silicon fusion and eutectic bonding techniques are conducted where the heating elements also serve as the bonding materials. One drawback for the direct bonding technique is that the bonding materials may diffuse or melt during the process. Therefore, the resistance of the microheater changes, and it is very difficult to control the bonding temperature and process. The same localized heating techniques are also shown by adding soldering materials for indirect bonding. Since the microheaters can be preserved during the indirect bonding process, good temperature and process control are expected. These methods are very well suited to encapsulation of microresonators in a vacuum environment with hermetic sealing to package microresonators.
  • [0064]
    The method of the invention is usable to prepare a micropackage (microshell) as shown in FIGS. 10 and 11. FIG. 10(a) shows a silicon wafer with an oxide layer and a cavity. The structure of FIG. 10(a) is prepared by first growing an oxide layer on the silicon wafer. This oxide layer functions both as thermal insulation and electrical insulation layered between the microheater and the silicon wafer substrate. The silicon oxide is chosen because it has very good thermal and electrical insulation properties, and it can be grown easily on silicon. The silicon oxide layer is then patterned to define the cavity area, and the cavity is thereafter etched to a desired depth. This cavity can then be used to protect a microdevice, such as a MEMS device.
  • [0065]
    Referring again to FIGS. 10 and 11, it was described that insulation and isolation materials were used. In FIG. 10, the silicon dioxide layer has both thermal and electrical insulating characteristics. In the broadest aspect, both electrical and thermal insulating requirements are not strictly required. The electrical insulation layer is preferred in order to help control the electrical power output. The thermal insulation is also preferred in order to help the efficiency of the heating. Although one may accomplish the same result without using a dual purpose layer or more than one layer to achieve electrical and thermal insulation, this is not thought to be the best approach. As to FIG. 11, isolation and/or insulation material are shown on the respective caps and substrates. (FIGS. 11a and 11 b). As per the reasons described in connection with FIG. 10, it is better to have both thermally and electrically insulating characteristics for this isolation layer. However, this is a preferred feature related to the most preferred embodiment. The invention may be practiced without this preferred feature.
  • [0066]
    Proceeding from FIG. 10(a) to FIG. 10(b), the application of the microheater is shown. In this embodiment, the microheater is preferably polysilicon. This material is able to withstand and sustain a very high localized temperature and is therefore compatible with integrated circuit processes. For bonding processes that require a higher temperature, tungsten or other higher melting point materials can be used as the microheater. After polysilicon is deposited, it is doped with phosphorous and patterned as shown in FIG. 10(b). Next, a thin layer of silicon nitride is deposited over the surface of the structure to provide electrical insulation. This layer is also used as a masking material during the final etching step. After deposition of the silicon nitride, the bonding material is deposited and patterned as shown in FIG. 10(c). As required, an opening may be made to provide a wire bonding area for a MEMS device. Therefore, as per FIG. 10(d), the wire bonding area for MEMS chips is opened in the silicon nitride layer. Silicon is etched away to open up this area. In this example, the bonding material is selected to be resistant to the silicon etchant.
  • [0067]
    The microstructure (microshell) prepared as per FIGS. 10(a) through 10(d) shows one example of a micropackage with a cavity, microheaters, and bonding material, specifically arranged for the post-packaging of a MEMS device by localized heating. For MEMS chips which have unprotected feed-through as interconnections, non-conducting materials should be used for bonding. For those where the electrical feed-through has been protected by insulation layers, electrically conductive material can be used as bonding material. FIG. 10(d) is generally viewed as the cross-sectional view of line A-A′ in FIG. 10(e).
  • [0068]
    A prototype design for a composite microheater is shown in FIG. 10 (f). More particularly, two microheaters which are electrically connected in parallel are utilized to form a combined composite closed-loop microheater. The composite closed-loop microheater design ensures that a micropackage (i.e., a microshell) bonded onto a MEMS wafer, for example, successfully encapsulates and hermetically seals the microdevice which is situated within the closed loop. As shown in FIG. 10(f), the two microheaters are connected in parallel between two main electrically conductive interconnection lines on the micropackage wafer substrate. The two interconnection lines have different voltage potentials to ensure that electrical current is conducted in parallel through the two microheaters. As would be recognized by one skilled in the electronic arts, numerous additional composite closed-loop microheaters can all be connected in parallel between the two interconnection lines. Alternatively, multiple composite closed-loop microheaters can also be connected in electrical series between the two interconnection lines provided space between the two lines permits such. Even further, as illustrated in FIG. 12, multiple composite closed-loop microheaters can be incorporated into an array of composite microheaters over the surface of the micropackage wafer, whereon the microheaters are connected in series and in parallel. As would be recognized by one skilled in the electronic arts, composite microheater array designs can also include more than two main interconnection lines such that a multiple array scheme or a super and sub-array scheme is developed. In this manner, such multiple composite microheater array schemes enable numerous microshells to be bonded simultaneously to the MEMS wafer when electrical current is passed through the microheater array(s). Thus, numerous MEMS (and/or microelectronic integrated circuits) can be encapsulated on the MEMS wafer and hermetically sealed at the same time instead of one at a time. As a result, MEMS devices can be easily and economically mass produced in a significantly shorter period of time. To ensure that the voltage-supplying interconnection lines on the micropackage substrate wafer can be accessed for activation when the micropackage substrate wafer is aligned and placed over the MEMS wafer, the diameter of the micropackage substrate wafer (substrate 2 in FIG. 12) should be larger than the diameter of the MEMS wafer (substrate 1 in FIG. 12) so that electrical contact pads along the outer periphery of the micropackage wafer can be accessed to pass current to the interconnection lines on the micropackage wafer for bonding.
  • [0069]
    Localized fusion and eutectic bonding processes have been successfully demonstrated. Phosphorous doped polysilicon and gold resistive heaters were used in silicon-to-glass fusion and silicon-to-gold eutectic bonding processes, respectively. It was found that both processes were accomplished in less than 5 minutes with excellent bonding strength and uniformity. In the silicon-to-glass fusion bonding process, an input current of about 31 mA was necessary to reach a bonding temperature of about 1300° C. In the silicon-to-gold eutectic bonding process, an input current of about 0.27 A is needed to reach a bonding temperature of about 800° C. These localized high-temperature bonding techniques greatly simplify MEMS fabrication and packaging at both the wafer and chip levels.
  • [0070]
    This new scheme has potential applications for MEMS fabrication and packaging that require low temperature processing at the wafer level, excellent bonding strength, and hermetic sealing characteristics. The methods and structures of the present invention are well suited to commercial production, are relatively economical, and meet the needs for packaging a variety of microdevices in a variety of circuit configurations, including composite devices which integrate both microelectronic integrated circuits with MEMS devices.
  • EXAMPLE 2 Indirect Bonding with an Intermediate Layer
  • [0071]
    In the direct bonding process method and associated structures described hereinabove, either phosphorus-doped polysilicon or gold was primarily utilized to serve the dual role of being both the heating material (i.e., a microheater) and the bonding material during the bonding process. As briefly alluded to hereinabove, one drawback of this direct bonding method is that the bonding materials may diffuse or melt during the bonding process and change the resistance of the microheater material. Such a change in resistance makes controlling the current which is applied to the microheater to control the temperature for facilitating the bonding process rather difficult. To remedy such, it is sometimes more desirable to introduce an added intermediate layer that functions only as the bonding material to thereby separate the roles of bonding and heating. As a result, better temperature control is achieved in order to soften the intermediate layers for successful bonding.
  • [0072]
    Two types of localized, indirect bonding processes which incorporate intermediate layers have been investigated, specifically PSG-to-glass fusion bonding (see FIG. 14(a)) and Indium-to-glass bonding (see FIG. 14(b)). In both of these bonding processes, polysilicon is used as the heating material (i.e., the microheater), and a thermal oxide layer is first grown on the silicon substrate to ensure electrical and thermal insulation. That is, the thermal oxide layer is grown on top of the silicon substrate layer for electrical insulation before the PSG or Indium solder layer depositions. A pressure of 1 MPa is applied on top of the two wafers, and a current of approximately 10 to 70 mA (the exact current selected depends on the design of the microheaters and the intermediate layer) is passed through the microheater. Ultimately, the intermediate PSG layer on top of the polysilicon microheater is stripped away and is instead attached to the glass wafer. As a result, an excellent PSG-to-glass bond is achieved, and the new bond is even stronger than the initial adhesion force between the deposited PSG and the polysilicon layer. Furthermore, the full depletion of the PSG intermediate layer onto the glass substrate (i.e., pyrex glass cap) ensures excellent bonding uniformity. The process of localized bonding via an intermediate layer serves to soften or reflow the bonding material itself, thereby avoiding the poor bonding results which typically occur when bonding surfaces are rough and not smooth.
  • [0073]
    In summary, while the present invention has been described in terms of certain embodiments and examples thereof, it is not intended that the invention be limited to the above description and embodiments, but rather only to the extent set forth in the following claims.
  • [0074]
    The embodiments of the present invention in which an exclusive property right or privilege is claimed are defined in the following claims.

Claims (34)

    What is claimed is:
  1. 1. A method for making a microstructure assembly, the method comprising the steps of:
    (i) providing a first substrate and a second substrate;
    (ii) depositing an electrically conductive material on the second substrate;
    (iii) contacting the second substrate carrying the electrically conductive material with the first substrate; and then
    (iv) supplying current to the electrically conductive material to elevate the temperature of said electrically conductive material and cause formation of a bond between the first substrate and the second substrate.
  2. 2. The method of
    claim 1
    wherein the second substrate is a silicon or glass wafer having a layer of an oxide of silicon on the surface, which layer is thermally and electrically insulating.
  3. 3. The method of
    claim 1
    wherein before the step of depositing the electrically conductive material, a cavity is formed in the surface of the second substrate; and said electrically conductive material is deposited in a path which circumscribes the opening of the cavity.
  4. 4. The method of
    claim 3
    wherein after the step of depositing the electrically conductive material, a layer of electrically insulating material is deposited on the surface of the second substrate to cover at least the electrically conductive material and the interior surface of the cavity.
  5. 5. The method of
    claim 4
    wherein a bonding material is deposited over the insulating layer of
    claim 4
    in a pattern which follows the path of the electrically conductive material.
  6. 6. The method of
    claim 4
    wherein the layer of electrically insulating material of
    claim 4
    is selected from the group consisting of silicon nitride, silicon dioxide, and mixtures thereof.
  7. 7. The method of
    claim 3
    wherein before step (iii) of
    claim 1
    , a microelectronic device is placed on the surface of the first substrate whereby step (iii) of contacting the first and second substrates provides sealing of the cavity with the microelectronic device disposed therein.
  8. 8. The method of
    claim 1
    wherein the electrically conductive material is selected from the group consisting of gold, polysilicon, aluminum platinum, tungsten, any other refractory metal, and mixtures thereof.
  9. 9. The method of
    claim 5
    wherein the bonding material is selected from the group consisting of silicon dioxide, silicon, gold, copper, titanium, polysilicon, glass frit, PSG, BSG, soldering materials such as indium, silicon/gold alloy, and silicon/aluminum alloy, and mixtures thereof.
  10. 10. The method of
    claim 1
    wherein while current is being supplied in step (iv), a bonding material is applied between said first and second substrates by decomposing a gas on contact with said electrically conductive material thereby forming a decomposition product which bonds said substrates together.
  11. 11. The method of
    claim 3
    wherein the cavity is formed by etching or machining.
  12. 12. The method of
    claim 11
    wherein the cavity is formed by isotropic etching or anisotropic etching.
  13. 13. The method of
    claim 1
    wherein the electrically conductive material is applied to the second substrate by chemical vapor deposition, sputtering or evaporation.
  14. 14. The method of
    claim 1
    wherein the bond is a fusion bond or a eutectic bond or a soldering bond.
  15. 15. The method of
    claim 1
    wherein the first substrate is silicon, the second substrate is silicon, the bonding material is gold and the bond is a eutectic bond formed by silicon and gold.
  16. 16. The method of
    claim 1
    wherein the first substrate is silicon, the second substrate is silicon, the bonding material is polysilicon, and the bond is a fused silicon to silicon bond.
  17. 17. The method of
    claim 1
    wherein the first substrate is glass, the second substrate is silicon, the bonding material is polysilicon, and the bond is a fusion bond formed between silicon and glass.
  18. 18. A method for simultaneously micropackaging a plurality of microdevices, the method comprising the steps of:
    fabricating a plurality of microdevices on a first substrate wafer such that the microdevices are arranged in a first array;
    fabricating a corresponding plurality of micropackages on a second substrate wafer such that the micropackages are arranged in a second array which is aligned to match the first array;
    fabricating an array of microheaters on the micropackages of the second array;
    fabricating electrically conductive interconnection lines between the microheaters;
    moving the first substrate and the second substrate toward each other until the array of micropackages comes into biased contact with the first substrate such that each microdevice in the first array is covered by one of the micropackages, and such that the array of microheaters is interposed between the first array of devices and the second array of micropackages; and
    applying electrical current through the interconnection lines to thermally activate the microheaters for bonding and hermetically sealing the micropackages to the first substrate to thereby encapsulate and protect the devices on the first substrate.
  19. 19. The method according to
    claim 19
    , and further comprising the steps of:
    fabricating the first substrate wafer and the second substrate wafer such that the diameter of the second substrate wafer is larger than the diameter of the first substrate wafer; and
    fabricating electrically conductive contact pads on the second substrate wafer such that the contact pads are electrically connected to the interconnection lines, and such that the contact pads are proximate to the perimeter of the second substrate wafer whereby electrical current applied to the contact pads flows through the interconnection lines unobstructed when the first substrate wafer and the second substrate wafer are moved toward each other for bonding.
  20. 20. A microstructure for simultaneously micropackaging a plurality of microelectronic devices, the microstructure comprising:
    a first substrate wafer;
    a first array of microdevices mounted on the first substrate wafer;
    a second substrate wafer;
    a corresponding second array of micropackages mounted on the second substrate wafer, the micropackages being aligned such that the second array matches the first array;
    a corresponding array of microheaters, each said microheater mounted on a respective one of the micropackages of the second array; and
    electrically conductive interconnection lines which are electrically interconnected between the microheaters of the second array on the second substrate, wherein the second substrate is mountably biased against the first substrate such that each microdevice in the first array is covered by one of the micropackages in the second array, and such that the third array of microheaters is interposed between the first array of devices and the second array of micropackages.
  21. 21. A microstructure having two bodies bonded together at respective surfaces of said bodies comprising:
    a first body having a first surface and which comprises a first material;
    a second body having a second surface and which comprises a second material;
    a resistive heating material carried on said second surface, and defining a bonding area between said first and second surfaces where said path is electrically conductive;
    a bonding interface joining said first and second bodies together and comprising said first material and a bonding material between said surfaces, said first material and said bonding material bonded together by heat from current supplied to said resistive heating material.
  22. 22. The microstructure of
    claim 21
    , further comprising, at least one of said bodies having a cavity, said bonding area circumscribing said cavity, and said bonding interface forming a seal which cooperates with said first and second bodies to sealingly enclose said cavity.
  23. 23. The microstructure of
    claim 21
    wherein said second body is a composite comprising said second material and a third material disposed between said second material and said resistive heating material, said third material being electrically insulating.
  24. 24. The microstructure of
    claim 23
    wherein said third material is electrically insulating.
  25. 25. The microstructure of
    claim 23
    , wherein said third material is selected from the group consisting of silicon dioxide, silicon nitride, and mixtures thereof.
  26. 26. The microstructure of
    claim 21
    wherein said bonding material is between said resistive heating material and said first surface.
  27. 27. The microstructure of
    claim 21
    wherein said resistive heating material constitutes said bonding material.
  28. 28. The microstructure of
    claim 21
    wherein said resistive heating material is selected from the group consisting of gold and polysilicon.
  29. 29. The microstructure of
    claim 21
    wherein the second material is selected from the group consisting of silicon, glass, aluminum, platinum, tungsten, any other refractory metal, and mixtures thereof.
  30. 30. The microstructure of
    claim 21
    wherein the bonding material is selected from the group consisting of silicon dioxide, silicon, gold, copper, titanium, polysilicon, glass frit, PSG, BSG, soldering materials such as indium, silicon/gold alloy, and silicon/aluminum alloy, and mixtures thereof.
  31. 31. The microstructure of
    claim 21
    wherein said bonding material comprises a material characterized by being the decomposition product of a gaseous precursor which decomposes on contact with said resistive heating material.
  32. 32. The microstructure of
    claim 31
    wherein said bonding material is a decomposition product selected from the group consisting of silicon carbide; molybdenum, nickel, and tungsten.
  33. 33. The microstructure of
    claim 31
    wherein said bonding interface comprises a eutectic bond formed by said first material which is silicon and said bonding material which is gold.
  34. 34. The microstructure of
    claim 21
    wherein said bonding interface comprises the following materials fused together: said first material which is silicon or glass and said bonding material which is silicon.
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Cited By (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1296374A1 (en) 2001-09-14 2003-03-26 Hewlett Packard Company, a Delaware Corporation Process for bonding and electrically connecting microsystems integrated in several distinct substrates
FR2834283A1 (en) * 2001-12-28 2003-07-04 Commissariat Energie Atomique Method and sealing zone between two substrates of a microstructure
US6590283B1 (en) * 2000-02-28 2003-07-08 Agere Systems Inc. Method for hermetic leadless device interconnect using a submount
US20030160021A1 (en) * 2002-02-27 2003-08-28 Honeywell International Inc. Bonding for a micro-electro-mechanical system (MEMS) and MEMS based devices
WO2003075368A2 (en) * 2002-03-01 2003-09-12 Board Of Control Of Michigan Technological University Method and apparatus for induction heating of thin films
EP1346949A2 (en) * 2002-03-06 2003-09-24 Robert Bosch Gmbh Si wafer-cap wafer bonding method using local laser energy, device produced by the method, and system used in the method
US20040196608A1 (en) * 2002-08-09 2004-10-07 Pts Corporation Method and apparatus for protecting wiring and integrated circuit device
US6820676B2 (en) 1999-11-19 2004-11-23 Advanced Bio Prosthetic Surfaces, Ltd. Endoluminal device exhibiting improved endothelialization and method of manufacture thereof
US20050072189A1 (en) * 2003-10-01 2005-04-07 Charles Stark Draper Laboratory, Inc. Anodic Bonding of silicon carbide to glass
US20050181126A1 (en) * 2002-03-01 2005-08-18 Board Of Control Of Michigan Technological University Magnetic annealing of ferromagnetic thin films using induction heating
US20050184382A1 (en) * 2004-02-19 2005-08-25 Chien-Hua Chen System and methods for hermetic sealing of post media-filled mems package
US20050232817A1 (en) * 2003-09-26 2005-10-20 The University Of Cincinnati Functional on-chip pressure generator using solid chemical propellant
US20050275072A1 (en) * 2004-05-26 2005-12-15 Haluzak Charles C Package having bond-sealed underbump
US7002215B1 (en) * 2002-09-30 2006-02-21 Pts Corporation Floating entrance guard for preventing electrical short circuits
US20060191629A1 (en) * 2004-06-15 2006-08-31 Agency For Science, Technology And Research Anodic bonding process for ceramics
US20080000416A1 (en) * 2006-05-16 2008-01-03 Tokyo Electron Limited Film formation method and apparatus
WO2008061101A2 (en) * 2006-11-14 2008-05-22 Glimmerglass Networks, Inc. Method and apparatus for localized bonding
US7704274B2 (en) 2002-09-26 2010-04-27 Advanced Bio Prothestic Surfaces, Ltd. Implantable graft and methods of making same
US20100218977A1 (en) * 2009-02-27 2010-09-02 Fujitsu Limited Packaged device and producing method thereof
US20100275335A1 (en) * 2009-04-23 2010-10-28 National Tsing Hua University Scanning probe and method for attaching conductive particle to the apex of the probe tip of the scanning probe
US20110147862A1 (en) * 2008-04-08 2011-06-23 Tjalf Pirk Micromechanical component having an inclined structure and corresponding manufacturing method
US8641754B2 (en) 2000-11-07 2014-02-04 Advanced Bio Prosthetic Surfaces, Ltd. a wholly owned subsidiary of Palmaz Scientific, Inc. Endoluminal stent, self-supporting endoluminal graft and methods of making same

Families Citing this family (135)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7962285B2 (en) * 1997-10-22 2011-06-14 Intelligent Technologies International, Inc. Inertial measurement unit for aircraft
JP2000186931A (en) * 1998-12-21 2000-07-04 Murata Mfg Co Ltd Small-sized electronic component and its manufacture, and via hole forming method for the small-sized electronic component
DE60018582T2 (en) 1999-08-18 2006-01-19 Microchips, Inc., Bedford Thermally activated microchip as a delivery device for chemicals
EP1210715B1 (en) * 1999-09-10 2007-11-14 Hitachi Global Storage Technologies Netherlands B.V. Magnetic sensing of motion in microfabricated devices
DE69918551D1 (en) * 1999-09-17 2004-08-12 St Microelectronics Srl A method for electrical and mechanical connection of microelectronic components
US6798312B1 (en) 1999-09-21 2004-09-28 Rockwell Automation Technologies, Inc. Microelectromechanical system (MEMS) analog electrical isolator
US6803755B2 (en) 1999-09-21 2004-10-12 Rockwell Automation Technologies, Inc. Microelectromechanical system (MEMS) with improved beam suspension
US6808522B2 (en) * 1999-12-10 2004-10-26 Massachusetts Institute Of Technology Microchip devices for delivery of molecules and methods of fabrication thereof
US6550337B1 (en) * 2000-01-19 2003-04-22 Measurement Specialties, Inc. Isolation technique for pressure sensing structure
US6521477B1 (en) * 2000-02-02 2003-02-18 Raytheon Company Vacuum package fabrication of integrated circuit components
US6479320B1 (en) 2000-02-02 2002-11-12 Raytheon Company Vacuum package fabrication of microelectromechanical system devices with integrated circuit components
US6335226B1 (en) * 2000-02-09 2002-01-01 Texas Instruments Incorporated Digital signal processor/known good die packaging using rerouted existing package for test and burn-in carriers
CA2399842C (en) 2000-03-02 2006-11-14 Microchips, Inc. Microfabricated devices for the storage and selective exposure of chemicals and devices
US6690014B1 (en) 2000-04-25 2004-02-10 Raytheon Company Microbolometer and method for forming
US7057251B2 (en) * 2001-07-20 2006-06-06 Reflectivity, Inc MEMS device made of transition metal-dielectric oxide materials
US7057246B2 (en) * 2000-08-23 2006-06-06 Reflectivity, Inc Transition metal dielectric alloy materials for MEMS
US7071520B2 (en) * 2000-08-23 2006-07-04 Reflectivity, Inc MEMS with flexible portions made of novel materials
US6530515B1 (en) 2000-09-26 2003-03-11 Amkor Technology, Inc. Micromachine stacked flip chip package fabrication method
US6522015B1 (en) 2000-09-26 2003-02-18 Amkor Technology, Inc. Micromachine stacked wirebonded package
US6638789B1 (en) * 2000-09-26 2003-10-28 Amkor Technology, Inc. Micromachine stacked wirebonded package fabrication method
WO2002030264A3 (en) 2000-10-10 2003-07-17 Microchips Inc Microchip reservoir devices using wireless transmission of power and data
US6621137B1 (en) * 2000-10-12 2003-09-16 Intel Corporation MEMS device integrated chip package, and method of making same
US6607934B2 (en) * 2000-11-18 2003-08-19 Lenghways Technology Co., Ltd. Micro-electromechanical process for fabrication of integrated multi-frequency communication passive components
US6995034B2 (en) * 2000-12-07 2006-02-07 Reflectivity, Inc Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates
US7405860B2 (en) * 2002-11-26 2008-07-29 Texas Instruments Incorporated Spatial light modulators with light blocking/absorbing areas
US6969635B2 (en) * 2000-12-07 2005-11-29 Reflectivity, Inc. Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates
US7307775B2 (en) * 2000-12-07 2007-12-11 Texas Instruments Incorporated Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates
DE60219607T2 (en) * 2001-01-09 2007-12-27 Microchips, Inc., Bedford Flexible micro chip devices for ophthalmic and other application
US6537892B2 (en) * 2001-02-02 2003-03-25 Delphi Technologies, Inc. Glass frit wafer bonding process and packages formed thereby
DE10104868A1 (en) * 2001-02-03 2002-08-22 Bosch Gmbh Robert Micromechanical component as well as a process for producing a micromechanical component
WO2002072495A3 (en) * 2001-03-09 2002-11-14 David Barrow Sol-gel derived resistive and conductive coating
US6777681B1 (en) 2001-04-25 2004-08-17 Raytheon Company Infrared detector with amorphous silicon detector elements, and a method of making it
US6768628B2 (en) * 2001-04-26 2004-07-27 Rockwell Automation Technologies, Inc. Method for fabricating an isolated microelectromechanical system (MEMS) device incorporating a wafer level cap
US6761829B2 (en) 2001-04-26 2004-07-13 Rockwell Automation Technologies, Inc. Method for fabricating an isolated microelectromechanical system (MEMS) device using an internal void
US6815243B2 (en) 2001-04-26 2004-11-09 Rockwell Automation Technologies, Inc. Method of fabricating a microelectromechanical system (MEMS) device using a pre-patterned substrate
WO2002099457A3 (en) * 2001-05-31 2003-03-27 Massachusetts Inst Technology Microchip devices with improved reservoir opening
DE60202468T2 (en) * 2001-06-28 2006-02-16 Microchips, Inc., Bedford A method for hermetically seal microchip reservoir devices
US6664786B2 (en) 2001-07-30 2003-12-16 Rockwell Automation Technologies, Inc. Magnetic field sensor using microelectromechanical system
US6930364B2 (en) * 2001-09-13 2005-08-16 Silicon Light Machines Corporation Microelectronic mechanical system and methods
US6756310B2 (en) 2001-09-26 2004-06-29 Rockwell Automation Technologies, Inc. Method for constructing an isolate microelectromechanical system (MEMS) device using surface fabrication techniques
US6794271B2 (en) * 2001-09-28 2004-09-21 Rockwell Automation Technologies, Inc. Method for fabricating a microelectromechanical system (MEMS) device using a pre-patterned bridge
US6696364B2 (en) * 2001-10-19 2004-02-24 Stmicroelectronics S.R.L. Method for manipulating MEMS devices, integrated on a wafer semiconductor and intended to be diced one from the other, and relevant support
US7004015B2 (en) 2001-10-25 2006-02-28 The Regents Of The University Of Michigan Method and system for locally sealing a vacuum microcavity, methods and systems for monitoring and controlling pressure and method and system for trimming resonant frequency of a microstructure therein
US6690178B2 (en) 2001-10-26 2004-02-10 Rockwell Automation Technologies, Inc. On-board microelectromechanical system (MEMS) sensing device for power semiconductors
US6956274B2 (en) * 2002-01-11 2005-10-18 Analog Devices, Inc. TiW platinum interconnect and method of making the same
US6660564B2 (en) * 2002-01-25 2003-12-09 Sony Corporation Wafer-level through-wafer packaging process for MEMS and MEMS package produced thereby
US7218473B2 (en) * 2002-03-22 2007-05-15 Seagate Technology Llc Two-stage sealing of a data storage assembly housing to retain a low density atmosphere
US6673697B2 (en) * 2002-04-03 2004-01-06 Intel Corporation Packaging microelectromechanical structures
US6635509B1 (en) 2002-04-12 2003-10-21 Dalsa Semiconductor Inc. Wafer-level MEMS packaging
US7029829B2 (en) * 2002-04-18 2006-04-18 The Regents Of The University Of Michigan Low temperature method for forming a microcavity on a substrate and article having same
US6902656B2 (en) * 2002-05-24 2005-06-07 Dalsa Semiconductor Inc. Fabrication of microstructures with vacuum-sealed cavity
US7399313B2 (en) * 2002-06-07 2008-07-15 Brown Peter S Endovascular graft with separable sensors
US7025778B2 (en) * 2002-06-07 2006-04-11 Endovascular Technologies, Inc. Endovascular graft with pressure, temperature, flow and voltage sensors
US7261733B1 (en) 2002-06-07 2007-08-28 Endovascular Technologies, Inc. Endovascular graft with sensors design and attachment methods
US6713314B2 (en) * 2002-08-14 2004-03-30 Intel Corporation Hermetically packaging a microelectromechanical switch and a film bulk acoustic resonator
JP4436258B2 (en) 2002-08-16 2010-03-24 マイクロチップス・インコーポレーテッド Controlled release devices and methods
US6822326B2 (en) * 2002-09-25 2004-11-23 Ziptronix Wafer bonding hermetic encapsulation
EP1551499A1 (en) * 2002-10-04 2005-07-13 Microchips, Inc. Medical device for neural stimulation and controlled drug delivery
DE10256116B4 (en) * 2002-11-29 2005-12-22 Infineon Technologies Ag the same electronic component and methods for making
FR2849014B1 (en) * 2002-12-20 2005-06-10 Commissariat Energie Atomique Microstruture encapsulated and method of manufacturing such a microstructure
US6962835B2 (en) * 2003-02-07 2005-11-08 Ziptronix, Inc. Method for room temperature metal direct bonding
US6975193B2 (en) * 2003-03-25 2005-12-13 Rockwell Automation Technologies, Inc. Microelectromechanical isolating circuit
US6806107B1 (en) * 2003-05-08 2004-10-19 Taiwan Semiconductor Manufacturing Company, Ltd. Electrical fuse element test structure and method
US20040232535A1 (en) * 2003-05-22 2004-11-25 Terry Tarn Microelectromechanical device packages with integral heaters
US7176106B2 (en) * 2003-06-13 2007-02-13 Avago Technologies Fiber Ip (Singapore) Pte. Ltd. Wafer bonding using reactive foils for massively parallel micro-electromechanical systems packaging
US7114312B2 (en) * 2003-07-17 2006-10-03 Microchips, Inc. Low temperature methods for hermetically sealing reservoir devices
US20070036835A1 (en) * 2004-07-19 2007-02-15 Microchips, Inc. Hermetically Sealed Devices for Controlled Release or Exposure of Reservoir Contents
EP1522521B1 (en) * 2003-10-10 2015-12-09 Infineon Technologies AG Capacitive sensor
US7073752B2 (en) * 2003-10-24 2006-07-11 Cybernet Systems Corporation Automatic reserve or primary parachute activation device
US20050093134A1 (en) * 2003-10-30 2005-05-05 Terry Tarn Device packages with low stress assembly process
US8095197B2 (en) * 2003-11-03 2012-01-10 Microchips, Inc. Medical device for sensing glucose
US20050101045A1 (en) * 2003-11-07 2005-05-12 Jennifer Shih Sealing openings in micro-electromechanical systems
US7046415B2 (en) * 2003-11-21 2006-05-16 Hewlett-Packard Development Company, L.P. Micro-mirrors with flexure springs
US6936918B2 (en) * 2003-12-15 2005-08-30 Analog Devices, Inc. MEMS device with conductive path through substrate
US20050170609A1 (en) * 2003-12-15 2005-08-04 Alie Susan A. Conductive bond for through-wafer interconnect
US6949807B2 (en) * 2003-12-24 2005-09-27 Honeywell International, Inc. Signal routing in a hermetically sealed MEMS device
US6989493B2 (en) * 2004-03-03 2006-01-24 Seagate Technology Llc Electrical feedthrough assembly for a sealed housing
DE102004011035B4 (en) * 2004-03-06 2006-05-04 X-Fab Semiconductor Foundries Ag Method for testing the tightness of wafer bonding connections and arrangement for performing the method
US9293169B2 (en) 2004-05-04 2016-03-22 Seagate Technology Llc Seal-type label to contain pressurized gas environment
EP1765455A2 (en) * 2004-06-01 2007-03-28 Microchips, Inc. Devices and methods for measuring and enhancing drug or analyte transport to/from medical implant
US7608534B2 (en) * 2004-06-02 2009-10-27 Analog Devices, Inc. Interconnection of through-wafer vias using bridge structures
US7183622B2 (en) * 2004-06-30 2007-02-27 Intel Corporation Module integrating MEMS and passive components
US7537590B2 (en) * 2004-07-30 2009-05-26 Microchips, Inc. Multi-reservoir device for transdermal drug delivery and sensing
US7407083B2 (en) * 2004-08-19 2008-08-05 Thermal Corp. Bonded silicon, components and a method of fabricating the same
JP5107041B2 (en) * 2004-09-01 2012-12-26 マイクロチップス・インコーポレーテッド For the controlled release or exposure of reservoir contents, the multi-cap reservoir bus device
US7918800B1 (en) 2004-10-08 2011-04-05 Endovascular Technologies, Inc. Aneurysm sensing devices and delivery systems
US20060081983A1 (en) * 2004-10-14 2006-04-20 Giles Humpston Wafer level microelectronic packaging with double isolation
CA2583911A1 (en) * 2004-10-28 2006-05-11 Microchips, Inc. Orthopedic and dental implant devices providing controlled drug delivery
EP1861333A2 (en) * 2004-11-04 2007-12-05 Microchips, Inc. Compression and cold weld sealing methods and devices
US7413846B2 (en) * 2004-11-15 2008-08-19 Microchips, Inc. Fabrication methods and structures for micro-reservoir devices
WO2006081279A3 (en) * 2005-01-25 2006-09-08 Microchips Inc Control of drug release by transient modification of local microenvironments
US7192868B2 (en) * 2005-02-08 2007-03-20 International Business Machines Corporation Method of obtaining release-standing micro structures and devices by selective etch removal of protective and sacrificial layer using the same
US7250353B2 (en) * 2005-03-29 2007-07-31 Invensense, Inc. Method and system of releasing a MEMS structure
US7408250B2 (en) * 2005-04-05 2008-08-05 Texas Instruments Incorporated Micromirror array device with compliant adhesive
US7508063B2 (en) * 2005-04-05 2009-03-24 Texas Instruments Incorporated Low cost hermetically sealed package
WO2007001624A3 (en) * 2005-06-28 2007-04-12 Charles E Hutchinson Medical and dental implant devices for controlled drug delivery
US7485968B2 (en) 2005-08-11 2009-02-03 Ziptronix, Inc. 3D IC method and device
US20070048887A1 (en) * 2005-08-26 2007-03-01 Innovative Micro Technology Wafer level hermetic bond using metal alloy
DE102005040789B4 (en) * 2005-08-29 2014-12-24 Robert Bosch Gmbh Manufacturing method for a micromechanical component having an anodically bonded cap
US7491567B2 (en) * 2005-11-22 2009-02-17 Honeywell International Inc. MEMS device packaging methods
EP1798196B1 (en) * 2005-12-15 2017-08-09 Infineon Technologies AG Multi-layer device with reduced UV radiations during encapsulation
US8173995B2 (en) 2005-12-23 2012-05-08 E. I. Du Pont De Nemours And Company Electronic device including an organic active layer and process for forming the electronic device
US7462831B2 (en) * 2006-01-26 2008-12-09 L-3 Communications Corporation Systems and methods for bonding
US7655909B2 (en) * 2006-01-26 2010-02-02 L-3 Communications Corporation Infrared detector elements and methods of forming same
US7459686B2 (en) * 2006-01-26 2008-12-02 L-3 Communications Corporation Systems and methods for integrating focal plane arrays
US7402899B1 (en) 2006-02-03 2008-07-22 Pacesetter, Inc. Hermetically sealable silicon system and method of making same
US7425465B2 (en) * 2006-05-15 2008-09-16 Fujifilm Diamatix, Inc. Method of fabricating a multi-post structures on a substrate
DE102006032047A1 (en) * 2006-07-10 2008-01-24 Schott Ag Optoelectronic component e.g. image signal-detecting component, manufacturing method for e.g. digital fixed image camera, involves positioning components either one by one or in groups relative to position of associated components of wafer
WO2008008845A3 (en) * 2006-07-11 2008-04-10 Microchips Inc Multi-reservoir pump device for dialysis, biosensing, or delivery of substances
US7718965B1 (en) 2006-08-03 2010-05-18 L-3 Communications Corporation Microbolometer infrared detector elements and methods for forming same
US20080087979A1 (en) * 2006-10-13 2008-04-17 Analog Devices, Inc. Integrated Circuit with Back Side Conductive Paths
US8153980B1 (en) 2006-11-30 2012-04-10 L-3 Communications Corp. Color correction for radiation detectors
US8100012B2 (en) * 2007-01-11 2012-01-24 Analog Devices, Inc. MEMS sensor with cap electrode
US8894582B2 (en) 2007-01-26 2014-11-25 Endotronix, Inc. Cardiac pressure monitoring device
US20080281212A1 (en) * 2007-03-15 2008-11-13 Nunez Anthony I Transseptal monitoring device
US8493187B2 (en) * 2007-03-15 2013-07-23 Endotronix, Inc. Wireless sensor reader
US8154389B2 (en) * 2007-03-15 2012-04-10 Endotronix, Inc. Wireless sensor reader
US8570186B2 (en) 2011-04-25 2013-10-29 Endotronix, Inc. Wireless sensor reader
US8049326B2 (en) 2007-06-07 2011-11-01 The Regents Of The University Of Michigan Environment-resistant module, micropackage and methods of manufacturing same
US8739398B2 (en) * 2007-11-20 2014-06-03 Board Of Regents, The University Of Texas System Method and apparatus for detethering mesoscale, microscale, and nanoscale components and devices
KR101411416B1 (en) 2007-12-14 2014-06-26 삼성전자주식회사 Micro speaker manufacturing method and micro speaker
US7474540B1 (en) * 2008-01-10 2009-01-06 International Business Machines Corporation Silicon carrier including an integrated heater for die rework and wafer probe
US7943411B2 (en) * 2008-09-10 2011-05-17 Analog Devices, Inc. Apparatus and method of wafer bonding using compatible alloy
US8956904B2 (en) 2008-09-10 2015-02-17 Analog Devices, Inc. Apparatus and method of wafer bonding using compatible alloy
US8119498B2 (en) * 2008-09-24 2012-02-21 Evigia Systems, Inc. Wafer bonding method and wafer stack formed thereby
US8053265B2 (en) * 2009-02-06 2011-11-08 Honeywell International Inc. Mitigation of high stress areas in vertically offset structures
FR2946036B1 (en) * 2009-05-26 2011-11-25 Thales Sa Method of MEMS microswitches integration on substrates gan comprising electronic power components
US8176617B2 (en) * 2010-03-31 2012-05-15 Honeywell International Inc. Methods for making a sensitive resonating beam accelerometer
US8765514B1 (en) 2010-11-12 2014-07-01 L-3 Communications Corp. Transitioned film growth for conductive semiconductor materials
US8740209B2 (en) * 2012-02-22 2014-06-03 Expresslo Llc Method and apparatus for ex-situ lift-out specimen preparation
US20130266774A1 (en) * 2012-04-10 2013-10-10 Touch Micro-System Technology Corp. Package structure and packaging method
US9730638B2 (en) 2013-03-13 2017-08-15 Glaukos Corporation Intraocular physiological sensor
US8847373B1 (en) * 2013-05-07 2014-09-30 Innovative Micro Technology Exothermic activation for high vacuum packaging
US9409768B2 (en) * 2013-10-28 2016-08-09 Teledyne Scientific & Imaging, Llc MEMS device with integrated temperature stabilization
US9953941B2 (en) 2015-08-25 2018-04-24 Invensas Bonding Technologies, Inc. Conductive barrier direct hybrid bonding

Family Cites Families (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS497635B1 (en) 1968-12-27 1974-02-21
US4103273A (en) 1973-04-26 1978-07-25 Honeywell Inc. Method for batch fabricating semiconductor devices
US4121334A (en) 1974-12-17 1978-10-24 P. R. Mallory & Co. Inc. Application of field-assisted bonding to the mass production of silicon type pressure transducers
US4079408A (en) 1975-12-31 1978-03-14 International Business Machines Corporation Semiconductor structure with annular collector/subcollector region
JPS5611312A (en) 1979-07-10 1981-02-04 Hitachi Ltd Semiconductor displacement converter
US4438181A (en) 1981-01-13 1984-03-20 Jon M. Schroeder Electronic component bonding tape
US4384899A (en) 1981-11-09 1983-05-24 Motorola Inc. Bonding method adaptable for manufacturing capacitive pressure sensing elements
JPS58130209U (en) 1982-02-26 1983-09-02
US4861420A (en) 1984-06-04 1989-08-29 Tactile Perceptions, Inc. Method of making a semiconductor transducer
US5000817A (en) 1984-10-24 1991-03-19 Aine Harry E Batch method of making miniature structures assembled in wafer form
US4625561A (en) 1984-12-06 1986-12-02 Ford Motor Company Silicon capacitive pressure sensor and method of making
US5002901A (en) * 1986-05-07 1991-03-26 Kulite Semiconductor Products, Inc. Method of making integral transducer structures employing high conductivity surface features
JPH0810170B2 (en) 1987-03-06 1996-01-31 株式会社日立製作所 The method of manufacturing a semiconductor absolute pressure sensor
JPH07111940B2 (en) 1987-09-11 1995-11-29 日産自動車株式会社 Bonding a semiconductor substrate
JPH0623782B2 (en) 1988-11-15 1994-03-30 株式会社日立製作所 Electrostatic capacitance type acceleration sensor and a semiconductor pressure sensor
US5221415A (en) 1989-01-17 1993-06-22 Board Of Trustees Of The Leland Stanford Junior University Method of forming microfabricated cantilever stylus with integrated pyramidal tip
US5006487A (en) 1989-07-27 1991-04-09 Honeywell Inc. Method of making an electrostatic silicon accelerometer
US4953387A (en) 1989-07-31 1990-09-04 The Regents Of The University Of Michigan Ultrathin-film gas detector
US5225373A (en) 1990-03-07 1993-07-06 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor pressure sensor device with two semiconductor pressure sensor chips
US5164328A (en) 1990-06-25 1992-11-17 Motorola, Inc. Method of bump bonding and sealing an accelerometer chip onto an integrated circuit chip
DE4107658C2 (en) 1991-03-09 1993-09-02 Robert Bosch Gmbh, 70469 Stuttgart, De
US5058856A (en) 1991-05-08 1991-10-22 Hewlett-Packard Company Thermally-actuated microminiature valve
JP3352457B2 (en) 1991-06-12 2002-12-03 ハリス コーポレーシヨン Semiconductor acceleration sensor and its manufacturing method
JPH05217121A (en) * 1991-11-22 1993-08-27 Internatl Business Mach Corp <Ibm> Method for joining parts weak to heat
US5262127A (en) 1992-02-12 1993-11-16 The Regents Of The University Of Michigan Solid state chemical micro-reservoirs
US5296255A (en) 1992-02-14 1994-03-22 The Regents Of The University Of Michigan In-situ monitoring, and growth of thin films by means of selected area CVD
WO1994014240A1 (en) 1992-12-11 1994-06-23 The Regents Of The University Of California Microelectromechanical signal processors
US5286671A (en) 1993-05-07 1994-02-15 Kulite Semiconductor Products, Inc. Fusion bonding technique for use in fabricating semiconductor devices
US5545594A (en) 1993-10-26 1996-08-13 Yazaki Meter Co., Ltd. Semiconductor sensor anodic-bonding process, wherein bonding of corrugation is prevented
US5492596A (en) 1994-02-04 1996-02-20 The Charles Stark Draper Laboratory, Inc. Method of making a micromechanical silicon-on-glass tuning fork gyroscope
US5471017A (en) 1994-05-31 1995-11-28 Texas Instruments Incorporated No fixture method to cure die attach for bonding IC dies to substrates
US5578843A (en) 1994-10-06 1996-11-26 Kavlico Corporation Semiconductor sensor with a fusion bonded flexible structure
US5528452A (en) 1994-11-22 1996-06-18 Case Western Reserve University Capacitive absolute pressure sensor
US5591679A (en) * 1995-04-12 1997-01-07 Sensonor A/S Sealed cavity arrangement method
US5614113A (en) 1995-05-05 1997-03-25 Texas Instruments Incorporated Method and apparatus for performing microelectronic bonding using a laser
JP3613838B2 (en) 1995-05-18 2005-01-26 株式会社デンソー A method of manufacturing a semiconductor device
US5837562A (en) * 1995-07-07 1998-11-17 The Charles Stark Draper Laboratory, Inc. Process for bonding a shell to a substrate for packaging a semiconductor
US5731587A (en) 1996-08-12 1998-03-24 The Regents Of The University Of Michigan Hot stage for scanning probe microscope
US6063442A (en) * 1998-10-26 2000-05-16 Implex Corporation Bonding of porous materials to other materials utilizing chemical vapor deposition

Cited By (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6820676B2 (en) 1999-11-19 2004-11-23 Advanced Bio Prosthetic Surfaces, Ltd. Endoluminal device exhibiting improved endothelialization and method of manufacture thereof
US9284637B2 (en) 1999-11-19 2016-03-15 Advanced Bio Prosthetic Surfaces, Ltd., A Wholly Owned Subsidiary Of Palmaz Scientific, Inc. Implantable graft and methods of making same
US6590283B1 (en) * 2000-02-28 2003-07-08 Agere Systems Inc. Method for hermetic leadless device interconnect using a submount
US8641754B2 (en) 2000-11-07 2014-02-04 Advanced Bio Prosthetic Surfaces, Ltd. a wholly owned subsidiary of Palmaz Scientific, Inc. Endoluminal stent, self-supporting endoluminal graft and methods of making same
EP1296374A1 (en) 2001-09-14 2003-03-26 Hewlett Packard Company, a Delaware Corporation Process for bonding and electrically connecting microsystems integrated in several distinct substrates
WO2003059806A1 (en) * 2001-12-28 2003-07-24 Commissariat A L'energie Atomique Method and zone for sealing between two microstructure substrates
US7700457B2 (en) 2001-12-28 2010-04-20 Commissariat A L'energie Atomique Method and zone for sealing between two microstructure substrates
US20070122929A1 (en) * 2001-12-28 2007-05-31 Bernard Diem Method and zone for sealing between two microstructure substrates
FR2834283A1 (en) * 2001-12-28 2003-07-04 Commissariat Energie Atomique Method and sealing zone between two substrates of a microstructure
US6793829B2 (en) * 2002-02-27 2004-09-21 Honeywell International Inc. Bonding for a micro-electro-mechanical system (MEMS) and MEMS based devices
US20040266048A1 (en) * 2002-02-27 2004-12-30 Honeywell International Inc. Bonding for a micro-electro-mechanical system (MEMS) and MEMS based devices
US7132721B2 (en) 2002-02-27 2006-11-07 Honeywell International, Inc. Bonding for a micro-electro-mechanical system (MEMS) and MEMS based devices
US20030160021A1 (en) * 2002-02-27 2003-08-28 Honeywell International Inc. Bonding for a micro-electro-mechanical system (MEMS) and MEMS based devices
WO2003075368A3 (en) * 2002-03-01 2004-04-08 Paul L Bergstrom Method and apparatus for induction heating of thin films
US6878909B2 (en) 2002-03-01 2005-04-12 Board Of Control Of Michigan Technological University Induction heating of thin films
WO2003075368A2 (en) * 2002-03-01 2003-09-12 Board Of Control Of Michigan Technological University Method and apparatus for induction heating of thin films
US20050181126A1 (en) * 2002-03-01 2005-08-18 Board Of Control Of Michigan Technological University Magnetic annealing of ferromagnetic thin films using induction heating
US7193193B2 (en) 2002-03-01 2007-03-20 Board Of Control Of Michigan Technological University Magnetic annealing of ferromagnetic thin films using induction heating
EP1346949A3 (en) * 2002-03-06 2005-06-29 Robert Bosch Gmbh Si wafer-cap wafer bonding method using local laser energy, device produced by the method, and system used in the method
EP1346949A2 (en) * 2002-03-06 2003-09-24 Robert Bosch Gmbh Si wafer-cap wafer bonding method using local laser energy, device produced by the method, and system used in the method
US6908781B2 (en) 2002-08-09 2005-06-21 Pts Corporation Method and apparatus for protecting wiring and integrated circuit device
US6809384B1 (en) 2002-08-09 2004-10-26 Pts Corporation Method and apparatus for protecting wiring and integrated circuit device
US20040196608A1 (en) * 2002-08-09 2004-10-07 Pts Corporation Method and apparatus for protecting wiring and integrated circuit device
US7704274B2 (en) 2002-09-26 2010-04-27 Advanced Bio Prothestic Surfaces, Ltd. Implantable graft and methods of making same
US7002215B1 (en) * 2002-09-30 2006-02-21 Pts Corporation Floating entrance guard for preventing electrical short circuits
US20050232817A1 (en) * 2003-09-26 2005-10-20 The University Of Cincinnati Functional on-chip pressure generator using solid chemical propellant
US20050072189A1 (en) * 2003-10-01 2005-04-07 Charles Stark Draper Laboratory, Inc. Anodic Bonding of silicon carbide to glass
US8529724B2 (en) 2003-10-01 2013-09-10 The Charles Stark Draper Laboratory, Inc. Anodic bonding of silicon carbide to glass
US7534662B2 (en) 2004-02-19 2009-05-19 Hewlett-Packard Development Company, L.P. Methods for hermetic sealing of post media-filled MEMS package
US20050184382A1 (en) * 2004-02-19 2005-08-25 Chien-Hua Chen System and methods for hermetic sealing of post media-filled mems package
US20050202591A1 (en) * 2004-02-19 2005-09-15 Chien-Hua Chen System and methods for hermetic sealing of post media-filled MEMS package
US6946728B2 (en) 2004-02-19 2005-09-20 Hewlett-Packard Development Company, L.P. System and methods for hermetic sealing of post media-filled MEMS package
US20060292748A1 (en) * 2004-05-26 2006-12-28 Haluzak Charles C Package having bond-sealed underbump
US7067355B2 (en) 2004-05-26 2006-06-27 Hewlett-Packard Development Company, L.P. Package having bond-sealed underbump
US7443017B2 (en) 2004-05-26 2008-10-28 Hewlett-Packard Development Company, L.P. Package having bond-sealed underbump
US20050275072A1 (en) * 2004-05-26 2005-12-15 Haluzak Charles C Package having bond-sealed underbump
US7115182B2 (en) * 2004-06-15 2006-10-03 Agency For Science, Technology And Research Anodic bonding process for ceramics
US20060191629A1 (en) * 2004-06-15 2006-08-31 Agency For Science, Technology And Research Anodic bonding process for ceramics
US8029856B2 (en) * 2006-05-16 2011-10-04 Tokyo Electron Limited Film formation method and apparatus
US20080000416A1 (en) * 2006-05-16 2008-01-03 Tokyo Electron Limited Film formation method and apparatus
WO2008061101A2 (en) * 2006-11-14 2008-05-22 Glimmerglass Networks, Inc. Method and apparatus for localized bonding
WO2008061101A3 (en) * 2006-11-14 2008-07-03 Glimmerglass Networks Inc Method and apparatus for localized bonding
DE102008001038B4 (en) * 2008-04-08 2016-08-11 Robert Bosch Gmbh Micromechanical component with helical structure and corresponding manufacturing method
US20110147862A1 (en) * 2008-04-08 2011-06-23 Tjalf Pirk Micromechanical component having an inclined structure and corresponding manufacturing method
US8847336B2 (en) * 2008-04-08 2014-09-30 Robert Bosch Gmbh Micromechanical component having an inclined structure and corresponding manufacturing method
US20100218977A1 (en) * 2009-02-27 2010-09-02 Fujitsu Limited Packaged device and producing method thereof
DE102010001824B4 (en) * 2009-02-27 2015-04-09 Drnc Holdings, Inc. Packed together device
US8283735B2 (en) 2009-02-27 2012-10-09 Fujitsu Limited Packaged device and producing method thereof
US8656511B2 (en) * 2009-04-23 2014-02-18 National Tsing Hua University Method for attaching a particle to a scanning probe tip through eutectic bonding
US20100275335A1 (en) * 2009-04-23 2010-10-28 National Tsing Hua University Scanning probe and method for attaching conductive particle to the apex of the probe tip of the scanning probe

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