US20010001297A1 - Method of titanium/titanium nitride integration - Google Patents
Method of titanium/titanium nitride integration Download PDFInfo
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- US20010001297A1 US20010001297A1 US09/737,154 US73715400A US2001001297A1 US 20010001297 A1 US20010001297 A1 US 20010001297A1 US 73715400 A US73715400 A US 73715400A US 2001001297 A1 US2001001297 A1 US 2001001297A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System the conductive layers comprising silicides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
Definitions
- the invention relates to a method of thin film processing and, more particularly, to a method of forming an integrated titanium/titanium nitride film structure.
- a titanium nitride film is often used as a metal barrier layer to inhibit the diffusion of metals into an underlying material beneath the barrier layer.
- These underlying materials form transistor gates, capacitor dielectrics, semiconductor substrates, metal lines, and many other structures that appear in integrated circuits.
- a diffusion barrier is often formed between the gate electrode and a metal that serves as the contact portion of the electrode.
- the diffusion barrier inhibits the diffusion of the metal into the gate electrode material, which may be composed of polysilicon. Such metal diffusion is undesirable because it would change the characteristics of the transistor, or render it inoperative.
- a combination of titanium/titanium nitride (Ti/TiN), for example, is often used as a diffusion barrier.
- the Ti/TiN stack has also been used to provide contacts to the source and drain of a transistor.
- a Ti layer is deposited upon a silicon (Si) substrate, followed by conversion of the Ti layer into titanium silicide (TiSi x ), which provides a lower resistance contact with Si.
- TiSi x titanium silicide
- a TiN layer is then formed upon the TiSi x layer, prior to forming the tungsten plug.
- the TiN layer serves two additional functions: 1) prevents chemical attack of TiSi x by tungsten hexafluoride (WF 6 ) during W deposition; and 2) acts as a glue layer to promote adhesion of the W plug.
- Ti and TiN films can be formed by physical or chemical vapor deposition.
- a Ti/TiN combination layer may be formed in a multiple chamber “cluster tool” by depositing a Ti film in one chamber followed by TiN film deposition in another chamber without exposing the Ti film to the atmosphere, i.e., an integrated Ti/TiN deposition process.
- titanium tetrachloride (TiCl 4 ) may be used to form both Ti and TiN films when allowed to react with different reactant gases, e.g., hydrogen (H 2 ) for Ti deposition under plasma condition, and ammonia (NH 3 ) for TiN thermal deposition.
- the present invention relates to a method of forming a film structure (i.e., a film stack) comprising titanium (Ti) and titanium nitride (TiN) films.
- the method comprises forming an intermediate protective layer containing silicon (Si), preferably comprising Si and Ti, upon a Ti layer, followed by deposition of a TiN layer upon the intermediate layer.
- the intermediate layer may comprise titanium silicide (TiSi x ) , or some other “alloyed” species arising from a reaction between Ti and Si, including TiSi x O y , among others.
- TiSi x titanium silicide
- the intermediate layer protects the underlying Ti layer from chemical attack during subsequent TiN layer deposition using a TiCl 4 -based chemistry.
- the protective layer comprising TiSi x is formed, for example, by depositing an amorphous silicon or polysilicon film upon the Ti layer, followed by annealing the Si and Ti films at an elevated temperature. Reaction between the Si film and a top portion of the Ti layer leads to the formation of the protective layer upon the Ti layer.
- the intermediate protective layer may also be formed by directly depositing TiSi x from a reaction between titanium tetrachloride (TiCl 4 ) and silane (SiH 4 ).
- TiN is subsequently formed upon the intermediate layer using, for example, a reaction between titanium tetrachloride (TiCl 4 ) and ammonia (NH 3 ).
- TiCl 4 titanium tetrachloride
- NH 3 ammonia
- the intermediate layer protects the underlying Ti layer, such that chemical attack of the Ti layer during TiN deposition is mitigated.
- the method results in the formation of a conformal TiN layer over the underlying structure, and provides an alternative approach to reliable Ti/TiN process integration in integrated circuit fabrication.
- FIG. 1 depicts a schematic illustration of an apparatus that can be used for the practice of this invention
- FIGS. 2 a - 2 d depict schematic cross-sectional views of a substrate at different stages of film processing according to one embodiment of the present invention.
- FIGS. 3 a - 3 d depict schematic cross-sectional views of a substrate at different stages of film processing according to another embodiment of the present invention.
- the present invention is a method for titanium (Ti)/titanium nitride (TiN) process integration, which results in a Ti/TiN stack with improved reliability and good step coverage for the TiN layer.
- the method comprises forming a protective layer comprising silicon (Si), and preferably comprising Si and Ti—e.g., titanium silicide (TiSi x ), between the Ti and TiN layers.
- a protective layer comprising silicon (Si), and preferably comprising Si and Ti—e.g., titanium silicide (TiSi x )
- TiSi x titanium silicide
- the intermediate protective layer may also comprise, aside from TiSi x , other species arising from a reaction between Ti and Si, such as TiSi x O y , or other species containing Ti and Si elements. These Si- and Ti-containing species will be referred generally as “Ti-Si alloyed” species.
- the protective layer comprising Ti-Si alloyed species is formed by depositing a Si film upon the Ti layer, followed by exposing the layers to a high temperature, e.g., about 600° C.
- a high temperature e.g., about 600° C.
- the conversion of the Si film into the “Ti-Si alloyed” protective layer may be performed during the Si deposition step, or in a subsequent high temperature process step.
- Si is deposited from silane at about 600° C. or higher
- the Ti-Si alloyed intermediate layer will be formed during Si deposition.
- a subsequent step at about 600° C. or higher is required to form the Ti-Si alloyed protective layer.
- a protective layer comprising TiSi x may be formed directly upon the Ti layer, for example, by using a reaction between TiCl 4 and a silicon-containing gas, such as silane (SiH 4 ) or disilane (Si 2 H 6 ).
- a silicon-containing gas such as silane (SiH 4 ) or disilane (Si 2 H 6 ).
- FIG. 1 depicts schematically a wafer processing system 10 that can be used to practice embodiments of the present invention.
- the system 10 comprises a process chamber 100 , a gas panel 130 , a control unit 110 , along with other hardware components such as power supplies 106 and vacuum pumps 102 .
- One example of the process chamber 100 is a TiN chamber, which has previously been described in a commonly-assigned U.S. patent application entitled “High Temperature Chemical Vapor Deposition Chamber,” Ser. No. 09/211,998, filed on Dec. 14, 1998, and is herein incorporated by reference. Some key features of the system 10 are briefly described below.
- the process chamber 100 generally comprises a support pedestal 150 , which is used to support a substrate such as a semiconductor wafer 190 within the process chamber 100 .
- This pedestal 150 can typically be moved in a vertical direction inside the chamber 100 using a displacement mechanism (not shown).
- the wafer substrate 190 has to be heated to some desired temperature prior to processing.
- the wafer support pedestal 150 is heated by an embedded heater 170 .
- the pedestal 150 may be resistively heated by applying an electric current from an AC supply 106 to the heater element 170 .
- the wafer 190 is, in turn, heated by the pedestal 150 , and can be maintained within a process temperature range of, for example, 450-750° C.
- a temperature sensor 172 such as a thermocouple, is also embedded in the wafer support pedestal 150 to monitor the temperature of the pedestal 150 in a conventional manner.
- the measured temperature may be used in a feedback loop to control the power supply 106 for the heating element 170 such that the wafer temperature can be maintained or controlled at a desired temperature which is suitable for the particular process application.
- the control unit 110 comprises a central processing unit (CPU) 112 , support circuitry 114 that contains memories for storing associated control software 116 .
- This control unit 110 is responsible for automated control of the numerous steps required for wafer processing—such as wafer transport, gas flow control, temperature control, chamber evacuation, and so on. Bi-directional communications between the control unit 110 and the various components of the system 10 are handled through numerous signal cables collectively referred to as signal buses 118 , some of which are illustrated in FIG. 1.
- a vacuum pump 102 is used to evacuate the process chamber 100 and to maintain the proper gas flows and pressure inside the chamber 100 .
- a showerhead 120 through which process gases are introduced into the chamber 100 , is located above the wafer support pedestal 150 .
- the “dual-gas” showerhead 120 used in the present invention has two separate pathways or gas lines, which allow two gases to be separately introduced into the chamber 100 without premixing. Details of the showerhead 120 have been disclosed in a commonly-assigned U.S. patent application entitled “Dual Gas Faceplate for a showerhead in a Semiconductor Wafer Processing System,” Ser. No. 09/098,969, filed Jun. 16, 1998; and is herein incorporated by reference.
- This showerhead 120 is connected to a gas panel 130 which controls and supplies, through mass flow controllers (not shown), various gases used in different steps of the process sequence.
- a purge gas supply 104 also provides a purge gas, for example, an inert gas, around the bottom of the pedestal 150 to minimize undesirable deposits from forming on the pedestal 150 .
- FIGS. 2 a - 2 c illustrate one preferred embodiment of the present invention.
- the substrate 200 refers to any workpiece upon which film processing is performed, and a substrate structure 250 is used to generally denote the substrate 200 together with other material layers formed upon the substrate 200 .
- the substrate 200 may be a silicon semiconductor wafer, or other material layer which has been formed upon the wafer.
- FIG. 2 a shows a cross-sectional view of a substrate structure 250 , having a Ti film 204 (the words “film” and “layer” are used interchangeably) upon a material layer 202 which has previously be formed upon a silicon wafer substrate 200 .
- the material layer 202 may be an oxide (e.g., SiO 2 ), which has been conventionally formed and patterned to provide a contact hole 202 H extending to the top surface 200 T of the substrate 200 .
- the Ti film 204 may be deposited upon the substrate structure 250 by a conventional Ti deposition process such as plasma enhanced chemical vapor deposition (PECVD) or physical vapor deposition (PVD).
- PECVD plasma enhanced chemical vapor deposition
- PVD physical vapor deposition
- the deposited Ti film 204 also contacts a portion of the substrate 200 at the bottom 202 B of the contact hole 202 H. Due to the non-conformal nature of the plasma deposited Ti film 204 , the sidewall 202 S of the contact hole 202 H is not covered by any Ti. If the Ti deposition is performed using PECVD, typically at a high temperature between 600-700° C., a reaction will occur between the Ti film 204 and the silicon substrate 200 at the bottom 202 B of the contact hole 202 H. This leads to the formation of a titanium silicide (TiSi x ) layer 205 , as shown in FIG. 2 b .
- TiSi x titanium silicide
- the Ti film 204 is deposited using PVD, then the TiSi x layer 205 at the bottom 202 B of the contact hole 202 H may be formed in a separate rapid thermal process step, either prior to or during subsequent film processing. While the method of Ti film deposition is not critical to the practice of the present invention, the property of the Ti film 204 , e.g., surface roughness, may affect the choice of process conditions used in subsequent film deposition.
- a thin Si film 206 (e.g., amorphous or polysilicon) is deposited upon the Ti film 204 at a high temperature, as shown in FIG. 2 b .
- the Si deposition for example, can be performed by thermal CVD using precursor gases such as SiH 4 or disilane (Si 2 H 6 ) in chambers that are used for Ti or TiN deposition.
- the Si film 206 can typically be formed in a precursor flow range of between 20 to 200 sccm, a pressure range of 5 to 20 torr and a temperature range of about 500 to 700° C. For the precursor gas SiH 4 , however, a temperature range of 600-700° C. is preferred.
- dilutant gases are supplied to the chamber 100 via both gas lines (not shown) of the showerhead 120 .
- a N 2 dilutant gas flow of 1-10 slm is established, along with SiH 4 , in one gas line; while an inert gas such as N 2 or He is supplied in the second gas line at a flow range of 1-10 slm.
- the gas flow in the second gas line is selected primarily to minimize potential “back flow” of gases into the gas line, and may comprise one or more inert gases.
- Si deposition is performed at a total pressure of about 10 torr and a pedestal temperature of about 680° C., with about 50 sccm of SiH 4 flow and about 2000 sccm of N 2 in one gas line, and a N 2 flow of about 1000 sccm and a He flow of 1000 sccm in the other.
- An inert purge gas flow e.g., Ar
- Ar an inert purge gas flow of about 1000 sccm is also provided from a purge gas supply 104 (see FIG. 1) to minimize undesirable deposits from forming on the pedestal 150 .
- the thickness of the Si film 206 required for forming an effective intermediate protective layer depends on the surface roughness of the underlying Ti film 204 , which in turn is dependent on the Ti film thickness. In general, a thicker Ti film 204 has a larger surface roughness, and a correspondingly thicker Si layer 206 is needed. Since the deposited Si layer 206 has excellent step coverage, a thickness of about 20 ⁇ is typically sufficient for a 150 ⁇ thick Ti film 204 .
- the Si film 206 is subsequently allowed to react with a surface layer 204 S (delineated by a dashed line in FIG. 2 b ) of the underlying Ti layer 204 , by annealing at a high temperature, e.g., over 600° C.
- an intermediate layer 208 shown in FIG. 2 c , which may comprise TiSi x , TiSi x O y , or other “alloyed” species containing Ti and Si (where x and y denote generally respective amounts of Si and O relative to Ti).
- the intermediate layer 208 may also comprise TiSi x O y because the oxide layer 202 provides a source of oxygen. In other embodiments without an oxygen source, TiSi x O y will not be formed in the intermediate layer 208 . Instead, other “Ti-Si alloyed” species may be present, depending on the specific substrate structure 250 .
- the formation of the intermediate layer 208 from the Si layer 206 may either occur as a separate process step, or as part of a subsequent TiN deposition step.
- a reaction between the Si film 206 and the Ti surface layer 204 S will occur.
- a 20 ⁇ thick Si film 206 will result in an intermediate layer 208 of about 50 ⁇ .
- a reaction also occurs between the Si layer 206 lying over the TiSi x layer 205 , resulting in the formation of another layer 207 of TiSi x .
- the remaining Si film 206 adjacent the sidewall 202 S will not significantly affect the contact resistance.
- the TiN film 210 can be formed, for example, by CVD using a reaction of TiCl 4 and NH 3 in the chamber 100 of FIG. 1.
- helium (He) and nitrogen (N 2 ) are introduced into the chamber 100 , along with TiCl 4 , via one pathway (gas line) of the showerhead 120 .
- NH 3 along with N 2 , is introduced into the chamber 100 via the second pathway of the showerhead 120 .
- He and N 2 are generally referred to as “dilutant” gases, and argon (Ar) or other inert gases, may also be used, either singly or in combination (i.e., as a gas mixture) within either gas line of the showerhead 120 .
- a bottom inert gas purge flow (e.g., Ar) of about 2000 sccm is also established through a separate gas line and gas supply 104 provided at the bottom of the chamber 100 .
- the reaction can be performed at a TiCl 4 vapor flow rate of 5-40 sccm with a He gas flow of 500-2000 sccm and N 2 flow of 500-5000 sccm, NH 3 flow rate of 50-500 sccm with N 2 flow of 500-5000 sccm, a total pressure range of 3-30 torr and a pedestal temperature over 600° C. (e.g., 600-700° C.).
- a TiCl 4 :NH 3 vapor flow ratio in the range of about 0.1-0.5 is also acceptable.
- the TiN film 210 is deposited at a TiCl 4 vapor flow rate of about 20 sccm (about 170 mg/min.
- the TiN film 210 exhibits a step coverage of at least 95% for an aspect ratio of about 3.5:1 (aspect ratio is defined as the ratio between the depth d and the width w of the opening 202 H upon which TiN deposition takes place.)
- the presence of the intermediate layer 208 protects the underlying Ti layer 204 against chemical attack during the subsequent TiCl 4 -based TiN deposition step.
- the intermediate protective layer of the present invention can be used in conjunction with other TiCl 4 -based processes for TiN deposition, including for example, plasma-enhanced CVD using TiCl 4 /N 2 , among others.
- FIG. 3 a shows a Ti film 204 upon the underlying patterned material layer 202 and contacting the substrate 200 at the bottom 202 B of the contact hole 202 H.
- the Ti film 204 covers primarily the top 202 T of the patterned layer 202 and the bottom 202 B of the contact hole 202 H.
- the Ti film 204 may be formed by PVD, in which case, the Ti film 204 at the bottom 202 B of the contact hole 202 H can be converted into a TiSi x layer 205 in a subsequent high temperature (e.g., over 600° C.) step, as shown in FIG. 3 b.
- a subsequent high temperature e.g., over 600° C.
- FIG. 3 c shows a protective layer 306 formed upon the Ti film 204 and the TiSi x layer 205 .
- the protective layer 306 may comprise, for example, titanium silicide (TiSi x ) or other Ti-Si “alloyed” species such as TiSi x O y , which are effective in preventing attack of the underlying Ti film 204 during subsequent TiN film deposition.
- the intermediate layer 306 which may comprise primarily TiSi x , is deposited directly upon the Ti film 204 using a reaction between TiCl 4 and silane (SiH 4 ) at a temperature range of about 650-750° C., or preferably, at a heater temperature of about 680° C.
- the reaction can be performed in a process chamber 100 similar to that shown in FIG. 1, in which TiCl 4 and SiH 4 are separately introduced into the chamber 100 via the dual-gas showerhead 120 .
- the reaction may be performed at a TiCl 4 flow range of about 15 sccm, SiH 4 flow range of 10-50 sccm, and a total pressure range of 1-20 torr.
- a hydrogen (H 2 ) flow of about 5 slm may be used.
- the protective TiSi x layer 306 may, for example, have a thickness from 20 to 100 ⁇ , and more preferably, about 50 ⁇ .
- a TiN layer 308 is deposited upon the protective layer 306 , as illustrated in FIG. 3 d .
- the deposition of TiN layer 308 has previously been described in connection with FIG. 2 d.
- a W plug (not shown) is formed upon the TiN layer 308 of FIG. 3 d or the TiN layer 210 of FIG. 2 d , using for example, a reaction between WF 6 and H 2 . Adhesion of the W plug layer is improved by the presence of the TiN glue layer.
Abstract
A method of film processing comprises forming an integrated titanium/titanium nitride (Ti/TiN) film structure having an intermediate layer. The intermediate layer comprises species containing Si, and preferably containing Si and Ti, such as titanium silicide (TiSix), or TiSixOy, among others. The intermediate layer protects the underlying Ti film against chemical attack during subsequent TiN deposition using a titanium tetrachloride (TiCl4)-based chemistry. The method allows reliable Ti/TiN film integration to be achieved with excellent TiN step coverage. For example, the film structure can be used as an effective barrier layer in integrated circuit fabrication.
Description
- 1. 1. Field of the Invention
- 2. The invention relates to a method of thin film processing and, more particularly, to a method of forming an integrated titanium/titanium nitride film structure.
- 3. 2. Description of the Background Art
- 4. In the manufacture of integrated circuits, a titanium nitride film is often used as a metal barrier layer to inhibit the diffusion of metals into an underlying material beneath the barrier layer. These underlying materials form transistor gates, capacitor dielectrics, semiconductor substrates, metal lines, and many other structures that appear in integrated circuits.
- 5. For example, when an electrode is being formed for a transistor's gate, a diffusion barrier is often formed between the gate electrode and a metal that serves as the contact portion of the electrode. The diffusion barrier inhibits the diffusion of the metal into the gate electrode material, which may be composed of polysilicon. Such metal diffusion is undesirable because it would change the characteristics of the transistor, or render it inoperative. A combination of titanium/titanium nitride (Ti/TiN), for example, is often used as a diffusion barrier.
- 6. The Ti/TiN stack has also been used to provide contacts to the source and drain of a transistor. For example, in a tungsten (W) plug process, a Ti layer is deposited upon a silicon (Si) substrate, followed by conversion of the Ti layer into titanium silicide (TiSix), which provides a lower resistance contact with Si. A TiN layer is then formed upon the TiSix layer, prior to forming the tungsten plug. In addition to being a barrier layer, the TiN layer serves two additional functions: 1) prevents chemical attack of TiSix by tungsten hexafluoride (WF6) during W deposition; and 2) acts as a glue layer to promote adhesion of the W plug.
- 7. Ti and TiN films can be formed by physical or chemical vapor deposition. A Ti/TiN combination layer may be formed in a multiple chamber “cluster tool” by depositing a Ti film in one chamber followed by TiN film deposition in another chamber without exposing the Ti film to the atmosphere, i.e., an integrated Ti/TiN deposition process. When depositing both Ti and TiN using chemical vapor deposition (CVD), titanium tetrachloride (TiCl4), for example, may be used to form both Ti and TiN films when allowed to react with different reactant gases, e.g., hydrogen (H2) for Ti deposition under plasma condition, and ammonia (NH3) for TiN thermal deposition.
- 8. However, when a TiCl4-based chemistry is used in such an integrated Ti/TiN film deposition process, a reliability problem is encountered. In particular, the integrated Ti/TiN stack structure tends to either peel off or exhibit a haze, which may result, for example, from TiCl4 or other species arising from TiCl4, chemically attacking the Ti film prior to TiN deposition.
- 9. Therefore, there is a need in the art for methods of Ti/TiN process integration having improved film characteristics.
- 10. The present invention relates to a method of forming a film structure (i.e., a film stack) comprising titanium (Ti) and titanium nitride (TiN) films. In particular, the method comprises forming an intermediate protective layer containing silicon (Si), preferably comprising Si and Ti, upon a Ti layer, followed by deposition of a TiN layer upon the intermediate layer.
- 11. The intermediate layer may comprise titanium silicide (TiSix) , or some other “alloyed” species arising from a reaction between Ti and Si, including TiSixOy, among others. The intermediate layer protects the underlying Ti layer from chemical attack during subsequent TiN layer deposition using a TiCl4-based chemistry.
- 12. The protective layer comprising TiSix is formed, for example, by depositing an amorphous silicon or polysilicon film upon the Ti layer, followed by annealing the Si and Ti films at an elevated temperature. Reaction between the Si film and a top portion of the Ti layer leads to the formation of the protective layer upon the Ti layer. Alternatively, the intermediate protective layer may also be formed by directly depositing TiSix from a reaction between titanium tetrachloride (TiCl4) and silane (SiH4).
- 13. TiN is subsequently formed upon the intermediate layer using, for example, a reaction between titanium tetrachloride (TiCl4) and ammonia (NH3). The intermediate layer protects the underlying Ti layer, such that chemical attack of the Ti layer during TiN deposition is mitigated. The method results in the formation of a conformal TiN layer over the underlying structure, and provides an alternative approach to reliable Ti/TiN process integration in integrated circuit fabrication.
- 14. The teachings of the present invention can be readily understood by considering the following detailed description in conjunction with the accompanying drawings, in which:
- 15.FIG. 1 depicts a schematic illustration of an apparatus that can be used for the practice of this invention;
- 16.FIGS. 2a-2 d depict schematic cross-sectional views of a substrate at different stages of film processing according to one embodiment of the present invention; and
- 17.FIGS. 3a-3 d depict schematic cross-sectional views of a substrate at different stages of film processing according to another embodiment of the present invention.
- 18. To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures.
- 19. The present invention is a method for titanium (Ti)/titanium nitride (TiN) process integration, which results in a Ti/TiN stack with improved reliability and good step coverage for the TiN layer. In particular, the method comprises forming a protective layer comprising silicon (Si), and preferably comprising Si and Ti—e.g., titanium silicide (TiSix), between the Ti and TiN layers. The use of the intermediate TiSix protective layer allows the TiN layer to be formed under process conditions optimized for both film characteristics and step coverage. In general, the intermediate protective layer may also comprise, aside from TiSix, other species arising from a reaction between Ti and Si, such as TiSixOy, or other species containing Ti and Si elements. These Si- and Ti-containing species will be referred generally as “Ti-Si alloyed” species.
- 20. In one embodiment, the protective layer comprising Ti-Si alloyed species is formed by depositing a Si film upon the Ti layer, followed by exposing the layers to a high temperature, e.g., about 600° C. Depending on the specific process sequence, the conversion of the Si film into the “Ti-Si alloyed” protective layer may be performed during the Si deposition step, or in a subsequent high temperature process step. For example, if Si is deposited from silane at about 600° C. or higher, the Ti-Si alloyed intermediate layer will be formed during Si deposition. However, if the Si layer is deposited from disilane at about 500° C., a subsequent step at about 600° C. or higher is required to form the Ti-Si alloyed protective layer. This may be done either as a separate annealing step, or during subsequent TiN thermal deposition. Alternatively, a protective layer comprising TiSix may be formed directly upon the Ti layer, for example, by using a reaction between TiCl4 and a silicon-containing gas, such as silane (SiH4) or disilane (Si2H6). One of the advantages of incorporating a layer containing Ti-Si alloyed species or TiSix in this integration technique is the process and chemical compatibility with both Ti and TiN deposition.
- 21. Wafer Processing System
- 22.FIG. 1 depicts schematically a
wafer processing system 10 that can be used to practice embodiments of the present invention. Thesystem 10 comprises aprocess chamber 100, agas panel 130, acontrol unit 110, along with other hardware components such aspower supplies 106 andvacuum pumps 102. One example of theprocess chamber 100 is a TiN chamber, which has previously been described in a commonly-assigned U.S. patent application entitled “High Temperature Chemical Vapor Deposition Chamber,” Ser. No. 09/211,998, filed on Dec. 14, 1998, and is herein incorporated by reference. Some key features of thesystem 10 are briefly described below. - 23.
Chamber 100 - 24. The
process chamber 100 generally comprises asupport pedestal 150, which is used to support a substrate such as asemiconductor wafer 190 within theprocess chamber 100. Thispedestal 150 can typically be moved in a vertical direction inside thechamber 100 using a displacement mechanism (not shown). Depending on the specific process, thewafer substrate 190 has to be heated to some desired temperature prior to processing. In the illustrative chamber, thewafer support pedestal 150 is heated by an embeddedheater 170. For example, thepedestal 150 may be resistively heated by applying an electric current from anAC supply 106 to theheater element 170. Thewafer 190 is, in turn, heated by thepedestal 150, and can be maintained within a process temperature range of, for example, 450-750° C.A temperature sensor 172, such as a thermocouple, is also embedded in thewafer support pedestal 150 to monitor the temperature of thepedestal 150 in a conventional manner. For example, the measured temperature may be used in a feedback loop to control thepower supply 106 for theheating element 170 such that the wafer temperature can be maintained or controlled at a desired temperature which is suitable for the particular process application. - 25. Proper control and regulation of the gas flows through the
gas panel 130 is performed by mass flow controllers (not shown) and acontroller unit 110 such as a computer. Theshowerhead 120 allows process gases from thegas panel 130 to be uniformly distributed and introduced into thechamber 100. Illustratively, thecontrol unit 110 comprises a central processing unit (CPU) 112,support circuitry 114 that contains memories for storing associatedcontrol software 116. Thiscontrol unit 110 is responsible for automated control of the numerous steps required for wafer processing—such as wafer transport, gas flow control, temperature control, chamber evacuation, and so on. Bi-directional communications between thecontrol unit 110 and the various components of thesystem 10 are handled through numerous signal cables collectively referred to as signal buses 118, some of which are illustrated in FIG. 1. - 26. A
vacuum pump 102 is used to evacuate theprocess chamber 100 and to maintain the proper gas flows and pressure inside thechamber 100. Ashowerhead 120, through which process gases are introduced into thechamber 100, is located above thewafer support pedestal 150. The “dual-gas”showerhead 120 used in the present invention has two separate pathways or gas lines, which allow two gases to be separately introduced into thechamber 100 without premixing. Details of theshowerhead 120 have been disclosed in a commonly-assigned U.S. patent application entitled “Dual Gas Faceplate for a Showerhead in a Semiconductor Wafer Processing System,” Ser. No. 09/098,969, filed Jun. 16, 1998; and is herein incorporated by reference. Thisshowerhead 120 is connected to agas panel 130 which controls and supplies, through mass flow controllers (not shown), various gases used in different steps of the process sequence. During wafer processing, apurge gas supply 104 also provides a purge gas, for example, an inert gas, around the bottom of thepedestal 150 to minimize undesirable deposits from forming on thepedestal 150. - 27. Ti/TiN Film Integration
- 28.FIGS. 2a-2 c illustrate one preferred embodiment of the present invention. In general, the
substrate 200 refers to any workpiece upon which film processing is performed, and asubstrate structure 250 is used to generally denote thesubstrate 200 together with other material layers formed upon thesubstrate 200. Depending on the specific stage of processing, thesubstrate 200 may be a silicon semiconductor wafer, or other material layer which has been formed upon the wafer. FIG. 2a, for example, shows a cross-sectional view of asubstrate structure 250, having a Ti film 204 (the words “film” and “layer” are used interchangeably) upon amaterial layer 202 which has previously be formed upon asilicon wafer substrate 200. In this particular illustration, thematerial layer 202 may be an oxide (e.g., SiO2), which has been conventionally formed and patterned to provide acontact hole 202H extending to thetop surface 200T of thesubstrate 200. TheTi film 204 may be deposited upon thesubstrate structure 250 by a conventional Ti deposition process such as plasma enhanced chemical vapor deposition (PECVD) or physical vapor deposition (PVD). - 29. The deposited
Ti film 204 also contacts a portion of thesubstrate 200 at the bottom 202B of thecontact hole 202H. Due to the non-conformal nature of the plasma depositedTi film 204, thesidewall 202S of thecontact hole 202H is not covered by any Ti. If the Ti deposition is performed using PECVD, typically at a high temperature between 600-700° C., a reaction will occur between theTi film 204 and thesilicon substrate 200 at the bottom 202B of thecontact hole 202H. This leads to the formation of a titanium silicide (TiSix)layer 205, as shown in FIG. 2b. Alternatively, if theTi film 204 is deposited using PVD, then the TiSix layer 205 at the bottom 202B of thecontact hole 202H may be formed in a separate rapid thermal process step, either prior to or during subsequent film processing. While the method of Ti film deposition is not critical to the practice of the present invention, the property of theTi film 204, e.g., surface roughness, may affect the choice of process conditions used in subsequent film deposition. - 30. After the
Ti film 204 is formed, a thin Si film 206 (e.g., amorphous or polysilicon) is deposited upon theTi film 204 at a high temperature, as shown in FIG. 2b. The Si deposition, for example, can be performed by thermal CVD using precursor gases such as SiH4 or disilane (Si2H6) in chambers that are used for Ti or TiN deposition. TheSi film 206 can typically be formed in a precursor flow range of between 20 to 200 sccm, a pressure range of 5 to 20 torr and a temperature range of about 500 to 700° C. For the precursor gas SiH4, however, a temperature range of 600-700° C. is preferred. When the process is performed in achamber 100 having a dual-gas showerhead 120 such as that depicted in FIG. 1, dilutant gases are supplied to thechamber 100 via both gas lines (not shown) of theshowerhead 120. In one embodiment, for example, a N2 dilutant gas flow of 1-10 slm is established, along with SiH4, in one gas line; while an inert gas such as N2 or He is supplied in the second gas line at a flow range of 1-10 slm. The gas flow in the second gas line is selected primarily to minimize potential “back flow” of gases into the gas line, and may comprise one or more inert gases. Other gases, such as hydrogen (H2) and argon (Ar), among others, may also be used, as long as they are compatible with Si CVD deposition from SiH4. More preferably, silicon deposition is performed at a total pressure of about 10 torr and a pedestal temperature of about 680° C., with about 50 sccm of SiH4 flow and about 2000 sccm of N2 in one gas line, and a N2 flow of about 1000 sccm and a He flow of 1000 sccm in the other. An inert purge gas flow (e.g., Ar) of about 1000 sccm is also provided from a purge gas supply 104 (see FIG. 1) to minimize undesirable deposits from forming on thepedestal 150. - 31. The thickness of the
Si film 206 required for forming an effective intermediate protective layer depends on the surface roughness of theunderlying Ti film 204, which in turn is dependent on the Ti film thickness. In general, athicker Ti film 204 has a larger surface roughness, and a correspondinglythicker Si layer 206 is needed. Since the depositedSi layer 206 has excellent step coverage, a thickness of about 20 Å is typically sufficient for a 150 Åthick Ti film 204. TheSi film 206 is subsequently allowed to react with asurface layer 204S (delineated by a dashed line in FIG. 2b) of theunderlying Ti layer 204, by annealing at a high temperature, e.g., over 600° C. The reaction results in the formation of anintermediate layer 208, shown in FIG. 2c, which may comprise TiSix, TiSixOy, or other “alloyed” species containing Ti and Si (where x and y denote generally respective amounts of Si and O relative to Ti). In this illustration, theintermediate layer 208 may also comprise TiSixOy because theoxide layer 202 provides a source of oxygen. In other embodiments without an oxygen source, TiSixOy will not be formed in theintermediate layer 208. Instead, other “Ti-Si alloyed” species may be present, depending on thespecific substrate structure 250. The formation of theintermediate layer 208 from theSi layer 206 may either occur as a separate process step, or as part of a subsequent TiN deposition step. For example, when thesubstrate structure 250 shown in FIG. 2b is positioned onto theheated pedestal 150 of theprocessing chamber 100, which is maintained at over 600° C., a reaction between theSi film 206 and theTi surface layer 204S will occur. Typically, a 20 Åthick Si film 206 will result in anintermediate layer 208 of about 50 Å. During the high temperature anneal, a reaction also occurs between theSi layer 206 lying over the TiSix layer 205, resulting in the formation of anotherlayer 207 of TiSix. The remainingSi film 206 adjacent thesidewall 202S will not significantly affect the contact resistance. - 32. After the formation of the intermediate
protective layer 208, processing continues with the deposition of theTiN film 210, as illustrated in FIG. 2d. TheTiN film 210 can be formed, for example, by CVD using a reaction of TiCl4 and NH3 in thechamber 100 of FIG. 1. In one embodiment, helium (He) and nitrogen (N2) are introduced into thechamber 100, along with TiCl4, via one pathway (gas line) of theshowerhead 120. NH3, along with N2, is introduced into thechamber 100 via the second pathway of theshowerhead 120. He and N2 are generally referred to as “dilutant” gases, and argon (Ar) or other inert gases, may also be used, either singly or in combination (i.e., as a gas mixture) within either gas line of theshowerhead 120. A bottom inert gas purge flow (e.g., Ar) of about 2000 sccm is also established through a separate gas line andgas supply 104 provided at the bottom of thechamber 100. Typically, the reaction can be performed at a TiCl4 vapor flow rate of 5-40 sccm with a He gas flow of 500-2000 sccm and N2 flow of 500-5000 sccm, NH3 flow rate of 50-500 sccm with N2 flow of 500-5000 sccm, a total pressure range of 3-30 torr and a pedestal temperature over 600° C. (e.g., 600-700° C.). Alternatively, a TiCl4:NH3 vapor flow ratio in the range of about 0.1-0.5 is also acceptable. More preferably, theTiN film 210 is deposited at a TiCl4 vapor flow rate of about 20 sccm (about 170 mg/min. liquid flow rate) in about 1000 sccm He and 1000 sccm N2, NH3 flow rate of about 100 sccm with N2 at about 2000 sccm, a total pressure of about 10 torr and a temperature of about 680° C. Under these process conditions, theTiN film 210 exhibits a step coverage of at least 95% for an aspect ratio of about 3.5:1 (aspect ratio is defined as the ratio between the depth d and the width w of theopening 202H upon which TiN deposition takes place.) The presence of theintermediate layer 208 protects theunderlying Ti layer 204 against chemical attack during the subsequent TiCl4-based TiN deposition step. Since TiSix (or Ti-Si alloyed species) is chemically compatible with both Ti and TiN, the incorporation of theintermediate layer 208 in the Ti/TiN integration process results a film structure with high reliability, good barrier layer properties and excellent TiN step coverage. In general, the intermediate protective layer of the present invention can be used in conjunction with other TiCl4-based processes for TiN deposition, including for example, plasma-enhanced CVD using TiCl4/N2, among others. - 33.FIGS. 3a-3 d illustrate another embodiment of the present invention, showing cross-sectional views of a
substrate 200 undergoing different stages of an integrated circuit fabrication sequence. FIG. 3a shows aTi film 204 upon the underlyingpatterned material layer 202 and contacting thesubstrate 200 at the bottom 202B of thecontact hole 202H. As previously described in connection with FIG. 2a, theTi film 204 covers primarily the top 202T of the patternedlayer 202 and the bottom 202B of thecontact hole 202H. In one illustrative embodiment, theTi film 204 may be formed by PVD, in which case, theTi film 204 at the bottom 202B of thecontact hole 202H can be converted into a TiSix layer 205 in a subsequent high temperature (e.g., over 600° C.) step, as shown in FIG. 3b. - 34.FIG. 3c shows a
protective layer 306 formed upon theTi film 204 and the TiSix layer 205. Theprotective layer 306 may comprise, for example, titanium silicide (TiSix) or other Ti-Si “alloyed” species such as TiSixOy, which are effective in preventing attack of theunderlying Ti film 204 during subsequent TiN film deposition. In one embodiment of the present invention, theintermediate layer 306, which may comprise primarily TiSix, is deposited directly upon theTi film 204 using a reaction between TiCl4 and silane (SiH4) at a temperature range of about 650-750° C., or preferably, at a heater temperature of about 680° C. The reaction can be performed in aprocess chamber 100 similar to that shown in FIG. 1, in which TiCl4 and SiH4 are separately introduced into thechamber 100 via the dual-gas showerhead 120. The reaction may be performed at a TiCl4 flow range of about 15 sccm, SiH4 flow range of 10-50 sccm, and a total pressure range of 1-20 torr. To increase the deposition rate and to reduce the chlorine content in the deposited film, a hydrogen (H2) flow of about 5 slm may be used. Alternatively, other gases comprising the silicon element, e.g., dichlorosilane (SiH2Cl2), may also be used in place of SiH4 to react with TiCl4, and the processing conditions can be adjusted to suit specific needs. The protective TiSix layer 306 may, for example, have a thickness from 20 to 100 Å, and more preferably, about 50 Å. - 35. After the formation of the
intermediate layer 306, aTiN layer 308 is deposited upon theprotective layer 306, as illustrated in FIG. 3d. The deposition ofTiN layer 308 has previously been described in connection with FIG. 2d. - 36. Thereafter, a W plug (not shown) is formed upon the
TiN layer 308 of FIG. 3d or theTiN layer 210 of FIG. 2d, using for example, a reaction between WF6 and H2. Adhesion of the W plug layer is improved by the presence of the TiN glue layer. - 37. The specific process conditions disclosed in the above discussion are meant for illustrative purpose only. Other combinations of process parameters such as precursor and inert gases, flow ranges, pressure and temperature may also be used in forming the integrated Ti/TiN film structure of the present invention, which incorporates an intermediate protective layer containing Ti and Si elements.
- 38. Although several preferred embodiments, which incorporate the teachings of the present invention, have been shown and described in detail, those skilled in the art can readily devise many other varied embodiments that still incorporate these teachings.
Claims (24)
1. A method of thin film deposition for integrated circuit fabrication comprising the steps of:
(a) forming a titanium film upon a substrate;
(b) forming an intermediate layer comprising silicon upon said titanium film; and
(c) forming a titanium nitride film upon said intermediate layer.
2. The method of , wherein said intermediate layer of step (b) further comprises titanium.
claim 1
3. The method of , wherein said step (b) comprises the steps of:
claim 1
(d) forming a silicon film upon said titanium film; and
(e) exposing said silicon film and said titanium film to an elevated temperature to cause a reaction between said silicon film and said titanium film to form said intermediate layer.
4. The method of , wherein said step (d) is performed in the presence of a gas selected from the group of silane (SiH4), disilane (Si2H6) and dichlorosilane (SiCl2H2).
claim 3
5. The method of , wherein said step (d) is performed in the presence of SiH4 at a temperature of between 600-700° C.
claim 3
6. The method of , wherein said step (d) is performed at a SiH4 flow rate of between 20 to 200 sccm and a pressure of between 5 to 20 torr.
claim 3
7. The method of , wherein said step (d) is performed at a SiH4 flow of about 50 sccm, an inert gas flow of at least 1000 sccm, a total pressure of about 10 torr and a temperature of about 680° C.
claim 3
8. The method of , wherein said step (b) comprises the step of:
claim 1
(f) reacting titanium tetrachloride (TiCl4) with a gas comprising silicon.
9. The method of , wherein said gas comprising silicon is silane (SiH4) or disilane (Si2H6).
claim 8
10. The method of , wherein said step (f) is performed at a TiCl4 flow rate of between 1-5 sccm and a SiH4 flow rate of between 10-50 sccm and a temperature between 650-750° C.
claim 8
11. The method of , wherein said step (c) further comprises the step of:
claim 1
(g) reacting titanium tetrachloride (TiCl4) with a gas comprising nitrogen element (N).
12. The method of , wherein said gas comprising nitrogen (N) is ammonia (NH3) .
claim 11
13. The method of , wherein said step (g) is performed at a TiCl4:NH3 vapor flow ratio of between 0.1-0.5.
claim 12
14. The method of , wherein said step (g) is performed at a TiCl4 vapor flow rate range of about 5-40 sccm and an NH3 flow rate range of about 50-500 sccm.
claim 12
15. A method of forming a barrier layer for use in integrated circuit fabrication, comprising the steps of:
(a) providing a substrate structure having an oxide layer upon a silicon substrate;
(b) forming a contact hole extending from a top surface of said oxide layer to a top surface of said silicon substrate;
(c) forming a titanium (Ti) film upon at least portions of said oxide layer and said silicon substrate;
(d) forming an intermediate layer comprising silicon upon said Ti film; and
(e) forming a titanium nitride (TiN) film upon said intermediate layer in the presence of titanium tetrachloride (TiCl4).
16. The method of , wherein said step (d) comprises the steps of:
claim 15
(f) forming a silicon film upon said Ti film of step (c); and
(g) exposing said silicon film and said Ti film to an elevated temperature to cause a reaction between said silicon film and said Ti film to form said intermediate layer.
17. The method of , wherein said intermediate layer comprises titanium silicide.
claim 15
18. The method of , wherein said silicon film of step (f) is formed from chemical vapor deposition of silane (SiH4) or disilane (Si2H6).
claim 16
19. The method of , wherein said intermediate layer of step (d) is formed by reacting titanium tetrachloride (TiCl4) with a gas selected from silane or disilane.
claim 15
20. A computer storage medium containing a software routine that, when executed, causes a general purpose computer to control a deposition chamber using a method of thin film deposition comprising the steps of:
(a) forming a titanium film upon a substrate;
(b) forming an intermediate layer comprising silicon upon said titanium film; and
(c) forming a titanium nitride film upon said intermediate layer.
21. The method of , wherein said intermediate layer of step (b) further comprises titanium.
claim 20
22. The computer storage medium of , wherein said step (b) comprises the steps of:
claim 20
(d) forming a silicon film upon said titanium film; and
(e) exposing said silicon film and said titanium film to an elevated temperature to cause a reaction between said silicon film and said titanium film to form said intermediate layer.
22. The computer storage medium of , wherein said step (b) comprises the step of:
claim 20
(f) reacting titanium tetrachloride (TiCl4) with a gas comprising silicon.
23. The computer storage medium of , wherein said step (c) further comprises the step of:
claim 20
(g) reacting titanium tetrachloride (TiCl4) with a gas comprising nitrogen element (N).
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- 2000-12-14 US US09/737,154 patent/US6326690B2/en not_active Expired - Fee Related
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US20040198032A1 (en) * | 2001-03-19 | 2004-10-07 | Samsung Electronics Co., Ltd. | Semiconductor device having silicide thin film and method of forming the same |
US7385260B2 (en) | 2001-03-19 | 2008-06-10 | Samsung Electronics Co., Ltd. | Semiconductor device having silicide thin film and method of forming the same |
US20050221612A1 (en) * | 2004-04-05 | 2005-10-06 | International Business Machines Corporation | A low thermal budget (mol) liner, a semiconductor device comprising said liner and method of forming said semiconductor device |
US20060236934A1 (en) * | 2004-05-12 | 2006-10-26 | Choi Soo Y | Plasma uniformity control by gas diffuser hole design |
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US20090045517A1 (en) * | 2005-07-01 | 2009-02-19 | Tokyo Electron Limited | Method for forming tungsten film, film-forming apparatus, storage medium and semiconductor device |
US8168539B2 (en) * | 2005-07-01 | 2012-05-01 | Tokyo Electron Limited | Method for forming tungsten film at a surface of a processing target material, film-forming apparatus, storage medium and semiconductor device with a tungsten film |
US20170301153A1 (en) * | 2013-12-17 | 2017-10-19 | At & T Mobility Ii Llc | Method, computer-readable storage device and apparatus for exchanging vehicle information |
Also Published As
Publication number | Publication date |
---|---|
US6214714B1 (en) | 2001-04-10 |
JP2001068432A (en) | 2001-03-16 |
KR20010029842A (en) | 2001-04-16 |
SG83212A1 (en) | 2001-09-18 |
US6326690B2 (en) | 2001-12-04 |
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