US12354926B2 - Package and method for manufacturing the same - Google Patents
Package and method for manufacturing the same Download PDFInfo
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- US12354926B2 US12354926B2 US17/077,815 US202017077815A US12354926B2 US 12354926 B2 US12354926 B2 US 12354926B2 US 202017077815 A US202017077815 A US 202017077815A US 12354926 B2 US12354926 B2 US 12354926B2
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- H10W74/129—
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
- H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
- H01L25/0655—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next to each other
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- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
- H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
- H01L2023/4037—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink
- H01L2023/4043—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink heatsink to have chip
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- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
- H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
- H01L2023/4075—Mechanical elements
- H01L2023/4087—Mounting accessories, interposers, clamping or screwing parts
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- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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Definitions
- wafer level integration and packaging has emerged as an effective alternative to further reduce the physical size of a semiconductor device.
- a plurality of functional dies e.g., active circuits such as logic, memory, processor circuits and the like
- wafer level packages such as reconstituted wafers
- functional dies of different types are singulated from their respective substrates, placed together on a carrier substrate, and packaged together as a single functional device.
- wafer level integration and packaging processes utilize sophisticated techniques, and improvements are desired.
- the high level of integration of advanced packaging technologies enables production of semiconductor devices with enhanced functionalities and small footprints, which is advantageous for small form factor devices such as mobile phones, tablets and digital music players.
- Another advantage is the shortened length of the conductive paths connecting the interoperating parts within the semiconductor device. This improves the electrical performance of the semiconductor device, since shorter routing of interconnections between circuits yields faster signal propagation and reduced noise and cross-talk.
- FIGS. 1 A through 1 H are schematic cross-sectional views showing various stages in a manufacturing method of a package according to some exemplary embodiments of the present disclosure.
- FIGS. 2 through 6 are schematic cross-sectional views showing various packages according to some exemplary embodiments of the present disclosure.
- the first functional die 110 has a size of at least 50 or 100 times larger than that of the second functional die 120 .
- the first functional die 110 may be circular, square, or rectangular in a top view, for example, as illustrated in FIG. 7 A .
- the first functional die 110 may be square or rectangular with rounded corners in a top view, for example, as illustrated in FIG. 7 B . The rounded corners may help reduce the warpage resulting from the ultra-large size of the first functional die 110 .
- the first functional die 110 is thicker than the second functional die 120 (not shown in figures).
- the first functional die 110 and the second functional die 120 each includes a plurality of contact features 114 and 124 formed across the second sides 110 b and 120 b thereof.
- the contact features 114 and 124 are electrically coupled to the substrate inside the functional die.
- the contact features 114 and 124 include a conductive material such as copper, aluminum, other metals, or alloys or multiple layers thereof, as examples. Alternatively, the contact features 114 and 124 may include other materials.
- the contact features 114 and 124 may have a pillar shape and encapsulated by insulating layers 116 and 126 , respectively.
- the insulating layer 116 and 126 may include polyimide (PI), polybenzoxazole (PBO), benzocyclobutene (BCB), or multiple layers or combinations thereof in some embodiments, as examples.
- the encapsulating material 140 includes a liquid molding compound (LMC) that is a gel type liquid when applied.
- the encapsulating material 140 may also include a liquid or solid when applied.
- the encapsulating material 140 may include other insulating and/or encapsulating materials.
- the package 100 after forming the encapsulating material 140 may have a size of about 1.1 times to about 4 times greater than that of the first functional die 110 .
- the encapsulating material 140 is cured using a curing process in some embodiments.
- the curing process may include heating the encapsulating material 140 to a predetermined temperature for a predetermined period of time, using an anneal process or other heating processes.
- the curing process may also include an ultra-violet (UV) light exposure process, an infrared (IR) energy exposure process, combinations thereof, or a combination thereof with a heating process.
- UV ultra-violet
- IR infrared
- the encapsulating material 140 may be cured using other methods. In some embodiments, a curing process is not included.
- a top portion of the encapsulating material 140 is then removed, as illustrated in FIG. 1 D .
- the top portion of the encapsulating material 140 is removed using a grinding process in some embodiments, for example.
- a chemical-mechanical polishing (CMP) process is used to remove the top portion of the encapsulating material 140 , for example.
- CMP chemical-mechanical polishing
- a combination of a grinding process and a CMP process may be used.
- the CMP process or grinding process may be adapted to stop when the contact features 114 and 124 reached in some embodiments, for example.
- the CMP process and/or grinding process may be adapted to stop after the solder portion (not shown) of the contact features 114 and 124 are removed.
- a top surface of the encapsulating material 140 after the grinding and/or CMP process is substantially coplanar with the second sides 110 b and 120 b of the functional dies 110 and 120 .
- the top surface of encapsulating material 140 is substantially coplanar with the second sides 110 b and 120 b of functional dies 110 and 120 advantageously facilitate in the formation of a subsequently formed redistribution layer (RDL) structure 150 , which is illustrated in FIG. 1 E .
- RDL redistribution layer
- the RDL structure 150 is formed over the first functional die 110 , second functional die 120 , dummy die 130 , and encapsulating material 140 , in some embodiments, as illustrated in FIG. 1 E .
- the RDL structure 150 may include one or more dielectric layers 152 and a plurality of conductive structures 154 (e.g., lines and/or vias) formed inside the one or more dielectric layers 152 .
- the formation of RDL structure 150 may include patterning (e.g., using subtractive etch and/or damascene techniques) dielectric layers 152 and forming conductive structures 154 (e.g., using one or more sputtering processes, photolithography processes, plating processes, and photoresist strip processes, as examples) in the dielectric layers 152 .
- the one or more dielectric layers 152 may be formed of any suitable material (e.g., polyimide (PI), polybenzoxazole (PBO), benzocyclobuten (BCB), epoxy, silicone, acrylates, nano-filled pheno resin, siloxane, a fluorinated polymer, polynorbornene, and the like) using any suitable method, such as a spin-on coating technique, and the like.
- Conductive structures 154 may be formed of copper or a copper alloy although other metals such as aluminum, gold, and the like may also be used. Conductive structures 154 may be physically and electrically connected to contact features 114 and 124 in dies 110 and 120 .
- contact pads 156 formed over a top surface of the RDL structure 150 .
- the contact pads 156 may include under-ball metallization (UBM) structures in some embodiments.
- UBM under-ball metallization
- the UBM can provide better adhesive and stress buffer for the connectors attached in the subsequent processes.
- the UBM may include a material formed of copper, titanium, tungsten, aluminum, or the like.
- Connectors 160 and/or die 170 may then be arranged over the contact pads 156 , as illustrated in FIG. 1 E .
- Connectors 160 may be ball grid array (BGA) connectors, lead-free solder balls, controlled collapse chip connection (C4) bumps, electroless nickel electroless palladium immersion gold (ENEPIG) formed bumps, or the like.
- the connectors 160 may include a conductive material such as solder, gold, nickel, silver, palladium, tin, the like, or a combination thereof.
- Connectors 160 may make electrical connections to another device, another packaged semiconductor device, or to a circuit board or other object in an end application, as examples.
- Die 170 may be coupled to contact pads 156 by a plurality of connectors 172 .
- Die 170 may be a functional die, for example, an integrated circuit die or passive device die.
- Connectors 172 may include solder bumps coupling to a bottom side of the die 170 or two sides of the die 170 .
- modules (not shown in Figures), such as power modules, may also be disposed over and coupled to the contact pads 156 .
- the device 100 may be flipped over and placed for example on another carrier (not shown), for example, a tape, in preparation for further processing.
- the carrier 101 is then removed, as illustrated in FIG. 1 F , in accordance with some embodiments.
- the carrier 101 , the release layer 102 , and the insulating material 104 may be removed by exposing the release layer 102 to heat or UV.
- Interfacing material 180 and a heat dissipating feature 182 are disposed over the sides 110 a and 120 a of the dies 110 and 120 in accordance with some embodiments, as illustrated in FIG. 1 G .
- the interfacing material 180 and the heat dissipating feature 182 are disposed over the dies 110 / 120 and the encapsulating material 140 .
- Interfacing material 180 may include a thermal interface material (TIM), for example, a polymer having a good thermal conductivity, which may be between about 3 watts per meter kelvin (W/m ⁇ K) to about 5 W/m ⁇ K or more.
- the TIM may have good thermal conductivity and may be disposed of between dies 110 and 120 and heat dissipating feature 182 .
- interfacing material 180 may also include an adhesive (e.g., an epoxy, silicon resin, and the like) for affixing heat dissipating feature 182 to dies 110 / 120 and the encapsulating material 140 .
- the heat dissipating feature 182 may further have a high thermal conductivity, for example, between about 200 W/m ⁇ K to about 400 W/m ⁇ K or more, and may be formed using a metal, a metal alloy, graphemegraphene, carbon nanotubes (CNT), and the like.
- screw assemblies 190 may be attached by initially forming bolt holes through the heat dissipating feature 182 , interfacing material 180 , adhesive layer 108 , first functional die 110 , and RDL structure 150 , as illustrated in FIG. 1 H .
- the bolt holes may be formed by a drilling process such as laser drilling, mechanical drilling, or the like.
- the screw assemblies 190 may be used to further fasten the heat dissipating feature 180 to the package 100 and apply the desired amount of pressure to the interfacing material 180 to make the interfacing material 180 sufficiently adhere to heat dissipating feature 182 .
- the screw assemblies 190 include bolts 192 , fasteners 194 , and mechanical braces 196 , according to some embodiments.
- the bolts 192 are threaded through corresponding bolt holes in the mechanical braces 196 , heat dissipating feature 182 , interfacing material 180 , adhesive layer 108 , first functional die 110 , and RDL structure 150 .
- the fasteners 194 are threaded onto the bolts and tightened to clamp the interfacing material 180 between the heat dissipating feature 182 and the encapsulating material 140 .
- the fasteners 194 may be, e.g., nuts that thread to the bolts 192 .
- the fasteners 194 attach to the bolts 192 at both sides of the package (e.g., at the side having the heat dissipating feature and at the side having the RDL structure).
- the fasteners 194 are tightened, thereby increasing the mechanical force applied to the interfacing material 180 by the mechanical braces 196 and the encapsulating material 140 .
- the mechanical braces 196 are rigid supports that may be formed from a material with high stiffness, such as a metal, e.g., steel, titanium, cobalt, or the like.
- the fasteners 194 are tightened until the heat dissipating feature 182 and the encapsulating material 140 exert the desired amount of pressure on the interfacing material 180 .
- the tightening of the fasteners 194 may be performed with a torque in the range of about 20 N ⁇ m to about 30 N ⁇ m. However, any suitable torque may be used.
- the bolt 192 has a diameter of around 1 mm to around 10 mm. In other embodiments, the bolt 192 has a diameter of around 2 mm to around 5 mm.
- the size of the package has been increased (e.g., over 25,000 mm 2 ) due to the integration of the ultra-large die (e.g., the first functional die 110 ) in accordance with some embodiments.
- the locations of the screw assemblies become a factor that would impact the adhesive performance of interfacing material 180 to heat dissipating feature 182 .
- the screw assemblies 190 may be threaded through a portion of the first functional die 110 to exert the desired amount of pressure on a portion of the interfacing material 180 over the first functional die 110 in accordance with some embodiments, as illustrated in FIG. 1 H .
- the first functional die 110 may have sufficient areas of the peripheral areas that could allow the screw assemblies 190 threading through and not sacrificing areas of the active areas or damaging the active and passive devices in the active areas inside the first functional die 110 .
- screw assemblies 290 are also threaded through the encapsulating material 140 to apply the desired amount of pressure on each portion of the interfacing material 180 , as illustrated in FIG. 2 .
- the screw assemblies may be further threaded through the dummy die 130 (not shown).
- the screw assemblies 290 are not threaded through the second functional die 120 because of the size of the second functional die 120 in accordance with some embodiments. Screw assemblies 290 threading through the encapsulating material 140 and near the ordinary size functional die would generate sufficient torques to the portion of the interfacing material 180 over the center of the ordinary functional die (e.g., the second functional die 120 ) because the distance between the screw assemblies and the center of the die is not far.
- the peripheral areas in an ordinary size functional die e.g., the second functional die 120
- FIG. 3 illustrates attaching the package 100 as illustrated in FIG. 1 H to a system substrate.
- the package 100 may attach a substrate 305 through the connectors 160 to form package 300 .
- the substrate 305 may be a printed circuit board (PCB) or an organic substrate that is designed to provide system function and interfaces for other module integration.
- Other devices e.g., passive devices
- modules e.g., power module integrated circuit (PMIC) or other functional modules
- packages may be mounted on a side of the substrate 305 or both sides of the substrate 305 to provide system functionality.
- modules 310 are mounted on both sides of the substrate 305 .
- FIG. 4 illustrates attaching the package 100 at the stage in FIG. 1 G to a system substrate in accordance with another embodiment of the present disclosure.
- the package 100 as illustrated in FIG. 1 H may attach to a substrate 405 through the connectors 160 to form package 400 .
- the substrate 405 may be a PCB or an organic substrate that is designed to provide system function and interfaces for other module integration.
- Other devices e.g., passive devices
- modules e.g., power module integrated circuit (PMIC) or other functional modules
- packages may be mounted on a side of the substrate 405 or both sides of the substrate 405 to provide system functionality.
- modules 310 are mounted on both sides of the substrate 405 .
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Geometry (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
Claims (20)
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US17/077,815 US12354926B2 (en) | 2020-03-27 | 2020-10-22 | Package and method for manufacturing the same |
| DE102020128171.4A DE102020128171B4 (en) | 2020-03-27 | 2020-10-27 | Package and process for its manufacture |
| KR1020200178674A KR102491905B1 (en) | 2020-03-27 | 2020-12-18 | Package and method for manufacturing the same |
| TW110101623A TWI771874B (en) | 2020-03-27 | 2021-01-15 | Package and method for manufacturing the same |
| CN202110304150.1A CN113517239B (en) | 2020-03-27 | 2021-03-22 | Package and method of manufacturing the same |
| US19/226,378 US20250293114A1 (en) | 2020-03-27 | 2025-06-03 | Package and Method for Manufacturing the Same |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US202063001190P | 2020-03-27 | 2020-03-27 | |
| US17/077,815 US12354926B2 (en) | 2020-03-27 | 2020-10-22 | Package and method for manufacturing the same |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US19/226,378 Division US20250293114A1 (en) | 2020-03-27 | 2025-06-03 | Package and Method for Manufacturing the Same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| US20210305123A1 US20210305123A1 (en) | 2021-09-30 |
| US12354926B2 true US12354926B2 (en) | 2025-07-08 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US17/077,815 Active 2041-04-09 US12354926B2 (en) | 2020-03-27 | 2020-10-22 | Package and method for manufacturing the same |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US12354926B2 (en) |
| KR (1) | KR102491905B1 (en) |
| CN (1) | CN113517239B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20230387039A1 (en) * | 2022-05-26 | 2023-11-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semicondcutor packages and methods of forming thereof |
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| US20180138101A1 (en) * | 2016-11-14 | 2018-05-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structures and methods of forming the same |
| US20190067052A1 (en) * | 2017-08-24 | 2019-02-28 | Cerebras Systems Inc. | Apparatus and method for securing components of an integrated circuit |
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| KR20210122046A (en) | 2021-10-08 |
| CN113517239B (en) | 2025-06-27 |
| US20210305123A1 (en) | 2021-09-30 |
| CN113517239A (en) | 2021-10-19 |
| KR102491905B1 (en) | 2023-01-26 |
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