US11838222B2 - In-line data identification on network - Google Patents
In-line data identification on network Download PDFInfo
- Publication number
- US11838222B2 US11838222B2 US16/724,226 US201916724226A US11838222B2 US 11838222 B2 US11838222 B2 US 11838222B2 US 201916724226 A US201916724226 A US 201916724226A US 11838222 B2 US11838222 B2 US 11838222B2
- Authority
- US
- United States
- Prior art keywords
- data
- network switch
- programmable network
- dsd
- dsds
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active, expires
Links
- 238000004891 communication Methods 0.000 claims abstract description 21
- 238000013500 data storage Methods 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 30
- 239000000284 extract Substances 0.000 claims description 8
- OQNJZSIPDMTUAJ-JGVFFNPUSA-N 7-(carboxyamino)-8-amino-nonanoic acid Chemical compound OC(=O)N[C@@H]([C@@H](N)C)CCCCCC(O)=O OQNJZSIPDMTUAJ-JGVFFNPUSA-N 0.000 description 102
- 230000015654 memory Effects 0.000 description 34
- 238000012545 processing Methods 0.000 description 30
- 230000008569 process Effects 0.000 description 16
- 230000006870 function Effects 0.000 description 13
- 230000000875 corresponding effect Effects 0.000 description 4
- 235000019800 disodium phosphate Nutrition 0.000 description 4
- 238000010801 machine learning Methods 0.000 description 4
- 238000013507 mapping Methods 0.000 description 3
- 238000003491 array Methods 0.000 description 2
- 125000004122 cyclic group Chemical group 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000835 fiber Substances 0.000 description 2
- 150000004770 chalcogenides Chemical class 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000007405 data analysis Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/35—Switches specially adapted for specific applications
- H04L49/356—Switches specially adapted for specific applications for storage area networks
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/60—Software-defined switches
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/65—Re-configuration of fast packet switches
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/10—Protocols in which an application is distributed across nodes in the network
- H04L67/1097—Protocols in which an application is distributed across nodes in the network for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/22—Parsing or analysis of headers
Definitions
- Data deduplication can help increase the available storage capacity by deleting redundant copies of the same data so that the data is only stored in a single location, or in at least a fewer number of locations.
- DSDs Data Storage Devices
- the task of deduplicating data in such networks involves more processing resources and network traffic to identify and delete duplicate copies of data, and to update a mapping for the deleted copies to point to storage locations for the retained copies.
- Such deduplication can typically be performed by one or more servers or hosts in the network as a background activity for data that has already been stored in one or more DSDs.
- FIG. 1 illustrates an example system for implementing in-line data identification according to one or more embodiments.
- FIG. 2 A illustrates an example of the performance of a write command by components in the system of FIG. 1 according to one or more embodiments.
- FIG. 2 B illustrates an example of the performance of a second write command for redundant data by components in the system of FIG. 1 according to one or more embodiments.
- FIG. 2 C illustrates an example of the performance of a read command for the redundant data of FIG. 2 B according to one or more embodiments.
- FIG. 3 is a flowchart for an in-line data identification process according to one or more embodiments.
- FIG. 4 is a flowchart for a read command redirection process according to one or more embodiments.
- FIG. 1 illustrates an example system 100 for implementing in-line data identification according to one or more embodiments.
- clients 104 A, 104 B, and 104 C are in communication with programmable network switch 102 via ports 110 1 , 110 2 , and 110 3 of programmable network switch 102 .
- Data Storage Devices (DSDs) 106 A, 106 B, and 106 C are in communication with programmable network switch 102 via ports, such as with ports 110 4 and 110 5 for DSDs 106 A and 106 B, respectively.
- hardware accelerators 108 A, 108 B, and 108 C are in communication with programmable network switch 102 via ports 110 , such as with ports 110 6 and 110 7 shown in FIG. 1 as connected to hardware accelerator 108 A.
- the use of hardware accelerators 108 with programmable network switch 102 is optional, and other implementations may not include hardware accelerators in system 100 .
- Clients 104 A to 104 C can include, for example, servers, hosts, or processing nodes that use DSDs 106 A, 106 B, and 106 C for external data storage.
- system 100 in FIG. 1 may be used as part of a data center and/or for distributed processing, such as for cloud storage, distributed Machine Learning (ML), or big data analysis.
- ML Machine Learning
- System 100 can include, for example, a Storage Area Network (SAN), a Local Area Network (LAN), and/or a Wide Area Network (WAN), such as the Internet.
- SAN Storage Area Network
- LAN Local Area Network
- WAN Wide Area Network
- clients 104 and programmable network switch 102 may communicate via a WAN
- DSDs 106 and programmable network switch 102 may communicate via a LAN or SAN.
- one or more of clients 104 A to 104 C, programmable network switch 102 , and/or one or more of DSDs 106 A to 106 C may not be physically co-located.
- Clients 104 A to 104 C, programmable network switch 102 , and DSDs 106 A to 106 C may communicate using one or more standards such as, for example, Ethernet, Fibre Channel, and/or InifiniBand. Additionally, various “over fabric” type command protocols such as NVMoF have been developed, enabling devices to communicate over the aforementioned standards of communication.
- NVMoF over fabric type command protocols
- hardware accelerators 108 A, 108 B, and 108 C are connected to ports of programmable network switch 102 , such as ports 110 6 and 110 7 .
- Hardware accelerators 108 A to 108 C can provide processing and/or memory resources, such as for generating or calculating all or part of a unique identifier or fingerprint for identifying data. Examples of generating an identifier can include, for example, performing an SHA hash function, Cyclic Redundancy Check (CRC) function, or XOR function.
- hardware accelerators 108 A, 108 B, and 108 C can provide parallel or simultaneous generation of identifiers, or portions thereof, to reduce latency in generating identifiers.
- hardware accelerators 108 can include, for example, one or more Field Programmable Gate Arrays (FPGAs), Graphics Processing Units (GPUs), or other circuitry that serves as a processing and/or memory offload for programmable network switch 102 .
- FPGAs Field Programmable Gate Arrays
- GPUs Graphics Processing Units
- a first portion of the data received by programmable network switch 102 for a write command is used by programmable network switch 102 to generate a first portion of an identifier for the data, and a second portion of the data for the write command is sent to a hardware accelerator 108 to generate a second portion of the identifier for the data.
- Programmable network switch 102 may then join or combine the two identifier portions to form a final identifier for the data.
- hardware accelerator 108 A includes multiple accelerator pipelines 118 including circuitry for parallel processing of the data received from programmable network switch 102 via interface 116 1 of hardware accelerator 108 A.
- each accelerator pipeline 118 may concurrently calculate or generate a portion of an identifier for data from the same write command.
- each accelerator pipeline 118 may concurrently calculate or generate identifiers for data from different write commands provided by programmable network switch 102 . The identifier portions or different identifiers can be returned to programmable network switch 102 via interface 1162 of hardware accelerator 108 A.
- interface 116 1 and interface 1162 of hardware accelerator 108 A can include the same physical port or the same physical interface of hardware accelerator 108 A.
- programmable network switch 102 and hardware accelerator 108 A may communicate using a standard, such as Ethernet, Fibre Channel, InifiniBand, or Peripheral Component Interconnect express (PCIe), for example.
- Hardware accelerators 108 B and 108 C may have a similar or different arrangement than shown for hardware accelerator 108 A in FIG. 1 .
- DSDs 106 A to 106 C can include, for example, one or more rotating magnetic disks in the case of a Hard Disk Drive (HDD), or non-volatile solid-state memory, such as flash memory or Storage Class Memory (SCM), in the case of a Solid-State Drive (SSD).
- HDD Hard Disk Drive
- SCM Storage Class Memory
- DSDs 106 A, 106 B, and/or 106 C may include different types of storage media, such as in the case of a Solid-State Hybrid Drive (SSHD) that includes both a rotating magnetic disk and a solid-state memory.
- SSHD Solid-State Hybrid Drive
- solid-state memory may comprise one or more of various types of memory devices such as flash integrated circuits, Chalcogenide RAM (C-RAM), Phase Change Memory (PC-RAM or PRAM), Programmable Metallization Cell RAM (PMC-RAM or PMCm), Ovonic Unified Memory (OUM), Resistive RAM (RRAM), NAND memory (e.g., Single-Level Cell (SLC) memory, Multi-Level Cell (MLC) memory (i.e., two or more levels), or any combination thereof), NOR memory, EEPROM, Ferroelectric Memory (FeRAM), Magnetoresistive RAM (MRAM), other discrete Non-Volatile Memory (NVM) chips, or any combination thereof.
- flash integrated circuits e.g., Intel® 845555B Intel® 845555B Intel® 845555B Intel® 845555B Intel® 845555B Intel® 845555B Intel® 845555B Intel® 845555B Intel® 845555B Intel® 845555B Intel® 845555B Intel® 845555B Intel®
- Programmable network switch 102 routes messages or packets, such as read and write commands for data, and other communications between clients 104 and DSDs 106 .
- programmable network switch 102 compares identifiers generated for data from a write command to a plurality of identifiers stored in an ID table representing data already stored in DSDs 106 A to 106 C.
- the ID table can include a hash table for identifying data using the generated identifiers.
- the ID table (e.g., ID table 10 in FIGS. 2 A to 2 C ) may be stored at programmable network switch 102 or in a hardware accelerator 108 .
- the ID table stored at programmable network switch 102 may only include the most recently accessed and/or most frequently accessed identifiers to conserve storage space at programmable network switch 102 and/or at a hardware accelerator 108 . In such cases, or in cases where no ID table is stored at programmable network switch 102 or at a hardware accelerator 108 , programmable network switch 102 may instead request some or all of DSDs 106 A to 106 C to search an ID table locally stored at the DSD (e.g., ID tables 16 in FIGS. 2 A to 2 C ) for a matching identifier.
- DSDs 106 A to 106 C may instead request some or all of DSDs 106 A to 106 C to search an ID table locally stored at the DSD (e.g., ID tables 16 in FIGS. 2 A to 2 C ) for a matching identifier.
- programmable network switch 102 may determine whether to forward or send a write command to a DSD based on whether a unique identifier or fingerprint matches another identifier or fingerprint of the plurality of previously generated identifiers or fingerprints.
- programmable network switch 102 may extract a portion of a packet or message, such as a payload or portion thereof, for generating the identifier.
- programmable network switch 102 may be programmed to process different communication formats or protocols, and extract a data portion used to generate an identifier for data intended by a client 104 to be stored in a DSD 106 for a write command. For example, some write commands may arrive in the form of an Ethernet packet including a header and a payload.
- Programmable network switch 102 can be configured to identify a data portion within the payload that may be separate from instructions for the write command that may be included in the payload of the Ethernet packet.
- the data portion can be extracted from the payload and used to generate the identifier or fingerprint for the data, without the instructions for performing the write command.
- programmable network switch 102 can be 64 port Top of Rack (ToR) P4 programmable network switch, such as a Barefoot Networks Tofino Application Specific Integrated Circuit (ASIC) with ports configured to provide 10, 40, or 100 Gigabit Ethernet (GE) frame rates.
- ToR Top of Rack
- ASIC Barefoot Networks Tofino Application Specific Integrated Circuit
- GE Gigabit Ethernet
- Other examples of programmable network switches that can be used as a programmable network switch in system 100 can include, for example, a Cavium Xpliant programmable network switch or a Broadcom Trident 3 programmable network switch.
- a data plane of programmable network switch 102 is programmable and separate from a higher-level control plane that determines end-to-end routes for messages or packets between devices in system 100 .
- the control plane can be configured for different processes, such as the processes of FIGS. 3 and 4 for handling write commands and read commands, as discussed in more detail below.
- programmable network switch 102 for generating at least a portion of the identifier and/or determining whether to send a write command to a DSD as an in-line process while the data is in transit, it is ordinarily possible to improve data deduplication in system 100 , as compared to performing data identification and deduplication after redundant data has already been stored in a DSD.
- Storage space at DSDs 106 A to 106 C can be conserved at the outset by not sending write commands to the DSDs for data that is already stored in system 100 .
- the use of processing and memory resources, as well as network traffic is reduced by not having to subsequently identify and deduplicate redundant copies of data after the redundant copies have been stored in DSDs 106 A to 106 C.
- pipelines 112 receive and process messages or packets received from clients 104 and may route extracted data or a payload portion of the messages or packets to hardware accelerators 108 for generating at least a portion of a unique identifier using the extracted data or portion of the payload.
- the unique identifiers are then fed back into pipelines 114 for comparing the unique identifiers to previously generated identifiers for data already stored in DSDs 106 A to 106 C, and in some implementations, updating ID table 10 , creating new write commands for automatically providing a data backup (as in the example of FIG. 2 A discussed below), creating a new write completion message (as in example of FIG.
- pipelines 112 may instead generate identifiers or the entirety of the identifiers for data received for write commands, as opposed to routing data to a hardware accelerator to generate identifiers or portions thereof.
- Pipelines 112 and 114 can also provide a configurable data plane and customized packet processing capability.
- pipelines 112 and 114 may be programmed using, for example, P4, and can be capable of parallel processing of packets or data in sequential stages.
- Each pipeline can include, for example, a parser, one or more processing stages, a traffic manager, and a deparser.
- the parser can be configured to extract packet or message headers, packet or message payloads, and values or data from the headers and/or payloads, such as a network destination address, message type, and/or a network source address from a header, and a command type, data address, and data to be stored from a payload.
- the extracted values or data from the header and payload can be used for match-action operations performed by the processing stages of programmable network switch 102 .
- the processing stages can include, for example, programmable Arithmetic Logic Units (ALUs) or other circuitry, and one or more memories (e.g., memory 105 in FIG. 2 A ) that store match-action tables for matching extracted values and data, and performing different corresponding actions based on the matching or non-matching, such as the generation of an identifier for data to be stored in DSDs 106 , comparison of IDs to a plurality of IDs for data stored in DSDs 106 , updating ID table 10 , creating new read or write commands, and/or creating a new write completion message.
- the matches and corresponding actions are made according to predefined rules and the extracted values or data.
- the extracted values or data for a message received by programmable network switch 102 are fed into one or more processing stages, which can identify the received message as a write command.
- a traffic manager of pipeline 112 can route an extracted data portion of a payload of the message to an appropriate port of programmable network switch 102 , such as to port 110 6 for generating an identifier for the extracted data portion by hardware accelerator 108 A.
- programmable network switch 102 may generate part of the identifier or may generate all of the identifier without routing the data portion to a hardware accelerator.
- the processing stages in some implementations may instead compare a data address for the data requested by the read command to other data addresses in an ID table.
- a message received by programmable network switch 102 that is not identified as a write command or a read command may be routed or forwarded by the traffic manager to its intended destination in system 100 with less processing by programmable network switch 102 .
- the deparser of pipeline 112 can be configured to package or assemble data, such as data extracted from a write command, in a format or standard for communication with a hardware accelerator 108 .
- some implementations may include a mix of different types of hardware accelerators that may communicate using different formats or standards to allow for different functions to be performed by the different hardware accelerators.
- Pipelines 114 can also each include a parser, in addition to one or more processing stages, a traffic manager, and a deparser.
- Data received from hardware accelerators 108 such as generated identifiers or portions thereof, may be extracted from messages or packets received from hardware accelerators 108 for comparison to stored identifiers using one or more processing stages of pipeline 114 .
- an ID table, or portions thereof may be implemented as a match-action table that is used by a processing stage of programmable network switch 102 to compare the generated identifier to previously generated identifiers.
- a traffic manager of pipeline 114 may determine a port for sending a write command to a DSD 106 or a write completion message to a client 104 .
- the deparser of the pipeline 114 can be configured to construct a message or packet for communicating with the DSD 106 or the client 104 .
- implementations may include a different arrangement of modules for a programmable network switch.
- other implementations may include only a single pipeline 112 and a single pipeline 114 .
- other implementations may only include a single pipeline or a single set of parallel pipelines that serve the functions of pipelines 112 and pipelines 114 of FIG. 1 .
- the pipeline could include processing stages to generate identifiers and compare them to existing identifiers for data stored in DSDs 106 , update an ID table, and/or create new messages (e.g., write commands, read commands, and/or write completion messages) as needed.
- a programmable network switch between clients 104 and DSDs 106 allows for in-line data identification (i.e., while the data is being transferred between the client and DSD) and/or deduplication. Such in-line data identification and deduplication are ordinarily more efficient in terms of time and processing resources than identifying redundant data and performing deduplication after the redundant data has already been stored in DSDs 106 .
- Programmable network switch 102 also allows for a protocol-independent handling of both incoming messages and outgoing messages when communicating with devices in system 100 , such as with clients 104 , DSDs 106 , and hardware accelerators 108 .
- system 100 may include additional devices or a different number of devices than shown in the example of FIG. 1 .
- some implementations may not include hardware accelerators 108 or may include a different number of clients 104 , programmable network switches 102 , or DSDs 106 .
- some implementations may include a separate server, host, or controller for storing metadata, such as a global ID table relating DSDs or ports of programmable network switch 102 for such DSDs to the identifiers for the data stored in the DSDs.
- FIG. 2 A illustrates an example of the performance of a write command by components of system 100 of FIG. 1 according to one or more embodiments.
- programmable network switch 102 includes circuitry 103 and memory 105 , which can include pipelines 112 and pipelines 114 discussed above with reference to FIG. 1 .
- Circuitry 103 can execute instructions, such as instructions from switch module 12 , and can include, for example, one or more ASICs, microcontrollers, DSPs, FPGAs, hard-wired logic, analog circuitry and/or a combination thereof.
- circuitry 103 can include a System on a Chip (SoC), which may be combined with memory 105 or portions thereof.
- SoC System on a Chip
- Memory 105 of programmable network switch 102 can include, for example, a volatile RAM such as DRAM, or a non-volatile RAM or other solid-state memory such as register arrays that are used by circuitry 103 to execute instructions loaded from switch module 12 or firmware of the programmable network switch 102 , and/or data used in executing such instructions, such as ID table 10 .
- switch module 12 can include instructions for routing and/or processing messages or packets, and/or implementing processes such as those discussed with reference to FIGS. 3 and 4 below for handling write commands and read commands received by programmable network switch 102 .
- ID table 10 can be stored in memory 105 as one or more data structures.
- ID table 10 includes identifiers for data and associated data addresses corresponding to one or more storage locations for the data identified by the identifier.
- ID table 10 may also indicate one or more DSDs that store the data, such as with a network address for the DSD.
- ID table 10 may include different information than that shown in FIG. 2 A .
- other implementations may include an address range for the data or size for the data represented by the ID, or may include usage or access information for the data, such as a frequency of access or a last access time for the data.
- programmable network switch 102 optionally uses hardware accelerator 108 , which includes circuitry 109 and memory 111 storing ID generating module 14 .
- Circuitry 109 and memory 111 can include, for example, an FPGA, a GPU, or other circuitry that serves as a processing and/or memory offload for programmable network switch 102 .
- hardware accelerator 108 executes ID generating module 14 for generating at least a portion of an identifier for data received from programmable network switch 102 .
- ID generator module 14 can perform a hash function on data received from programmable network switch 102 to generate an ID for the data.
- ID table 10 and/or ID tables 16 shown in FIG. 1 can include hash tables in some implementations for identifying data using the generated identifiers.
- hardware accelerator 108 may store ID table 10 or a portion thereof.
- Each of DSDs 106 A, 106 B, and 106 C include a respective controller 107 that controls operation of the DSD, and can include circuitry such as a microcontroller, a DSP, an FPGA, an ASIC, hard-wired logic, analog circuitry and/or a combination thereof.
- a controller 107 can include an SoC, which may be combined with an interface of the DSD, and/or a memory of the DSD.
- DSDs 106 A, 106 B, and 106 C can store an ID table, such as optional ID tables 16 A, 16 B, and 16 C, associating identifiers for data and the addresses for the data.
- each DSD may store an ID table 16 for the data stored in the DSD.
- a DSD 106 may store an ID table for data stored in multiple DSDs 106 , or alternatively, none of the DSDs may store an ID table.
- ID table 10 at programmable network switch 102 may be eliminated such that programmable network switch 102 may compare an identifier generated for data to a plurality of identifiers by sending one or more messages to one or more DSDs 106 to check an ID table 16 at the DSD or DSDs 106 .
- a write command is sent from client 104 B to programmable network switch 102 to write data X at address 1 of DSD 106 B (i.e., Wr.(X ⁇ 106 B, 1 ) in FIG. 2 A ).
- Programmable network switch 102 receives the write command and extracts data X from the write command.
- the term write command can refer to the message or packet that is received from client 104 B that includes data X to be written in DSD 106 B.
- Circuitry 103 of programmable network switch 102 generates an identifier from the extracted data X by sending the extracted data X to hardware accelerator 108 for generation of the identifier using ID generating module 14 .
- programmable network switch 102 After the identifier is received by programmable network switch 102 from hardware accelerator 108 , programmable network switch 102 , compares the identifier to a plurality of identifiers generated for data stored in DSDs 106 A, 106 B, and 106 C, such as by using an egress pipeline 114 as shown in FIG. 1 . Depending on the outcome of the comparison, programmable network switch 102 can determine whether to forward the write command to DSD 106 B per a destination address of the header for the write command. In the example of FIG. 2 A , a matching ID is not found in ID table 10 . As a result, programmable network switch 102 determines to send or forward the write command to DSD 106 B for address 1 .
- sending or forwarding the write command can include programmable network switch 102 repackaging or reassembling the write command, such as by a deparser of a pipeline, to be sent to DSD 106 B.
- a write command is also sent to DSD 106 C to store a copy of data X in the example of FIG. 2 A .
- Programmable network switch 102 may be configured to automatically copy data stored in DSDs 106 A and 106 B in DSD 106 C as a backup.
- the additional write command for the in-line backup may only be sent to DSD 106 C if a copy of the data has not already been stored in DSD 106 A or DSD 106 B.
- circuitry 103 of programmable network switch 102 may use a deparser send a read command to DSD 106 C instead to retrieve data X without involvement of the device that sent the read command.
- a write command received from a client 104 can include a flag or other identifier such as an address for the data in a certain address range that indicates to programmable network switch 102 that the data should be backed up.
- DSDs 106 B and 106 C After storing data X, DSDs 106 B and 106 C return write completion messages for address 1 (i.e., Wr.Comp( 1 ) in FIG. 2 A ) to programmable network switch 102 .
- Circuitry 103 of programmable network switch 102 updates ID table 10 to include IDx generated from data X, address 1 for data X, and indications for DSDs 106 B and 106 C where the data associated with IDx has been stored.
- programmable network switch 102 forwards or sends the write completion message to client 104 B to indicate that data X has been stored in DSD 106 B.
- FIG. 2 B illustrates an example of the performance of a second write command for data X by components in system 100 according to one or more embodiments.
- the performance of the second write command in FIG. 2 B differs from that of the write command in FIG. 2 A in that programmable network switch 102 determines not to forward or send the write command to the DSD indicated by the write command.
- client 104 A sends the second write command to programmable network switch 102 for storage of data X in DSD 106 A at address 2 .
- Programmable network switch 102 extracts data X from the write command, and sends the extracted data to hardware accelerator 108 to generate the identifier IDx for data X, which is returned to programmable network switch 102 for comparison to identifiers in ID table 10 .
- programmable network switch 102 determines not to send or forward the write command to DSD 106 A. In the example of FIG. 2 B , programmable network switch 102 updates ID table 10 to include address 2 as one of the addresses for data X associated with IDx.
- Programmable network switch 102 also sends a write completion message to client 104 A to indicate that data X has been stored at address 2 of DSD 106 A. In this case, the fact that data X has not actually been stored in DSD 106 A may be hidden from client 104 A. In other implementations, the write completion message can alternatively indicate that the data has been stored at address 1 of DSD 106 B and/or DSD 106 C.
- the comparison of identifiers in the present disclosure can ordinarily allow for in-line data deduplication to be performed before redundant data is actually stored in a DSD, thereby more immediately conserving storage space, and subsequently conserving processing and memory resources that would have been used to identify and deduplicate the redundant data.
- network traffic is reduced in that write commands to write redundant data are not forwarded to DSDs, and subsequent communications are not needed to identify and remove redundant data stored in the DSDs.
- FIG. 2 C illustrates an example of the performance of a read command from client 104 A for data X according to one or more embodiments.
- client 104 A sends a read command to programmable network switch 102 to retrieve data X at address 2 of DSD 106 A (i.e., Re( 2 , 106 A) in FIG. 2 C ).
- DSD 106 A i.e., Re( 2 , 106 A) in FIG. 2 C
- Programmable network switch 102 receives the read command and can check ID table 10 or another data structure, such as an address mapping, to identify address 2 and determine that the requested data is stored in DSD 106 B, rather than in DSD 106 A.
- Programmable network switch 102 using a deparser sends a read command to DSD 106 B to retrieve data for address 1 of DSD 106 B.
- Data X is returned by DSD 106 B to programmable network switch 102 (i.e., RComp.(X) in FIG. 2 C ).
- Programmable network switch 102 then returns data X to client 104 A to complete performance of the read command.
- the retrieval of data X from DSD 106 B instead of from DSD 106 A can be hidden from client 104 A or may be indicated as part of returning the requested data to client 104 A.
- a separate device in system 100 may store ID table 10 , which is accessed by programmable network switch 102 to compare identifiers and/or locate data in DSDs 106 .
- FIG. 3 is a flowchart for a data identification process according to one or more embodiments.
- the process of FIG. 3 can be performed by, for example, programmable network switch 102 executing switch module 12 and/or one or more hardware accelerators 108 executing ID generating module 14 .
- a packet comprising a write command is received to store data in a DSD of a plurality of DSDs.
- programmable network switch 102 may receive a write command or packet from a client 104 to store data in a DSD 106 .
- the write command or packet may include a header or different frames following a format, such as a standard 802.3 Layer 1 frame format, for example.
- a header of the write command may include information such as a source for the command (e.g., a network address for a client 104 ), a message type (e.g., indicating a format of the message), and/or a destination address (e.g., a network address for a DSD 106 ).
- the write command can also include a payload or data portion including the data to be written in the DSD with instructions for performing the write command, such as an indication of the command type and an address for the data to be written.
- the programmable network switch extracts the data from the write command that is to be stored for the write command using a pipeline of the programmable network switch.
- the data may be extracted by a parser and/or by a processing stage that may be part of an ingress pipeline (e.g., pipeline 112 in FIG. 1 ).
- an identifier is generated from at least a portion of the extracted data.
- the programmable network switch may directly generate the identifier or fingerprint, such as by inputting the extracted data or portion thereof into an identifier generating function.
- the identifier generating function can include, for example, a hash function, Cyclic Redundancy Check (CRC) function, or XOR function.
- CRC Cyclic Redundancy Check
- XOR XOR function
- the programmable network switch compares the identifier generated in block 306 to a plurality of identifiers generated for data stored in the plurality of DSDs (e.g., DSDs 106 in FIG. 1 ). It is determined whether the generated identifier matches an identifier of a plurality of identifiers for data stored in the plurality of DSDs. As discussed above with reference to the example of FIG. 1 , one or more processing stages of the programmable network switch may be used to compare the generated ID to the existing IDs stored in an ID table, which may serve as a match-action table or form part of a match-action table for the comparison.
- ID table which may serve as a match-action table or form part of a match-action table for the comparison.
- the programmable network switch may send the generated identifier to another device or devices for comparison.
- the generated identifier may be sent to one or more DSDs for comparison using an ID table or ID tables (e.g., ID tables 16 ) stored in the DSD(s).
- the generated identifier may be sent to a server, host, or controller, which may store the ID table for comparison.
- the programmable network switch determines not to send or forward the write command to the DSD to store the data, since the matching of the identifier indicates that a copy of the data to be written is already stored in a DSD of the plurality of DSDs (e.g., DSDs 106 ).
- programmable network switch 102 receives a write command from client 104 A and determines not to send the write command to DSD 106 A, since ID table 10 indicates that data X has already been stored in DSDs 106 B and 106 C.
- the programmable network switch in block 310 of FIG. 3 may also create a new write completion message to return to the device that sent the write command to indicate that the data has been written.
- a write completion message may include the address and location where the data was previously stored.
- the previous storage of the data may be transparent or hidden from the device that sent the write command.
- the programmable network switch in block 312 sends or forwards the write command to the DSD to store the data.
- a deparser of the programmable network switch may reassemble or repackage the write command to send to the DSD indicated by the write command received in block 302 .
- the programmable network switch may also send one or more additional write commands to other DSDs to store one or more copies of the data for the write command.
- the programmable network switch can be configured to automatically create new write commands for backing up data for all data stored in a particular DSD on a different DSD, or for only backing up certain data, which may be indicated, for example, using a flag in the write command or an address for the data in the write command.
- block 314 may be omitted such that no additional write commands are created by the programmable network switch to automatically backup data.
- FIG. 4 is a flowchart for a read command redirection process according to one or more embodiments. The process of FIG. 4 can be performed by, for example, programmable network switch 102 executing switch module 12 .
- the programmable network switch receives a packet comprising a read command from a client to retrieve data from a DSD.
- programmable network switch 102 may receive a read command from a client 104 to retrieve data from a DSD 106 .
- the use of the term “read command” can refer to the message or packet received by the programmable network switch to retrieve data from a DSD.
- the packet for the read command, or the read command may include a header and payload following a format, such as a standard 802.3 Layer 1 frame format, for example.
- a header of the read command may include information such as a source for the command (e.g., a network address for a client 104 ), a message type (e.g., an indication of the format of the message), and/or a destination address (e.g., a network address for a DSD 106 ).
- the payload may include information for performing the read command, such as a command type and address for the requested data.
- a parser or processing stage of the programmable network switch may extract the address and command type for processing by a pipeline of the programmable network switch.
- the programmable network switch identifies a port of the programmable network switch corresponding to a different DSD than the DSD indicated by the read command to retrieve matching data to return to the client for the read command.
- an ingress pipeline may include one or more processing stages that check an ID table or other data structure, such as an address mapping, for a matching address for the data requested by the read command, which may have been extracted from a payload of the message.
- the ID table or other data structure stored at the programmable network switch may be a subset of the addresses for all of the data stored in the plurality of DSDs, such as an ID table for the most frequently accessed data and/or the most recently accessed data.
- the data structure checked in block 404 can relate addresses for data stored in the DSDs with, for example, an indication of a port of the programmable network switch or a network address for the DSD storing the data.
- an ID table or other data structure can be stored in the programmable network switch or at one or more other devices, as in the case of optional ID tables 16 in FIGS. 2 A to 2 C .
- the ID table or other data structure may be stored at a dedicated device such as a controller, host, or server for the system, or at a hardware accelerator in communication with the programmable network switch.
- the programmable network switch can send a request message to the other device to check for the address indicated by the read command. The other device may then respond back to the programmable network switch to indicate whether the address was found in the ID table or other data structure, and to indicate a different address and/or a different DSD storing the data than the address or DSD indicated by the read command.
- the programmable network switch uses a deparser of the programmable network switch, sends a new read command to a different DSD to retrieve the matching data to return to the client that sent the read command received in block 402 .
- programmable network switch 102 can identify port 110 5 for DSD 1066 , rather than port 110 4 for DSD 106 A, that stores matching data X by using ID table 10 .
- a new read command for address 1 at DSD 106 B is created and sent to DSD 106 B to retrieve data X requested by client 104 A from DSD 106 A at address 2 .
- the programmable network switch may use a different address and may not include the original read command indicating the DSD from which to retrieve the data.
- a centralized programmable network switch to perform in-line data identification and deduplication can ordinarily improve the efficiency of such identification and deduplication in terms of time, processing resources, and network traffic.
- the use of a programmable network switch can also allow for a variety of different communication protocols among devices in the system, such as hardware accelerators that may be used by the programmable network switch in generating identifiers for identifying the data.
- a general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine.
- Processor or controller circuitry may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, an SoC, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
- a software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable media, an optical media, or any other form of storage medium known in the art.
- An exemplary storage medium is coupled to processor or controller circuitry such that the processor or controller circuitry can read information from, and write information to, the storage medium.
- the storage medium may be integral to processor or controller circuitry.
- the processor or controller circuitry and the storage medium may reside in an ASIC or an SoC.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer Security & Cryptography (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
Description
Claims (20)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/724,226 US11838222B2 (en) | 2019-12-21 | 2019-12-21 | In-line data identification on network |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/724,226 US11838222B2 (en) | 2019-12-21 | 2019-12-21 | In-line data identification on network |
Publications (2)
Publication Number | Publication Date |
---|---|
US20210194829A1 US20210194829A1 (en) | 2021-06-24 |
US11838222B2 true US11838222B2 (en) | 2023-12-05 |
Family
ID=76438930
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US16/724,226 Active 2040-08-04 US11838222B2 (en) | 2019-12-21 | 2019-12-21 | In-line data identification on network |
Country Status (1)
Country | Link |
---|---|
US (1) | US11838222B2 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11212227B2 (en) | 2019-05-17 | 2021-12-28 | Pensando Systems, Inc. | Rate-optimized congestion management |
US11394700B2 (en) * | 2020-01-31 | 2022-07-19 | Pensando Systems Inc. | Proxy service through hardware acceleration using an IO device |
US11431681B2 (en) | 2020-04-07 | 2022-08-30 | Pensando Systems Inc. | Application aware TCP performance tuning on hardware accelerated TCP proxy services |
CN113568561B (en) * | 2020-04-29 | 2024-05-17 | 伊姆西Ip控股有限责任公司 | Method for information processing, electronic device, and computer storage medium |
Citations (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7554984B2 (en) | 2004-11-30 | 2009-06-30 | Broadcom Corporation | Fast filter processor metering and chaining |
US20140195634A1 (en) * | 2013-01-10 | 2014-07-10 | Broadcom Corporation | System and Method for Multiservice Input/Output |
US9152580B1 (en) | 2011-10-27 | 2015-10-06 | Marvell International Ltd. | Method and apparatus for transferring data between a host and an embedded device |
US9164890B2 (en) | 2012-06-28 | 2015-10-20 | Samsung Electronics Co., Ltd. | Storage device capable of increasing its life cycle and operating method thereof |
US20160127492A1 (en) * | 2014-11-04 | 2016-05-05 | Pavilion Data Systems, Inc. | Non-volatile memory express over ethernet |
US20170017571A1 (en) * | 2015-07-17 | 2017-01-19 | Samsung Electronics Co., Ltd. | Method and apparatus fori n-line deduplication in storage devices |
US9558124B2 (en) | 2013-11-08 | 2017-01-31 | Seagate Technology Llc | Data storage system with passive partitioning in a secondary memory |
US9639287B1 (en) | 2015-06-29 | 2017-05-02 | Western Digital Technologies, Inc. | Write command reporting |
US10325108B2 (en) | 2016-12-30 | 2019-06-18 | Intel Corporation | Method and apparatus for range based checkpoints in a storage device |
US20190245922A1 (en) * | 2018-02-05 | 2019-08-08 | Microsoft Technology Licensing, Llc | Server system |
US10412002B1 (en) * | 2015-03-25 | 2019-09-10 | Amazon Technologies, Inc. | Processing packet data using an offload engine in a service provider environment |
US10474397B2 (en) | 2017-06-13 | 2019-11-12 | Western Digital Technologies, Inc | Unified indirection in a multi-device hybrid storage unit |
US20200136996A1 (en) * | 2018-06-29 | 2020-04-30 | Intel Corporation | Offload of storage node scale-out management to a smart network interface controller |
US10678724B1 (en) | 2018-12-29 | 2020-06-09 | Intel Corporation | Apparatuses, methods, and systems for in-network storage in a configurable spatial accelerator |
US10802756B1 (en) * | 2018-07-12 | 2020-10-13 | Seagate Technology Llc | Flash queue status polling |
US10860231B2 (en) | 2018-10-18 | 2020-12-08 | SK Hynix Inc. | Memory system for adjusting map segment based on pattern and operating method thereof |
US20200409559A1 (en) | 2019-06-27 | 2020-12-31 | Western Digital Technologies, Inc. | Non-volatile memory data write management |
US20210303206A1 (en) | 2020-03-31 | 2021-09-30 | Western Digital Technologies, Inc. | FTL Flow Control For Hosts Using Large Sequential NVM Reads |
US11200961B1 (en) | 2020-06-25 | 2021-12-14 | Intel Corporation | Apparatus, system and method to log memory commands and associated addresses of a memory array |
-
2019
- 2019-12-21 US US16/724,226 patent/US11838222B2/en active Active
Patent Citations (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7554984B2 (en) | 2004-11-30 | 2009-06-30 | Broadcom Corporation | Fast filter processor metering and chaining |
US9152580B1 (en) | 2011-10-27 | 2015-10-06 | Marvell International Ltd. | Method and apparatus for transferring data between a host and an embedded device |
US9164890B2 (en) | 2012-06-28 | 2015-10-20 | Samsung Electronics Co., Ltd. | Storage device capable of increasing its life cycle and operating method thereof |
US20140195634A1 (en) * | 2013-01-10 | 2014-07-10 | Broadcom Corporation | System and Method for Multiservice Input/Output |
US9558124B2 (en) | 2013-11-08 | 2017-01-31 | Seagate Technology Llc | Data storage system with passive partitioning in a secondary memory |
US20160127492A1 (en) * | 2014-11-04 | 2016-05-05 | Pavilion Data Systems, Inc. | Non-volatile memory express over ethernet |
US10412002B1 (en) * | 2015-03-25 | 2019-09-10 | Amazon Technologies, Inc. | Processing packet data using an offload engine in a service provider environment |
US9639287B1 (en) | 2015-06-29 | 2017-05-02 | Western Digital Technologies, Inc. | Write command reporting |
US20170017571A1 (en) * | 2015-07-17 | 2017-01-19 | Samsung Electronics Co., Ltd. | Method and apparatus fori n-line deduplication in storage devices |
US10325108B2 (en) | 2016-12-30 | 2019-06-18 | Intel Corporation | Method and apparatus for range based checkpoints in a storage device |
US10474397B2 (en) | 2017-06-13 | 2019-11-12 | Western Digital Technologies, Inc | Unified indirection in a multi-device hybrid storage unit |
US20190245922A1 (en) * | 2018-02-05 | 2019-08-08 | Microsoft Technology Licensing, Llc | Server system |
US20200136996A1 (en) * | 2018-06-29 | 2020-04-30 | Intel Corporation | Offload of storage node scale-out management to a smart network interface controller |
US10802756B1 (en) * | 2018-07-12 | 2020-10-13 | Seagate Technology Llc | Flash queue status polling |
US10860231B2 (en) | 2018-10-18 | 2020-12-08 | SK Hynix Inc. | Memory system for adjusting map segment based on pattern and operating method thereof |
US10678724B1 (en) | 2018-12-29 | 2020-06-09 | Intel Corporation | Apparatuses, methods, and systems for in-network storage in a configurable spatial accelerator |
US20200409559A1 (en) | 2019-06-27 | 2020-12-31 | Western Digital Technologies, Inc. | Non-volatile memory data write management |
US20210303206A1 (en) | 2020-03-31 | 2021-09-30 | Western Digital Technologies, Inc. | FTL Flow Control For Hosts Using Large Sequential NVM Reads |
US11200961B1 (en) | 2020-06-25 | 2021-12-14 | Intel Corporation | Apparatus, system and method to log memory commands and associated addresses of a memory array |
Non-Patent Citations (1)
Title |
---|
Pending U.S. Appl. No. 16/725,824, filed Dec. 23, 2019, entitled "In-Line Data Operations for Storage Systems", Sun et al. |
Also Published As
Publication number | Publication date |
---|---|
US20210194829A1 (en) | 2021-06-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11838222B2 (en) | In-line data identification on network | |
US10817212B2 (en) | Method and apparatus for creating a short hash handle highly correlated with a globally-unique hash signature | |
US10719253B2 (en) | Efficient compression of data in storage systems through offloading computation to storage devices | |
US10540323B2 (en) | Managing I/O operations in a storage network | |
US10261902B2 (en) | Parallel processing of a series of data units for writing | |
US8930648B1 (en) | Distributed deduplication using global chunk data structure and epochs | |
US10417202B2 (en) | Storage system deduplication | |
US10810123B1 (en) | Flush strategy for using DRAM as cache media system and method | |
US10346475B2 (en) | Hash table structures | |
US9378106B1 (en) | Hash-based replication | |
US10534547B2 (en) | Consistent transition from asynchronous to synchronous replication in hash-based storage systems | |
US10656864B2 (en) | Data replication within a flash storage array | |
US9396243B1 (en) | Hash-based replication using short hash handle and identity bit | |
US8620886B1 (en) | Host side deduplication | |
US9026503B2 (en) | Fragmentation control for performing deduplication operations | |
CN109313538B (en) | Inline deduplication | |
WO2017020576A1 (en) | Method and apparatus for file compaction in key-value storage system | |
US20150286414A1 (en) | Scanning memory for de-duplication using rdma | |
US9064030B2 (en) | Tree traversal in a memory device | |
US20160034191A1 (en) | Grid oriented distributed parallel computing platform | |
US11381400B2 (en) | Using double hashing schema to reduce short hash handle collisions and improve memory allocation in content-addressable storage systems | |
US10853286B2 (en) | Performance improvement for an active-active distributed non-ALUA system with address ownerships | |
US11115490B2 (en) | Host based read cache for san supporting NVMEF with E2E validation | |
US10503409B2 (en) | Low-latency lightweight distributed storage system | |
US11297010B2 (en) | In-line data operations for storage systems |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: WESTERN DIGITAL TECHNOLOGIES, INC, CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:SUN, CHAO;BRESSANA, PIETRO;VUCINIC, DEJAN;SIGNING DATES FROM 20191219 TO 20191220;REEL/FRAME:051351/0206 |
|
FEPP | Fee payment procedure |
Free format text: ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: BIG.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION |
|
AS | Assignment |
Owner name: JPMORGAN CHASE BANK, N.A., AS AGENT, ILLINOIS Free format text: SECURITY INTEREST;ASSIGNOR:WESTERN DIGITAL TECHNOLOGIES, INC.;REEL/FRAME:052025/0088 Effective date: 20200211 |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: PRE-INTERVIEW COMMUNICATION MAILED |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: NON FINAL ACTION MAILED |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: NON FINAL ACTION MAILED |
|
AS | Assignment |
Owner name: WESTERN DIGITAL TECHNOLOGIES, INC., CALIFORNIA Free format text: RELEASE OF SECURITY INTEREST AT REEL 052025 FRAME 0088;ASSIGNOR:JPMORGAN CHASE BANK, N.A.;REEL/FRAME:058965/0699 Effective date: 20220203 |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: FINAL REJECTION MAILED |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: RESPONSE AFTER FINAL ACTION FORWARDED TO EXAMINER |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: ADVISORY ACTION MAILED |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: NON FINAL ACTION MAILED |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: NOTICE OF ALLOWANCE MAILED -- APPLICATION RECEIVED IN OFFICE OF PUBLICATIONS |
|
AS | Assignment |
Owner name: JPMORGAN CHASE BANK, N.A., ILLINOIS Free format text: PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT;ASSIGNOR:WESTERN DIGITAL TECHNOLOGIES, INC.;REEL/FRAME:064715/0001 Effective date: 20230818 Owner name: JPMORGAN CHASE BANK, N.A., ILLINOIS Free format text: PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT;ASSIGNOR:WESTERN DIGITAL TECHNOLOGIES, INC.;REEL/FRAME:067045/0156 Effective date: 20230818 |
|
STPP | Information on status: patent application and granting procedure in general |
Free format text: PUBLICATIONS -- ISSUE FEE PAYMENT VERIFIED |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |