US10755856B2 - Multilayer ceramic electronic component - Google Patents

Multilayer ceramic electronic component Download PDF

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US10755856B2
US10755856B2 US16/200,643 US201816200643A US10755856B2 US 10755856 B2 US10755856 B2 US 10755856B2 US 201816200643 A US201816200643 A US 201816200643A US 10755856 B2 US10755856 B2 US 10755856B2
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electrodes
protective layer
dummy
ceramic body
internal electrodes
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US20200118748A1 (en
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Do Yeon Kim
Je Jung KIM
Do Young Jeong
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Samsung Electro Mechanics Co Ltd
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Samsung Electro Mechanics Co Ltd
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Assigned to SAMSUNG ELECTRO-MECHANICS CO., LTD. reassignment SAMSUNG ELECTRO-MECHANICS CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: JEONG, DO YOUNG, KIM, DO YEON, KIM, JE JUNG
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/12—Ceramic dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H01G4/012—Form of non-self-supporting electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/224—Housing; Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/30—Stacked capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/12—Ceramic dielectrics
    • H01G4/1209—Ceramic dielectrics characterised by the ceramic dielectric material
    • H01G4/1218—Ceramic dielectrics characterised by the ceramic dielectric material based on titanium oxides or titanates
    • H01G4/1227—Ceramic dielectrics characterised by the ceramic dielectric material based on titanium oxides or titanates based on alkaline earth titanates

Definitions

  • the present disclosure relates to a multilayer ceramic electronic component.
  • a multilayer ceramic electronic component has been widely used as a component of an information technology (IT) device such as a computer, a personal digital assistant (PDA), a cellular phone, or the like, since it has a small size, implements high capacitance, and may be easily mounted.
  • IT information technology
  • PDA personal digital assistant
  • a multilayer ceramic electronic component has also been widely used as an electrical component, since it has high reliability and high strength characteristics.
  • An aspect of the present disclosure may provide a multilayer ceramic electronic component with improved warpage endurance and/or tensile endurance.
  • a multilayer ceramic electronic component may include: a ceramic body including a dielectric layer and first and second internal electrodes alternately exposed to first and second outer surfaces with the dielectric layer interposed therebetween; and first and second external electrodes disposed on the first and second outer surfaces of the ceramic body so as to be connected to the first and second internal electrodes, respectively.
  • the ceramic body may further include a protective layer including a protective layer dummy electrode disposed on at least one of upper and lower portions of the first and second internal electrodes, and the protective layer dummy electrode has a thickness ranging greater than to 1.2 times a thickness of each of the first and second internal electrodes.
  • a multilayer ceramic electronic component may include: a ceramic body including a dielectric layer and first and second internal electrodes alternately exposed to first and second outer surfaces with the dielectric layer interposed therebetween; and first and second external electrodes disposed on the first and second outer surfaces of the ceramic body so as to be connected to the first and second internal electrodes, respectively.
  • the ceramic body may further include a protective layer including a protective layer dummy electrode disposed on at least one of upper and lower portions of the first and second internal electrode, the number of stacked protective layer dummy electrodes per unit length in a thickness direction may be larger than the number of stacked first and second internal electrodes per unit length in a thickness direction of the ceramic body, and each of the plurality of protective layer dummy electrode may have a thickness ranging from greater than 0 to 0.6 times a thickness of each of the first and second internal electrodes.
  • FIG. 1 is a perspective view showing a multilayer ceramic electronic component according to an exemplary embodiment of the present disclosure and a mounting thereof;
  • FIG. 2 is a perspective view showing a form of an internal electrode of the multilayer ceramic electronic component according to an exemplary embodiment of the present disclosure
  • FIG. 3 is a side view of the multilayer ceramic electronic component according to the exemplary embodiment of the present disclosure having a thick protective layer dummy electrode;
  • FIG. 4 is a side view of the multilayer ceramic electronic component according to the exemplary embodiment of the present disclosure having a thin protective layer dummy electrode.
  • a multilayer ceramic electronic component according to an exemplary embodiment in the present disclosure particularly, a multilayer ceramic capacitor will hereinafter be described.
  • the multilayer ceramic electronic component according to the present disclosure is not limited thereto.
  • FIG. 1 is a perspective view showing a multilayer ceramic electronic component according to an exemplary embodiment of the present disclosure and a mounting thereof.
  • a multilayer ceramic electronic component 100 may include a ceramic body 110 and first and second external electrodes 131 and 132 , in which the multilayer ceramic electronic component 100 may be mounted ( 200 ) on first and second electrode pads 221 and 222 on a board 210 .
  • the ceramic body 110 may be formed of a hexahedron having opposite end surfaces in a length direction L, opposite side surfaces in a width direction W, and opposite side surfaces in a thickness direction T.
  • the ceramic body 110 may be formed by stacking a plurality of dielectric layers in the thickness direction T and then sintering the plurality of dielectric layers.
  • a shape and a dimension of the ceramic body 110 and the number (one or more) of stacked dielectric layers are not limited to those illustrated in the present exemplary embodiment.
  • the plurality of dielectric layers disposed in the ceramic body 110 may be in a sintered state, and adjacent dielectric layers may be integrated with each other so that boundaries therebetween are not readily apparent without using a scanning electron microscope (SEM).
  • SEM scanning electron microscope
  • the ceramic body 110 may have a form in which eight corners of the hexahedron are round. Therefore, durability and reliability of the ceramic body 110 may be improved, and structural reliability of the first and second external electrodes 131 and 132 at the corners may be improved.
  • the dielectric layer may have a thickness arbitrarily changed in accordance with a capacitance design of the multilayer ceramic electronic component 100 , and may include ceramic powders having a high dielectric constant, such as barium titanate (BaTiO 3 ) based powders or strontium titanate (SrTiO 3 ) based powders.
  • a material of the dielectric layer according to the present disclosure is not limited thereto.
  • various ceramic additives, organic solvents, plasticizers, binders, dispersants, and the like may be added to the ceramic powders according to an object of the present disclosure.
  • An average particle size of the ceramic powders used to form the dielectric layer is not particularly limited, and may be controlled in order to accomplish an object of the present disclosure.
  • the average particle size of the ceramic powders used to form the dielectric layer may be controlled to be 400 nm or less. Therefore, the multilayer ceramic electronic component 100 according to an exemplary embodiment in the present disclosure may be used as a component that needs to be miniaturized and have a high capacitance, such as an information technology (IT) component.
  • IT information technology
  • the dielectric layers may be formed by applying and then drying slurry including powders such as barium titanate (BaTiO 3 ) powders, or the like, to carrier films to prepare a plurality of ceramic sheets.
  • the ceramic sheets may be formed by mixing ceramic powders, a binder, and a solvent with one another to prepare slurry and manufacturing the slurry in a sheet shape having a thickness of several micrometers by a doctor blade method, but are not limited thereto.
  • the first and second external electrodes 131 and 132 may be disposed on outer surfaces (for example, one surface and the other surface in the length direction) of the ceramic body 110 to be connected to the first and second internal electrodes, respectively, and may be configured to electrically connect the first and second internal electrodes 121 and 122 and a board to each other.
  • the first and second external electrodes 131 and 132 may be formed of copper (Cu), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), lead (Pb) or the like, or alloys thereof.
  • first and second external electrodes 131 and 132 may include first and second electrode layers including Cu or Ni and first and second plating layers disposed on the first and second electrode layers and including Ni or Sn.
  • the first and second electrode layers may be formed by a method of dipping the ceramic body 110 in a paste including a metal component or a method of printing a conductive paste including a conductive metal on at least one surface of the ceramic body 110 in the length direction L, and may also be formed by a sheet transfer method or a pad transfer method.
  • the first and second plating layers may be formed by sputtering or an electric deposition, but the first and second plating layers are not limited by the above methods.
  • the first and second external electrodes 131 and 132 may be electrically connected to the first and second electrode pads 221 and 222 by first and second solders 230 .
  • the first and second solders 230 may be more closely coupled to the first and second external electrodes 131 and 132 according to a reflow process.
  • FIG. 2 is a perspective view showing a form of an internal electrode of the multilayer ceramic electronic component according to the exemplary embodiment of the present disclosure.
  • the ceramic body 110 may include the first and second internal electrodes 121 and 122 , and the dielectric layer disposed between the first and second internal electrodes 121 and 122 .
  • the first and second internal electrodes 121 and 122 are stacked so as to be alternately exposed to the first and second outer surfaces (for example, one end surface and the other end surface in the length direction) with the dielectric layer interposed therebetween so as to have different polarities.
  • the first internal electrodes 121 and the second internal electrodes 122 may be formed to be alternately exposed to one end surface and the other end surface of the ceramic body 110 in the length direction L of the ceramic body 110 in the stack direction of the dielectric layers by printing a conductive paste including a conductive metal, and may be electrically insulated from each other by each of the dielectric layers disposed therebetween.
  • first and second internal electrodes 121 and 122 may be electrically connected to the first and second external electrodes 131 and 132 formed on opposite end surfaces of the ceramic body 110 in the length direction L of the ceramic body 110 through portions alternately exposed to the opposite end surfaces of the ceramic body 110 in the length direction of the ceramic body 110 , respectively.
  • the first and second internal electrodes 121 and 122 may have an average particle size of 0.1 to 0.2 ⁇ m, and may be formed of a conductive paste for an internal electrode including 40 to 50 wt % of conductive metal powders, but are not limited thereto.
  • the conductive paste for an internal electrode may be applied to the ceramic sheets by a printing method, or the like, to form internal electrode patterns.
  • a method of printing the conductive paste may be a screen printing method, a gravure printing method, or the like, but is not limited thereto.
  • Two hundred or three hundred ceramic sheets on which the internal electrode patterns are printed may be stacked, pressed, and sintered to manufacture the ceramic body 110 .
  • a capacitance of the multilayer ceramic electronic component 100 may be in proportion to an area of a region in which the first and second internal electrodes 121 and 122 overlap each other.
  • a capacitance may be significantly increased even in a capacitor having the same size.
  • Thicknesses of the first and second internal electrodes 121 and 122 may be determined depending on the purpose, and may be, for example, 0.4 ⁇ m or less. In addition, the number of layers of the first and second internal electrodes 121 and 122 may be 400 or more. Therefore, the multilayer ceramic electronic component 100 may be used as a component that needs to be miniaturized and have a high capacitance, such as an information technology (IT) component.
  • IT information technology
  • the thickness of the dielectric layer corresponds to an interval between the first and second internal electrodes 121 and 122 , the smaller the thickness of the dielectric layer, the greater the capacitance of the multilayer ceramic electronic component 100 .
  • the conductive metal included in the conductive paste forming the first and second internal electrodes 121 and 122 may be nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), lead (Pb), or platinum (Pt), or alloys thereof.
  • the conductive metal according to the present disclosure is not limited thereto.
  • the multilayer ceramic electronic component 100 may be designed so that an average thickness of the dielectric layers is twice as large as that of the first and second internal electrodes 121 and 122 . Accordingly, the multilayer ceramic electronic device 100 may have the high withstand voltage characteristics so as to be used as electrical components.
  • the durability (for example, warpage endurance) of the ceramic body 110 may have high reliability when the width of the ceramic body 110 exceeds 0.5 times the thickness thereof.
  • FIG. 3 is a side view of the multilayer ceramic electronic component according to the exemplary embodiment of the present disclosure having a thick dummy electrode.
  • a length of the first and second internal electrodes 121 and 122 may be Li
  • a length of the ceramic body 110 may be (Li+Lm)
  • a length of the region in which the first and second internal electrodes 121 and 122 overlap each other may be Lo.
  • the ceramic body 110 may further include a protective layer disposed on at least one of upper and lower portions of the first and second internal electrodes 121 and 122 . Accordingly, the ceramic body 110 may improve durability against external impact (warpage, tensile, or the like).
  • the protective layer has a thickness of (Lb+Lc) when disposed only on one of the upper and lower portions of the first and second internal electrodes 121 and 122 , and has a thickness of ⁇ 2*(Lb+Lc) ⁇ when disposed on both the upper and lower portions thereof.
  • the thickness of the ceramic body 110 is ⁇ 2*(Lb+Lc)+La ⁇ .
  • La refers to a thickness of a capacitance forming region in which the first and second internal electrodes 121 and 122 are alternatively disposed with the dielectric layer therebetween
  • Lc refers to a thickness of an exterior portion of the protective layer, in which upper protective layer dummy electrodes 125 or lower protective layer dummy electrodes 126 are not disposed
  • Lb refers to a thickness of an inner portion of the protective layer, in which the upper protective layer dummy electrodes 125 or the lower protective layer dummy electrodes 126 are disposed.
  • the protective layer may include at least one of an upper protective layer dummy electrode 125 disposed over the first and second internal electrodes 121 and 122 and a lower protective layer dummy electrode 126 disposed under the first and second internal electrodes 121 and 122 .
  • the upper and lower protective layer dummy electrodes 125 and 126 may include the same material as the first and second internal electrodes 121 and 122 , and may be stacked by the same process while having a shape similar to that of the first and second internal electrodes 121 and 122 , but the shape of the upper and lower protective layer dummy electrodes 125 and 126 is not limited thereto.
  • ceramic may be a brittle material, and therefore may be cracked or broken when subjected to a strong tensile stress.
  • the protective layer including the upper and/or lower protective layer dummy electrodes 125 and 126 may further improve the durability against the external impact (bending, tensile, or the like).
  • the upper and lower protective layer dummy electrodes 125 and 126 may be designed focusing on strengthening the durability of the ceramic body 110 or suppressing the delamination without significantly contributing to the capacitance of the multilayer ceramic electronic component.
  • the thickness of the upper and lower protective layer dummy electrodes 125 and 126 may be designed more freely than the first and second internal electrodes 121 and 122 .
  • a step difference between the upper and/or lower protective layer dummy electrodes 125 and 126 and the dielectric layer and a step difference between the first and second internal electrodes 121 and 122 may be further increased. If the step difference exceeds a limit, the delamination may be caused in the ceramic body 110 .
  • T 21 and T 22 are a thickness of each of the upper and/or lower protective layer dummy electrodes 125 and 126
  • T 11 and T 12 are a thickness of each of the first and second internal electrodes 121 and 122 and a thickness of each of dummy first and second dummy electrodes 123 and 124 , respectively.
  • T 21 and T 22 may be the same as each other
  • T 11 and T 12 may be the same as each other.
  • the total number of the stacked first and second internal electrodes 121 and 122 is 94
  • the thickness of the ceramic body 110 is the same in all cases.
  • TABLE 1 Thickness The number ratio of stacked Occurrence of T21 dummy frequency of cracks or T22 electrodes due to 6 mm warpage stress to T11 (Upper/ Width Thickness or T12 Lower) direction direction Total Delamination 0.8 54/54 3/30 1/30 4/60 OK 1.0 53/53 3/30 2/30 5/60 OK 1.2 52/52 2/30 0/30 2/60 OK 1.4 48/48 1/30 0/30 1/60 NG
  • the multilayer ceramic electronic component includes the upper and/or lower protective layer dummy electrodes 125 and 126 having the thicknesses T 21 and T 22 ranging from greater than to 1.2 times the thickness T 11 and T 12 of the first and second internal electrodes 121 and 122 , respectively, thereby suppressing the delamination in the ceramic body 110 while having the strong strength for the external impact (warpage, tensile, or the like).
  • the number of the stacked upper and/or lower protective layer dummy electrodes 125 and 126 per unit length in the thickness direction may be smaller than the number of the stacked first and second internal electrodes 121 and 122 per unit length in the thickness direction.
  • the ceramic body 110 may further include first and second dummy electrodes 123 and 124 spaced from each other from the first and second internal electrodes 121 and 122 in the length direction, respectively.
  • the first and second dummy electrodes 123 and 124 may be disposed on a level the same as the first and second internal electrodes 121 and 122 , respective, and may be electrically connected to the second and first external electrodes 131 and 132 , respectively.
  • a spacing distance between the first and second internal electrodes 121 and 122 and the first and second dummy electrodes 123 and 124 in the length direction may be Lg.
  • a length of the first and second dummy electrodes 123 and 124 may be Ld, and may be longer than an extending length Le of the first and second external electrodes 131 and 132 in the length direction.
  • At least a part of the upper and/or lower protective layer dummy electrodes 125 and 126 may overlap the first and second dummy electrodes 123 and 124 when viewed in the thickness direction.
  • the delamination due to the step difference between the first and second internal electrodes 121 and 122 may be suppressed.
  • a portion of the upper protective layer dummy electrode 125 connected to the second external electrode 132 may overlap the space between the first internal electrode 121 and the first dummy electrode 123 .
  • a portion of the lower protective layer dummy electrode 126 connected to the first external electrode 131 may overlap the space between the second internal electrode 122 and the second dummy electrode 124 .
  • the distribution of the conductive material of the ceramic body 110 based on the length direction may be more balanced, so that the ceramic body 110 can have a more stable strength against the external impact (warpage, tensile, or the like).
  • the upper and/or lower protective layer dummy electrodes 125 and 126 may have the thicknesses T 21 and T 22 ranging from greater than to 1.2 times the thickness T 11 and T 12 of the first and second dummy electrodes 123 and 124 , respectively.
  • the multilayer ceramic electronic component may suppress the delamination in the ceramic body 110 while having strong strength against external impact (warpage, tensile, or the like).
  • FIG. 4 is a side view of the multilayer ceramic electronic component according to the exemplary embodiment of the present disclosure having a thin dummy electrode.
  • the upper and/or lower protective layer dummy electrodes 125 and 126 may have thicknesses T 23 and T 24 smaller than the thicknesses T 11 and T 12 of the first and second internal electrodes 121 and 122 .
  • the number of the stacked upper and/or lower protective layer dummy electrodes 125 and 126 per unit length in the thickness direction may be larger than the number of the stacked first and second internal electrodes 121 and 122 per unit length in the thickness direction.
  • the upper and/or lower protective layer dummy electrodes 125 and 126 may have the stronger strength against the external impact (warpage, tensile force, or the like).
  • T 23 or T 24 is a thickness of each of the upper and/or lower protective layer dummy electrodes 125 and 126
  • T 11 and T 12 are a thickness of each of the first and second internal electrodes 121 and 122 and a thickness of each of the first and second dummy electrodes 123 and 124 , respectively.
  • T 23 and T 24 may be the same as each other, and T 11 and T 12 may be the same as each other.
  • the total number of the stacked first and second internal electrodes 121 and 122 is 94, and the thickness of the ceramic body 110 is the same in all cases.
  • TABLE 2 Thickness The number ratio of stacked Occurrence of T23 dummy frequency of cracks due or T24 electrodes to 6 mm warpage stress to T11 (upper/ Width Thickness or T12 lower) direction direction Total Delamination 0.4 60/60 0/30 0/30 0/60 OK 0.6 57/57 0/30 0/30 0/60 OK 0.8 54/54 3/30 1/30 4/60 OK 1.0 53/53 3/30 2/30 5/60 OK
  • the multilayer ceramic electronic device includes the upper and/or lower protective layer dummy electrodes 125 and 126 having the thicknesses T 23 and T 24 ranging from greater than 0 to 0.6 times the thickness T 11 of the first and second internal electrodes 121 and 122 , respectively, thereby suppressing the delamination in the ceramic body 110 while having the strong strength for the external impact (warpage, tensile, or the like).
  • a volume ratio (for example, ⁇ Lb ⁇ T 23 *(the number of stacked dummy electrode)/Lb ⁇ ) from the uppermost layer to the lowermost layer of the plurality of upper or lower protective layer dummy electrodes 125 and 126 may be larger than that (for example, ⁇ La ⁇ T 11 /(the number of stacked internal electrodes)/La ⁇ ) of the first and second internal electrodes from the uppermost layer to the lowermost layer among the first and second internal electrodes 121 and 122 .
  • the ratio of the conductive material of the protective layer is higher than that of the conductive material in the region where the first and second internal electrodes 121 and 122 are disposed, such that the multilayer ceramic electronic component may have the relatively stronger strength.
  • the multilayer ceramic electronic component may have the strong strength without excessively increasing the number of stacked upper and/or lower protective layer dummy electrodes 125 and 126 .
  • the upper and/or lower protective layer dummy electrodes 125 and 126 may have the thicknesses T 23 and T 24 which range from 0.4 times to 0.6 times the thickness T 11 /T 12 of the first and second dummy electrodes 123 and 124 , respectively.
  • the multilayer ceramic electronic component may have the further improved warpage endurance and/or tensile endurance and suppress the occurrence of the delamination, without the substantial increase in volume.

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Abstract

A multilayer ceramic electronic component includes: a ceramic body including a dielectric layer and first and second internal electrodes alternately exposed to first and second outer surfaces with the dielectric layer interposed therebetween; and first and second external electrodes disposed on the first and second outer surfaces of the ceramic body so as to be connected to the first and second internal electrodes, respectively. The ceramic body further includes a protective layer including a protective layer dummy electrode disposed on at least one of upper and lower portions of the first and second internal electrodes, and the protective layer dummy electrode has a thickness ranging from greater than to 1.2 times or less a thickness of each of the first and second internal electrodes.

Description

CROSS-REFERENCE TO RELATED APPLICATION(S)
This application claims benefit of priority to Korean Patent Application No. 10-2018-0120591 filed on Oct. 10, 2018 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety.
TECHNICAL FIELD
The present disclosure relates to a multilayer ceramic electronic component.
BACKGROUND
A multilayer ceramic electronic component has been widely used as a component of an information technology (IT) device such as a computer, a personal digital assistant (PDA), a cellular phone, or the like, since it has a small size, implements high capacitance, and may be easily mounted. A multilayer ceramic electronic component has also been widely used as an electrical component, since it has high reliability and high strength characteristics.
Since the multilayer ceramic electronic component is widely used in electric components, warpage endurance and tensile endurance of the multilayer ceramic electronic component are becoming more important.
SUMMARY
An aspect of the present disclosure may provide a multilayer ceramic electronic component with improved warpage endurance and/or tensile endurance.
According to an aspect of the present disclosure, a multilayer ceramic electronic component may include: a ceramic body including a dielectric layer and first and second internal electrodes alternately exposed to first and second outer surfaces with the dielectric layer interposed therebetween; and first and second external electrodes disposed on the first and second outer surfaces of the ceramic body so as to be connected to the first and second internal electrodes, respectively. The ceramic body may further include a protective layer including a protective layer dummy electrode disposed on at least one of upper and lower portions of the first and second internal electrodes, and the protective layer dummy electrode has a thickness ranging greater than to 1.2 times a thickness of each of the first and second internal electrodes.
According to another aspect of the present disclosure, a multilayer ceramic electronic component may include: a ceramic body including a dielectric layer and first and second internal electrodes alternately exposed to first and second outer surfaces with the dielectric layer interposed therebetween; and first and second external electrodes disposed on the first and second outer surfaces of the ceramic body so as to be connected to the first and second internal electrodes, respectively. The ceramic body may further include a protective layer including a protective layer dummy electrode disposed on at least one of upper and lower portions of the first and second internal electrode, the number of stacked protective layer dummy electrodes per unit length in a thickness direction may be larger than the number of stacked first and second internal electrodes per unit length in a thickness direction of the ceramic body, and each of the plurality of protective layer dummy electrode may have a thickness ranging from greater than 0 to 0.6 times a thickness of each of the first and second internal electrodes.
BRIEF DESCRIPTION OF DRAWINGS
The above and other aspects, features, and advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
FIG. 1 is a perspective view showing a multilayer ceramic electronic component according to an exemplary embodiment of the present disclosure and a mounting thereof;
FIG. 2 is a perspective view showing a form of an internal electrode of the multilayer ceramic electronic component according to an exemplary embodiment of the present disclosure;
FIG. 3 is a side view of the multilayer ceramic electronic component according to the exemplary embodiment of the present disclosure having a thick protective layer dummy electrode; and
FIG. 4 is a side view of the multilayer ceramic electronic component according to the exemplary embodiment of the present disclosure having a thin protective layer dummy electrode.
 DETAILED DESCRIPTION
Hereinafter, exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings.
A multilayer ceramic electronic component according to an exemplary embodiment in the present disclosure, particularly, a multilayer ceramic capacitor will hereinafter be described. However, the multilayer ceramic electronic component according to the present disclosure is not limited thereto.
FIG. 1 is a perspective view showing a multilayer ceramic electronic component according to an exemplary embodiment of the present disclosure and a mounting thereof.
Referring to FIG. 1, a multilayer ceramic electronic component 100 according to an exemplary embodiment of the present disclosure may include a ceramic body 110 and first and second external electrodes 131 and 132, in which the multilayer ceramic electronic component 100 may be mounted (200) on first and second electrode pads 221 and 222 on a board 210.
The ceramic body 110 may be formed of a hexahedron having opposite end surfaces in a length direction L, opposite side surfaces in a width direction W, and opposite side surfaces in a thickness direction T. The ceramic body 110 may be formed by stacking a plurality of dielectric layers in the thickness direction T and then sintering the plurality of dielectric layers. A shape and a dimension of the ceramic body 110 and the number (one or more) of stacked dielectric layers are not limited to those illustrated in the present exemplary embodiment.
The plurality of dielectric layers disposed in the ceramic body 110 may be in a sintered state, and adjacent dielectric layers may be integrated with each other so that boundaries therebetween are not readily apparent without using a scanning electron microscope (SEM).
For example, the ceramic body 110 may have a form in which eight corners of the hexahedron are round. Therefore, durability and reliability of the ceramic body 110 may be improved, and structural reliability of the first and second external electrodes 131 and 132 at the corners may be improved.
The dielectric layer may have a thickness arbitrarily changed in accordance with a capacitance design of the multilayer ceramic electronic component 100, and may include ceramic powders having a high dielectric constant, such as barium titanate (BaTiO3) based powders or strontium titanate (SrTiO3) based powders. However, a material of the dielectric layer according to the present disclosure is not limited thereto. In addition, various ceramic additives, organic solvents, plasticizers, binders, dispersants, and the like, may be added to the ceramic powders according to an object of the present disclosure.
An average particle size of the ceramic powders used to form the dielectric layer is not particularly limited, and may be controlled in order to accomplish an object of the present disclosure. For example, the average particle size of the ceramic powders used to form the dielectric layer may be controlled to be 400 nm or less. Therefore, the multilayer ceramic electronic component 100 according to an exemplary embodiment in the present disclosure may be used as a component that needs to be miniaturized and have a high capacitance, such as an information technology (IT) component.
For example, the dielectric layers may be formed by applying and then drying slurry including powders such as barium titanate (BaTiO3) powders, or the like, to carrier films to prepare a plurality of ceramic sheets. The ceramic sheets may be formed by mixing ceramic powders, a binder, and a solvent with one another to prepare slurry and manufacturing the slurry in a sheet shape having a thickness of several micrometers by a doctor blade method, but are not limited thereto.
The first and second external electrodes 131 and 132 may be disposed on outer surfaces (for example, one surface and the other surface in the length direction) of the ceramic body 110 to be connected to the first and second internal electrodes, respectively, and may be configured to electrically connect the first and second internal electrodes 121 and 122 and a board to each other.
For example, the first and second external electrodes 131 and 132 may be formed of copper (Cu), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), lead (Pb) or the like, or alloys thereof.
For example, the first and second external electrodes 131 and 132 may include first and second electrode layers including Cu or Ni and first and second plating layers disposed on the first and second electrode layers and including Ni or Sn.
The first and second electrode layers may be formed by a method of dipping the ceramic body 110 in a paste including a metal component or a method of printing a conductive paste including a conductive metal on at least one surface of the ceramic body 110 in the length direction L, and may also be formed by a sheet transfer method or a pad transfer method.
The first and second plating layers may be formed by sputtering or an electric deposition, but the first and second plating layers are not limited by the above methods.
The first and second external electrodes 131 and 132 may be electrically connected to the first and second electrode pads 221 and 222 by first and second solders 230. For example, the first and second solders 230 may be more closely coupled to the first and second external electrodes 131 and 132 according to a reflow process.
FIG. 2 is a perspective view showing a form of an internal electrode of the multilayer ceramic electronic component according to the exemplary embodiment of the present disclosure.
Referring to FIG. 2, the ceramic body 110 may include the first and second internal electrodes 121 and 122, and the dielectric layer disposed between the first and second internal electrodes 121 and 122.
The first and second internal electrodes 121 and 122 are stacked so as to be alternately exposed to the first and second outer surfaces (for example, one end surface and the other end surface in the length direction) with the dielectric layer interposed therebetween so as to have different polarities.
The first internal electrodes 121 and the second internal electrodes 122 may be formed to be alternately exposed to one end surface and the other end surface of the ceramic body 110 in the length direction L of the ceramic body 110 in the stack direction of the dielectric layers by printing a conductive paste including a conductive metal, and may be electrically insulated from each other by each of the dielectric layers disposed therebetween.
That is, the first and second internal electrodes 121 and 122 may be electrically connected to the first and second external electrodes 131 and 132 formed on opposite end surfaces of the ceramic body 110 in the length direction L of the ceramic body 110 through portions alternately exposed to the opposite end surfaces of the ceramic body 110 in the length direction of the ceramic body 110, respectively.
For example, the first and second internal electrodes 121 and 122 may have an average particle size of 0.1 to 0.2 μm, and may be formed of a conductive paste for an internal electrode including 40 to 50 wt % of conductive metal powders, but are not limited thereto.
The conductive paste for an internal electrode may be applied to the ceramic sheets by a printing method, or the like, to form internal electrode patterns. A method of printing the conductive paste may be a screen printing method, a gravure printing method, or the like, but is not limited thereto. Two hundred or three hundred ceramic sheets on which the internal electrode patterns are printed may be stacked, pressed, and sintered to manufacture the ceramic body 110.
Therefore, when voltages are applied to the first and second external electrodes, electric charges may be accumulated between the first and second internal electrodes 121 and 122 facing each other. In this case, a capacitance of the multilayer ceramic electronic component 100 may be in proportion to an area of a region in which the first and second internal electrodes 121 and 122 overlap each other.
That is, when the area of the region in which the first and second internal electrodes 121 and 122 overlap each other is significantly increased, a capacitance may be significantly increased even in a capacitor having the same size.
Thicknesses of the first and second internal electrodes 121 and 122 may be determined depending on the purpose, and may be, for example, 0.4 μm or less. In addition, the number of layers of the first and second internal electrodes 121 and 122 may be 400 or more. Therefore, the multilayer ceramic electronic component 100 may be used as a component that needs to be miniaturized and have a high capacitance, such as an information technology (IT) component.
Since the thickness of the dielectric layer corresponds to an interval between the first and second internal electrodes 121 and 122, the smaller the thickness of the dielectric layer, the greater the capacitance of the multilayer ceramic electronic component 100.
The conductive metal included in the conductive paste forming the first and second internal electrodes 121 and 122 may be nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), lead (Pb), or platinum (Pt), or alloys thereof. However, the conductive metal according to the present disclosure is not limited thereto.
The larger the interval between the first and second internal electrodes 121 and 122, the more the withstand voltage characteristics of the ceramic body 110 may be improved.
When the multilayer ceramic electronic component 100 requires high withstand voltage characteristics such as electrical components, the multilayer ceramic electronic component 100 may be designed so that an average thickness of the dielectric layers is twice as large as that of the first and second internal electrodes 121 and 122. Accordingly, the multilayer ceramic electronic device 100 may have the high withstand voltage characteristics so as to be used as electrical components.
In addition, the durability (for example, warpage endurance) of the ceramic body 110 may have high reliability when the width of the ceramic body 110 exceeds 0.5 times the thickness thereof.
FIG. 3 is a side view of the multilayer ceramic electronic component according to the exemplary embodiment of the present disclosure having a thick dummy electrode.
Referring to FIG. 3, a length of the first and second internal electrodes 121 and 122 may be Li, a length of the ceramic body 110 may be (Li+Lm), and a length of the region in which the first and second internal electrodes 121 and 122 overlap each other may be Lo.
The ceramic body 110 may further include a protective layer disposed on at least one of upper and lower portions of the first and second internal electrodes 121 and 122. Accordingly, the ceramic body 110 may improve durability against external impact (warpage, tensile, or the like).
The protective layer has a thickness of (Lb+Lc) when disposed only on one of the upper and lower portions of the first and second internal electrodes 121 and 122, and has a thickness of {2*(Lb+Lc)} when disposed on both the upper and lower portions thereof. The thickness of the ceramic body 110 is {2*(Lb+Lc)+La}. Here, La refers to a thickness of a capacitance forming region in which the first and second internal electrodes 121 and 122 are alternatively disposed with the dielectric layer therebetween, Lc refers to a thickness of an exterior portion of the protective layer, in which upper protective layer dummy electrodes 125 or lower protective layer dummy electrodes 126 are not disposed, and Lb refers to a thickness of an inner portion of the protective layer, in which the upper protective layer dummy electrodes 125 or the lower protective layer dummy electrodes 126 are disposed.
The protective layer may include at least one of an upper protective layer dummy electrode 125 disposed over the first and second internal electrodes 121 and 122 and a lower protective layer dummy electrode 126 disposed under the first and second internal electrodes 121 and 122.
The upper and lower protective layer dummy electrodes 125 and 126 may include the same material as the first and second internal electrodes 121 and 122, and may be stacked by the same process while having a shape similar to that of the first and second internal electrodes 121 and 122, but the shape of the upper and lower protective layer dummy electrodes 125 and 126 is not limited thereto.
Generally, ceramic may be a brittle material, and therefore may be cracked or broken when subjected to a strong tensile stress.
Since the conductive material included in the upper and lower protective layer dummy electrodes 125 and 126 has a higher solidity than that of the general ceramic, the protective layer including the upper and/or lower protective layer dummy electrodes 125 and 126 may further improve the durability against the external impact (bending, tensile, or the like).
Unlike the first and second internal electrodes 121 and 122, the upper and lower protective layer dummy electrodes 125 and 126 may be designed focusing on strengthening the durability of the ceramic body 110 or suppressing the delamination without significantly contributing to the capacitance of the multilayer ceramic electronic component.
Therefore, the thickness of the upper and lower protective layer dummy electrodes 125 and 126 may be designed more freely than the first and second internal electrodes 121 and 122.
The thicker the upper and/or lower protective layer dummy electrodes 125 and 126, the stronger the strength against the external impact (warpage, tensile force, or the like) may be.
However, when the thickness of the upper and/or lower protective layer dummy electrodes 125 and 126 are too thick, a step difference between the upper and/or lower protective layer dummy electrodes 125 and 126 and the dielectric layer and a step difference between the first and second internal electrodes 121 and 122 may be further increased. If the step difference exceeds a limit, the delamination may be caused in the ceramic body 110.
The following Table 1 below shows the result of measuring the warpage endurance measurement and the result of measuring the delamination according to a ratio of T21 and T22 (thickness ratio) with respect to T11 and T12, in which T21 or T22 is a thickness of each of the upper and/or lower protective layer dummy electrodes 125 and 126, and T11 and T12 are a thickness of each of the first and second internal electrodes 121 and 122 and a thickness of each of dummy first and second dummy electrodes 123 and 124, respectively. T21 and T22 may be the same as each other, and T11 and T12 may be the same as each other. Here, the total number of the stacked first and second internal electrodes 121 and 122 is 94, and the thickness of the ceramic body 110 is the same in all cases.
TABLE 1
Thickness The number
ratio of stacked Occurrence
of T21 dummy frequency of cracks
or T22 electrodes due to 6 mm warpage stress
to T11 (Upper/ Width Thickness
or T12 Lower) direction direction Total Delamination
0.8 54/54 3/30 1/30 4/60 OK
1.0 53/53 3/30 2/30 5/60 OK
1.2 52/52 2/30 0/30 2/60 OK
1.4 48/48 1/30 0/30 1/60 NG
Referring to Table 1, the multilayer ceramic electronic component according to an embodiment of the present disclosure includes the upper and/or lower protective layer dummy electrodes 125 and 126 having the thicknesses T21 and T22 ranging from greater than to 1.2 times the thickness T11 and T12 of the first and second internal electrodes 121 and 122, respectively, thereby suppressing the delamination in the ceramic body 110 while having the strong strength for the external impact (warpage, tensile, or the like).
The larger the thickness of the ceramic body 110, the smaller the number of the stacked upper and/or lower protective layer dummy electrodes 125 and 126, so that the substantial size of the ceramic body 110 is not increased.
That is, the number of the stacked upper and/or lower protective layer dummy electrodes 125 and 126 per unit length in the thickness direction may be smaller than the number of the stacked first and second internal electrodes 121 and 122 per unit length in the thickness direction.
Meanwhile, referring to FIG. 3, the ceramic body 110 may further include first and second dummy electrodes 123 and 124 spaced from each other from the first and second internal electrodes 121 and 122 in the length direction, respectively. The first and second dummy electrodes 123 and 124 may be disposed on a level the same as the first and second internal electrodes 121 and 122, respective, and may be electrically connected to the second and first external electrodes 131 and 132, respectively. A spacing distance between the first and second internal electrodes 121 and 122 and the first and second dummy electrodes 123 and 124 in the length direction may be Lg. A length of the first and second dummy electrodes 123 and 124 may be Ld, and may be longer than an extending length Le of the first and second external electrodes 131 and 132 in the length direction.
At least a part of the upper and/or lower protective layer dummy electrodes 125 and 126 may overlap the first and second dummy electrodes 123 and 124 when viewed in the thickness direction.
Accordingly, the delamination due to the step difference between the first and second internal electrodes 121 and 122 may be suppressed.
A portion of the upper protective layer dummy electrode 125 connected to the second external electrode 132 may overlap the space between the first internal electrode 121 and the first dummy electrode 123.
A portion of the lower protective layer dummy electrode 126 connected to the first external electrode 131 may overlap the space between the second internal electrode 122 and the second dummy electrode 124.
Accordingly, the distribution of the conductive material of the ceramic body 110 based on the length direction may be more balanced, so that the ceramic body 110 can have a more stable strength against the external impact (warpage, tensile, or the like).
The upper and/or lower protective layer dummy electrodes 125 and 126 may have the thicknesses T21 and T22 ranging from greater than to 1.2 times the thickness T11 and T12 of the first and second dummy electrodes 123 and 124, respectively.
Accordingly, the multilayer ceramic electronic component according to an exemplary embodiment of the present disclosure may suppress the delamination in the ceramic body 110 while having strong strength against external impact (warpage, tensile, or the like).
FIG. 4 is a side view of the multilayer ceramic electronic component according to the exemplary embodiment of the present disclosure having a thin dummy electrode.
Referring to FIG. 4, the upper and/or lower protective layer dummy electrodes 125 and 126 may have thicknesses T23 and T24 smaller than the thicknesses T11 and T12 of the first and second internal electrodes 121 and 122.
Accordingly, the number of the stacked upper and/or lower protective layer dummy electrodes 125 and 126 per unit length in the thickness direction may be larger than the number of the stacked first and second internal electrodes 121 and 122 per unit length in the thickness direction.
Accordingly, the upper and/or lower protective layer dummy electrodes 125 and 126 may have the stronger strength against the external impact (warpage, tensile force, or the like).
The following Table 2 below shows the result of measuring the warpage endurance and the result of measuring the delamination according to a ratio of T23 and T24 (thickness ratio) with respect to T11 and T12, in which T23 or T24 is a thickness of each of the upper and/or lower protective layer dummy electrodes 125 and 126, and T11 and T12 are a thickness of each of the first and second internal electrodes 121 and 122 and a thickness of each of the first and second dummy electrodes 123 and 124, respectively. T23 and T24 may be the same as each other, and T11 and T12 may be the same as each other. Here, the total number of the stacked first and second internal electrodes 121 and 122 is 94, and the thickness of the ceramic body 110 is the same in all cases.
TABLE 2
Thickness The number
ratio of stacked Occurrence
of T23 dummy frequency of cracks due
or T24 electrodes to 6 mm warpage stress
to T11 (upper/ Width Thickness
or T12 lower) direction direction Total Delamination
0.4 60/60 0/30 0/30 0/60 OK
0.6 57/57 0/30 0/30 0/60 OK
0.8 54/54 3/30 1/30 4/60 OK
1.0 53/53 3/30 2/30 5/60 OK
Referring to Table 2, the multilayer ceramic electronic device according to an embodiment of the present disclosure includes the upper and/or lower protective layer dummy electrodes 125 and 126 having the thicknesses T23 and T24 ranging from greater than 0 to 0.6 times the thickness T11 of the first and second internal electrodes 121 and 122, respectively, thereby suppressing the delamination in the ceramic body 110 while having the strong strength for the external impact (warpage, tensile, or the like).
A volume ratio (for example, {Lb−T23*(the number of stacked dummy electrode)/Lb}) from the uppermost layer to the lowermost layer of the plurality of upper or lower protective layer dummy electrodes 125 and 126 may be larger than that (for example, {La−T11/(the number of stacked internal electrodes)/La}) of the first and second internal electrodes from the uppermost layer to the lowermost layer among the first and second internal electrodes 121 and 122.
Accordingly, the ratio of the conductive material of the protective layer is higher than that of the conductive material in the region where the first and second internal electrodes 121 and 122 are disposed, such that the multilayer ceramic electronic component may have the relatively stronger strength.
For example, when the upper and/or lower protective layer dummy electrodes 125 and 126 have the thickness T23 and T24 which range from 0.4 times to 0.6 times the thickness T11/T12 of the first and second internal electrodes 121 and 122, respectively, the multilayer ceramic electronic component may have the strong strength without excessively increasing the number of stacked upper and/or lower protective layer dummy electrodes 125 and 126.
Here, the upper and/or lower protective layer dummy electrodes 125 and 126 may have the thicknesses T23 and T24 which range from 0.4 times to 0.6 times the thickness T11/T12 of the first and second dummy electrodes 123 and 124, respectively.
As set forth above, according to the embodiment in the present disclosure, the multilayer ceramic electronic component may have the further improved warpage endurance and/or tensile endurance and suppress the occurrence of the delamination, without the substantial increase in volume.
While exemplary embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations could be made without departing from the scope of the present invention as defined by the appended claims.

Claims (10)

What is claimed is:
1. A multilayer ceramic electronic component comprising:
a ceramic body including a dielectric layer and first and second internal electrodes alternately exposed to first and second outer surfaces with the dielectric layer interposed therebetween; and
first and second external electrodes disposed on the first and second outer surfaces of the ceramic body so as to be connected to the first and second internal electrodes, respectively,
wherein the ceramic body further includes a protective layer including a protective layer dummy electrode disposed on at least one of upper and lower portions of the first and second internal electrodes, and
the protective layer dummy electrode has a thickness ranging from greater than to 1.2 times a thickness of each of the first and second internal electrodes.
2. The multilayer ceramic electronic component of claim 1, wherein the number of stacked protective layer dummy electrodes is plural, and
the number of stacked protective layer dummy electrodes per unit length in a thickness direction of the ceramic body is smaller than the number of stacked first and second internal electrodes per unit length in the thickness direction.
3. The multilayer ceramic electronic component of claim 2, wherein the ceramic body further includes first and second dummy electrodes spaced apart from each other from the first and second external electrodes in a length direction, respectively, and
at least portions of the protective layer dummy electrodes overlap the first and second dummy electrodes when viewed in the thickness direction.
4. The multilayer ceramic electronic component of claim 3, wherein the protective layer dummy electrode includes an upper protective dummy electrode disposed over the first and second internal electrodes and a lower protective layer dummy electrode disposed under the first and second internal electrodes,
one of the upper and lower protective layer dummy electrodes is connected to the second external electrode, and overlaps a space between the first internal electrode and the first dummy electrode when viewed in the thickness direction of the ceramic body, and
the other of the upper and lower protective layer dummy electrodes is connected to the first external electrode, and overlaps a space between the second internal electrode and the second dummy electrode when viewed in the thickness direction of the ceramic body.
5. The multilayer ceramic electronic component of claim 3, wherein each of the protective layer dummy electrodes has the thickness ranging from greater than to 1.2 times a thickness of each of the first and second dummy electrodes.
6. A multilayer ceramic electronic component comprising:
a ceramic body including a dielectric layer and first and second internal electrodes alternately exposed to first and second outer surfaces with the dielectric layer interposed therebetween; and
first and second external electrodes disposed on the first and second outer surfaces of the ceramic body so as to be connected to the first and second internal electrodes, respectively;
wherein the ceramic body further includes a protective layer including a plurality of protective layer dummy electrodes disposed on at least one of upper and lower portions of the first and second internal electrodes
the number of stacked protective layer dummy electrodes per unit length in a thickness direction of the ceramic body is larger than the number of stacked first and second internal electrodes per unit length in the thickness direction, and
each of the plurality of protective layer dummy electrodes has a thickness ranging from greater than 0 to 0.6 times a thickness of each of the first and second internal electrodes.
7. The multilayer ceramic electronic component of claim 6, wherein the ceramic body further includes first and second dummy electrodes spaced apart from each other from the first and second external electrodes in a length direction, respectively, and
at least portions of the plurality of protective layer dummy electrodes overlap the first and second dummy electrodes when viewed in the thickness direction.
8. The multilayer ceramic electronic component of claim 7, wherein the plurality of protective layer dummy electrodes include a plurality of upper protective dummy electrodes disposed over the first and second internal electrodes and a plurality of lower protective layer dummy electrodes disposed under the first and second internal electrodes,
one of the plurality of upper and lower protective layer dummy electrodes is connected to the second external electrode, and overlaps a space between the first internal electrode and the first dummy electrode when viewed in the thickness direction of the ceramic body, and
the other of the plurality of upper and lower protective layer dummy electrodes is connected to the first external electrode, and overlaps a space between the second internal electrode and the second dummy electrode when viewed in the thickness direction of the ceramic body.
9. The multilayer ceramic electronic component of claim 8, wherein a volume ratio from an uppermost layer to a lowermost layer of the plurality of upper or lower protective layer dummy electrodes is larger than that of the first and second internal electrodes from an uppermost layer to a lowermost layer among the first and second internal electrodes.
10. The multilayer ceramic electronic component of claim 8, wherein each of the plurality of protective layer dummy electrodes has a thickness, which is 0.4 times or more and 0.6 times or less the thickness of each of the first and second internal electrodes, and is 0.4 times or more and 0.6 times or less a thickness of each of the first and second dummy electrodes.
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11114241B2 (en) * 2018-10-10 2021-09-07 Samsung Electro-Mechanics Co., Ltd. Multilayer ceramic electronic component
US20220085253A1 (en) * 2018-12-27 2022-03-17 Denka Company Limited Phosphor substrate, light emitting substrate, and lighting device
US12027652B2 (en) 2018-12-27 2024-07-02 Denka Company Limited Phosphor substrate, light emitting substrate, and lighting device
US12040436B2 (en) 2018-12-27 2024-07-16 Denka Company Limited Phosphor substrate, light emitting substrate, and lighting device
US12068438B2 (en) 2018-12-27 2024-08-20 Denka Company Limited Phosphor substrate, light emitting substrate, and lighting device
US12107196B2 (en) 2018-12-27 2024-10-01 Denka Company Limited Phosphor substrate, light emitting substrate, and lighting device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020202220A (en) * 2019-06-07 2020-12-17 株式会社村田製作所 Multilayer ceramic electronic component
KR102803436B1 (en) 2020-12-14 2025-05-07 삼성전기주식회사 Multilayered electronic component
CN120129948A (en) * 2022-11-30 2025-06-10 株式会社村田制作所 Multilayer ceramic electronic components

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006237078A (en) 2005-02-22 2006-09-07 Kyocera Corp Multilayer electronic components and multilayer ceramic capacitors
US20060203420A1 (en) * 2005-03-10 2006-09-14 Tdk Corporation Multi-terminal type laminated capacitor and manufacturing method thereof
US20070145449A1 (en) * 2005-12-22 2007-06-28 Ngk Spark Plug Co., Ltd. Capacitor to be incorporated in wiring substrate, method for manufacturing the capacitor, and wiring substrate
US8072732B2 (en) * 2007-04-10 2011-12-06 Ngk Spark Plug Co., Ltd. Capacitor and wiring board including the capacitor
US20120019981A1 (en) * 2010-07-21 2012-01-26 Murata Manufacturing Co., Ltd. Ceramic electronic component
US20120075766A1 (en) * 2010-09-28 2012-03-29 Murata Manufacturing Co., Ltd. Multilayer ceramic electronic component
US20150096795A1 (en) * 2013-10-08 2015-04-09 Samsung Electro-Mechanics Co., Ltd. Multilayer ceramic capacitor and board having the same mounted thereon
KR20150096909A (en) 2014-02-17 2015-08-26 삼성전기주식회사 Multi-layer ceramic electronic part and method for manufacturing the same
US20190172646A1 (en) * 2017-12-06 2019-06-06 Samsung Electro-Mechanics Co., Ltd. Multilayer capacitor
US20200043663A1 (en) * 2018-08-01 2020-02-06 Samsung Electro-Mechanics Co., Ltd. Multilayer capacitor

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4581194B2 (en) 2000-07-13 2010-11-17 パナソニック株式会社 Chip-type electronic components
JP4905498B2 (en) * 2009-04-22 2012-03-28 株式会社村田製作所 Multilayer ceramic electronic components
KR20130104338A (en) * 2012-03-13 2013-09-25 삼성전기주식회사 Multi-layered ceramic electronic component and manufacturing method of the same
KR101444540B1 (en) * 2012-11-20 2014-09-24 삼성전기주식회사 Multi-layered ceramic capacitor, mounting structure of circuit having thereon multi-layered ceramic capacitor and packing unit for multi-layered ceramic capacitor
KR102067173B1 (en) * 2013-02-25 2020-01-15 삼성전기주식회사 Multi-layered ceramic capacitor and manufacturing method of the same
KR101412940B1 (en) * 2013-03-29 2014-06-26 삼성전기주식회사 Multi-layered ceramic capacitor and mounting circuit of multi-layered ceramic capacitor
JP6314466B2 (en) * 2013-12-13 2018-04-25 Tdk株式会社 Multilayer ceramic electronic components
KR102089694B1 (en) * 2014-04-30 2020-03-16 삼성전기주식회사 Multi-layered ceramic electronic component
JP2016021437A (en) * 2014-07-11 2016-02-04 太陽誘電株式会社 Multilayer capacitor and method for manufacturing the same
KR101598297B1 (en) * 2014-10-06 2016-02-26 삼성전기주식회사 Multi-layered ceramic electronic component and mounting circuit thereof
KR102149791B1 (en) * 2015-02-13 2020-08-31 삼성전기주식회사 Multi-layered ceramic electronic part and board having the same
KR101933416B1 (en) * 2016-12-22 2019-04-05 삼성전기 주식회사 Capacitor Component
KR102653215B1 (en) * 2018-10-10 2024-04-01 삼성전기주식회사 Multilayer ceramic electronic component

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006237078A (en) 2005-02-22 2006-09-07 Kyocera Corp Multilayer electronic components and multilayer ceramic capacitors
US20060203420A1 (en) * 2005-03-10 2006-09-14 Tdk Corporation Multi-terminal type laminated capacitor and manufacturing method thereof
US20070145449A1 (en) * 2005-12-22 2007-06-28 Ngk Spark Plug Co., Ltd. Capacitor to be incorporated in wiring substrate, method for manufacturing the capacitor, and wiring substrate
US8072732B2 (en) * 2007-04-10 2011-12-06 Ngk Spark Plug Co., Ltd. Capacitor and wiring board including the capacitor
US20120019981A1 (en) * 2010-07-21 2012-01-26 Murata Manufacturing Co., Ltd. Ceramic electronic component
US20120075766A1 (en) * 2010-09-28 2012-03-29 Murata Manufacturing Co., Ltd. Multilayer ceramic electronic component
US20150096795A1 (en) * 2013-10-08 2015-04-09 Samsung Electro-Mechanics Co., Ltd. Multilayer ceramic capacitor and board having the same mounted thereon
KR20150096909A (en) 2014-02-17 2015-08-26 삼성전기주식회사 Multi-layer ceramic electronic part and method for manufacturing the same
US20190172646A1 (en) * 2017-12-06 2019-06-06 Samsung Electro-Mechanics Co., Ltd. Multilayer capacitor
US20200043663A1 (en) * 2018-08-01 2020-02-06 Samsung Electro-Mechanics Co., Ltd. Multilayer capacitor

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11114241B2 (en) * 2018-10-10 2021-09-07 Samsung Electro-Mechanics Co., Ltd. Multilayer ceramic electronic component
US20220085253A1 (en) * 2018-12-27 2022-03-17 Denka Company Limited Phosphor substrate, light emitting substrate, and lighting device
US12027652B2 (en) 2018-12-27 2024-07-02 Denka Company Limited Phosphor substrate, light emitting substrate, and lighting device
US12040436B2 (en) 2018-12-27 2024-07-16 Denka Company Limited Phosphor substrate, light emitting substrate, and lighting device
US12068438B2 (en) 2018-12-27 2024-08-20 Denka Company Limited Phosphor substrate, light emitting substrate, and lighting device
US12100788B2 (en) * 2018-12-27 2024-09-24 Denka Company Limited Phosphor substrate, light emitting substrate, and lighting device
US12107196B2 (en) 2018-12-27 2024-10-01 Denka Company Limited Phosphor substrate, light emitting substrate, and lighting device

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KR102653215B1 (en) 2024-04-01
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US20200350122A1 (en) 2020-11-05
US11114241B2 (en) 2021-09-07
KR20190121200A (en) 2019-10-25

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