TWM641291U - Probe card structure - Google Patents

Abstract

A probe card structure includes a non-conductive substrate, a circuit layer and a plurality of probes. The non-conductive substrate has no circuit. The circuit layer is arranged on the bearing surface of the non-conductive substrate. The plurality of probes are arranged on the circuit layer, and electrically connected with the circuit layer.

Description

Probe card structure

The present invention relates to a probe card structure, and in particular to a thin-film probe card structure.

Generally speaking, current probe cards use a multilayer circuit substrate as a carrier. However, due to the large pores of the aforementioned multilayer circuit substrate, if other components (such as circuit layers or probes, etc.) are to be formed on it, it often has Difficulties in coplanarity with the probes in molding, and then there will be problems in yield. Therefore, how to improve the yield rate of the probe card is an important issue to be solved urgently.

The present invention provides a probe card structure that can improve the yield of the probe card.

A probe card structure created by the invention includes a non-conductive substrate, a circuit layer and a plurality of probes. A non-conductive substrate has no lines. The circuit layer is disposed on the carrying surface of the non-conductive substrate. A plurality of probes are disposed on the circuit layer and electrically connected to the circuit layer.

In an embodiment of the present invention, the circuit layer is composed of at least one dielectric layer and at least one conductive pattern.

In an embodiment of the novel creation, each of the above-mentioned probes has a single-layer structure.

In an embodiment of the present invention, each of the above-mentioned probes is a stacked structure.

In an embodiment of the present invention, the above-mentioned probe card structure further includes a plurality of pads disposed between the plurality of probes and the circuit layer.

In an embodiment of the present invention, the above-mentioned probe card structure further includes a seed layer disposed between the pads and the circuit layer.

In an embodiment of the present invention, the above-mentioned probe card structure further includes a plurality of conductive layers disposed on the plurality of probes.

In an embodiment of the present invention, the above-mentioned non-conductive substrate has a thickness between 0.5 millimeters (mm) and 5 millimeters.

In an embodiment of the present invention, the above-mentioned probe card structure further includes a ring fixing element disposed on the circuit layer and surrounding the probes.

In an embodiment of the present invention, the height of each of the above-mentioned probes is between 10 micrometers (μm) and 120 micrometers.

Based on the above, the new creation can effectively reduce the warping degree of the probe card by introducing a non-conductive substrate without lines, improve the stability of the process, increase the support strength and the flatness of the needle height, and further improve the probe card. The yield rate of pin card structure.

In order to make the above-mentioned features and advantages of the new creation more obvious and easy to understand, the following specific examples are given together with the attached drawings for detailed description as follows.

10, 20, 30: photoresist

100, 200, 300: probe card structure

110: Non-conductive substrate

110T, 120T: Thickness

120: line layer

121: dielectric layer

122: Conductive pattern

130, 230: probe

130H: height

231: Part 1

232: Part Two

240: conductive layer

350: ring fixing element

OP1, OP2, OP3, OP4: opening

FIG. 1A is a partial cross-sectional schematic diagram of the structure of the probe card according to the first embodiment of the new creation.

1B to 1G are partial cross-sectional schematic diagrams of the manufacturing method of the probe card structure according to the first embodiment of the present invention.

FIG. 2A is a partial cross-sectional schematic view of the structure of the probe card according to the second embodiment of the present invention.

2B to 2C are partial cross-sectional schematic diagrams of the manufacturing method of the probe card structure according to the second embodiment of the present invention.

Fig. 3 is a partial cross-sectional schematic diagram of the structure of the probe card according to the third embodiment of the new creation.

Refer to the drawings of this embodiment to more fully describe the new creation. However, the novel invention can also be embodied in various forms and should not be limited to the embodiments described herein. The thickness, size or magnitude of layers or regions in the drawings may be exaggerated for clarity. The same or similar reference numbers indicate the same or similar elements, and the following paragraphs will not repeat them one by one.

Directional terms (eg, up, down, right, left, front, back, top, bottom) as used herein are used pictorially by reference only and are not intended to imply absolute orientation.

It should be understood that although the terms "first", "second", etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, and/or sections should not be constrained by limitations of these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this novel creation belongs.

FIG. 1A is a partial cross-sectional schematic diagram of the structure of the probe card according to the first embodiment of the new creation. Please refer to FIG. 1A, in this embodiment, the probe card structure 100 includes a non-conductive substrate 110, a circuit layer 120 and a plurality of probes 130, wherein the non-conductive substrate 110 does not have a circuit, that is, the non-conductive substrate 110 Non-circuit board form, for example, the non-conductive substrate 110 can be glass, sapphire substrate, silicon carbide (SiC) substrate, ceramic substrate, silicon wafer, diamond carbon (DLC) and other inorganic rigid substrates. In addition, the circuit layer 120 is disposed on the carrying surface 110 a of the non-conductive substrate 110 , and a plurality of probes 130 are disposed on the circuit layer 120 and electrically connected to the circuit layer 120 . Accordingly, the introduction of the non-conductive substrate 110 without lines in this embodiment can effectively improve the stability of the manufacturing process, increase the support strength and pin height flatness, and further improve the yield rate of the probe card structure 100 .

Furthermore, due to the mechanical strength and characteristics of the non-conductive substrate 110 Compared with circuit substrates or circuit boards, they are more suitable for carrying structures. Therefore, in this embodiment, the combination of non-conductive substrate 110, circuit layer 120 and probes 130 can effectively improve the stability of the manufacturing process and increase the support strength. and flatness, thereby further improving the yield of the probe card structure 100 .

In some embodiments, the thickness 110T of the non-conductive substrate 110 is between 0.5 mm and 5 mm, for example, the thickness 110T of the non-conductive substrate 110 is between 0.5 mm and 1.8 mm, but the present invention Not limited to this.

In some embodiments, the circuit layer 120 is composed of at least one dielectric layer 121 and at least one conductive pattern 122, wherein the material of the dielectric layer 121 is, for example, polyimide (P1), benzocyclobutene (benzocyclobutene, BCB), polybenzoxazole (polybenzoxazole, PBO) or other suitable dielectric materials, the material of the conductive pattern 122 is, for example, metal (such as copper, aluminum, nickel, gold, silver, tin, chromium, platinum, titanium) or other suitable conductive materials. In addition, the present invention does not limit the number of layers of the circuit layer 120, and the number of layers of the circuit layer 120 can be determined according to actual design requirements.

In some embodiments, the thickness 120T of the wiring layer 120 is between 3 microns and 25 microns, but the present invention is not limited thereto.

In some embodiments, the material of the probe 130 is, for example, copper, aluminum, nickel, cobalt, gold, platinum or other suitable conductive or alloy materials.

In this embodiment, the probe 130 may have a single-layer structure, but the present invention is not limited thereto. In other embodiments, the probe may have different implementations. In addition, the shape of the probe 130 may be cylindrical, conical or other suitable shapes, and the present invention is not limited thereto.

In some embodiments, the height 130H of each probe 130 is between 10 microns and 120 microns, for example, the height 130H of each probe 130 is between 15 microns and 80 microns, but the present invention Not limited to this.

In some embodiments, in order to further enhance the bondability between the probes 130 and the circuit layer 120, the probe card structure 100 further includes a plurality of pads 102 and a seed layer 104, wherein the pads 102 are disposed between the probes 130 and the circuit layer 120, and the seed layer 104 is disposed between the pad 102 and the circuit layer 120, but the present invention is not limited thereto. Here, the material of the pad 102 is, for example, copper, chromium, nickel, aluminum, and the material of the seed layer 104 is, for example, copper, titanium, titanium-tungsten.

A main process of the probe card structure 100 of the present invention is described below by means of diagrams, but these processes are not intended to limit the manufacturing method of the probe card structure of the present invention, and are only illustrative.

1B to 1G are partial cross-sectional schematic diagrams of the manufacturing method of the probe card structure according to the first embodiment of the present invention. Please refer to FIG. 1B , firstly, a non-conductive substrate 110 is provided, and then, a circuit layer 120 is formed on the non-conductive substrate 110 , wherein at least one dielectric layer 121 and at least one conductive pattern 122 are formed in the circuit layer 120 . Here, the wiring layer 120 is formed by, for example, a physical vapor deposition (PVD) process or other suitable processes to form corresponding film layers.

Referring to FIG. 1C , a part of the dielectric layer 121 of the circuit layer 120 is removed to form an opening OP1 exposing the portion of the conductive pattern 122 to be electrically connected. The removal method is, for example, laser drilling on the dielectric layer 121. Hole manufacturing process, but the new creation is not limited to this.

Referring to FIG. 1D , the seed material layer 104 a is completely formed on the wiring layer 120 . Next, a photoresist 10 with an opening OP2 is formed on the seed material layer 104 a by a litho process for subsequent metal deposition processes. Here, the photoresist can be a positive photoresist or a negative photoresist.

Referring to FIG. 1E , a physical vapor deposition (PVD) deposition process is performed through the opening OP2 to form a pad 102 . Then, the photoresist 10 can be removed by a suitable method.

Referring to FIG. 1A , FIG. 1F and FIG. 1G , another photoresist 20 (as shown in FIG. 1F ) having an opening OP3 is formed on the circuit layer 120 by photolithography process. Then, a plating process is performed through the opening OP3 to form the probe 130 (as shown in FIG. 1G ). Then, the photoresist 20 can be removed in a suitable manner. In addition, the seed material layer 104a not covered by the pads 102 can be removed by an etching process, so that the probe card structure 100 of FIG. 1A is roughly completed.

It must be noted here that the following embodiments continue to use the component numbers and part of the content of the above-mentioned embodiments, wherein the same or similar numbers are used to indicate the same or similar components, and the description of the same technical content is omitted, and the description of the omitted part Reference can be made to the aforementioned embodiments, and the following embodiments will not be repeated.

FIG. 2A is a partial cross-sectional schematic view of the structure of the probe card according to the second embodiment of the present invention. Please refer to FIG. 2A , the difference between the probe card structure 200 of this embodiment and the probe card structure 100 of the previous embodiment is that each probe 230 of the probe card structure 200 of this embodiment is a stacked structure. Further, the probe 230 at least includes a first part 231 and a second part 232 stacked on each other (considered as a double-layer structure), and the second part 232 may be a smaller size than the first portion 231, but the novel creation is not limited thereto. It should be noted that this new creation does not limit the number of probe stacked layers, as long as the probe has at least two stacks, it belongs to the protection scope of this new creation.

In this embodiment, the probe card structure 200 further includes a plurality of conductive layers 240 to enhance the durability of the probe card structure 200, wherein the materials of the conductive layers 240 can be different from the probes 230, for example, the conductive layer 240 Materials such as nickel, cobalt, palladium, platinum, gold, tungsten, rhodium, ruthenium or alloys thereof, but the present invention is not limited thereto.

A main process of the probe card structure 200 of the present invention is described below by means of diagrams, but these processes are not intended to limit the manufacturing method of the probe card structure of the present invention, and are only illustrative.

2B to 2C are partial cross-sectional schematic diagrams of the manufacturing method of the probe card structure according to the second embodiment of the present invention. Please refer to FIG. 2B, following FIG. 1G, in order to further form a stack structure, a photoresist 30 having an opening OP4 can be formed by a photolithography process, wherein the probe 130 in FIG. 1G can be regarded as the first probe 230 in this embodiment. Part 231. Then, an electroplating process is performed through the opening OP4 to form the second portion 232 of the probe 230 .

Please refer to FIG. 2A and FIG. 2C , and then, remove the photoresist 30 by a suitable method. In addition, the seed material layer 104a not covered by the pad 102 can be removed by an etching process, and then the conductive layer 240 can be formed by electroless plating. In this way, the probe in FIG. 2A can be roughly completed. Needle card structure 200.

Fig. 3 is a partial cross-sectional schematic diagram of the structure of the probe card according to the third embodiment of the new creation. Please refer to Fig. 3, the probe card structure 300 of the present embodiment and the probe of Fig. 2A The main difference of the card structure 200 is that the probe card structure 300 of this embodiment further includes a ring-fixed element 350 disposed on the circuit layer 120 and surrounding the probes 130 to assist the integrally formed cylindrical probes 130 to improve The problem is that the lateral structure of the probe 130 is weaker. In addition, the probe card structure 300 of this embodiment is not a stacked probe, but with the ring fixing element 350, compared with the stacked probe, it is easier to achieve no obvious eccentricity of the needle tip, and because no layer stacking, so the yield rate can be effectively improved, but the new creation is not limited to this.

It should be noted that the probes created by the present invention are not limited to the above-mentioned implementations and manufacturing processes, as long as the structure of the probe card has a non-conductive substrate without lines, stacked forms of circuit layers and probes all belong to The scope of protection of this new creation.

To sum up, since the mechanical strength and characteristics of the non-conductive substrate are more suitable for the load-carrying structure than the circuit substrate or circuit board, this embodiment uses the combination of the non-conductive substrate, the circuit layer and the probe , can effectively improve the stability of the manufacturing process, increase the support strength and pin height flatness, and further improve the yield rate of the probe card structure.

Although the present invention has been disclosed above with the embodiment, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field may make some changes and modifications without departing from the spirit and scope of the novel invention. , so the scope of protection of new creations shall be subject to those defined in the scope of the attached patent application.

100:Probe card structure

102: Pad

104: Seed layer

110: Non-conductive substrate

110T, 120T: Thickness

120: line layer

121: dielectric layer

122: Conductive pattern

130: probe

130H: height

Claims (10)

A probe card structure, comprising: a non-conductive substrate having a load-bearing surface, wherein the non-conductive substrate has no lines; a line layer arranged on the bearing surface; and A plurality of probes are arranged on the circuit layer and electrically connected with the circuit layer. The probe card structure according to claim 1, wherein the circuit layer is composed of at least one dielectric layer and at least one conductive pattern. The probe card structure according to claim 1, wherein each of the probes is a single-layer structure. The probe card structure as claimed in claim 1, wherein each of the probes is a stacked structure. The probe card structure according to claim 1 further includes a plurality of pads disposed between the plurality of probes and the circuit layer. The probe card structure as claimed in claim 5 further includes a seed layer disposed between the plurality of pads and the circuit layer. The probe card structure according to claim 1 further includes a plurality of conductive layers disposed on the plurality of probes. The probe card structure according to claim 1, wherein the thickness of the non-conductive substrate is between 0.5 mm and 5 mm. The probe card structure as claimed in claim 1 further includes a ring fixing element disposed on the circuit layer and surrounding the probes. The probe card structure according to claim 1, wherein the height of each of the probes is between 10 microns and 120 microns.

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