TWM269283U - Semiconductor tray - Google Patents

Semiconductor tray Download PDF

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Publication number
TWM269283U
TWM269283U TW94200064U TW94200064U TWM269283U TW M269283 U TWM269283 U TW M269283U TW 94200064 U TW94200064 U TW 94200064U TW 94200064 U TW94200064 U TW 94200064U TW M269283 U TWM269283 U TW M269283U
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Taiwan
Prior art keywords
semiconductor
tray
plate member
group
side plate
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TW94200064U
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Chinese (zh)
Inventor
Tsung-Kuen Li
Jiun-Shian Huang
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Hwa Shu Entpr Co Ltd
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Application filed by Hwa Shu Entpr Co Ltd filed Critical Hwa Shu Entpr Co Ltd
Priority to TW94200064U priority Critical patent/TWM269283U/en
Publication of TWM269283U publication Critical patent/TWM269283U/en

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Description

M269283 八、新型說明: 【新型所屬之技術領域】 本新型是有關於一種托盤 特別是指一種半導體托盤 【先前技術】 疋用以承載多數個半 集體一同進行半導體 半導體托盤(業界俗稱tray盤) 導體晶片,以使該等晶片便於運輪或 製程令的某些處理或測試程序。 參閱圖卜習知半導體托盤1是包括有-頂板件η、-環設於該頂板件η之邊緣並朝下延伸之側板件12、複數個 设置在該頂板件u之頂面上而彼此以_預定距離相隔且呈 矩陣式排列的承放單元13,以及_凸伸而環設於該頂板件 η之頂面近㈣緣處的定位單元14。料承放單元13是個 別用來承放一半導體晶片2,而該側板件12是具有一寬度a 配合參閱圖2,該頂板件n之底面與該側板件i2,是 界定出-容置空間15,因此,當二習知半導體托盤"目互 隹唛時,位於下方之半導體托盤1的該定位單元14,是被 谷置於位於上方之半導體托盤1的容置空間15内。 當多個(在此以兩個半導體托盤丨為範例)半導體托 盤1的各承放單元13皆安放好晶片,再將該兩半導體托盤 1相互堆疊並藉由該綑帶組3綑紮完畢後,即會輸送至下一 道製作或測試程序作業,或者是直接出貨給客戶;然而, 在貫際作業中卻常發現到,由於該綑帶組3將該兩半導體 M269283 托盤1緊密綑紮的關係,於是在該側板件12之各打帶點處 121 (即直接承叉相對應之綑帶組3所施予之力道的地方) ,易因無法承受垂直方向之綑綁力量而破裂,同時,其裂 痕的方向則幾呈水平。 就已產生裂痕的半導體托盤丨而言,由於其結構已然 遭受破壞,使得後續之使用壽命大為縮短,故若是再承受 其他應力(例如之往後該綑帶組3之絪紮力量,或是隨著 所承載的晶片接受嚴苛的環境條件測試,亦即接受高溫高 壓、巨大溫差變化等外在應力),將會加速該半導體托盤i 結構之整體性的毀壞,於是半導體晶片商又需額外再支付 成本以購買新的半導體托盤1 ;再者,半導體托盤1之製造 商也可能因其所生產之半導體托盤丨不堪使用,使其所製 造半導體托盤1的品質備受質疑,甚至影響到製造商之商 譽。 若是相對地降低該綑帶組3綑紮的力道,似乎是有助 於避免該兩半導體托盤丨之打帶點處121受力過大而龜裂 的困擾,但是,當該綑帶組3綑紮的力道不足時,又可能 會讓其中相鄰之兩半導體托盤〗易在受外力撞擊後而相互 錯移’使得所承載的晶片受損或毀壞,影響晶片品質,增 加晶片不良率。 因此,如何使半導體托盤1之打帶點處121的結構能 抵抗該綑帶組綑綁之力量,以使其不會因此而龜裂,同時 讓其使用壽命更臻延長,已然成為相關業者亟思改良之處 6 M269283 【新型内容】 因此,本新型之目的,即在提供一種更能承受一綑帶 組綑糸之力i ’·以相對延長其使用壽命的半導體托盤。 於是,本新型半導體托盤,可複數個彼此相 互堆疊並 受一綑帶組綑紮,該半導體托盤包含一平板盤體、複數個 承放單元,及一定位單元。 該平板盤體是概呈方形且包括一頂板件,該頂板件則 具有一頂面與一反向於該頂面之底面,而該平板盤體更包 括一環繞該頂板件之邊緣而朝該底面之方向延伸的側板件 ,且該側板件之遠離該頂板件的邊緣是凹陷有一強化槽組 ,而該側板件與該底面界定出一容置空間。該等承放單元 是没置在該平板盤體之頂面上,而彼此以一預定距離相隔 且呈矩陣式排列,並個別用來承放一半導體晶片。該定位 單元疋凸伸而環設於該平板盤體之頂面的近外周緣處,當 將二半導體托盤相互堆疊時,位於下方之半導體托盤的該 定位單元,與該等承放單元,皆是被容置在位於上方之半 導體托盤的該容置空間内,且該綑帶組繞紮過最下方之半 導體托盤的各強化槽組内,以綑紮而固定該等半導體托盤 〇 因此’就各半導體托盤之側板件而言,該綑紮之力的 作用力矩相對變小,於是該綑紮之力量對於該等半導體托 盤的側板件結構破壞性將相對降低。 【實施方式】 有關本新型之前述及其他技術内容、特點與功效,在 M269283 以下配σ參考圖式之一較佳實施例的詳細說明中,將可清 楚的呈現。 4閱圖3,本新型半導體托盤之較佳實施例包含一平板 盜體4、複數個承放單元5,以及一定位單元ό。 該平板盤體4是概呈方形,且包括一頂板件41,該頂 板件41具有一頂面411與一反向於該頂面411之底面412 而°亥平板盤體4更包括一自該頂板件41之邊緣朝該底面 412之方向延伸的側板件42,且該側板件42之遠離該頂板 件41的邊緣421是凹陷有一強化槽組422,該側板件42與 4底面412則界定出—如圖4所示之容置空間413。而複數 個承放單% 5,則是被設置在該平板盤體4之頂板件41上 ,且彼此以一預定距離相隔且呈矩陣式排列,並個別用來 承放 >圖1所示之半導體晶片2。該定位單元6,則是凸 伸而壤設於該平板盤體4之頂板# 41的近外周緣處。 在本實施例中,該強化槽㉟422 &分設於兩側且包括 有^兩兩彼此正向相對之強化槽423 (於圖3中僅顯示其中 一側邊);在此需注意的是,該強化槽組422所包括之強化 槽一423的個數,是可依製造商之實際需求而變化,並不受 本實施例之限制。 '曰^見圖4,當有兩半導體托盤相互堆疊時,位於下 方之半導體托盤的定位單元6與該等承放單元5,皆是被容 置在位於上方之半導體托盤的容置空Μ 413内,故已裝載 有多數個半導體晶4 2之半導體托盤是可相互堆叠,而每 該等半導體托盤堆疊至_定數量時 8 M269283 的(未裝載有半導體晶片2)半導體托盤繼而堆疊在該等半 導體托盤上,再以各強化槽組422為打帶點,並將該網帶 組3依循著各強化槽㉟422❸方向,圍繞著堆疊好的半導 體托盤’且其中該綑帶組3穿伸人其所對應之最下方的半 導體托盤的強化槽組422内且施力迫緊,而將該等堆疊好 並承載有半導體晶片2之半導體托盤綑紮完成。 由上可推知,本新型半導體托盤具有如下所述之各項 | 優勢: (丨)更能承受該綑帶組3之施力,使用壽命長: 本新型半導體托盤是藉由該側板件42之強化槽組 422的增設,使得該側板件42之受力寬度縮減,故於 此該綑帶組3之綑紮力的作用力矩變小,而可舒緩該 半V體托盤在該綑帶組3綑紮處,因承受綑紮之力量 而產生負面影響,避免該側板件42開裂,進而可使該 半導體托盤之使用壽命較習知者為長。 > (2)製造容易: 本新型半導體托盤所增設的強化槽組422,是藉由 该側板件42之遠離該頂板件41的邊緣421彎凹而形 成’並以該等強化槽423為供該綑帶組3施力的打帶 點’即可有效地避免該側板件42因受綑紮之力的作用 而開裂,故其製造過程非常簡便而容易。 (3 )節省成本: 承上,藉由該等強化槽423之形成,即可使本新 型半導體托盤較習知者更能承受該等綑帶組3之綑紮 9 M269283 力ϊ:,因此半導體托盤製造商即不需就此點再大肆針 對該半導體托盤之材質方面加以改良或設計,而僅需 加以改變該半導體托盤之構型即可,故能夠免於支付 頟外增設之龐大的研發、人事、時間,以及設備等各 項南額成本。 由此可知,本新型半導體托盤,經由其結構之變更, =成型出㈣化槽組422’即可使該半導體托盤得以承受網 帶組3之施力,減少該側板件42不堪垂直方向之綑紮力量 的擠壓導致水平方向裂紋的產生,而可相對地獲得更長之 使用壽命,同時其製造容易,亦不需特定加強整體結構, 使得讓半導體托盤之製造商獲得品質良好之半導體把盤之 餘,還能省下大筆相關之研究或量產費用。 f”’内上述,本新型半導體托盤,是藉由該平板盤體4 之側板件42上之強化槽組422的彎凹成型使得該半導體 托盤受綑帶組3綑紮之作用力的施力力矩變小,因而讓垂 直方向的綑紮力量較難對該半導體托盤之側板件結構造成 破壞,以使該半導體托盤能保有較長之使用壽命,且該強 化槽組422的成型方式簡單,製造商亦不需費時耗力地自 =半導體托盤之結構強度著手改良,即可達致抗抵該等綑 帶組3綑紮之作用力的效果。 淮以上所述者,僅為本新型之較佳實施例而已,當不 能以此限定本新型實施之範圍,即大凡依本新型申請專利 靶圍及新型說明内容所作之簡單的等效變化與修飾,皆仍 屬本新型專利涵蓋之範圍内。 10 M269283 【圖式簡單說明】 圖1是一立體圖,說明一習知半導體托盤之各部構件 暨其彼此之相對位置; 圖2是一側視圖,說明兩習知半導體托盤相互堆疊之 態樣; 圖3疋一立體圖,說明本新型半導體托盤之一較佳實 施例的大部構件暨其彼此之相對位置·,及 圖4是—側視圖,說明兩該較佳實施例相互堆疊之態 樣。 ’ M269283 【主要元件符號說明】 2 半導體晶片 413 3 綑帶組 42 4 平板盤體 421 41 頂板件 422 411 頂面 5 412 底面 6 容置空間 側板件 邊緣 強化槽組 承放單元 定位單元M269283 8. Description of the new model: [Technical field to which the new model belongs] The new model relates to a tray, especially a semiconductor tray [prior art] 疋 It is used to carry a plurality of semi-collective semiconductor semiconductor trays (commonly known as trays) conductor Wafers to facilitate certain processing or testing procedures for shipping or process orders. Referring to FIG., The conventional semiconductor tray 1 includes a top plate member η, a side plate member 12 which is arranged on the edge of the top plate member η and extends downward, and a plurality of which are arranged on the top surface of the top plate member u and are predetermined The receiving units 13 spaced apart and arranged in a matrix form, and the positioning unit 14 that is convexly and annularly arranged at the near edge of the top surface of the top plate member η. The material receiving unit 13 is used for receiving a semiconductor wafer 2 individually, and the side plate member 12 has a width a, as shown in FIG. 2. The bottom surface of the top plate member n and the side plate member i2 define a space for accommodation. 15. Therefore, when the two conventional semiconductor trays "see each other", the positioning unit 14 of the semiconductor tray 1 located below is placed in the accommodation space 15 of the semiconductor tray 1 located above. After a plurality of (here, two semiconductor trays 丨 as an example) each of the placing units 13 of the semiconductor tray 1 are placed with wafers, the two semiconductor trays 1 are stacked on each other and bundled by the strapping group 3, It will be transported to the next production or test program operation, or it will be shipped directly to the customer; however, it is often found in the inter-operation that due to the strapping group 3, the two semiconductor M269283 trays 1 are tightly bound. Therefore, at each taping point 121 of the side plate 12 (that is, the force exerted by the strap group 3 corresponding to the direct fork), it is easy to break due to the inability to withstand the binding force in the vertical direction, and at the same time, its cracks The direction is almost horizontal. For a semiconductor tray that has been cracked, because its structure has already been damaged, which greatly reduces the subsequent service life, if it is subjected to other stresses (such as the tying force of the strap group 3 in the future, or As the loaded wafers are tested under severe environmental conditions (ie, external stress such as high temperature and pressure, and large temperature differences), the overall destruction of the semiconductor tray i structure will be accelerated, so the semiconductor wafer maker will need additional Pay the cost again to purchase a new semiconductor tray 1; Furthermore, the manufacturer of the semiconductor tray 1 may also be unusable because of the semiconductor trays it produces, making its quality of the semiconductor tray 1 questionable, and even affecting the manufacturing Goodwill of business. If the strength of the strapping group 3 is relatively reduced, it seems to help to avoid the problem of excessive force and cracking at the strapping point 121 of the two semiconductor trays. However, when the strength of the strapping group 3 is bundled, When it is insufficient, the two adjacent semiconductor trays may be easily shifted to each other after being impacted by an external force, so that the wafers carried are damaged or destroyed, affecting the quality of the wafers and increasing the defect rate of the wafers. Therefore, how to make the structure 121 at the tapping point 121 of the semiconductor tray 1 able to resist the binding force of the strapping group so that it will not be cracked due to this and at the same time extend its service life has become an urgent need for related industry Improvement 6 M269283 [New content] Therefore, the object of the present invention is to provide a semiconductor tray that can withstand the force of a bundle of bundles i '· to extend its service life relatively. Therefore, the novel semiconductor tray can be stacked on top of each other and bound by a strapping group. The semiconductor tray includes a flat plate body, a plurality of receiving units, and a positioning unit. The flat plate body is substantially square and includes a top plate member. The top plate member has a top surface and a bottom surface opposite to the top surface, and the flat plate body further includes an edge surrounding the top plate member toward the A side plate member extending in the direction of the bottom surface, and an edge of the side plate member far from the top plate member is recessed with a reinforcing groove group, and the side plate member and the bottom surface define an accommodation space. The receiving units are not placed on the top surface of the flat plate body, but are separated from each other at a predetermined distance and arranged in a matrix, and are individually used to receive a semiconductor wafer. The positioning unit is protruded and is located at the outer peripheral edge of the top surface of the flat plate body. When two semiconductor trays are stacked on each other, the positioning unit of the semiconductor tray below and the receiving units are all It is accommodated in the accommodation space of the semiconductor tray located above, and the strap group is wound around each reinforcing groove group of the lowest semiconductor tray, and the semiconductor trays are fixed by bundling. As for the side plates of semiconductor trays, the acting moment of the binding force is relatively small, so the destructive power of the side plates of the semiconductor trays will be relatively reduced. [Embodiment] The foregoing and other technical contents, features, and effects of the present invention will be clearly presented in the detailed description of one of the preferred embodiments with reference to the drawings below M269283. 4. Referring to FIG. 3, a preferred embodiment of the novel semiconductor tray includes a flat plate stealing body 4, a plurality of receiving units 5, and a positioning unit ό. The flat plate body 4 is substantially square and includes a top plate member 41. The top plate member 41 has a top surface 411 and a bottom surface 412 opposite to the top surface 411. A side plate 42 extending from the edge of the top plate 41 toward the bottom surface 412, and an edge 421 of the side plate 42 away from the top plate 41 is recessed with a reinforcing groove group 422. The side plate 42 and the bottom surface 412 define -The accommodation space 413 shown in FIG. 4. A plurality of receiving orders% 5 are arranged on the top plate member 41 of the flat plate body 4 and are arranged at a predetermined distance from each other and arranged in a matrix form, and are individually used for receiving > shown in FIG. 1 The semiconductor wafer 2. The positioning unit 6 is protruded and provided on the outer peripheral edge of the top plate # 41 of the flat plate body 4. In this embodiment, the reinforcing grooves 422 & are provided on both sides and include ^ two reinforcing grooves 423 facing each other in a positive direction (only one side is shown in FIG. 3); it should be noted that The number of reinforcing grooves 423 included in the reinforcing groove group 422 can be changed according to the actual needs of the manufacturer, and is not limited by this embodiment. When the two semiconductor trays are stacked on top of each other, the positioning unit 6 and the receiving units 5 of the semiconductor trays located below are emptied by the storage space M 413 of the semiconductor trays located above. Therefore, the semiconductor trays already loaded with a plurality of semiconductor wafers 4 2 can be stacked on each other, and each of these semiconductor trays is stacked to a predetermined number of 8 M269283 (without semiconductor wafers 2). The semiconductor trays are then stacked on such trays. On the semiconductor tray, each reinforcing groove group 422 is used as a tapping point, and the mesh belt group 3 follows the direction of each reinforcing groove 422❸, and surrounds the stacked semiconductor tray ', and the strap group 3 penetrates through it. The corresponding lowermost semiconductor tray has a reinforcing groove group 422 in which the semiconductor tray 2 stacked and carrying the semiconductor wafer 2 is bundled. It can be inferred from the above that the new-type semiconductor tray has the following items | Advantages: (丨) It can withstand the force of the strap group 3 and has a long service life: The new-type semiconductor tray is made of the side plate 42 The addition of the strengthening groove group 422 reduces the force width of the side plate 42, so the acting moment of the binding force of the strap group 3 is reduced, and the half-V tray can be relieved to be bundled in the strap group 3 At the same time, due to the negative impact of the binding force, the side plate 42 is prevented from cracking, and the service life of the semiconductor tray can be longer than that of a conventional person. > (2) Easy to manufacture: The reinforced groove group 422 added to the new semiconductor tray is formed by bending the edge 421 of the side plate member 42 away from the top plate member 41, and using the reinforced grooves 423 as a supply The strapping point 3 of the strapping group 3 can effectively prevent the side plate 42 from cracking due to the binding force, so the manufacturing process is very simple and easy. (3) Cost saving: Thanks to the formation of these strengthening grooves 423, the new type of semiconductor tray can make the new type of semiconductor tray more able to withstand the binding of these strapping groups 3 M269283 than conventional ones: so the semiconductor tray The manufacturer does not need to improve or design the material of the semiconductor tray, but only needs to change the configuration of the semiconductor tray, so it can be exempted from the huge research and development, personnel, Time, and equipment costs. From this, it can be known that, through the structural change of the new type semiconductor tray, the formation of the forming groove group 422 'can enable the semiconductor tray to withstand the force of the mesh belt group 3 and reduce the vertical banding of the side plate 42. The squeezing of the force causes the cracks in the horizontal direction, which can relatively obtain a longer service life. At the same time, it is easy to manufacture, and there is no need to specifically strengthen the overall structure, so that the manufacturer of semiconductor trays can obtain high-quality semiconductor handles. In addition, it can save a lot of related research or mass production costs. The above-mentioned "f" ', the new type of semiconductor tray is formed by the bending of the reinforcing groove group 422 on the side plate 42 of the flat plate body 4, so that the semiconductor tray is subjected to the force moment of the binding force of the strap group 3. It becomes smaller, so that it is difficult for the vertical binding force to damage the side plate structure of the semiconductor tray, so that the semiconductor tray can maintain a long service life, and the forming method of the reinforcing groove group 422 is simple, and the manufacturer also It does not need to take time and effort to improve the structural strength of the semiconductor tray, so as to achieve the effect of resisting the force of the binding of these strap groups 3. The above-mentioned ones are only the preferred embodiments of the present invention. However, when it is not possible to limit the scope of implementation of the new model, that is, the simple equivalent changes and modifications made according to the scope of the patent application of the new model and the description of the new model are still covered by the new model patent. 10 M269283 [ Brief description of the drawings] FIG. 1 is a perspective view illustrating the components of a conventional semiconductor tray and their relative positions to each other; FIG. 2 is a side view illustrating two conventional semiconductor trays A state of stacking each other; FIG. 3 is a perspective view illustrating most components of a preferred embodiment of the novel semiconductor tray and their relative positions to each other, and FIG. 4 is a side view illustrating the two preferred embodiments They are stacked on top of each other. 'M269283 [Description of main component symbols] 2 Semiconductor wafer 413 3 Banding set 42 4 Flat plate body 421 41 Top plate 422 411 Top surface 5 412 Bottom surface 6 Receiving space Side plate edge reinforcement slot group receiving Unit positioning unit

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Claims (1)

M269283 九、申請專利範圍: L 一種半導體托盤,可複數個彼此相互堆疊並受一綑帶組 綑紮’該半導體托盤包含: 平板盤體,是概呈方形且包括一頂板件,該頂板 件具有一頂面與一反向於該頂面之底面,而該平板盤體 更包括一環繞該頂板件之邊緣且朝該底面之方向延伸的 側板件,且該側板件之遠離該頂板件的邊緣是凹陷有一 強化槽組,该側板件與該底面則界定出一容置空間; 複數個承放單元,設置在該平板盤體之頂面上而彼 此以一預定距離相隔且呈矩陣式棑列,並個別承放一半 導體晶片;及 一定位單元,是凸伸而環設於該平板盤體之頂面的 近外周緣處,當將二半導體托盤相互堆疊時,位於下方 之半導體托盤的該定位單元,與該等承放單元,皆是被 谷置於位於上方之半導體托盤的容置空間内,且該綑帶 、、且、’凡糸過最下方之半導體托盤的各強化槽組,以綑紮而 固定該等半導體托盤。 2·依據申請專利範圍第1項所述之半導體托盤,其中,該 強化匕組疋包括有六兩兩彼此正向相對之強化槽。 13M269283 9. Scope of patent application: L A semiconductor tray that can be stacked on top of each other and bound by a strapping group. The semiconductor tray contains: a flat plate body, which is approximately square and includes a top plate member, which The top surface and a bottom surface opposite to the top surface, and the flat plate body further includes a side plate member surrounding the edge of the top plate member and extending in the direction of the bottom surface, and the edge of the side plate member away from the top plate member is The depression has a reinforcing groove group, and the side plate and the bottom surface define an accommodation space; a plurality of receiving units are arranged on the top surface of the flat plate body and are separated by a predetermined distance from each other in a matrix queue. And individually holding a semiconductor wafer; and a positioning unit, which is convex and annularly arranged at the near outer periphery of the top surface of the flat plate body, when two semiconductor trays are stacked on each other, the positioning of the semiconductor tray located below The units, and these receiving units, are all placed in the storage space of the semiconductor tray located above, and the straps, and, where the semi-conductors pass through the bottom Respective reinforcing grooves tray group, to a semiconductor such strapping is fixed tray. 2. The semiconductor tray according to item 1 of the scope of the patent application, wherein the reinforced dagger set 六 includes six pairs of reinforcing grooves facing each other in a positive direction. 13
TW94200064U 2005-01-04 2005-01-04 Semiconductor tray TWM269283U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI637893B (en) * 2018-03-14 2018-10-11 矽品精密工業股份有限公司 Tape punching apparatus and tape punching method
TWD212517S (en) 2020-06-22 2021-07-01 日商大福股份有限公司 Conveyance tray

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI637893B (en) * 2018-03-14 2018-10-11 矽品精密工業股份有限公司 Tape punching apparatus and tape punching method
TWD212517S (en) 2020-06-22 2021-07-01 日商大福股份有限公司 Conveyance tray

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