TWI831420B - 封裝結構 - Google Patents

封裝結構 Download PDF

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TWI831420B
TWI831420B TW111139305A TW111139305A TWI831420B TW I831420 B TWI831420 B TW I831420B TW 111139305 A TW111139305 A TW 111139305A TW 111139305 A TW111139305 A TW 111139305A TW I831420 B TWI831420 B TW I831420B
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heat dissipation
integrated circuit
dissipation metal
metal
packaging structure
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TW202418489A (zh
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彭俊諺
洪國彬
陳仕誠
郭浩中
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鴻海精密工業股份有限公司
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Priority to US18/488,026 priority patent/US20240128151A1/en
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Abstract

封裝結構包含接合基板、積體電路以及散熱金屬。積體電路包含面對接合基板的主動區。散熱金屬位在接合基板與積體電路的主動區之間。散熱金屬與積體電路電性絕緣。

Description

封裝結構
本揭露是有關於一種封裝結構,尤其是一種具有散熱金屬的封裝結構。
在封裝結構的散熱設計中,常見的方法是透過與基板即晶片互聯的凸塊做為散熱結構 。然而,金屬材料會因電化學反應產生合金反應而形成孔洞。在焊接過程中,也可能產生氣泡於絕緣層中。因此,用於導電的金屬材料因上述原因而產生的缺陷易導致金屬疲勞。
此外,上述設計還有諸多不便,例如異質接面的熱膨脹係數差異、焊點破裂、金屬對接所需線路設計複雜、凸塊表面平坦化等問題。
有鑑於此,如何提供一種可克服上述散熱問題的封裝結構仍是目前業界努力研究的目標之一。
本揭露之一技術態樣為一種封裝結構。
在本揭露一實施例中,封裝結構接合基板、積體電路以及散熱金屬。積體電路包含面對接合基板的主動區。散熱金屬位在接合基板與積體電路的主動區之間,且散熱金屬與積體電路電性絕緣。
在本揭露一實施例中,接合基板包含面對積體電路的上表面,且散熱金屬設置於此上表面上。
在本揭露一實施例中,封裝結構還包含位在散熱金屬與積體電路之間的絕緣層。絕緣層為底部填充膠。
在本揭露一實施例中,封裝結構還包含位在散熱金屬與積體電路之間的絕緣層。絕緣層為散熱介電材料。
在本揭露一實施例中,積體電路的主動區包含多個主動元件,散熱金屬的數量為複數,且散熱金屬的位置於垂直方向上對應於主動元件的位置。
在本揭露一實施例中,散熱金屬為圓柱形。
在本揭露一實施例中,散熱金屬為長條形。
在本揭露一實施例中,散熱金屬的數量為複數,且散熱金屬的排列具有規律性。
在本揭露一實施例中,散熱金屬的數量為複數,且散熱金屬的排列不具有規律性。
在本揭露一實施例中,積體電路與接合基板堆疊於垂直方向上。
在上述實施例中,由於散熱金屬不用於電性連接,可避免電化學反應或熱衝擊測試導致散熱金屬產生金屬疲勞的狀況。散熱金屬的位置在垂直方向上對應於主動元件的位置。由於散熱金屬不用於電性連接接合基板與體電路,因此散熱金屬的排列可具有較高的密度,可有效提升熱傳導效率並提高散熱能力。
以下將以圖式揭露本發明之複數個實施方式,為明確說明起見,許多實務上的細節將在以下敘述中一併說明。然而,應瞭解到,這些實務上的細節不應用以限制本發明。也就是說,在本發明部分實施方式中,這些實務上的細節是非必要的。此外,為簡化圖式起見,一些習知慣用的結構與元件在圖式中將以簡單示意的方式繪示之。且為了清楚起見,圖式中之層和區域的厚度可能被誇大,並且在圖式的描述中相同的元件符號表示相同的元件。
第1圖為根據本揭露一實施例的封裝結構100的側視圖。封裝結構100包含接合基板110、積體電路(Integrated Circuit)120以及散熱金屬130。積體電路120與接合基板110堆疊於垂直方向Y上。積體電路120包含面對接合基板110的主動區124。主動區124位在積體電路120面對接合基板110的上表面122上。散熱金屬130位在接合基板110與積體電路120的主動區124之間。散熱金屬130設置於接合基板110面對積體電路120的上表面112上。散熱金屬130接觸接合基板110的上表面112,而散熱金屬130與積體電路120無接觸。換句話說,散熱金屬130與積體電路120電性絕緣,且散熱金屬130並非用以互聯接合基板110與積體電路120的結構。
散熱金屬130配置以傳導主動區124的熱源,做為封裝結構100的散熱結構。本揭露中的散熱金屬130可應用於各式封裝結構中,例如異質接面的散熱封裝結構、高密度熱源散熱封裝結構或是3D IC封裝結構中。
舉例來說,接合基板110的材料為氮化鋁基板(AlN submount)。積體電路120的基底材料可以是碳化矽(silicon carbide)基板或是藍寶石(sapphire)基板。散熱金屬130的材料為金(Au)、銅(Cu)或其他導熱性良好的金屬材料。
在本實施例中,封裝結構100還包含位在散熱金屬130與積體電路120之間的絕緣層140。絕緣層140圍繞散熱金屬130。絕緣層140填充於積體電路120的主動區124與散熱金屬130以及接合基板110之間的空間。換句話說,絕緣層140包覆整個散熱金屬130以隔開散熱金屬130與主動區124,且絕緣層140與積體電路120連接。
在一實施例中,絕緣層140為底部填充膠(Underfill),使接合基板110與積體電路120緊密接合並達成積體電路120與散熱金屬130之間的電性絕緣。在其他實施例中,絕緣層140為散熱介電材料(Thermal interface material,TIM),進一步提高導熱效率。在本實施例中,由於散熱金屬130不用以電性連接,可避免異質接面的熱膨脹係數差異導致絕緣層140材料選擇上的限制。
如第1圖所示,積體電路120還包含設置於上表面122上的導電墊126與保護層128。導電墊126位在主動區124之外。主動區124中包含多個主動元件1242。保護層128覆蓋主動區124的主動元件1242以及導電墊126。保護層128可與絕緣層140共同使積體電路120與散熱金屬130電性絕緣。在本實施例中,絕緣層140接觸保護層128、散熱金屬130以及接合基板110的上表面112。
封裝結構100還包含電性連接件150。一部份的導電墊126自保護層128中露出。電性連接件150配置以電性連接積體電路120的導電墊126與接合基板110。舉例來說,電性連接件150可以是金屬凸塊、金屬凸柱等。封裝結構100的積體電路120以覆晶(Flip Chip)接合方式與接合基板110電性連接。
在本實施例中,絕緣層140僅位在主動區124與接合基板110之間,但本揭露不以此為限。在一些其他實施例中,底部填充膠或散熱介電材料可延伸至主動區124外並圍繞電性連接件150。
在第1圖的視角中示例性地繪示了5個散熱金屬130,但本揭露不以此為限。散熱金屬130的位置在垂直方向Y上對應於主動元件1242的位置。具體來說,主動元件1242包含源極S、汲極D與閘極G等結構。主動區124的主要熱源來自閘極G。因此,散熱金屬130的排列方式可根據主動元件1242中閘極G的分布而設計。舉例來說,閘極G在接合基板110上的垂直投影會落在散熱金屬130在接合基板110上的垂直投影內。在一些其他實施例中,封裝結構100可以僅具有單一個散熱金屬130,位在整個主動區124與接合基板110之間。
在用於電性連接接合基板110與積體電路120的金屬凸塊做為散熱結構的設計中,積體電路120需要通過額外的金屬層與金屬凸塊電性連接。再者,當金屬凸塊同時與積體電路120以及接合基板110對接時,金屬凸塊的表面積較小使得散熱效果較差。換言之,本揭露中使用與積體電路120電性絕緣的散熱金屬130做為散熱結構,可簡化積體電路120的線路設計並提升散熱效果。
一般而言,由於電化學反應,做為電性連接件的金屬材料會產生合金反應而形成孔洞。在焊接過程中,也可能產生氣泡於絕緣層140中。因此,用於導電的金屬材料因上述原因而產生的缺陷易導致金屬疲勞。由於本揭露的散熱金屬130不用於電性連接,可避免電化學反應或熱衝擊測試導致散熱金屬130產生金屬疲勞的狀況。此外,由於散熱金屬130與積體電路120無電性連接,不需要對散熱金屬130的表面132進行平坦化的步驟以提升接合可靠度,因此可簡化封裝結構100的製程。
第2圖為根據本揭露一實施例之封裝結構100a的立體圖。為了方便說明,第2圖中繪示了彼此分離的接合基板110與積體電路120。第2圖中的積體電路120包含主動區124與四個導電墊126,且導電墊126分別位在主動區124的四個側邊。
導電墊126透過線路(圖未示)電性連接至主動區124中的源極S、汲極D與閘極G(見第1圖)。散熱金屬130分布在對應於主動區124的區域114內。電性連接件150分布在區域116內,且區域116對應於導電墊126的位置。區域116位在區域114的四個側邊,電性連接件150的位置分別對應於導電墊126的位置。在本實施例中,絕緣層140a覆蓋散熱金屬130與電性連接件150。換句話說,絕緣層140a覆蓋區域114以及區域116,但本揭露不以此為限。絕緣層140a至少覆蓋散熱金屬130與主動區124之間的空間即可。
第3圖為第2圖的接合基板110、散熱金屬130以及絕緣層140a的放大圖。在本實施例中,散熱金屬130為圓柱形,且散熱金屬130的排列具有規律性。在本實施例中,每個散熱金屬130的形狀與尺寸皆相同,但本揭露不以此為限。具體來說,由於主動區124的主要熱源來自閘極G,散熱金屬130的寬度可根據熱源擴散範圍決定。
第4圖為根據本揭露另一實施例之封裝結構100b的立體圖,其中省略積體電路120。封裝結構100b的散熱金屬130a為長條狀。散熱金屬130a的排列具有規律性且呈現格柵狀。每個散熱金屬130a的形狀與尺寸皆相同,但本揭露不以此為限。
一般來說,承載較大電流的積體電路120中的主動元件1242的間距較窄。由於散熱金屬130a不用於電性連接接合基板110與積體電路120,因此散熱金屬130a的排列可具有較高的密度。舉例來說,主動元件1242中的閘極G的分布型態為手指狀,因此於第1圖中所示的閘極G寬度較窄且排列密度高。如此一來,格柵狀的散熱金屬130a也可具有窄間距,並與主動元件1242對應設置。
舉例來說,在一些實施例中,電性連接件150之間的間距例如為2~3微米,而散熱金屬130a的間距可縮減至小於1微米。換句話說,散熱金屬130a的排列密度與主動元件1242的間距設計規格相近。如此一來,散熱金屬130a可有效提升熱傳導效率並提高散熱能力。
第5圖為根據本揭露另一實施例之封裝結構100c的側視圖。封裝結構100c與第1圖所示的封裝結構100大致相同,其差異在於封裝結構100c的散熱金屬130b的排列不具有規律性。舉例來說,本實施例中的主動元件1242a的排列不具有規律性,散熱金屬130b與主動元件1242a在垂直方向Y上對應設置。如同前述,散熱金屬130b的寬度可根據熱源擴散範圍決定,因此散熱金屬130b可分別具有不同尺寸。在一些實施例中,散熱金屬130b也可以分別具有不同形狀。
第6圖為根據本揭露又一實施例之封裝結構100d的側視圖。封裝結構100d與第1圖所示的封裝結構100大致相同,其差異在於封裝結構100d的散熱金屬130c彼此之間非完全分開。舉例來說,第6圖中左側的兩個散熱金屬130c彼此部份相連,右側的兩個散熱金屬130c彼此部份相連。由於散熱金屬130c不用於電性連接,即便兩個散熱金屬130c彼此部份相連,散熱金屬130c仍可維持散熱的技術功效。
第7圖為不同實施例的封裝結構與溫差模擬圖。曲線C11、曲線C12、曲線C13的資料來自將積體電路120的上表面122朝向上方測量得出的溫差(即以打線接合的積體電路)。曲線C11、曲線C12、曲線C13的資料分別代表在環境溫度為360K、330K以及300K時,電壓以及封裝結構與環境溫度之間的溫差的關係。從曲線C11~C13可看出,隨著電壓升高,溫差升高到約150K至175K。
同時參照第2圖與第7圖,曲線C21、曲線C22以及曲線C23的資料來自測量第2圖的封裝結構100得出的溫差。曲線C21、曲線C22以及曲線C23的資料分別代表在環境溫度為360K、330K以及300K時,電壓以及溫差的關係。在本實施例中,封裝結構100中的積體電路120包含氮化鎵(GaN)高電子遷移率電晶體(High electron mobility Transistor,HEMT)。 從曲線C21~C23可看出,隨著電壓升高,溫差僅升高到約75K至100K。
曲線C31、曲線C32以及曲線C33的資料來自測量以第4圖的散熱金屬130a作為散熱結構的封裝結構100b得出的溫差。曲線C31、曲線C32以及曲線C33的資料代表在環境溫度為360K、330K以及300K時,電壓以及溫差的關係。從曲線C31~C33可看出,隨著電壓升高,溫差僅升高到約50K至75K。
根據上述資料可知,藉由設置散熱金屬130於對應主動區124的位置,並使散熱金屬130與主動區124絕緣,可有效地提升封裝結構的散熱效果。
第8圖為根據不同實施例的積體電路的厚度與溫度模擬圖。曲線C41、曲線C42以及曲線C43分別代表在環境溫度為360K、330K以及300K時,採用厚度為100微米的積體電路120測量得出的溫差。曲線C51、曲線C52以及曲線C53分別代表在環境溫度為360K、330K以及300K時,採用厚度為300微米的積體電路120測量得出的溫差。 積體電路120的基板厚度越厚,散熱途徑的熱阻越小,則散熱效果越好。
參照第1圖,散熱金屬130具有厚度T1,絕緣層140具有厚度T2。散熱金屬130具有面對積體電路120的表面132。一部份位在表面132上的絕緣層140具有厚度T3。厚度T3與厚度T1之間的比例影響封裝結構100的散熱效果。
第9圖為根據本揭露一實施例的散熱金屬的厚度比例與溫度關係圖。同時參照第1與第9圖。在本實施例中,以底部填充膠做為絕緣層140材料。曲線C61、曲線C62、曲線C63以及曲線C64分別為電壓在20伏特、16伏特、12伏特、8伏特的操作環境下,對本揭露的封裝結構測量得到的溫度與厚度比例關係圖。厚度比例定義為第1圖所示的厚度T2除以厚度T1的厚度比。對應於溫度約660K、450K、290K以及150K的虛線分別為電壓在20伏特、16伏特、12伏特、8伏特的操作環境下,將積體電路120的上表面122朝向上方測量得出的溫差(以打線接合的積體電路)的溫度。
從第9圖的資料可看出,當散熱金屬130的厚度越厚(即厚度比例越高),在不同操作環境下的溫度皆有下降趨勢。同時參照第1與第9圖。由此可知,由於底部填充膠的熱傳導效率腳金屬材料小,藉由設置底部填充膠於散熱金屬130上,還可透過壓合製程進一步薄化位在散熱金屬130上方的底部填充膠的厚度T3,同時達到較佳的散熱效果與絕緣效果。
綜上所述,由於散熱金屬不用於電性連接,可避免電化學反應或熱衝擊測試導致散熱金屬產生金屬疲勞的狀況。散熱金屬的位置在垂直方向上對應於主動元件的位置。由於散熱金屬不用於電性連接接合基板與體電路,因此散熱金屬的排列可具有較高的密度,可有效提升熱傳導效率並提高散熱能力。藉由與積體電路電性絕緣的散熱金屬做為散熱結構,不需通過額外的金屬層與散熱金屬電性連接,可簡化積體電路的線路設計並提升散熱效果。此外,由於不需要對散熱金屬的表面進行平坦化的步驟以提升接合可靠度,因此可簡化封裝結構的製程。
雖然本發明已以實施方式揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100,100a,100b,100c,100d:封裝結構 110:接合基板 112:上表面 114:區域 116:區域 120:積體電路 122:上表面 124:主動區 1242,1242a:主動元件 126:導電墊 128:保護層 130,130a,130b,130c:散熱金屬 132:表面 140,140a:絕緣層 150:電性連接件 Y:垂直方向 S:源極 D:汲極 G:閘極 T1,T2,T3:厚度 C11~C13,C21~C23,C31~C33,C41~C43,C51~C53,C61~C64:曲線
第1圖為根據本揭露一實施例的封裝結構的側視圖。 第2圖為根據本揭露一實施例之封裝結構的立體圖。 第3圖為第2圖的接合基板、散熱金屬以及絕緣層的放大圖。 第4圖為根據本揭露另一實施例之封裝結構的立體圖,其中省略積體電路。 第5圖為根據本揭露另一實施例之封裝結構的側視圖。 第6圖為根據本揭露又一實施例之封裝結構的側視圖。 第7圖為不同實施例的封裝結構與溫差模擬圖。 第8圖為根據不同實施例的積體電路的厚度與溫度模擬圖。第9圖為根據本揭露一實施例的散熱金屬的厚度比例與溫度關係圖。
100:封裝結構
110:接合基板
112:上表面
120:積體電路
122:上表面
124:主動區
1242:主動元件
126:導電墊
128:保護層
130:散熱金屬
132:表面
140:絕緣層
150:電性連接件
Y:垂直方向
S:源極
D:汲極
G:閘極
T1,T2,T3:厚度

Claims (10)

  1. 一種封裝結構,包含:一接合基板;一積體電路,包含面對該接合基板的一主動區;至少一散熱金屬,位在該接合基板與該積體電路的該主動區之間,且該散熱金屬與該積體電路電性絕緣;以及一絕緣層,位在該散熱金屬與該積體電路之間,且該絕緣層圍繞該散熱金屬。
  2. 如請求項1所述之封裝結構,其中該接合基板包含面對該積體電路的一上表面,且該散熱金屬設置於該上表面上。
  3. 如請求項1所述之封裝結構,其中該絕緣層為底部填充膠。
  4. 如請求項1所述之封裝結構,其中該絕緣層為散熱介電材料。
  5. 如請求項1所述之封裝結構,其中該積體電路的該主動區包含複數個主動元件,該至少一散熱金屬的數量為複數,且該些散熱金屬的位置於一垂直方向上對應於該些主動元件的位置。
  6. 如請求項1~5中任一所述之封裝結構,其中該散熱金屬為圓柱形。
  7. 如請求項1~5中任一所述之封裝結構,其中該散熱金屬為長條形。
  8. 如請求項1~5中任一所述之封裝結構,其中該至少一散熱金屬的數量為複數,且該些散熱金屬的排列具有規律性。
  9. 如請求項1~5中任一所述之封裝結構,其中該至少一散熱金屬的數量為複數,且該些散熱金屬的排列不具有規律性。
  10. 如請求項5所述之封裝結構,其中該積體電路與該接合基板堆疊於該垂直方向上。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW259898B (zh) * 1993-09-03 1995-10-11 Advance Semiconductor Assembly Technology Inc
TWM423356U (en) * 2011-07-06 2012-02-21 Wen-Jin Chen LED-containing metal substrate structure improvement
TW201318234A (zh) * 2011-10-28 2013-05-01 Sentec E & E Co Ltd 高導熱基板及具該基板的發光二極體元件與製作方法
CN109461710A (zh) * 2017-09-06 2019-03-12 三菱电机株式会社 半导体装置
TWM638589U (zh) * 2022-10-17 2023-03-11 鴻海精密工業股份有限公司 封裝結構

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW259898B (zh) * 1993-09-03 1995-10-11 Advance Semiconductor Assembly Technology Inc
TWM423356U (en) * 2011-07-06 2012-02-21 Wen-Jin Chen LED-containing metal substrate structure improvement
TW201318234A (zh) * 2011-10-28 2013-05-01 Sentec E & E Co Ltd 高導熱基板及具該基板的發光二極體元件與製作方法
CN109461710A (zh) * 2017-09-06 2019-03-12 三菱电机株式会社 半导体装置
TWM638589U (zh) * 2022-10-17 2023-03-11 鴻海精密工業股份有限公司 封裝結構

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