TWI821386B - Substrate processing method - Google Patents

Abstract

A substrate processing method includes providing a processing target substrate having a pattern, forming a film on the substrate, forming a reaction layer on a surface layer of the substrate by plasma, and removing the reaction layer by applying energy to the substrate.

Description

Substrate processing methods

The disclosure of the present invention relates to a substrate processing method.

Patent Document 1 discloses a technology in which a processing gas reacts with a natural oxide film on a wafer to form a reaction layer, and then the wafer is heated to sublimate the reaction layer, thereby removing (etching) the natural oxide film. [Known technical documents] [Patent Document]

Patent Document 1: Japanese Patent Application Publication No. 2010-165954

[Problems to be solved by this invention]

The disclosure of the present invention provides a technology that can control the pattern formed on the substrate to a desired state. [Technical means to solve problems]

One aspect of the substrate processing method disclosed in the present invention includes the following steps: a substrate providing step, providing a processing object substrate with a pattern; a film forming step, forming a film on the substrate; and a reaction layer forming step, using plasma to form a film on the substrate The surface layer forms a reaction layer; and the step of removing the reaction layer is to apply energy to the substrate to remove the reaction layer. [Effects of the present invention]

According to the disclosure of the present invention, the pattern formed on the substrate can be controlled to a desired state.

Hereinafter, embodiments of the substrate processing method disclosed in this application will be described in detail with reference to the accompanying drawings. In addition, the substrate processing method disclosed in the present invention is not limited to this embodiment.

[Device configuration] An example of an apparatus used for substrate processing in this embodiment will be described. Hereinafter, the case where the substrate processing of this embodiment is performed using a plasma processing device and a heating device will be described as an example.

First, an example of the structure of the plasma processing apparatus according to this embodiment will be described. FIG. 1 is a diagram showing an example of the schematic configuration of the plasma processing apparatus according to the embodiment. This embodiment will be described by taking the case where the plasma processing apparatus 100 is an inductively coupled plasma (ICP) type plasma processing apparatus as an example.

The plasma processing apparatus 100 includes a cylindrical processing chamber (chamber) 102 made of metal (for example, aluminum).

A mounting platform 110 is provided at the bottom of the processing chamber 102 for mounting semiconductor wafers (hereinafter also referred to as "wafers") W. The mounting table 110 is made of aluminum or the like and is formed into a cylindrical shape. A heater 111 is provided on the mounting table 110 . The heater 111 is connected to the heater power supply 112 and generates heat by the power supplied from the heater power supply 112 . The mounting table 110 controls the temperature of the wafer W by the heater 111 . In addition, although not shown in the figure, the mounting table 110 may be provided with necessary functions such as an electrostatic chuck that holds the wafer W by electrostatic force, a temperature adjustment mechanism such as a refrigerant flow path, and the like. When the plasma processing apparatus 100 is used as an etching apparatus, a high-frequency bias voltage for introducing ions into the wafer W is applied to the mounting table 110 .

A plate-shaped dielectric material 104 made of, for example, quartz glass or ceramic is provided on the ceiling of the processing chamber 102 so as to face the mounting table 110 . Specifically, the dielectric material 104 is formed in a disc shape, for example, and is installed in an airtight manner so as to close an opening formed in the ceiling of the processing chamber 102 .

A gas supply unit 120 for supplying various gases used in processing the wafer W is connected to the processing chamber 102 . A gas inlet 121 is formed in the side wall of the processing chamber 102 . The gas supply unit 120 is connected to the gas inlet 121 via the gas supply pipe 122 .

The gas supply unit 120 is connected to gas supply sources of various gases used in processing the wafer W via gas supply lines. Each gas supply pipeline is appropriately branched corresponding to the substrate processing process, and is equipped with on-off valves and flow controllers. The gas supply unit 120 controls the flow rates of various gases by controlling on-off valves and flow controllers provided in each gas supply line. The gas supply part 120 supplies various gases to the gas inlet 121 according to the substrate processing process. Various gases supplied to the gas inlet 121 are supplied from the gas inlet 121 into the processing chamber 102 . In addition, in FIG. 1 , although the gas supply unit 120 is configured to supply gas from the side wall of the processing chamber 102 as an example, it is not limited to this form. For example, the gas may be supplied from the ceiling of the processing chamber 102 . In this case, for example, a gas inlet can be formed in the center of the dielectric material 104 and the gas can be supplied from the center of the dielectric material 104 .

The exhaust part 130 for discharging the ambient gas in the processing chamber 102 is connected to the bottom of the processing chamber 102 through the exhaust pipe 132 . The exhaust unit 130 is composed of, for example, a vacuum pump, and depressurizes the inside of the processing chamber 102 to a predetermined pressure. A wafer unloading entrance 134 is formed on the side wall of the processing chamber 102 . A gate valve 136 is provided at the wafer transfer inlet 134 . For example, when loading the wafer W, the gate valve 136 is opened, the wafer W is placed on the mounting table 110 in the processing chamber 102 by a transport mechanism such as a transport arm (not shown), the gate valve 136 is closed, and the wafer W is processed. processing.

On the ceiling of the processing chamber 102, a flat high-frequency antenna 140 and a shielding member 160 covering the high-frequency antenna 140 are provided on the upper side (outer side) of the dielectric material 104. The high-frequency antenna 140 is provided with an antenna element 142. The antenna element 142 is formed in the shape of a spiral coil made of a conductor such as copper, aluminum, stainless steel, or the like. High frequency power supply 150 is connected to the antenna element 142. The high-frequency power supply 150 supplies a high frequency of a predetermined frequency (for example, 40 MHz) with a predetermined power to the antenna element 142 that generates plasma. In addition, the high frequency output from the high frequency power supply 150 is not limited to the above frequency. For example, it can provide high frequencies of various frequencies such as 13.56MHz, 27MHz, 40MHz, and 60MHz.

When high frequency is supplied to the antenna element 142 from the high frequency power supply 150, an induced magnetic field is formed in the processing chamber 102. The formed induced magnetic field excites the gas introduced into the processing chamber 102 to generate plasma above the wafer W. In addition, the high-frequency antenna 140 may be provided with a plurality of antenna elements 142, and high frequencies of the same frequency or different frequencies may be applied to each antenna element 142 from the high-frequency power supply 150. For example, the plasma processing apparatus 100 may also divide the high-frequency antenna 140 into a central part and a peripheral part of the dielectric material 104 and provide antenna elements 142 respectively, and control plasma respectively in the central part and the peripheral part of the dielectric material 104. In addition, the plasma processing apparatus 100 can generate plasma by supplying high-frequency power to the lower electrode constituting the mounting table 110 in addition to the high-frequency antenna 140 installed on the ceiling of the processing chamber 102 .

The plasma processing apparatus 100 can perform plasma processing such as etching or film formation on the wafer W by using the generated plasma.

The plasma processing apparatus 100 having the above-mentioned structure is integrally controlled and operated by the control unit 190 . The control unit 190 includes a process controller 191 having a CPU that controls each unit of the plasma processing apparatus 100, a user interface 192, and a memory unit 193.

The process controller 191 controls various operations of the plasma processing device 100 . For example, the process controller 191 controls the supply operations of various gases from the gas supply unit 120 . In addition, the process controller 191 controls the frequency and power of the high frequency supplied from the high frequency power supply 150 to the antenna element 142 . In addition, the process controller 191 controls the power supplied to the heater 111 from the heater power supply 112 to control the amount of heat generated by the heater 111, thereby controlling the temperature of the wafer W.

The user interface 192 is composed of a keyboard through which the operator inputs commands to manage the plasma processing apparatus 100, a display that visually displays the operation status of the plasma processing apparatus 100, and the like.

The memory unit 193 stores recipes storing control programs (software), processing condition data, and the like. These control programs are used to realize various processes executed in the plasma processing apparatus 100 under the control of the process controller 191 . Then, if necessary, any recipe is called from the memory unit 193 through instructions from the user interface 192 and executed by the process controller 191, so that the desired processing in the plasma processing device 100 is executed under the control of the process controller 191. . In addition, recipes such as control programs and processing condition data are stored in a computer memory medium that can be read by a computer, or they can be transferred at any time from other devices, such as a dedicated line, and used online. Examples of computer storage media include hard disks, CDs, flexible disks, and semiconductor memories.

Next, an example of the structure of the heating device of this embodiment will be described. FIG. 2 is a diagram showing an example of the schematic structure of the heating device according to the embodiment. In this embodiment, the heating device 200 is installed separately from the plasma processing device 100 shown in FIG. 1 , and the wafer W is transported to the heating device 200 and the plasma processing device 100 by a transport mechanism such as a transport arm (not shown). .

The heating device 200 includes a treatment chamber 202 made of metal (for example, aluminum) and formed in a cylindrical shape (for example, a cylindrical shape).

A loading table 210 is provided at the bottom of the processing chamber 202 for loading the wafer W. The mounting table 210 is made of aluminum or the like and is formed into a cylindrical shape. A heater 211 is provided on the mounting table 210 . The heater 211 is connected to the heater power supply 212 and generates heat by the power supplied from the heater power supply 212 . The mounting table 210 controls the temperature of the wafer W by the heater 211. In addition, although not shown in the figure, various functions such as an electrostatic chuck that holds the wafer W by electrostatic force can be attached to the mounting table 210 as necessary.

The exhaust part 230 for discharging the ambient gas in the processing chamber 202 is connected to the bottom of the processing chamber 202 through the exhaust pipe 232 . The exhaust unit 230 is composed of, for example, a vacuum pump, and depressurizes the inside of the processing chamber 202 to a predetermined pressure. A wafer unloading entrance 234 is formed on the side wall of the processing chamber 202 . A gate valve 236 is provided at the wafer transfer inlet 234 . For example, when loading the wafer W, the gate valve 236 is opened, the wafer W is placed on the mounting table 210 in the processing chamber 202 by a transport mechanism such as a transport arm (not shown), the gate valve 236 is closed, and the wafer W is processed. processing.

The heating device 200 performs a heating process: using the heater 211, the wafer W placed on the mounting table 210 is heated to a predetermined temperature.

The heating device 200 having the above structure is integrally controlled by the control unit 290 . The control unit 290 is, for example, a computer and includes a CPU (Central Processing Unit), RAM (Random Access Memory), ROM (Read Only Memory), an auxiliary memory device, etc. The CPU operates according to the program stored in the ROM or auxiliary memory device and the process conditions of the plasma processing, and controls the operation of the entire device. In addition, the control unit 290 may be provided inside the heating device 200 or may be provided outside. When the control unit 290 is installed externally, the control unit 290 can control the heating device 200 through wired or wireless communication means.

Next, the substrate processing method of this embodiment will be described. When manufacturing a semiconductor device, a natural oxide film may be formed on the wafer W. There are cases where it is necessary to remove this natural oxide film.

FIG. 3 is a diagram showing an example of a wafer on which an oxide film is formed. In the wafer W, a SiO ₂ film 11 is provided on a silicon (Si) layer 10 serving as a base. On the SiO ₂ film 11, a pattern P is formed. In FIG. 3 , as a pattern P, an opening reaching the Si layer 10 is formed in the SiO ₂ film 11 . The wafer W is covered with the SiN film 12 on the top surface of the SiO ₂ film 11 and the side surface on which the pattern P is formed. In addition, in the wafer W, a natural oxide film 14 (SiO ₂ ) is formed on the Si layer 10 at the bottom where the pattern P is formed. Since the portion of the Si layer 10 that is the lower part of the natural oxide film 14 is changed to silicon germanium or the like, the pattern is changed and displayed. For example, it is conceivable to use the technology of Patent Document 1 to maintain the SiN film 12 and remove these natural oxide films 14 .

However, the SiN film 12 may be damaged in previous steps or the like. In this case, for example, if the technology of Patent Document 1 is used, the SiN film 12 is removed.

Therefore, in this embodiment, the following substrate processing is performed to remove oxide films such as the natural oxide film 14. FIG. 4 is a diagram illustrating an example of a substrate processing flow for removing an oxide film according to the embodiment. FIG. 4(A) shows the wafer W on which the natural oxide film 14 is formed, similarly to FIG. 3 .

First, a silicon-containing film is formed on the wafer W. For example, as shown in FIG. 4(B) , the SiO ₂ film 20 is formed on the wafer W by Atomic Layer Deposition (ALD). For example, the plasma processing apparatus 100 supplies a raw material gas containing silicon (Si) from the gas supply unit 120 to the processing chamber 102 so that the raw material gas is adsorbed on the surface of the wafer W. The adsorption amount of the raw material gas adsorbed on the wafer W increases with the supply time and becomes saturated. The saturation described here refers to a state in which chemical adsorption proceeds on the outermost surface and chemical adsorption cannot proceed further, or a state in which all adsorption sites are occupied and adsorption no longer proceeds. Next, the plasma processing apparatus 100 supplies the reaction gas from the gas supply unit 120 to the processing chamber 102 and applies high-frequency power to the antenna element 142 from the high-frequency power supply 150 to generate plasma. Thereby, the reaction gas is activated, and the active species of the reaction gas modify the raw material gas adsorbed on the wafer W to form a film. As the raw material gas, for example, tris(dimethylamino)silane (TDMAS) or bis(diethylamino)silane (BDEAS) can be used. As the reaction gas, an oxidizing gas such as oxygen (O ₂ ) gas can be used. The reaction gas is plasmatized and supplied to the wafer W. When ALD is used to form a film, the plasma processing apparatus 100 forms a thin film with a desired film thickness by repeating a cycle of alternately supplying the source gas and the reaction gas a plurality of times. In ALD, the adsorption amount of the raw material gas adsorbed on the wafer W is saturated, so that a film can be formed uniformly on the top, side and bottom surfaces of the pattern P.

Next, an etching gas is used, for example, fluorocarbon gas is used to generate plasma, an anisotropic etching process is performed on the wafer W, and the ALD film (SiO ₂ film 20 ) is etched back. The plasma processing apparatus 100 supplies fluorocarbon gas (CxFy) such as C ₄ F ₈ gas to the processing chamber 102 from the gas supply unit 120 , and applies high-frequency power to the antenna element 142 from the high-frequency power supply 150 to form plasma. etching. If fluorocarbon gas is used for etching, a large amount of deposits will be generated on the surface of the wafer W to form a film 21 . On the other hand, as shown in FIG. 4(C) , the SiO ₂ film 20 and the natural oxide film 14 at the bottom of the pattern P are etched and removed.

Next, a Chemical Removal (CR: chemical removal) process is performed to remove the ALD film (SiO ₂ film 20 ). CR treatment is a process in which the object to be removed is removed (etched) through a chemical reaction. The details of CR processing will be detailed later. Thereby, as shown in FIG. 4(D) , even if the SiN film 12 is damaged, the removal of the SiN film 12 can be suppressed and the natural oxide film 14 can be removed.

In the example of FIG. 4 , in order to selectively form the SiO ₂ film 20 in the area other than the bottom of the pattern P that is not an etching target on the wafer W, the SiO ₂ film 20 is isotropically formed by ALD. , etched back by anisotropic etching. However, the film forming method is not limited to ALD and may be any method. For example, the film formation method may also be Chemical Vapor Deposition (CVD: Chemical Vapor Deposition), Physical Vapor Deposition (PVD: Physical Vapor Deposition), Direct Current Superposition (DCS: DC Superposition), or unsaturated ALD. Unsaturated ALD is a combination of unsaturated adsorption of raw material gas, or unsaturated modification of raw material gas adsorbed on wafer W, or unsaturated adsorption of raw material gas and modification of raw material gas adsorbed on wafer W. ALD. In unsaturated ALD, in addition to the case where the raw material gas is not adsorbed on the entire surface, there are cases where the material gas is not modified at all. DCS is a film-forming method in which electrode materials are sputtered to form a film on a substrate. For example, in DCS, a negative DC voltage is applied to an upper electrode including an electrode material in a plasma processing device, and the electrode material is sputtered to form a film on the substrate. Details of DCS are disclosed, for example, in US Patent Application Publication No. 2018/0151333.

FIG. 5 is a diagram illustrating another example of a substrate processing flow for removing an oxide film according to the embodiment. FIG. 5(A) shows the wafer W on which the natural oxide film 14 is formed, similarly to FIG. 3 .

First, a silicon-containing film is formed on the wafer W. For example, as shown in FIG. 5(B) , the SiO ₂ film 20 is formed on the wafer W by CVD. For example, the plasma processing apparatus 100 supplies, for example, SiCl ₄ gas and O ₂ gas to the processing chamber 102 from the gas supply unit 120 , and applies high-frequency power to the antenna element 142 from the high-frequency power supply 150 to form plasma. Circle W forms _SiO2 film 20.

Then, for example, fluorocarbon gas is used to generate plasma, an anisotropic etching process is performed on the wafer W, and the SiO ₂ film 20 is etched back. Thereby, as shown in FIG. 5(C) , the SiO ₂ film 20 and the natural oxide film 14 at the bottom of the pattern P are mainly etched and removed.

Next, a CR process is performed to remove the SiO ₂ film 20 . The details of CR processing will be detailed later. Thereby, as shown in FIG. 5(D) , even if the SiN film 12 is damaged, the removal of the SiN film 12 can be suppressed and the natural oxide film 14 can be removed.

FIG. 6 is a diagram illustrating another example of a substrate processing flow for removing an oxide film according to the embodiment. FIG. 6(A) shows the wafer W on which the natural oxide film 14 is formed, similarly to FIG. 3 .

First, a silicon-containing film is formed on the wafer W. For example, as shown in FIG. 6(B) , the SiO ₂ film 20 is formed on the wafer W by unsaturated ALD. In unsaturated ALD, the SiO ₂ film 20 is formed on the surface of the wafer W and the side surface of the pattern P. Therefore, the SiO ₂ film 20 can be selectively formed on the wafer W in a region other than the bottom of the pattern P that is not an etching target without performing etching back.

Next, a CR process is performed to remove the SiO ₂ film 20 . The details of CR processing will be detailed later. Thereby, as shown in FIG. 6(C) , even if the SiN film 12 is damaged, the removal of the SiN film 12 can be suppressed and the natural oxide film 14 can be removed.

Next, the CR processing of this embodiment will be described. FIG. 7 is a diagram illustrating an example of the flow of CR processing in the embodiment. The wafer W shown in FIG. 7(A) has an SiO ₂ film 20 provided on the Si layer 10 serving as the base.

First, a reaction layer is formed by plasma on the surface layer of the wafer W provided with the SiO ₂ film 20 . The plasma processing apparatus 100 introduces gases such as NF ₃ gas, NH ₃ gas, and Ar gas from the gas supply part 120 to generate plasma. Thereby, as shown in FIG. 7(A) , NHxFy is generated. For example, NHxFy such as NH ₄ F, NH ₄ ·HF, etc. is produced by the following reaction.

NF ₃ +NH ₃ →NHxFy (NH ₄ F + NH ₄・HF, etc.)

The generated NH ₄ F and NH ₄ HF react with the SiO ₂ film as follows, as shown in Figure 7(B), to form (NH ₄ ) ₂ SiF ₆ (ammonium fluorosilicate) as reaction layer. Hereinafter, (NH ₄ ) ₂ SiF ₆ will also be referred to as “AFS”. In addition, in the CR process, the formation of AFS can also be performed only by gas supply. For example, AFS can be formed by supplying HF gas and NH ₃ gas. AFS, if plasma film formation is used, the reaction speed can be improved, and if plasma film formation is not used, the film can be formed without damage.

NHxFy＋SiO ₂ →（NH ₄ ） ₂ SiF ₆ ＋H ₂ O↑

AFS, if it is higher than 100℃, it will sublimate. Therefore, when forming the reaction layer, the wafer W is controlled to a predetermined temperature of 100° C. or lower. The plasma processing apparatus 100 controls the power supplied to the heater 111 from the heater power supply 112 to control the amount of heat generated by the heater 111, for example, thereby controlling the wafer W to a predetermined temperature of 100° C. or lower.

Next, energy is applied to the wafer W to remove the reaction layer. For example, the reaction layer can be removed by applying energy to the reaction layer using electron beam, plasma, heat, microwave, etc. For example, as shown in FIG. 7(C) , the wafer W is heated to remove the reaction layer. In this embodiment, the wafer W is heated to a predetermined temperature of 100°C or higher (for example, 300°C). As a result, the reaction shown below occurs, causing (NH ₄ ) ₂ SiF ₆ to sublime. Thereby, the film (eg, SiO ₂ film 20 ) is removed from the wafer W. In addition, the reaction layer can also be removed by imparting energy by electron beam, plasma, microwave, etc.

(NH ₄ ) ₂ SiF ₆ →SiF ₄ +2NH ₃ +2HF

Here, when the wafer W is heated to, for example, 300° C. by the plasma processing apparatus 100, the temperature of the mounting table 110 also becomes higher, and the time until the next wafer W can be subjected to substrate processing becomes longer. Productivity is reduced. The wafer W after the AFS is formed is transported to the heating device 200 , and the wafer W is heated to a predetermined temperature above 100° C. (for example, 300° C.) by the heating device 200 . In this way, by using the plasma processing apparatus 100 and the heating apparatus 200 to perform substrate processing, the temperature rise and fall time between processes can be reduced, thereby improving substrate processing productivity. In addition, in this embodiment, although the case where a substrate is processed by the plasma processing apparatus 100 and the heating apparatus 200 is demonstrated as an example, it is not limited to this form. For example, the wafer W can also be heated by the plasma processing apparatus 100 to remove the reaction layer. Thus, substrate processing can be performed using a single plasma processing chamber 102 .

CR treatment can remove SiO ₂ at a high etching rate compared to the etching rate of Si or SiN. FIG. 8 is a diagram showing an example of the etching amount caused by the CR process according to the embodiment. Figure 8 shows changes in the etching amounts of Si, SiN and _SiO2 when the plasma treatment time for introducing gases such as NF ₃ gas and NH ₃ gas to generate plasma is changed. As shown in Figure 8, in CR treatment, the etching amount of _SiO2 is larger than that of Si and SiN. Compared with the etching rate of Si or SiN, _SiO2 can be removed at a high etching rate.

In addition, in the CR process, pre-processing such as heating and plasma treatment may be performed to remove particles or adjust the state of the wafer W.

Next, the flow of substrate processing in this embodiment will be briefly explained. FIG. 9 is a flowchart showing an example of a substrate processing flow according to the embodiment. When performing substrate processing, the wafer W is transported by a transport mechanism and supplied to the heating device 200 and the plasma processing device 100 . On the wafer W, for example, as shown in FIG. 3 , a natural oxide film 14 is formed.

A silicon-containing film is formed on the wafer W (step S10). For example, the plasma processing apparatus 100 forms the SiO ₂ film 20 on the wafer W by ALD. Then, the plasma processing device 100 uses fluorocarbon gas to generate plasma, perform anisotropic etching process on the wafer W, and etch back the SiO ₂ film 20 . Thereby, the SiO ₂ film 20 and the natural oxide film 14 at the bottom of the pattern P are etched. In addition, for example, when the SiO ₂ film 20 can be formed on the surface of the wafer W and the side surface of the pattern P by unsaturated ALD as shown in FIG. 6 , etching back may not be performed.

Next, in order to adjust the state of the wafer W, preprocessing such as heating, plasma treatment, and inhibitor adsorption is performed (step S11 ). For example, in the plasma processing apparatus 100, power is supplied to the heater 111 from the heater power supply 112, and the wafer W is preheated by the heater 111.

Next, the wafer W is controlled to a predetermined temperature below 100°C so that the reaction layer (such as AFS) does not sublime (step S12). For example, the plasma processing apparatus 100 controls the power supplied to the heater 111 from the heater power supply 112 to control the amount of heat generated by the heater 111, thereby controlling the wafer W to a predetermined temperature of 100° C. or lower.

Next, a reaction layer is formed on the surface layer of the wafer W (step S13). For example, the plasma processing apparatus 100 introduces various gases used in CR processing such as NF ₃ gas, NH ₃ gas, and Ar gas from the gas supply unit 120 to generate plasma. Thereby, an AFS layer is formed on the wafer W as a reaction layer.

Next, the wafer W is heated to sublimate the reaction layer (for example, AFS), thereby removing the reaction layer (step S14). For example, the wafer W is transported to the heating device 200 , and the wafer W is heated to a predetermined temperature of 100° C. or higher (for example, 300° C.) by the heating device 200 . Thereby, the SiO ₂ film 20 is removed from the wafer W.

In addition, in the substrate processing of this embodiment, although steps S10 to S14 are performed once, steps S10 to S14 may be repeated a plurality of times as necessary.

As described above, in the substrate processing of this embodiment, a silicon-containing film (SiO ₂ ) is selectively formed in the first region (the region other than the bottom of the pattern P) of the processing target substrate (wafer W) having the pattern P. Next, the substrate is processed to form a reaction layer (AFS) by plasma on the surface layer of the substrate on which the silicon-containing film is formed. Next, in the substrate processing, the substrate is heated to remove the reaction layer, thereby removing the silicon-containing film formed in the second area (the bottom of the pattern P) other than the first area of the substrate. Thereby, the silicon-containing film formed in the second region can be removed by the substrate treatment in this embodiment.

In addition, on the substrate (wafer W), the pattern P reaching the silicon layer 10 is formed on the SiO ₂ film 11 provided on the silicon layer 10 , and the top surface of the SiO ₂ film 11 and the side surface of the pattern P are covered with the SiN film 12 . The silicon layer 10 at the bottom of P forms a natural oxide film 14. During the substrate processing, the SiO ₂ film 20 is formed at least on the side surface of the pattern P. In the substrate processing, NF ₃ gas and NH ₃ gas are supplied to generate plasma, which reacts with the SiO ₂ film 20 and the natural oxide film 14 to form (NH ₄ ) ₂ SiF ₆ as a reaction layer. In addition, during substrate processing, the natural oxide film 14 is removed by removing the reaction layer. Thereby, in the substrate processing of this embodiment, even if the SiN film 12 is damaged, the removal of the SiN film 12 can be suppressed and the natural oxide film 14 can be removed.

In addition, the substrate is processed so that the temperature of the substrate is 100° C. or lower to form a reaction layer. In addition, in the substrate processing, the temperature of the substrate is set to 100° C. or higher to sublimate the reaction layer. Thereby, the substrate processing in this embodiment can control the amount of etching to remove the silicon-containing film.

Although the embodiments have been described above, it should be understood that the embodiments disclosed this time are only illustrative in all respects and are not intended to limit the present invention. In fact, the above embodiments can be implemented in various forms. In addition, the above-described embodiments may be omitted, replaced, or modified in various forms without departing from the scope of the invention and its gist.

For example, in the embodiment, the case where the substrate to be processed is a semiconductor wafer has been described as an example, but the invention is not limited to this embodiment. The substrate to be processed may also be a glass substrate or other substrates.

In addition, in the embodiment, the case where the plasma processing apparatus 100 is an ICP type plasma processing apparatus has been described as an example, but the invention is not limited to this embodiment. The plasma treatment device 100 can also be any form of plasma treatment device. For example, the plasma processing device 100 may be a capacitively coupled parallel plate plasma processing device. In addition, the plasma treatment apparatus 100 may also be a microwave plasma, a magnetron plasma, a remote source type in which the radical-rich plasma generated by a remote source is supplied to the treatment chamber 102 through a pipe or the like. Pulp treatment equipment.

In addition, in the embodiment, the case where the wafer W is heated by the heater is explained as an example, but the invention is not limited to this embodiment. For example, if the wafer W can be heated, any heating method can be used. For example, the wafer W can also be heated by plasma, infrared lamp, electron beam irradiation, etc.

In addition, in the embodiment, the case where the substrate processing is performed by the plasma processing apparatus 100 and the heating apparatus 200 is explained as an example, but the invention is not limited to this embodiment. The substrate processing according to the embodiment may be implemented in combination with devices other than the plasma processing device 100 and the heating device 200 .

In addition, in the substrate processing of this embodiment, although the case where a silicon-containing film (SiO ₂ ) of the same type as the silicon-containing film such as SiO ₂ formed on the wafer W is formed is explained as an example, this does not Limited to this form. For example, during substrate processing, a silicon-containing film such as SiN that is different from SiO ₂ can also be formed. For example, in the substrate processing shown in FIG. 6, the SiO ₂ film 20 is formed, but the SiO ₂ film 20 can also be replaced by a SiN film formed on the wafer W by CVD or ALD, whereby the top surface of the pattern P and the pattern can be formed. A SiN film is formed on the side of P. The natural oxide film 14 can be removed by performing CR treatment. In addition, the SiN film 12 is covered with a new SiN film. Therefore, even if the SiN film 12 is damaged, removal of the SiN film 12 by the CR process can be suppressed.

In addition, although the substrate processing flow shown in FIG. 9 is explained by taking the case where the pre-processing (step S11 ) is performed after step S10 as an example, it is not limited to this form. For example, the preprocessing (step S11 ) can also be performed before step S10 or after step S12 .

In addition, the substrate processing in the embodiment includes: a substrate providing step to provide a substrate to be processed with a pattern; a film forming step to form a film on the substrate; a reaction layer forming step to form a reaction layer on the surface of the substrate using plasma; and reaction In the layer removal step, energy is applied to the substrate to remove the reaction layer. Through this, it is found that various other effects can be obtained. Below, an example is used to illustrate the effect.

For example, the amount of the reaction layer formed during CR treatment is temperature dependent. Therefore, the amount of SiO ₂ film removed by the CR process changes depending on the temperature of the wafer W when the reaction layer is formed. FIG. 10 is a diagram showing an example of changes in etching amount caused by temperature changes of the wafer according to the embodiment. FIG. 10 shows the change in the etching amount with respect to the processing time to generate the reaction layer when the temperature of the wafer W is 10°C, 50°C, and 90°C. When the temperature of the wafer W is 10° C., the etching amount increases as the processing time becomes longer. On the other hand, when the temperature of the wafer W is 90° C., even if the processing time becomes longer, the etching amount continues to move around zero, and almost no etching occurs. On the other hand, when the temperature of the wafer W is 50°C, if the processing time is short, the etching amount slightly increases according to the processing time. However, if the processing time is longer, the etching amount is saturated and the etching amount does not increase. In the example of Figure 10, when the temperature of the wafer W is 50°C, after the processing time is 40 seconds, the etching amount is saturated and the etching amount does not increase. Therefore, in the CR process, by controlling the temperature of the wafer W when the reaction layer is formed, the amount of the SiO ₂ film removed can be controlled. By repeating the CR process in which the temperature of the wafer W when the reaction layer is formed is a temperature at which the etching amount is saturated (for example, 50° C.), the etching amount of the SiO ₂ film can be controlled with high accuracy. In addition, by combining the film formation process with the CR process, the film thickness of the SiO ₂ film can be controlled with high accuracy.

In addition, in the CR process, when the pattern P formed on the SiO ₂ film 11 on the wafer W has uneven density, even if the same process is performed, the etching amount of the pattern P may still change according to the uneven density of the pattern P. condition. In addition, during the CR process, the etching amount of the pattern P also changes depending on the temperature of the wafer W when the reaction layer is formed. For example, in CR processing, when the temperature is low, the width of the sparse pattern P changes more than the dense pattern P. When the temperature is high, the width of the dense pattern P changes more than the sparse pattern P. Therefore, the CR process can control the width of the pattern P by controlling the temperature of the wafer W when forming the reaction layer.

In addition, by performing film formation processing and CR processing, the Line Width Roughness (LWR: Line Width Roughness) and Line Edge Roughness (LER: Line Edge Roughness) of the linear pattern P are improved. FIG. 11 is a diagram illustrating improvements in LWR and LER of linear patterns according to the embodiment. In FIG. 11(A) , a linear pattern P is shown. In the film formation process, a film of the same type as the pattern P is formed. For example, when the pattern P is formed on the SiO ₂ film, the SiO ₂ film is formed by CVD in the film formation process. In CVD, a large amount of film is formed where the width between patterns P is wide, and a small amount of film is formed where the width between patterns P is narrow. Thereby, as shown in FIG. 11(B) , the unevenness on the side of the linear pattern P is reduced. However, the width between patterns P becomes narrower due to film formation. Therefore, CR processing is performed on the linear pattern P. For example, the CR process is performed by setting the temperature of the wafer W to 50° C. when the reaction layer is generated. CR processing, etching isotropically. Thereby, as shown in FIG. 11(C) , the width between the patterns P can be returned to the same width as the original width. By repeatedly performing the film formation process and the CR process shown in FIGS. 11(A) to 11(C) , the LWR and LER of the linear pattern P are improved.

In addition, by performing film formation processing and CR processing, the shape of the pattern P can be controlled. Film formation treatment, film formation area and film formation amount vary depending on the film formation method. For example, in CVD, many films are formed on the upper part of the pattern P. ALD, uniform film formation. In CR processing, the upper part of the pattern P is etched slightly more than the lower part. Therefore, by repeatedly performing film formation processes such as CVD and ALD and CR processes, the shape of the pattern P can be controlled.

FIG. 12 is a diagram showing an example of shape change of a pattern according to the embodiment. Wafer W is shown in Figure 12(A). On the wafer W, a pattern P is provided on the base layer 30 (eg, silicon layer). The pattern P is formed on a SiO ₂ film, for example. In FIG. 12(A) , the pattern P is formed into a tapered shape with the width of the upper part smaller than the width of the lower part. For example, a SiO ₂ film 31 of the same type as the pattern P is formed on the wafer W by CVD. In CVD, the film formation becomes thicker toward the top. Thereby, as shown in FIG. 12(B) , the width of the pattern P becomes approximately the same as the width of the lower part (the cross section is rectangular). Thereafter, the SiO ₂ film was subjected to CR treatment. CR processing, etching isotropically and approximately uniformly. Thereby, as shown in FIG. 12(C) , the pattern P can be made into a shape in which the width of the upper part is approximately equal to the width of the lower part and the side surfaces are vertical. After that, the etching target film of the base may also be etched.

FIG. 13 is a diagram showing another example of the shape change of the pattern according to the embodiment. In Fig. 13(A), the pattern P in the initial state is shown. The pattern P in the initial state has a shape in which the width of the upper part and the width of the lower part are almost equal, and the side faces are vertical. FIG. 13(B) shows an example of the pattern P when CVD is performed on the pattern P in the initial state. In CVD, the longer the film formation time, the thicker the upper film will be. By appropriately controlling the film formation time of CVD, the pattern P becomes an inverse tapered shape with an upper width wider than a lower width. Next, the SiO ₂ film 31 is subjected to CR processing. CR processing, etching isotropically and approximately uniformly. Thereby, as shown in FIG. 13(C) , the pattern P can be made into an inverse tapered shape with a lower width smaller than the original one. The film to be etched can be etched using the pattern whose shape has been changed.

FIG. 14 is a diagram showing another example of the shape change of the pattern according to the embodiment. In FIG. 14(A) , a pattern P is provided above the base layer 30 . In addition, the SiO ₂ film 31 is formed on the top of the pattern P, for example, by performing CVD and CR processes. The pattern P increases in height by forming the SiO ₂ film 31 so that the upper width and the lower width are almost equal to the initial state. If the CR process is further performed, the width of the pattern P can be reduced as shown in FIG. 14(B) . The film to be etched can be etched using the pattern whose shape has been changed.

In this way, by performing the film formation process and the CR process, the shape of the pattern P (the shape of the mask) can be controlled.

In addition, a silicon-containing film or an organic film formed during the film formation process can be used as a mask for etching. In addition, a silicon-containing film or an organic film formed during the film formation process can be used as a protective film for etching.

FIG. 15 is a diagram showing an example of etching using the film according to the embodiment as a mask. As shown in FIG. 15(A) , a film 40 to be etched is provided on the wafer W. The film 40 to be etched is, for example, a Si film or a SiN film. On the etched film 40, a mask 41 (for example, SiO ₂ film) is provided. On the mask 41, a pattern P is formed. For example, a film 42 of the same type as the mask 41 (for example, a SiO ₂ film) is formed on the wafer W by CVD or ALD. Thereby, the mask 41 can be thickened. Using the mask 41, the etched film 40 is etched. When the film 40 to be etched is a Si film, it is etched with halogen gas. When the film 40 to be etched is a SiN film, it is etched with CHF gas. Here, as shown in FIG. 15(A) , the mask 41 can be thickened, so that the etching can be performed for a longer period of time than the film 40 to be etched. As shown in FIG. 15(B) , the etched film 40 is etched along the pattern P. Then, the film 42 is removed. For example, CR treatment is performed to remove the SiO ₂ film. Thereby, as shown in FIG. 15(C) , the SiO ₂ film such as the mask 41 and the film 42 can be removed.

FIG. 16 is a diagram showing an example of etching using the film according to the embodiment as a protective film. As shown in FIG. 16(A) , a film 40 to be etched is provided on the wafer W. The film 40 to be etched is, for example, a Si film or a SiN film. On the etched film 40, a mask 41 (for example, SiO ₂ film) is provided. On the mask 41, a pattern P is formed. The etched film 40 is etched along the pattern P to form holes H. For example, ALD is used to form a film 42 (for example, a SiO ₂ film) on the wafer W. Thereby, as shown in FIG. 16(A) , the surface of the mask 41 and the inner surface of the hole H of the etched film 40 are covered and protected by the film 42 . Then, the wafer W is etched by anisotropic etching. Thereby, as shown in FIG. 16(B) , the side walls of the hole H can be protected with the film 42 and the hole H can be etched deeper. Next, CR treatment is performed to remove the SiO ₂ film. Thereby, as shown in FIG. 16(C) , the mask 41 and the film 42 can be removed.

Next, the flow of the substrate processing including the etching process as described above will be described. FIG. 17 is a flowchart showing another example of the substrate processing flow according to the embodiment. The substrate processing shown in FIG. 17 further includes an etching step of the wafer W (step S20 ) after S10 shown in FIG. 9 . Thereby, the pattern (mask) can be protected, and therefore the film 40 to be etched can be etched for a longer period of time. In addition, the sidewalls of the hole H can be protected and the hole H can be etched deeper. In addition, although the substrate processing flow shown in FIG. 17 is explained by taking the case where step S20 is performed after step S10 as an example, it is not limited to this form. For example, step S20 can also be implemented after step S14.

Therefore, CR treatment forms a reaction layer (AFS) on a silicon-containing film such as SiO ₂ film, and sublimates the reaction layer to etch the silicon-containing film. However, when a silicon-containing film is formed with a film that hinders the formation of the reaction layer and the sublimation of the reaction layer, the CR process inhibits etching of the silicon-containing film. FIG. 18A is a diagram showing an example of a film serving as a hindrance factor according to the embodiment. For example, AFS cannot be formed on carbon films. Therefore, when the carbon film (hereinafter also referred to as "carbon film") 51 is formed on the silicon-containing film 50 , AFS is not formed even if the CR process is performed, and thus etching of the silicon-containing film 50 is inhibited. FIG. 18B is a diagram showing another example of a film serving as a hindrance factor according to the embodiment. For example, if a gas of SiCl ₄ or SiBr ₄ is supplied, a film 52 made of SiClx or SiBrx is formed on the silicon-containing film 50 . When the SiClx or SiBrx film 52 is formed on the silicon-containing film 50, if NF ₃ gas, NH ₃ gas, and Ar gas are supplied during the formation of the AFS, the film 52 will be reformed together with the AFS into NH ₄ F, NH ₄ Cl, Film 53 produced by non-volatile substances such as NH ₄ Br. Therefore, when the film 52 of SiClx or SiBrx is formed on the silicon-containing film 50 , AFS is not easily volatilized even if the CR process is performed, thereby hindering etching of the silicon-containing film 50 .

FIG. 19 is a diagram illustrating an example of the shape change of the pattern caused by the CR process according to the embodiment. FIG. 19(A) shows an example of wafer W. On the wafer W, a SiO ₂ film 32 is provided on a base layer 30 (for example, a silicon layer) serving as the base. On the SiO ₂ film 32, a pattern P is formed. FIG. 19 shows the shape change of the pattern P caused by the CR process when the wafer W is not provided with a film that acts as an inhibitory factor. In the CR process, various gases such as NF ₃ gas, NH ₃ gas, and Ar gas are introduced to generate plasma. Thereby, the AFS layer 33 is formed on the SiO ₂ film 32 as shown in FIG. 19(B) . Then, in the CR process, the wafer W is heated to remove the AFS layer 33 . Thereby, as shown in FIG. 19(C) , the SiO ₂ film 32 is etched, so that the entire pattern P becomes smaller, and the width between the patterns P becomes wider.

FIG. 20 is a diagram illustrating an example of the shape change of the pattern caused by the film formation process and the CR process according to the embodiment. FIG. 20(A) shows the wafer W on which the pattern P is formed, similarly to FIG. 19 . FIG. 20 shows the shape change of the pattern caused by the CR process when a film serving as an inhibitor is formed. For example, CH ₄ or Ar gas is supplied to generate plasma, and as shown in FIG. 20(B) , a carbon film 51 is formed on the wafer W as a film that acts as a hindrance factor. In addition, the carbon film 51 can also be formed by ALD. When the CR process is performed on the wafer W on which the carbon film 51 is formed, the carbon film 51 is not etched because AFS is not formed on the carbon film 51 as shown in FIG. 20(C) . By supplying O ₂ gas and generating plasma, the carbon film 51 can be removed as shown in FIG. 20(D) .

FIG. 21 is a diagram showing an example of pattern changes caused by film formation processing and CR processing according to the embodiment. "Initial" in FIG. 21 shows the initial shape of the pattern P formed on the wafer W. In addition, the height of the pattern P is displayed. In addition, the width between the patterns P above the pattern P is displayed as Top - CD (Critical Dimension, critical dimension).

"CR" in Fig. 21 shows the shape change of the pattern P when the CR process is performed without providing a film that acts as an inhibitor. "CR" is the result of executing CR processing for 5 cycles. "CR" reduces the height of pattern P from the initial state. In addition, in "CR", the width of pattern P decreases from the initial state, so the width between patterns P (Top-CD) increases from the initial state.

"SiCl4+CR" in Figure 21 shows the shape change of the pattern P when SiClx is formed as a film that acts as an inhibitor and a CR process is performed. "SiCl4+CR" is the result of executing five cycles of the following steps as one cycle: supplying _SiCl4 gas and generating plasma to form a SiClx film on the _SiO2 film 32, then performing CR processing, supplying _O2 gas, and Plasma is generated to remove SiClx. In "SiCl4+CR", due to the influence of SiClx film formation, the height of pattern P slightly increases from the initial state. In addition, in "SiCl4+CR", due to the influence of SiClx film formation, the width of pattern P also slightly increases in the lateral direction, and the width between pattern P (Top-CD) slightly decreases from the initial state.

"Carbon + CR" in Figure 21 shows the shape change of the pattern P when a carbon film is formed as a film that serves as an inhibitory factor and a CR process is performed. "Carbon + CR" is the result of performing five cycles of the following steps as one cycle: supplying SiCl ₄ gas and generating plasma to form a carbon film on the SiO ₂ film 32, then performing CR processing, supplying O ₂ gas, and Plasma is generated to remove the carbon film. In "carbon + CR", the height of pattern P and the width between patterns P are approximately the same as in the initial state.

FIG. 22 is a diagram showing an example of changes in the height and width of the pattern according to the embodiment. The lower part of Figure 22 shows the change amount of the height (Height) of the pattern P from the "initial" and the width of the pattern P ( CD/2) change amount. In addition, both sides of the pattern P are etched, so the change in the width of the pattern P is 1/2 of the change in the width (Top-CD) between the patterns P from the "initial" value. In addition, in the upper part of Figure 22, the change amount of the height (Height) of the pattern P from the "initial" and the width of the pattern P (CD/2) are shown for "CR", "SiCl4+CR", and "Carbon+CR" ) is displayed on the chart as the etching amount. For example, in "CR", the change amount of the height (Height) of the pattern P becomes 9nm, the change amount of the width (CD/2) of the pattern P becomes 8.4nm, and the pattern P is etched both vertically and horizontally. "SiCl4+CR", the change amount of the height (Height) of the pattern P becomes -4.2nm, the change amount of the width (CD/2) of the pattern P becomes -0.6nm, and the pattern P increases vertically under the influence of SiClx film formation. "Carbon + CR", the change amount of the height (Height) of the pattern P becomes 0.905nm, and the change amount of the width (CD/2) of the pattern P becomes -1.3nm. Since the change of the height of the pattern P and the width between the pattern P is small , so the etching of pattern P is hindered.

In the substrate processing according to the embodiment, the shape of the pattern P can be controlled by performing a CR process after forming these films that serve as hindrance factors. FIG. 23 is a diagram illustrating an example of the shape change of the pattern caused by the film formation process and the CR process according to the embodiment. FIG. 23(A) shows the wafer W on which the pattern P is formed, similarly to FIG. 19 . For example, CH ₄ or Ar gas is supplied to generate plasma, and as shown in FIG. 23(B) , a carbon film 51 is formed on the wafer W as a film that serves as a hindrance factor. In addition, the carbon film 51 can also be formed by ALD. Then, O ₂ gas is introduced to generate plasma, and as shown in FIG. 23(C) , the carbon film 51 on the upper part of the pattern P is removed. The plasma generated by the O ₂ gas etches the carbon film 51 from the upper side of the pattern P. Therefore, by adjusting conditions such as the plasma treatment time, the carbon film 51 on the top of the pattern P can be removed. In this way, the CR process is performed on the wafer W from which the carbon film 51 on the upper part of the pattern P has been removed. In the CR process, as shown in FIG. 23(D) , the AFS layer 33 is formed on the top of the pattern P from which the carbon film 51 has been removed. Therefore, the upper side of the pattern P is etched. Then, O ₂ gas is supplied to generate plasma, and the carbon film 51 is removed. Thereby, as shown in FIG. 23(E) , the height of the pattern P can be reduced without greatly changing the width of the pattern P.

FIG. 24 is a diagram showing an example of pattern changes caused by film formation processing and CR processing according to the embodiment. FIG. 24 shows the shape changes of the pattern P of "initial", "CR", and "carbon + CR" shown in FIG. 21 .

"Carbon + Mod. + CR" in Fig. 24 shows the shape change of the pattern P when the carbon film 51 is formed as a film that acts as an inhibitor, the carbon film 51 on the upper part of the pattern P is removed, and CR processing is performed, as shown in Fig. 23 . In "Carbon + Mod. + CR", the height of pattern P decreases from the initial state. In addition, in "Carbon + Mod. + CR", the width of pattern P slightly decreases from the initial state, and the width between patterns P slightly increases from the initial state. This reason is because the carbon film 51 on the upper side of the pattern P is removed and the side surface on the upper side of the pattern P is also etched. As shown in Figure 23, in "Carbon + Mod. + CR", the width decreases above the pattern P.

FIG. 25 is a diagram showing an example of changes in the height and width of the pattern according to the embodiment. The lower part of Figure 25 shows the change amount of the height (Height) of the pattern P from the "initial" for "CR", "Carbon + CR", and "Carbon + Mod. + CR" shown in Figure 24, and the pattern P. The change in width (CD/2). "CR" and "carbon + CR" are the same as shown in Figure 22. In addition, in the upper part of Figure 24, the change amount of the height (Height) of the pattern P from the "initial" and the width of the pattern P ( The change amount of CD/2) is shown in the graph as the etching amount. "Carbon + Mod. + CR", the change amount of the height (Height) of the pattern P becomes 11.6nm, the change amount of the width (CD/2) of the pattern P becomes 3.565nm, and the lateral direction of the pattern P is etched more than the vertical direction. In this way, by performing the film formation process and CR process of the film that serves as a hindrance factor, the pattern P can be etched more in the vertical direction than in the lateral direction, and the shape of the pattern P (shape of the mask) can be controlled.

In addition, in the plasma processing apparatus 100 of the above embodiment, the case where one heater 111 is provided on the entire mounting surface of the mounting table 110 on which the wafer W is mounted to control the temperature of the wafer W is explained as an example. But it is not limited to this form. It is also possible to divide the mounting surface of the mounting table 110 into a plurality of areas, provide the heater 111 in each area, and control the temperature of the wafer W in each area. The mounting surface of the mounting table 110 may be divided into concentric circles, and may further be divided in the circumferential direction. FIG. 26 is a diagram showing an example of area division of the mounting surface of the mounting table according to the embodiment. In FIG. 26 , the mounting surface 115 of the mounting base 110 is shown. The wafer W is placed on the placement surface 115 . The placement surface 115 is divided into a plurality of areas 116 . In the example of FIG. 26 , the mounting surface 115 is divided into concentric circles and is further divided in the circumferential direction. In film formation treatment and CR treatment, the film formation amount and etching amount change depending on the temperature. Therefore, by dividing the mounting surface 115 into a plurality of areas 116 and controlling the temperature of the wafer W in each area 116, the pattern P can be controlled in each area of the wafer W corresponding to each area 116. shape. For example, during the film formation process, the CD of the pattern P is often uneven at the center and edge of the wafer W. Therefore, by controlling the temperature of each area 116 of the mounting surface 115 of the mounting table 110 so as to reduce the CD unevenness, the CD of the formed pattern P can be made uniform. In addition, the temperature control is not limited to the control to make the CD of the pattern P uniform, but may also be controlled to make the CD of the pattern P non-uniform. For example, if the CD of the pattern P becomes uneven at the center and edge of the wafer W in subsequent steps, in order to make the CD of the pattern P uniform after the subsequent steps, the temperature of each area 116 can also be controlled to make the CD of the pattern P uniform. CD becomes uneven at the center and edge of wafer W.

FIG. 27 is a diagram for explaining an example of the relationship between the temperature of the object to be processed and the amount of film formation in the embodiment. The wafer W processed in the substrate processing apparatus is, for example, in the shape of a disk with a diameter of about 300 mm. It is known that when a film formation process is performed on a wafer W, the amount of film formation changes depending on the temperature of the wafer W. Figure 27(A) shows the relationship between the temperature of the wafer W and the film formation amount. As shown in FIG. 27(A) , as the temperature of the wafer W becomes higher, the amount of film formation increases, and as the temperature of the wafer W becomes lower, the amount of film formation decreases.

On the other hand, it is known that when processing such as etching is performed, shape abnormalities (eg, bending) tend to become smaller at the center portion of the wafer W and to become larger at the edge portions of the wafer W.

Therefore, the temperature of each area 116 of the mounting table 110 is controlled so that the temperature of the center portion, which tends to have an abnormally small shape, becomes lower than the temperature of the edge portion, which tends to have an abnormally large shape. By controlling in this way, the film thickness of the formed film can be adjusted according to the radial position of the wafer W, and the in-plane uniformity of the formed film can be improved.

In addition, in order to control the film thickness, as shown in Figure 27(B), a plurality of areas divided in the radial direction and the circumferential direction are provided so that their temperatures can be controlled independently, thereby improving in-plane uniformity. In addition, temperature control can also be used. For example, a process of changing the thickness of a film formed at each location on the wafer W may be implemented.

10: Silicon layer (Si layer) 11, 20, 31, 32: SiO ₂ film 12: SiN film 14: Natural oxide film 21: Film 30: Base layer 33: AFS layer 40: Etched film 41: Mask 42 : Film 50: Silicon-containing film 51: Carbon film 52: Film of SiClx or SiBrx 53: Film of NH ₄ F, NH ₄ Cl, NH ₄ Br, etc. 100: Plasma treatment device 102, 202: Processing chamber (chamber) 104: Dielectric material 110, 210: Mounting table 111, 211: Heater 112, 212: Heater power supply 115: Mounting surface 116: Area 120: Gas supply part 121: Gas inlet 122: Gas supply pipe 130, 230 :Exhaust part 132, 232: Exhaust pipe 134, 234: Wafer transfer inlet and outlet 136, 236: Gate valve 140: High frequency antenna 142: Antenna element 150: High frequency power supply 190, 290: Control part 191: Process controller 192 : User interface 193: Memory unit 200: Heating device H: Hole P: Pattern W: Wafer

FIG. 1 is a diagram showing an example of the schematic configuration of the plasma processing apparatus according to the embodiment. FIG. 2 is a diagram showing an example of the schematic structure of the heating device according to the embodiment. FIG. 3 is a diagram showing an example of a wafer on which an oxide film is formed. 4(A) to 4(D) are diagrams illustrating an example of a substrate processing flow for removing an oxide film according to the embodiment. FIGS. 5(A) to 5(D) are diagrams illustrating another example of a substrate processing flow for removing an oxide film according to the embodiment. 6(A) to 6(C) are diagrams illustrating another example of the substrate processing flow for removing an oxide film according to the embodiment. FIGS. 7(A) to 7(D) are diagrams illustrating an example of the flow of CR (Chemical Removal) processing according to the embodiment. FIG. 8 is a diagram showing an example of the etching amount caused by the CR process according to the embodiment. FIG. 9 is a flowchart showing an example of a substrate processing flow according to the embodiment. FIG. 10 is a diagram showing an example of changes in etching amount caused by temperature changes of the wafer according to the embodiment. 11 (A) to (C) are diagrams illustrating improvements in LWR (Line Width Roughness) and LER (Line Edge Roughness) in linear patterns according to the embodiment. FIGS. 12(A) to 12(C) are diagrams showing an example of the shape change of the pattern according to the embodiment. FIGS. 13(A) to 13(C) are diagrams showing another example of the shape change of the pattern according to the embodiment. FIGS. 14(A) and 14(B) are diagrams showing another example of the shape change of the pattern according to the embodiment. FIGS. 15(A) to 15(C) are diagrams showing an example of etching using the film of the embodiment as a mask. FIGS. 16(A) to 16(C) are diagrams showing an example of etching using the film according to the embodiment as a protective film. FIG. 17 is a flowchart showing another example of the substrate processing flow according to the embodiment. FIG. 18A is a diagram showing an example of a film serving as a hindrance factor according to the embodiment. FIG. 18B is a diagram showing another example of a film serving as a hindrance factor according to the embodiment. FIGS. 19(A) to 19(C) are diagrams illustrating an example of the shape change of the pattern caused by the CR process according to the embodiment. FIGS. 20(A) to 20(D) are diagrams illustrating an example of the shape change of the pattern caused by the film formation process and the CR process according to the embodiment. FIG. 21 is a diagram showing an example of pattern changes caused by film formation processing and CR processing according to the embodiment. FIG. 22 is a diagram showing an example of changes in the height and width of the pattern according to the embodiment. FIGS. 23(A) to 23(E) are diagrams illustrating an example of the shape change of the pattern caused by the film formation process and the CR process according to the embodiment. FIG. 24 is a diagram showing an example of pattern changes caused by film formation processing and CR processing according to the embodiment. FIG. 25 is a diagram showing an example of changes in the height and width of the pattern according to the embodiment. FIG. 26 is a diagram showing an example of area division of the mounting surface of the mounting table according to the embodiment. 27 (A) and (B) are diagrams for explaining an example of the relationship between the temperature of the object to be processed and the amount of film formation in the embodiment.

10: Silicon layer (Si layer)

11, 20: SiO ₂ film

12:SiN film

14:Natural oxide film

21:Membrane

P:Pattern

W:wafer

Claims (9)

A substrate processing method, including: a substrate providing step to provide a processing target substrate with a pattern; a film forming step to form a film on the substrate; a reaction layer forming step to form a reaction layer on the surface of the substrate by plasma; and a reaction layer The removal step is to apply energy to the substrate to remove the reaction layer; the film formation step is to selectively form a silicon-containing film in the first region of the substrate; the reaction layer removal step is to remove the reaction layer. The silicon-containing film formed in the second region other than the first region of the substrate is removed. A substrate processing method, including: a substrate providing step to provide a processing target substrate with a pattern; a film forming step to form a film on the substrate; a reaction layer forming step to form a reaction layer on the surface of the substrate by plasma; and a reaction layer In the removal step, energy is applied to the substrate to remove the reaction layer; the substrate forms a pattern on the SiO ₂ film disposed on the silicon layer to reach the silicon layer, and covers the top surface of the SiO ₂ film and the side surfaces of the pattern with the SiN film , forming a natural oxide film on the silicon layer at the bottom of the pattern; the film forming step forms an SiO ₂ film at least on the side of the pattern; the reaction layer forming step supplies NF ₃ gas and NH ₃ gas and generates plasma, allowing them to interact with The SiO ₂ film reacts with the natural oxide film to form a reaction layer (NH ₄ ) ₂ SiF ₆ ; in the reaction layer removal step, the natural oxide film is removed by removing the reaction layer. For example, if the substrate processing method in item 1 or 2 of the patent scope is applied for, where: The reaction layer forming step is to make the temperature of the substrate below 100°C to form the reaction layer; the reaction layer removal step is to make the substrate temperature to be above 100°C to sublimate the reaction layer. For example, in the substrate processing method of claim 1, the film forming step forms a silicon-containing film of the same type as the silicon-containing film formed on the substrate. For example, in the substrate processing method of Item 1 of the patent application, in the film forming step, the silicon-containing film formed on the substrate is a different type of silicon-containing film. For example, the substrate processing method in Item 1 or 2 of the patent scope further includes an etching step. A substrate processing method, including: a film forming step, using plasma to form a film containing a silicon film on a patterned substrate, and controlling the film forming area and controlling the film forming amount in the film forming area; a plasma generating step , after the film forming step, plasma is generated in a processing chamber equipped with the substrate to form a reaction layer containing ammonium fluorosilicate (ammonium fluorosilicate) on the surface of the film; and an energy imparting step is performed on the surface of the film The substrate with the reaction layer formed on the surface is given energy to remove the reaction layer; in the plasma generation step, the substrate is set to below 100°C; in the energy giving step, the substrate is set to 100°C °C or above; the substrate processing method further includes: a changing step of removing a part of the pattern and changing one or both of the size and shape of the pattern. A substrate processing method, including: a film forming step, forming a film on a substrate with a pattern; a plasma generating step, after the film forming step, generating plasma in a processing chamber equipped with the substrate to form a film on the surface of the film a reaction layer; and an energy applying step, applying energy to the substrate with the reaction layer formed on the surface of the film to remove the reaction layer; the pattern of the substrate is formed on the substrate in such a way as to reach the silicon layer. On the first SiO ₂ film of the silicon layer, the top surface of the first SiO ₂ film and the side surfaces of the pattern are covered with a SiN film, and a natural oxide film is formed on the silicon layer at the bottom of the pattern; in the film forming step , forming a second SiO ₂ film at least on the side of the pattern; in the plasma generation step, the plasma is generated while supplying reactive gas to the processing chamber, the second SiO ₂ film and the natural oxide film It reacts with the reactive gas to form the reaction layer; in the energy giving step, the natural oxide film is removed by removing the reaction layer. A substrate processing method, including: a natural oxide film forming step, by forming a pattern on a first silicon-containing film of a silicon layer provided on a substrate, so that a natural oxide film is formed on the silicon layer at the bottom of the pattern; SiN film covering Steps of covering the top surface of the first silicon-containing film and the side surfaces of the pattern with a SiN film; a second silicon-containing film forming step of forming a second silicon-containing film on at least the side surface of the pattern; and a plasma generation step of disposing The processing chamber with the substrate generates plasma to form a reaction layer on the surface of the second silicon-containing film; and an energy applying step provides energy to the substrate with the reaction layer formed on the surface of the second silicon-containing film. , to remove the reaction layer.

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