TWI694511B - 晶圓的加工方法 - Google Patents

晶圓的加工方法 Download PDF

Info

Publication number
TWI694511B
TWI694511B TW105121416A TW105121416A TWI694511B TW I694511 B TWI694511 B TW I694511B TW 105121416 A TW105121416 A TW 105121416A TW 105121416 A TW105121416 A TW 105121416A TW I694511 B TWI694511 B TW I694511B
Authority
TW
Taiwan
Prior art keywords
wafer
starting point
separation
forming
dividing
Prior art date
Application number
TW105121416A
Other languages
English (en)
Other versions
TW201712747A (zh
Inventor
平田和也
西野曜子
Original Assignee
日商迪思科股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商迪思科股份有限公司 filed Critical 日商迪思科股份有限公司
Publication of TW201712747A publication Critical patent/TW201712747A/zh
Application granted granted Critical
Publication of TWI694511B publication Critical patent/TWI694511B/zh

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8213Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using SiC technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • H01L21/7813Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate leaving a reusable substrate, e.g. epitaxial lift off
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/0006Working by laser beam, e.g. welding, cutting or boring taking account of the properties of the material involved
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/08Devices involving relative movement between laser beam and workpiece
    • B23K26/083Devices involving movement of the workpiece in at least one axial direction
    • B23K26/0853Devices involving movement of the workpiece in at least in two axial directions, e.g. in a plane
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/50Working by transmitting the laser beam through or within the workpiece
    • B23K26/53Working by transmitting the laser beam through or within the workpiece for modifying or reforming the material inside the workpiece, e.g. for producing break initiation cracks
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B7/00Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
    • B24B7/20Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground
    • B24B7/22Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
    • B24B7/228Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain for grinding thin, brittle parts, e.g. semiconductors, wafers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02013Grinding, lapping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8258Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using a combination of technologies covered by H01L21/8206, H01L21/8213, H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2103/00Materials to be soldered, welded or cut
    • B23K2103/50Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26
    • B23K2103/56Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26 semiconducting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54426Marks applied to semiconductor devices or parts for alignment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54453Marks applied to semiconductor devices or parts for use prior to dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54493Peripheral marks on wafers, e.g. orientation flats, notches, lot number

Abstract

本發明的課題為提供一種將由正面上具有複數個元件的SiC基板所構成的晶圓薄化至預定的厚度,並且分割成一個個的元件晶片的晶圓的加工方法。解決手段是將具有第一面及與該第一面為相反側的第二面、從該第一面到該第二面之c軸、以及與該c軸正交之c面的SiC基板所構成的晶圓分割成一個個的元件晶片的晶圓的加工方法,其包含:分離起點形成步驟,將對SiC基板具有穿透性之波長的雷射光束之聚光點從該第一面或該第二面定位至相當於元件晶片的成品厚度之區域上,並且一邊將該聚光點與SiC基板相對地移動一邊照射雷射光束,以形成與該第一面平行之改質層及裂隙來作為分離起點;元件形成步驟,實施該分離起點形成步驟後,將複數個元件形成在該第一面上以複數條相互交叉的分割預定線所區劃出的區域中;分割起點形成步驟,實施該元件形成步驟後,沿形成於該第一面的該複數條分割預定線形成深度相當於元件晶片的成品厚度之分割起點;保護構件配置步驟,實施該分割起點形成步驟後,在該第一面配置保護構件;及晶圓分離步驟,實施該保護構件配置步驟後,賦予外力以由該分離起點將具有該第二面之晶圓從具有形成有複數個元件的該第一面的晶圓分離。

Description

晶圓的加工方法 發明領域
本發明是有關於將在SiC基板的正面上形成有複數個元件的晶圓分割成一個個的元件晶片之晶圓的加工方法。
發明背景
IC、LSI等之各種元件,是形成在以矽基板為素材之晶圓的正面積層機能層,而在此機能層藉由複數條分割預定線所區劃出的區域中。然後,藉由磨削裝置磨削晶圓的背面而將晶圓薄化至預定的厚度後,以切削裝置、雷射加工裝置等之加工裝置對晶圓的分割預定線施行加工,而將晶圓分割成一個個的元件晶片,且分割後的元件晶片可被廣泛地利用在行動電話、個人電腦等之各種電子機器上。
又,電力元件或LED、LD等之光元件,是形成在以SiC基板為素材之晶圓的正面積層機能層,而在此機能層藉由複數條分割預定線所區劃出的區域中。
然後,與上述的矽晶圓同樣地,藉由磨削裝置磨削晶圓的背面以薄化至預定的厚度後,以切削裝置、雷射 加工裝置等對晶圓的分割預定線施行加工,而將晶圓分割成一個個的元件晶片,且分割後的元件晶片可被廣泛地利用在各種電子機器上。
先前技術文獻 專利文獻
專利文獻1:日本專利特開2002-373870號公報
發明概要
不過,相較於矽基板,SiC基板的莫氏硬度非常高,當以具備有磨削磨石的磨削輪來磨削由SiC基板構成的晶圓之背面時,會磨耗磨削量的4~5倍左右的磨削磨石,而有非常不符經濟效益之問題。
例如,相對於將矽基板磨削100μm時磨削磨石會磨耗0.1μm,當將SiC基板磨削100μm時磨削磨石會磨耗400~500μm,相較於磨削矽基板的情況磨耗4000~5000倍。
本發明是有鑒於這樣的問題點而作成的發明,其目的在於提供一種將正面上具有複數個元件之由SiC基板所構成的晶圓薄化至預定厚度並且分割成一個個的元件晶片之晶圓的加工方法。
依據本發明所提供的一種晶圓的加工方法,是將具有第一面及與該第一面為相反側的第二面、從該第一面 到該第二面之c軸、以及與該c軸正交之c面的SiC基板所構成的晶圓分割成一個個的元件晶片,該晶圓的加工方法之特徵在於具備:分離起點形成步驟,將對SiC基板具有穿透性之波長的雷射光束之聚光點從該第一面或該第二面定位至相當於元件晶片的成品厚度之區域上,並且一邊將該聚光點與SiC基板相對地移動一邊照射雷射光束,以形成與該第一面平行之改質層及從該改質層沿c面延伸之裂隙來作為分離起點;元件形成步驟,實施該分離起點形成步驟後,將複數個元件形成在該第一面上以複數條相互交叉的分割預定線所區劃出的區域中;分割起點形成步驟,實施該元件形成步驟後,沿形成於該第一面的該複數條分割預定線形成深度相當於元件晶片的成品厚度之分割起點;保護構件配置步驟,實施該分割起點形成步驟後,在該第一面配置保護構件;及晶圓分離步驟,實施該保護構件配置步驟後,賦予外力以由該分離起點將具有該第二面之晶圓從具有形成有複數個元件的該第一面的晶圓分離,且該分離起點形成步驟包含:改質層形成步驟,該c軸相對於該第二面之垂直線傾斜偏角角度,並在與於該第二面及該c面之間形成偏角之方向正交的方向上相對地移動雷射光束的聚光點以形成直線狀 的改質層;及分度步驟,在形成該偏角的方向上將該聚光點相對地移動而分度移動預定量。
較理想的是,在晶圓分離步驟中,是藉由分離具有第二面的晶圓,而將具有第一面的晶圓分割成一個個的元件晶片。
較理想的是,實施晶圓分離步驟後,對具有形成有複數個元件的第一面之晶圓的背面進行磨削,以形成平坦化,並分割成一個個的元件晶片。
依據本發明的晶圓的加工方法,由於是在於第一面形成複數個元件前,實施於晶圓的整個內部形成由改質層及從改質層沿c面延伸的裂隙所形成之分離起點的分離起點形成步驟,之後,於第一面形成複數個元件後,實施分割起點形成步驟,並於之後對晶圓賦予外力而將改質層以及裂隙作為分離起點將晶圓分離成二個,因此毋須以磨削磨石磨削SiC基板的第二面,就能做到薄化並分割成一個個的元件晶片,且能解決使磨削磨石磨耗而不符經濟效益的問題。
又,在將薄化後的晶圓之背面磨削以形成平坦化時,只要將晶圓的背面磨削1~5μm左右即可,而可以將此時的磨削磨石的磨耗量抑制在4~25μm左右。此外,由於能將分離後的具有第二面的晶圓再利用作為SiC基板,因此是很經濟的。
2:雷射加工裝置
4:靜止基台
6:第一滑塊
8、18:滾珠螺桿
10、20:脈衝馬達
11:SiC晶錠
11a:第一面(上表面)
11b:第二面(下表面)
12:加工進給機構
13、37:第一定向平面
14、24:導軌
15、39:第二定向平面
16:第二滑塊
17:垂直線
19:c軸
19a:交點
21:c面
22:分度進給機構
26、60、68:工作夾台
26a:吸引保持部
28:柱部
30:雷射光束照射機構
31:SiC晶圓(晶圓)
31a:SiC晶圓的正面
31b:SiC晶圓的背面
32:罩殼
33:分割預定線
34:雷射光束產生單元
35:元件
36:聚光器(雷射頭)
38:攝像單元
40:雷射振盪器
41:溝
42:重複頻率設定設備
43:改質層
44:脈衝寬度調整設備
45:裂隙
46:功率調整設備
47:保護膠帶
48:鏡子
49:分離面
50:聚光透鏡
52:柱部
53:開口
54:按壓機構
56:頭部
58:按壓構件
62:切削單元
64:切削刀
70:磨削單元
72:主軸
74:輪座
76:磨削輪
78:螺絲
80:輪基台
82:磨削磨石
D1:深度
W1:裂隙的寬度
W2:分度移動的預定量(分度 量)
A、Y1:箭頭(方向)
R、a、b:箭頭
X、Y、Z:方向
α:偏角
圖1是適合於實施本發明之晶圓的加工方法的雷射加工裝置的立體圖。
圖2是雷射光束產生單元的方塊圖。
圖3(A)是SiC晶錠的立體圖,圖3(B)是其正面圖。
圖4是在表面上形成有複數個元件之前的SiC晶圓的立體圖。
圖5是說明分離起點形成步驟之立體圖。
圖6是SiC晶圓的平面圖。
圖7是說明改質層形成步驟之示意剖面圖。
圖8是說明改質層形成步驟之示意平面圖。
圖9是實施元件形成步驟之後的SiC晶圓的正面側立體圖。
圖10是顯示分割起點形成步驟的第一實施形態的立體圖。
圖11是顯示分割起點形成步驟的第二實施形態的立體圖。
圖12是顯示在沿著分割預定線形成有分割起點的SiC晶圓的正面上貼附保護膠帶的情形之立體圖。
圖13(A)是顯示透過被貼附在正面的保護膠帶將SiC晶圓載置在工作夾台上的情形之立體圖,圖13(B)是被吸引保持在工作夾台上的SiC晶圓之立體圖。
圖14(A)、(B)是說明晶圓分離步驟之立體圖(其一)。
圖15是說明晶圓分離步驟之立體圖(其二)。
圖16是顯示磨削晶圓的背面以形成平坦化的磨削步驟之立體圖。
圖17是藉由分割起點被分割成一個個的元件晶片的SiC晶圓的背面側立體圖。
用以實施發明之形態
以下,參照圖式詳細地說明本發明的實施形態。參照圖1,所示為適合於實施本發明的晶圓的加工方法的雷射加工裝置2的立體圖。雷射加工裝置2包含有以可在X軸方向上移動之形式搭載於靜止基台4上的第一滑塊6。
第一滑塊6藉由以滾珠螺桿8及脈衝馬達10所構成之加工進給機構12而沿著一對導軌14在加工進給方向(亦即X軸方向)上移動。
第二滑塊16可在Y軸方向上移動地搭載於第一滑塊6上。亦即,第二滑塊16藉由以滾珠螺桿18及脈衝馬達20所構成之分度進給機構22而沿著一對導軌24在分度進給方向(亦即Y軸方向)上移動。
第二滑塊16上搭載有具有吸引保持部26a的工作夾台26。工作夾台26藉由加工進給機構12及分度進給機構22而可在X軸方向及Y軸方向上移動,並且藉由收容於第2滑塊16中的馬達而旋轉。
靜止基台4上豎立設置有柱部28,並且在此柱部28上安裝有雷射光束照射機構(雷射光束照射設備)30。雷射光束照射機構30是由收容於罩殼32中之圖2所示的雷射光 束產生單元34、及安裝於罩殼32前端的聚光器(雷射頭)36所構成。罩殼32之前端安裝有與聚光器36在X軸方向上成行且具有顯微鏡及相機之攝像單元38。
如圖2所示,雷射光束產生單元34包含有振盪產生YAG雷射或YVO4雷射之雷射振盪器40、重複頻率設定設備42、脈衝寬度調整設備44、及功率調整設備46。雖然並無特別圖示,但雷射振盪器40具有布如士特窗(brewster window),且由雷射振盪器40出射之雷射光束為直線偏光的雷射光束。
藉由雷射光束產生單元34的功率調整設備46調整至預定功率的脈衝雷射光束,是藉由聚光器36的鏡子48而被反射,進而藉由聚光透鏡50將聚光點定位在已保持於工作夾台26上的作為被加工物之SiC晶圓(晶圓)31的內部來進行照射。
參照圖3(A),所示為SiC晶錠(以下,有時簡稱為晶錠)11的立體圖。圖3(B)為圖3(A)所示的SiC晶錠11的正面圖。
晶錠11具有第一面(上表面)11a及與第一面11a為相反側的第二面(下表面)11b。晶錠11之上表面11a為了成為雷射光束之照射面而被研磨成鏡面。
晶錠11具有第一定向平面(orientation flat)13、及與第一定向平面13正交之第二定向平面15。第一定向平面13的長度形成為較第二定向平面15的長度長。
晶錠11具有:相對於上表面11a之垂直線17朝第 二定向平面15方向傾斜偏角α的c軸19、及與c軸19正交的c面21。c面21相對於晶錠11的上表面11a傾斜偏角α。一般來說,六方晶體單晶晶錠11中,與較短的第二定向平面15之伸長方向正交的方向是c軸的傾斜方向。
c面21在晶錠11中,在晶錠11之分子層級上設定為無數個。本實施形態中,是將偏角α設定為4°。然而,偏角α並不限定於4°,例如可以自由地設定在1°~6°的範圍內來製造晶錠11。
再次參照圖1,靜止基台4的左側固定有柱部52,在此柱部52上是透過形成於柱部52之開口53而將按壓機構54搭載成可在上下方向上移動。
參照圖4,所示為從SiC晶錠11切片,且至少將第一面(正面)31a鏡面加工之SiC晶圓31的立體圖。SiC晶圓31整體由SiC基板形成,且具有約700μm之厚度。
SiC晶圓31具有第一定向平面37及與第一定向平面37正交之第二定向平面39。第一定向平面37的長度形成為較第二定向平面39的長度長。
在此,由於SiC晶圓31是以線鋸將圖3所示之SiC晶錠11切片而成的晶圓,因此為第一定向平面37與晶錠11的第一定向平面13對應,且第二定向平面39與晶錠11的第二定向平面15對應之晶圓。
並且,晶圓31具有相對於正面31a的垂直線朝第二定向平面39方向傾斜偏角α的c軸19、及與c軸19正交之c面21(參照圖3)。c面21會相對於晶圓31的正面31a傾斜偏角 α。在此SiC晶圓31中,與短的第2定向平面39的伸長方向正交的方向為c軸19的傾斜方向。
在本發明的晶圓的加工方法中,首先,是實施分離起點形成步驟,該分離起點形成步驟是如圖5所示,將相對於已保持在工作夾台26上的晶圓31具有穿透性之波長(例如1064nm的波長)的雷射光束的聚光點從由SiC基板構成的晶圓31的第二面(背面)31b定位到第一面(正面)31a附近,並且將聚光點與晶圓31相對地移動,來對背面31b照射雷射光束,以形成與正面31a平行的改質層43以及從改質層43沿著c面21傳播的裂隙45來作為分離起點(參照圖7)。
SiC晶圓31因為是將於正面31a形成複數個元件之前的正面31a鏡面加工的晶圓,因此亦可做成以工作夾台26吸引保持晶圓31之背面31b側,而將雷射光束的聚光點定位到第一面(正面)31a附近,並且將聚光點與晶圓31相對地移動來對正面31a照射雷射光束,以形成由改質層43與裂隙45所構成的分離起點。
如圖5及圖6所示,在分離起點形成步驟中,是使保持有晶圓31的工作夾台26旋轉,以使晶圓31的第二定向平面39在X軸方向上成行。
亦即,將工作夾台26旋轉成如圖6所示,使與形成有偏角α的方向Y1正交的方向,換言之,與c軸19相對於晶圓31的背面31b的垂直線17之與背面31b的交點19a存在之方向正交的方向-亦即與第二定向平面39平行的箭頭A方向,在X軸方向上成行。
藉此,雷射光束可沿著與形成有偏角α之方向正交的方向A掃描。換言之,與形成有偏角α之方向Y1正交的A方向成為工作夾台26的加工進給方向。
在本發明的晶圓的加工方法中,將由聚光器36出射的雷射光束的掃瞄方向設定為與晶圓31之形成有偏角α之方向Y1正交的箭頭A方向是很重要的。
亦即,本發明的晶圓的加工方法的特徵之點在於發現了如下的情形:藉由將雷射光束的掃瞄方向設定為如上述的方向,由形成於晶圓31的內部的改質層傳播的裂隙會沿著c面21伸長得非常長。
此分離起點形成步驟,包含改質層形成步驟及分度步驟,如圖6所示,該改質層形成步驟是c軸19相對於背面31b的垂直線17傾斜偏角α角度,並在與於c面21與背面31b形成有偏角α之方向正交的方向上,亦即與圖6的箭頭Y1方向正交的方向(亦即A方向)上,將雷射光束的聚光點相對地移動,以如圖7所示,在晶圓31的內部形成改質層43以及從改質層43沿著c面21傳播的裂隙45,該分度步驟是如圖8所示,在形成有偏角的方向(亦即Y軸方向)上將聚光點相對地移動而分度進給預定量。
如圖7及圖8所示,當將改質層43在X軸方向上形成為直線狀時,即由改質層43的兩側沿c面21傳播而形成裂隙45。本實施形態之晶圓的加工方法中,包含分度量設定步驟,該分度量設定步驟是測量由直線狀的改質層43朝c面21方向傳播而形成之裂隙45的寬度,以設定聚光點之分度 量。
在分度量設定步驟中,如圖7所示,當將由直線狀之改質層43朝c面方向傳播而形成於改質層43之單側的裂隙45的寬度設為W1時,應分度移動的預定量(分度量)W2是設定為W1以上且2W1以下。
在此,將理想之實施形態的分離起點形成步驟之雷射加工條件設定如下。
光源:Nd:YAG脈衝雷射
波長:1064nm
重複頻率:80kHz
平均輸出:3.2W
脈衝寬度:4ns
光點點徑:10μm
進給速度:500mm/s
分度量:400μm
在上述之雷射加工條件中,於圖7中,將由改質層43沿著c面21傳播之裂隙45的寬度W1設定為大約250μm,且將分度量W2設定為400μm。
然而,雷射光束之平均輸出並不限定於3.2W,在本實施形態之加工方法中,是將平均輸出設定於2W~4.5W而得到良好的結果。當平均輸出2W時,裂隙25之寬度W1成為大約100μm,而當平均輸出4.5W時,裂隙25之寬度W1則成為大約350μm。
平均輸出小於2W及較4.5W大時,因為無法在晶 圓31內部形成良好的改質層43,所以照射之雷射光束的平均輸出在2W~4.5W的範圍內較理想,本實施形態中是將平均輸出3.2W的雷射光束照射於晶圓31。在圖7中,將形成改質層43之聚光點的距離背面31b的深度D1設定在為相當於元件晶片之成品厚度之區域的650μm上。
實施元件形成步驟,該元件形成步驟是如圖7所示,分度進給預定量,並且在晶圓31的整個區域的距離背面31b深度D1的位置上,當複數個改質層43以及由改質層43沿著c面21延伸的裂隙45之形成結束後,在晶圓31之正面31a形成複數個元件。
此元件形成步驟是使用以往公知的光刻(photolithography)技術來實施。參照圖9,所示為實施元件形成步驟後的SiC晶圓31的正面側立體。
於SiC晶圓31的正面31a上,藉由光刻(photolithography)而形成有電力元件(power device)等之複數個元件35。各元件35是形成於藉由複數條形成為格子狀的分割預定線33所區劃出的各區域中。
在實施元件形成步驟後,實施分割起點形成步驟,其為沿著形成於第一面(正面)31a之分割預定線33,形成深度相當於元件晶片的成品厚度之分割起點。
參照圖10,所示為此分割起點形成步驟的第一實施形態。在分割起點形成步驟的第一實施形態中,是使切削單元62的切削刀64朝箭頭A方向高速旋轉,而在於第一方向上伸長的分割預定線33上切入至相當於元件晶片的成品 厚度之深度,並藉由將工作夾台60在X軸上加工進給來形成成為分割起點的溝41。
藉由切削單元62在Y軸方向上分度進給,沿著在第一方向上伸長的所有的分割預定線33形成構成分割起點之同樣的溝41。其次,將工作夾台60旋轉90°後,沿著在與第一方向正交的第二方向上伸長的所有分割預定線33形成同樣的溝41來作為分割起點。
本實施形態的分割起點形成步驟的加工條件是例如以下所示。
切削刀64之厚度:30μm
切削刀64之直徑:φ50mm
切削刀64之旋轉速度:20000rpm
進給速度:10mm/s
參照圖11,所示為分割起點形成步驟的第二實施形態的立體圖。在第二實施形態的分割起點形成步驟中,是將對於SiC晶圓31具有吸收性之波長(例如355nm)的雷射光束透過聚光器36而沿著SiC晶圓31的分割預定線33照射,並藉由燒蝕加工形成作為沿著分割預定線33之分割起點的溝41。
將工作夾台26在Y軸方向上分度進給,並且沿著在第一方向上伸長的所有的分割預定線33形成溝41後,將工作夾台26旋轉90°,接著,沿著在與第一方向正交的第二方向上伸長的所有分割預定線33形成作為分割起點之同樣的溝41。
分割起點形成步驟的第二實施形態的加工條件是例如以下所示。
光源:Nd:YAG脈衝雷射
雷射光束的波長:355nm
重複頻率:50kHz
光點點徑:10μm
平均輸出:2W
進給速度:100mm/s
雖然並無特別圖示,但在分割起點形成步驟的第三實施形態中,是由SiC晶圓31的正面31a或背面31b照射對於SiC晶圓31具有穿透性之波長(例如1064nm)的雷射光束,以沿著分割預定線33在正面附近(距離正面31a約50μm的深度)形成作為分割起點的改質層。
將工作夾台26在Y軸方向上分度進給,並且沿著在第一方向上伸長的所有分割預定線33形成同樣的改質層後,將工作夾台26旋轉90°,接著,沿著在與第一方向正交的第二方向上伸長的所有分割預定線33形成作為分割起點之同樣的改質層。
分割起點形成步驟的第三實施形態的加工條件是例如以下所示。
光源:Nd:YAG脈衝雷射
雷射光束的波長:1064nm
重複頻率:50kHz
光點點徑:10μm
平均輸出:1W
進給速度:300mm/s
實施分割起點形成步驟後,如圖12所示,實施保護膠帶貼附步驟,其為將保護膠帶47貼附於在正面31a上沿著分割預定線33形成有作為分割起點的溝41之晶圓31的正面31a上。
將保護膠帶47貼附在晶圓31的正面31a上後,如圖13(A)所示,將保護膠帶47側朝下來將晶圓31載置在工作夾台26上,並使負壓作用在工作夾台26的吸引保持部26a上,以如圖13(B)所示,以工作夾台26吸引保持晶圓31,且使晶圓31的背面31b露出。
實施晶圓分離步驟,該晶圓分離步驟是在隔著保護膠帶47將晶圓31吸引保持在工作夾台26上之後,賦予外力以從由改質層43及裂隙45構成的分離起點將晶圓分離,而將在正面31a上具有複數個元件35的晶圓薄化至約50μm左右。
此晶圓分離步驟是藉由例如像是圖14所示之按壓機構54而實施。按壓機構54包含有:藉由內置於柱部52內之移動機構而在上下方向上移動的頭部56;及相對於頭部56,如圖14(B)所示地朝箭頭R方向旋轉之按壓構件58。
如圖14(A)所示,將按壓機構54定位在已保持於工作夾台26上之晶圓31的上方,並如圖14(B)所示,將頭部56下降至按壓構件58壓接於晶圓31的背面31b為止。
在已將按壓構件58壓接於晶圓31的背面31b的狀 態下,當將按壓構件58朝箭頭R方向旋轉時,於晶圓31上會產生扭轉應力,將晶圓31由形成有改質層43以及裂隙45的分離起點破斷,而能將晶圓31分離成被保持在工作夾台26上的晶圓31A及晶圓31B。
被保持在工作夾台26上的晶圓31A的背面之分離面49上,會變得殘存有一部分的改質層43與裂隙45,並如圖15以及圖16所示,於分離面49上形成有微細的凹凸。因此,在本發明的晶圓的加工方法中,宜實施對晶圓31A的背面之分離面49進行磨削以形成平坦化的磨削步驟。
在此磨削步驟中,是如圖16所示,在磨削裝置的工作夾台68上隔著保護膠帶47吸引保持晶圓31A,並使分離面49露出。磨削裝置的磨削單元70包含有藉由馬達而被旋轉驅動的主軸72、固定在主軸72的前端的輪座74、及藉由複數個螺絲78可拆裝地裝設在輪座74上的磨削輪76。磨削輪76是由環狀的輪基台80、及固接在輪基台80的下端部外周的複數個磨削磨石82所構成。
在磨削步驟中,是在使工作夾台68朝箭頭a所示之方向以例如300rpm的速度旋轉時,使磨削輪76朝箭頭b所示之方向以例如6000rpm的速度旋轉,並且驅動磨削單元進給機構,以使磨削輪76的磨削磨石82接觸於晶圓31A的分離面49。
然後,一邊以預定之磨削進給速度(例如0.1μm/s)將磨削輪76往下方磨削進給預定量一邊磨削晶圓31A的分離面49以形成平坦化。藉此,如圖17所示,晶圓31A的背面 31b會因殘存的改質層43以及裂隙45被去除而成為平坦面,並且使溝41露出於背面31b而將晶圓31A分割成一個個的元件晶片。
另一方面,在分割起點形成步驟的第3實施形態中,作為分割起點而形成有改質層的情形下,作為分割起點而形成之改質層是藉由為磨削輪76的按壓力而破斷,以將晶圓31A分割成一個個的元件晶片。
在磨削已薄化的晶圓31A的背面以形成平坦化時,只要將晶圓31A的背面磨削1~5μm左右即可,因而可以將磨削磨石82的磨耗量抑制至4~25μm左右。
又,由於在圖15中由晶圓31A分離的晶圓31B可以作為SiC基板而再利用,因此是非常經濟的。
作為分離起點形成步驟的其他實施形態,在將由改質層43以及裂隙45構成的分離起點形成於與溝41重疊的位置上的情況下,可以在實施圖15所示的晶圓分離步驟時,將被保持在工作夾台26上的晶圓31A分割成一個個的元件晶片。
在這個情形下,較理想的也是,磨削晶圓31A的背面31b並將殘存於背面31b的改質層43以及裂隙45去除以將背面31b形成為平坦面。
26:工作夾台
31:SiC晶圓(晶圓)
31a:SiC晶圓的正面
31b:SiC晶圓的背面
43:改質層
45:裂隙
D1:深度
W1:裂隙的寬度
W2:分度移動的預定量(分度量)
X、Y、Z:方向

Claims (4)

  1. 一種晶圓的加工方法,是將具有第一面及與該第一面為相反側的第二面、從該第一面到該第二面之c軸、以及與該c軸正交之c面的SiC基板所構成的晶圓分割成一個個的元件晶片,該晶圓的加工方法之特徵在於具備:分離起點形成步驟,將對SiC基板具有穿透性之波長的雷射光束之聚光點從該第一面或該第二面定位至相當於元件晶片的成品厚度之區域上,並且一邊將該聚光點與SiC基板相對地移動一邊照射雷射光束,以形成與該第一面平行之改質層及從該改質層沿c面延伸之裂隙來作為分離起點;元件形成步驟,實施該分離起點形成步驟後,將複數個元件形成在該第一面上以複數條相互交叉的分割預定線所區劃出的區域中;分割起點形成步驟,實施該元件形成步驟後,沿形成於該第一面的該複數條分割預定線形成深度相當於元件晶片的成品厚度之分割起點;保護構件配置步驟,實施該分割起點形成步驟後,在該第一面配置保護構件;及晶圓分離步驟,實施該保護構件配置步驟後,賦予外力以由該分離起點將具有該第二面之晶圓從具有形成有複數個元件的該第一面的晶圓分離,且該分離起點形成步驟包含: 改質層形成步驟,該c軸相對於該第二面之垂直線傾斜偏角角度,並在與於該第二面及該c面之間形成偏角之方向正交的方向上相對地移動雷射光束的聚光點以形成直線狀的改質層;及分度步驟,在形成該偏角的方向上將該聚光點相對地移動而分度移動預定量。
  2. 如請求項1之晶圓的加工方法,其中,在該晶圓分離步驟中,藉由將具有該第二面的晶圓分離,以將具有該第一面的晶圓分割成一個個的元件晶片。
  3. 如請求項2之晶圓的加工方法,其中,實施該晶圓分離步驟後,將複數個元件晶片的背面磨削以形成平坦化。
  4. 如請求項1之晶圓的加工方法,其中,實施該晶圓分離步驟後,磨削具有形成有複數個元件之該第一面的晶圓的背面以形成平坦化,並且將晶圓分割成一個個的元件晶片。
TW105121416A 2015-08-18 2016-07-06 晶圓的加工方法 TWI694511B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015-160849 2015-08-18
JP2015160849A JP6486240B2 (ja) 2015-08-18 2015-08-18 ウエーハの加工方法

Publications (2)

Publication Number Publication Date
TW201712747A TW201712747A (zh) 2017-04-01
TWI694511B true TWI694511B (zh) 2020-05-21

Family

ID=57961353

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105121416A TWI694511B (zh) 2015-08-18 2016-07-06 晶圓的加工方法

Country Status (8)

Country Link
US (1) US9620415B2 (zh)
JP (1) JP6486240B2 (zh)
KR (1) KR102369760B1 (zh)
CN (1) CN106469680B (zh)
DE (1) DE102016214986A1 (zh)
MY (1) MY174538A (zh)
SG (1) SG10201606385RA (zh)
TW (1) TWI694511B (zh)

Families Citing this family (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6506520B2 (ja) * 2014-09-16 2019-04-24 株式会社ディスコ SiCのスライス方法
JP6399913B2 (ja) 2014-12-04 2018-10-03 株式会社ディスコ ウエーハの生成方法
JP6358941B2 (ja) 2014-12-04 2018-07-18 株式会社ディスコ ウエーハの生成方法
JP6391471B2 (ja) * 2015-01-06 2018-09-19 株式会社ディスコ ウエーハの生成方法
JP6395633B2 (ja) 2015-02-09 2018-09-26 株式会社ディスコ ウエーハの生成方法
JP6395632B2 (ja) 2015-02-09 2018-09-26 株式会社ディスコ ウエーハの生成方法
JP6425606B2 (ja) 2015-04-06 2018-11-21 株式会社ディスコ ウエーハの生成方法
JP6429715B2 (ja) * 2015-04-06 2018-11-28 株式会社ディスコ ウエーハの生成方法
JP6494382B2 (ja) 2015-04-06 2019-04-03 株式会社ディスコ ウエーハの生成方法
JP6472333B2 (ja) 2015-06-02 2019-02-20 株式会社ディスコ ウエーハの生成方法
JP6482389B2 (ja) * 2015-06-02 2019-03-13 株式会社ディスコ ウエーハの生成方法
JP6478821B2 (ja) * 2015-06-05 2019-03-06 株式会社ディスコ ウエーハの生成方法
JP6552898B2 (ja) * 2015-07-13 2019-07-31 株式会社ディスコ 多結晶SiCウエーハの生成方法
JP6482423B2 (ja) 2015-07-16 2019-03-13 株式会社ディスコ ウエーハの生成方法
JP6472347B2 (ja) 2015-07-21 2019-02-20 株式会社ディスコ ウエーハの薄化方法
JP6482425B2 (ja) 2015-07-21 2019-03-13 株式会社ディスコ ウエーハの薄化方法
JP6486239B2 (ja) * 2015-08-18 2019-03-20 株式会社ディスコ ウエーハの加工方法
JP6602207B2 (ja) * 2016-01-07 2019-11-06 株式会社ディスコ SiCウエーハの生成方法
JP6690983B2 (ja) 2016-04-11 2020-04-28 株式会社ディスコ ウエーハ生成方法及び実第2のオリエンテーションフラット検出方法
JP2018093046A (ja) * 2016-12-02 2018-06-14 株式会社ディスコ ウエーハ生成方法
JP6773539B2 (ja) * 2016-12-06 2020-10-21 株式会社ディスコ ウエーハ生成方法
JP6858587B2 (ja) 2017-02-16 2021-04-14 株式会社ディスコ ウエーハ生成方法
JP7250695B2 (ja) 2017-04-20 2023-04-03 ジルテクトラ ゲゼルシャフト ミット ベシュレンクテル ハフツング 規定どおりに配向された改質線を有するウェハの製造方法
JP6935224B2 (ja) * 2017-04-25 2021-09-15 株式会社ディスコ ウエーハの生成方法
JP6994852B2 (ja) 2017-06-30 2022-01-14 株式会社ディスコ レーザー加工装置及びレーザー加工方法
US10388526B1 (en) 2018-04-20 2019-08-20 Semiconductor Components Industries, Llc Semiconductor wafer thinning systems and related methods
US11121035B2 (en) 2018-05-22 2021-09-14 Semiconductor Components Industries, Llc Semiconductor substrate processing methods
US10896815B2 (en) 2018-05-22 2021-01-19 Semiconductor Components Industries, Llc Semiconductor substrate singulation systems and related methods
US20190363018A1 (en) 2018-05-24 2019-11-28 Semiconductor Components Industries, Llc Die cleaning systems and related methods
US11830771B2 (en) 2018-05-31 2023-11-28 Semiconductor Components Industries, Llc Semiconductor substrate production systems and related methods
US10468304B1 (en) 2018-05-31 2019-11-05 Semiconductor Components Industries, Llc Semiconductor substrate production systems and related methods
JP7154860B2 (ja) * 2018-07-31 2022-10-18 株式会社ディスコ ウエーハの加工方法
JP6630411B1 (ja) * 2018-08-10 2020-01-15 ローム株式会社 SiC半導体装置
DE212019000150U1 (de) 2018-08-10 2020-07-29 Rohm Co., Ltd. SiC-Halbleiterbauteil
US10825733B2 (en) 2018-10-25 2020-11-03 United Silicon Carbide, Inc. Reusable wide bandgap semiconductor substrate
US10562130B1 (en) 2018-12-29 2020-02-18 Cree, Inc. Laser-assisted method for parting crystalline material
US11024501B2 (en) 2018-12-29 2021-06-01 Cree, Inc. Carrier-assisted method for parting crystalline material along laser damage region
US10576585B1 (en) 2018-12-29 2020-03-03 Cree, Inc. Laser-assisted method for parting crystalline material
DE102019201438A1 (de) * 2019-02-05 2020-08-06 Disco Corporation Verfahren zum Herstellen eines Substrats und System zum Herstellen eines Substrats
US10611052B1 (en) 2019-05-17 2020-04-07 Cree, Inc. Silicon carbide wafers with relaxed positive bow and related methods
TW202109638A (zh) * 2019-05-23 2021-03-01 日商東京威力科創股份有限公司 基板處理方法及基板處理系統
JP7330771B2 (ja) * 2019-06-14 2023-08-22 株式会社ディスコ ウエーハの生成方法およびウエーハの生成装置
JP7129397B2 (ja) * 2019-12-06 2022-09-01 ローム株式会社 SiC半導体装置
JP7321652B2 (ja) * 2019-12-27 2023-08-07 株式会社ディスコ ディスプレイパネルの製造方法
KR102152007B1 (ko) * 2020-03-18 2020-09-04 주식회사 탑 엔지니어링 기판 절단 방법 및 기판 절단 장치

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050059183A1 (en) * 2003-09-11 2005-03-17 Yusuke Nagai Wafer processing method
US20100009549A1 (en) * 2008-07-11 2010-01-14 Disco Corporation Wafer treating method
TW201411706A (zh) * 2012-05-23 2014-03-16 Hamamatsu Photonics Kk 加工對象物切斷方法、加工對象物及半導體元件

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4731050B2 (ja) 2001-06-15 2011-07-20 株式会社ディスコ 半導体ウエーハの加工方法
JP2007048958A (ja) * 2005-08-10 2007-02-22 Renesas Technology Corp 半導体装置の製造方法および半導体装置
KR20070018713A (ko) * 2005-08-10 2007-02-14 가부시끼가이샤 르네사스 테크놀로지 반도체 장치의 제조 방법 및 반도체 장치
JP5446325B2 (ja) * 2009-03-03 2014-03-19 豊田合成株式会社 レーザ加工方法および化合物半導体発光素子の製造方法
JP5370262B2 (ja) * 2010-05-18 2013-12-18 豊田合成株式会社 半導体発光チップおよび基板の加工方法
JP5480169B2 (ja) * 2011-01-13 2014-04-23 浜松ホトニクス株式会社 レーザ加工方法
JP5957794B2 (ja) * 2011-01-26 2016-07-27 日立化成株式会社 積層シート及び半導体装置の製造方法
JP6001931B2 (ja) * 2012-06-14 2016-10-05 株式会社ディスコ ウェーハの加工方法
JP6466692B2 (ja) * 2014-11-05 2019-02-06 株式会社ディスコ ウエーハの加工方法
JP6399913B2 (ja) * 2014-12-04 2018-10-03 株式会社ディスコ ウエーハの生成方法
JP6395634B2 (ja) * 2015-02-09 2018-09-26 株式会社ディスコ ウエーハの生成方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050059183A1 (en) * 2003-09-11 2005-03-17 Yusuke Nagai Wafer processing method
US20100009549A1 (en) * 2008-07-11 2010-01-14 Disco Corporation Wafer treating method
TW201411706A (zh) * 2012-05-23 2014-03-16 Hamamatsu Photonics Kk 加工對象物切斷方法、加工對象物及半導體元件

Also Published As

Publication number Publication date
DE102016214986A1 (de) 2017-02-23
US9620415B2 (en) 2017-04-11
KR20170021731A (ko) 2017-02-28
KR102369760B1 (ko) 2022-03-03
US20170053831A1 (en) 2017-02-23
MY174538A (en) 2020-04-24
CN106469680B (zh) 2020-02-21
JP2017041482A (ja) 2017-02-23
CN106469680A (zh) 2017-03-01
TW201712747A (zh) 2017-04-01
JP6486240B2 (ja) 2019-03-20
SG10201606385RA (en) 2017-03-30

Similar Documents

Publication Publication Date Title
TWI694511B (zh) 晶圓的加工方法
TWI684216B (zh) 晶圓的加工方法
TWI706454B (zh) 碳化矽(SiC)基板的分離方法
KR102384101B1 (ko) 웨이퍼의 박화 방법
JP6456228B2 (ja) 薄板の分離方法
KR102419485B1 (ko) 웨이퍼의 박화 방법
TWI683737B (zh) 晶圓的生成方法
TWI687560B (zh) 晶圓的生成方法
TWI699463B (zh) 晶圓的生成方法
TW201736071A (zh) 晶圓的生成方法
CN109421179B (zh) 加工方法